JP2005151713A - Control gain switching method for motor speed controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly rigid, stable, and highly accurate rotational speed control method, by eliminating shocks during switching in the gain switching of PLL control. <P>SOLUTION: The rotational speed control method is a control gain switching method for a motor speed controller. When a first PLL control loop is applied in a fixed speed region, a proportional gain 1 of a proportional controller during drawing-in and a proportional gain 2 of the proportional controller during PLL lock are respectively provided, and the proportional gain of the proportional controller is continuously changed from the proportional gain 1 to the proportional gain 2, by using a low-pass filter accompanying the completion of the PLL lock. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a control gain switching method of an electric motor speed control device that performs PLL (Phase Locked Loop: hereinafter referred to as PLL) rotational speed control with high rigidity, stability and high accuracy.

A speed control loop and a PLL control loop are used to realize highly accurate rotational speed control, and quick pull-in to the target speed and stability at the time of locking are realized by gain switching and a filter effect as follows.
The PLL control has a gain at the time of pull-in and a gain at the time of lock. By switching between these, quick pull-in to the target speed and high-accuracy rotation speed control are realized (Japanese Patent Application 2003-172059). In the acceleration region, a speed control loop is applied, and after the motor speed reaches the switching speed range set by a parameter that can be changed in advance, it is regarded as a constant speed region and the PLL control loop is applied. The pull-in operation is performed with the pull-in proportional gain, the phase lead / lag compensation gain or the differential gain shown in FIG. 7 or FIG. 8, and when the PLL lock is completed, these gains are switched to the PLL lock gain. Retraction is done quickly (Japanese Patent Application 2003-172059).
In addition, some gains are set in advance by judging from the speed range and control stability (see, for example, Patent Document 1).
In addition, there is a digital filter that changes continuity at the time of locking by changing filter characteristics at the time of locking and switching coefficients (for example, see Patent Document 2).
Japanese Patent Laid-Open No. 5-168270 JP-A-6-319283

However, in the conventional gain switching method, since the gain changes in a stepped manner, if the difference between the switching gains is large, the system may become unstable due to a shock at the time of switching and the lock may be released. There was a problem that the rigidity of the machine could not be increased.
The present invention has been made in view of such various problems. When the PLL control is locked, the pull-in gain is continuously changed from the lock-in gain to the lock gain using a low-pass filter or linear interpolation using a moving average. To eliminate the shock when switching. A filter is used for each preset gain. In this way, it is an object to provide high-precision rotational speed control that is highly rigid and stable.

In order to solve the above problem, the present invention uses a pull-in gain when performing PLL control in a constant speed region, and then quickly pulls in the target speed and then switches the gain to the lock when the lock is completed. However, at this time, by changing the gain continuously from the time of pulling to the time of locking using a low-pass filter or linear interpolation by moving average, the shock at the time of switching is suppressed, and the rotation speed control with high rigidity, stability and high accuracy is achieved. It is characterized by being realized.
In the PLL control, during the pull-in, the gain to the target speed is quickly performed by setting the gain of the phase lead / lag compensation controller shown in the control block of FIG. 1 or the differential gain of the PD controller shown in the control block of FIG. . In this case, the proportional gain needs to be set low. During locking, it is necessary to set the proportional gain high to increase the rigidity. In this case, the gain of the phase lead / lag compensation controller or the differential gain of the PD controller, which easily reacts to disturbances and affects the speed ripple or the like, needs to be set low.
From these ideas, the following is performed.
The proportional gain, phase lead / lag compensation gain or differential gain for pull-in, and the proportional gain, phase lead / lag compensation gain or differential gain for lock are set in advance by parameters that can be changed.
PLL control is started, and the pull-in operation is performed using the pull-in gain. When the PLL lock is completed, each gain is switched to that for locking. At this time, each gain is continuously switched using a low-pass filter or linear interpolation based on moving average so that the initial value pull-in gain becomes the final value lock gain.
For these gain switching, only proportional gain is switched continuously, only phase lead / lag compensation gain or differential gain is switched continuously, and either proportional gain, phase lead / lag compensation gain or differential gain is switched continuously. Make any of the selections possible.
Such a control gain switching suppresses a shock at the time of switching, and enables a highly rigid, stable and highly accurate rotation speed control.

  According to the method of the present invention, when performing constant rotation control of an electric motor by PLL control, there is an effect that a high-rigidity and stable high-accuracy rotational speed control can be realized without a shock at the time of switching when the PLL lock is completed.

  Hereinafter, specific examples of the method of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram of an electric motor speed control apparatus as a first embodiment for carrying out the method of the present invention. A speed command generator 3 that gives a speed command for controlling the rotation of the electric motor 5, a first PLL control loop 1 that performs PLL control, and a current command that is output from the first PLL control loop is converted into power and the power that is given to the motor It has the converter 4 and the encoder 6 which outputs the said motor rotation information. The first PLL control loop 1 includes a reference command clock generator 11 that generates a clock serving as a reference command in accordance with a speed command from the speed command generator 3, and a time counter that is output from the reference command clock generator 11. A phase comparator 12 that calculates a difference of a time counter obtained from a pulse converter 16 that converts a signal from the encoder 6 into a pulse, a proportional controller 13 that proportionally controls the output of the phase comparator 12, and the proportional controller 13 includes a phase lead / lag compensation controller 14 that compensates for the phase lead / lag compensation for the 13 outputs, and a low-pass filter 15 that performs a filter process on the output of the phase lead / lag compensation controller 14 to calculate a current command.

FIG. 3 shows a flowchart of the control gain switching sequence of the first embodiment. The control mode is set to the first PLL control loop in the constant speed region (step S1).
At this time, the proportional gain of the proportional controller or the phase advance / delay compensation gain of the phase advance / delay compensation controller is switched to a gain for pull-in that is set in advance as a parameter (step S2). With the setting for pull-in, quick pull-in to the target speed is performed. It is determined whether the PLL lock has been completed. Specifically, as a determination method, the difference between the time counters, which is an output result of the phase comparator, is compared with a preset set value, and if it is smaller than the set value, it is determined that the value is within the allowable value. (Step S3). When it is determined that the PLL lock has been completed, the proportional gain of the proportional controller or the phase lead / lag compensation gain of the phase lead / lag compensation controller is switched to a lock gain set in advance by parameters. At this time, in order to perform switching smoothly, it is continuously changed from a pull-in gain to a lock gain using a low-pass filter. (Step S4).

FIG. 5 shows a block diagram of control gain switching in the first embodiment.
If the proportional gain for pull-in of the proportional controller is proportional gain 1, and the proportional gain for lock is proportional gain 2, then the proportional gain at the time of switching is
It is assumed that proportional gain = proportional gain 1 + LPF (proportional gain 2−proportional gain 1).
The LPF (proportional gain 2 -proportional gain 1) represents the output of the low-pass filter of (proportional gain 2 -proportional gain 1) (FIG. 5 (a)).
If the phase lead / lag compensation gain for pulling in the phase lead / lag compensation controller is phase lead / lag compensation gain 1 and the phase lead / lag compensation gain for lock is phase lead / lag compensation gain 2, then the phase lead / lag compensation gain at the time of switching is ,
Phase lead / lag compensation gain = phase lead / lag compensation gain 1−LPF (phase lead / lag compensation gain 1−phase lead / lag compensation gain 2).
The LPF (phase lead / lag compensation gain 1−phase lead / lag compensation gain 2) represents the output of the low-pass filter (phase lead / lag compensation gain 1−phase lead / lag compensation gain 2) (FIG. 5B).
These gains can be selected by selecting a parameter that can be set in advance using a low-pass filter with only a proportional gain, a phase-lag compensation gain with a low-pass filter, or both with a low-pass filter. 5 functions as a switch with / without a filter shown in FIG. The low-pass filter portion may be linear interpolation by moving average.
In this way, smooth switching is performed, and a highly rigid, stable and highly accurate rotational speed control state is obtained.

FIG. 2 is a block diagram of a motor speed control apparatus as a second embodiment for carrying out the method of the present invention. The second PLL control loop 2 includes a reference command clock generator 21 that generates a clock serving as a reference command in response to a speed command from the speed command generator, a time counter output from the reference command generator, and an encoder. A phase comparator 22 that calculates a difference of a time counter obtained from a pulse converter 26 that converts a signal into a pulse, a proportional controller 23 that proportionally controls the output of the phase comparator, and a proportional derivative with respect to the output of the proportional controller A PD controller 24 that performs control and a low-pass filter 25 that performs a filtering process on the output of the PD controller and calculates a current command.
FIG. 2 is obtained by replacing the phase lead / lag compensation controller 14 of FIG. 1 with a PD controller 24, and all other parts are the same.

FIG. 4 shows a flowchart of the control gain switching sequence of the second embodiment. The control mode is the second PLL control loop (step S5) in the constant speed region.
At this time, the proportional gain of the proportional controller or the differential gain of the PD controller is switched to a pull-in gain set in advance by parameters (step S6). With the setting for pull-in, quick pull-in to the target speed is performed. It is determined whether the PLL lock has been completed (step S7). When the PLL lock is completed, the proportional gain of the proportional controller or the differential gain of the PD controller is switched to the lock gain set in advance by parameters. At this time, in order to perform the switching smoothly, it is continuously changed from the pull-in gain to the lock gain using a low-pass filter (step S8).

FIG. 6 shows a block diagram of control gain switching in the second embodiment.
If the proportional gain for pull-in of the proportional controller is proportional gain 1, and the proportional gain for lock is proportional gain 2, then the proportional gain at the time of switching is
It is assumed that proportional gain = proportional gain 1 + LPF (proportional gain 2−proportional gain 1).
The LPF (proportional gain 2 -proportional gain 1) represents the output of the low-pass filter of (proportional gain 2 -proportional gain 1) (FIG. 6 (a)).
When the differential gain for pulling in the PD controller is set to differential gain 1 and the differential gain for locking is set to differential gain 2, the differential gain at the time of switching is
Differential gain = differential gain 1−LPF (differential gain 1−differential gain 2).
The LPF (differential gain 1−differential gain 2) represents the output of the low-pass filter of (differential gain 1−differential gain 2) (FIG. 6B).
In this way, smooth switching is performed, and a highly rigid, stable and highly accurate rotational speed control state is obtained.
These gain switching can be selected in the case of applying a low-pass filter only for proportional gain, applying a low-pass filter only for differential gain, and both applying a low-pass filter with a presettable parameter. Thus, it acts as a switch with / without a filter shown in FIG. The low-pass filter portion may be linear interpolation by moving average.

Control block diagram showing a first embodiment of the present invention Control block diagram showing a second embodiment of the present invention Flowchart showing the control gain switching sequence of the first embodiment The flowchart which shows the control gain switching sequence of 2nd Example. Block diagram showing control gain switching of the first embodiment Block diagram showing control gain switching of the second embodiment Flowchart showing the control gain switching sequence of the first prior art The flowchart which shows the control gain switching sequence of 2nd Example of prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st PLL control loop 2 2nd PLL control loop 3 Speed command generator 4 Power converter 5 Electric motor 6 Encoder 7, 15, 25 Low-pass filter 11, 21 Reference command clock generator 12, 22 Phase comparator 13, 23 Proportional controller 14 Phase lead / lag compensation controller 16, 26 Pulse converter 24 PD controller

Claims (8)

A motor speed control device comprising a first PLL control loop comprising a speed command generator, a reference command clock generator, a phase comparator, a proportional controller, a phase lead / lag compensation controller, a low pass filter and a pulse converter, a motor and an encoder In the control gain switching method,
When applying the first PLL control loop in a constant speed region, the proportional gain 1 of the proportional controller at the time of pull-in and the proportional gain 2 of the proportional controller at the time of PLL lock are set in advance. A control gain switching method for an electric motor speed control device, wherein a proportional gain is continuously changed from a proportional gain 1 to a proportional gain 2 using a low-pass filter.   When applying the first PLL control loop in the constant speed region, the phase lead / lag compensation gain 1 of the phase lead / lag compensation controller at the time of pull-in and the phase lead / lag compensation gain 2 of the phase lead / lag compensation controller at the time of PLL lock are set. The phase advance / delay compensation gain of the phase advance / delay compensation controller is continuously changed from the phase advance / delay compensation gain 1 to the phase advance / delay compensation gain 2 using a low-pass filter when the PLL lock is completed. A control gain switching method for an electric motor speed control device according to claim 1.   When applying the first PLL control loop in the constant speed region, the proportional gain 1 of the proportional controller at the time of pull-in, the phase advance / lag compensation gain 1 of the phase advance / lag compensation controller, and the proportional gain of the proportional controller at the time of PLL lock 2. The phase lead / lag compensation gain 2 of the phase lead / lag compensation controller is set in advance, and the proportional gain of the proportional controller is continuously changed from the proportional gain 1 to the proportional gain 2 using a low-pass filter when the PLL lock is completed. 2. The control gain switching of the motor speed control device according to claim 1, wherein the phase lead / lag compensation gain is continuously changed from the phase lead / lag compensation gain 1 to the phase lead / lag compensation gain 2 using a low-pass filter. Method.   In the control gain switching method, when the first PLL control loop is applied in a constant speed region, the proportional gain 1 of the proportional controller at the time of pull-in, the phase advance / lag compensation gain 1 of the phase advance / lag compensation controller, and the PLL lock time The proportional gain 2 of the proportional controller and the phase advance / delay compensation gain 2 of the phase advance / delay compensation controller are set in advance, and the proportional gain of the proportional controller is changed from the proportional gain 1 to the proportional gain 2 when the PLL lock is completed. 2. The motor speed according to claim 1, wherein the phase lead / lag compensation gain of the compensation controller is continuously changed from phase lead / lag compensation gain 1 to phase lead / lag compensation gain 2 using linear interpolation by moving average. Control gain switching method of control device. Control gain switching of a motor speed control device including a second PLL control loop, a motor and an encoder comprising a speed command generator, a reference command clock generator, a phase comparator, a proportional controller, a PD controller, a low pass filter, and a pulse converter In the method
When applying the second PLL control loop in a constant speed region, the proportional gain 1 of the proportional controller at the time of pull-in and the proportional gain 2 of the proportional controller at the time of PLL lock are set in advance. A control gain switching method for an electric motor speed control device, wherein a proportional gain is continuously changed from a proportional gain 1 to a proportional gain 2 using a low-pass filter.   When applying the second PLL control loop in the constant speed range, a differential gain 1 of the PD controller at the time of pulling in and a differential gain 2 of the PD controller at the time of PLL locking are set in advance, and the PD controller is set upon completion of the PLL lock. 6. The control gain switching method for an electric motor speed control device according to claim 5, wherein the differential gain is continuously changed from differential gain 1 to differential gain 2 using a low-pass filter.   When applying the second PLL control loop in the constant speed region, the proportional gain 1 of the proportional controller at the time of pulling, the differential gain 1 of the PD controller, the proportional gain 2 of the proportional controller at the time of PLL lock, the PD controller The differential gain 2 is set in advance, and the proportional gain of the proportional controller is continuously changed from the proportional gain 1 to the proportional gain 2 using a low-pass filter upon completion of the PLL lock, and at the same time, the differential gain of the PD controller is changed to the differential gain 1. 6. The method for switching the control gain of an electric motor speed control device according to claim 5, wherein the differential gain is continuously changed from 2 to 2 using a low-pass filter.   When applying the second PLL control loop in the constant speed region, the proportional gain 1 of the proportional controller at the time of pulling, the differential gain 1 of the PD controller, the proportional gain 2 of the proportional controller at the time of PLL lock, the PD controller The differential gain 2 is set in advance, and when the PLL lock is completed, the proportional gain of the proportional controller is changed from proportional gain 1 to proportional gain 2, and the differential gain of the PD controller is changed from differential gain 1 to differential gain 2. 6. The control gain switching method for the motor speed control device according to claim 5, wherein the control gain is continuously changed by using the motor speed control device.

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