JP2005151078A - Mos type image sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a MOS image sensor capable of decreasing the number of transistors and the number of wires in the case of providing two photoelectric conversion elements within one pixel, and of being completely compatible with an electronic shutter. <P>SOLUTION: In the MOS image sensor wherein a plurality of pixels arranged to be an array are provided on a semiconductor substrate and wires are formed among the pixels, two photoelectric conversion elements 31, 32; 41, 42; 51, 52; 61, 62 are respectively provided on pixels 30; 40; 50; 60, reset transistors 33, 36 provided within each pixel for discharging unnecessary electric charges of the photoelectric conversion elements and floating diffusion amplifier transistors 37, 38, 39 in total five transistors are employed, a transfer gate transistor 35 (36) for temporarily storing storage electric charges in response to each light receiving quantity among the photoelectric conversion elements is provided for each photoelectric conversion element. Thus, the photoelectric conversion elements of all pixels can be exposed in the same timing while employing a small number of transistors and wires. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a MOS type image sensor for detecting an incident optical signal as an electric signal, and more particularly to a MOS type image sensor which can be completely compatible with an electronic shutter and which has a reduced circuit scale and number of wires for an electric signal readout peripheral circuit. About.

  A MOS type image sensor typified by a CMOS image sensor is used as a solid-state image sensor of a digital still camera, a digital video camera, and more recently a small digital camera mounted on a mobile phone.

  FIG. 5 is a schematic diagram of the surface of a general MOS type image sensor. In the illustrated MOS type image sensor 10, a vertical scanning circuit 12 is provided on the right side of the light receiving surface 11, and a horizontal scanning circuit 13 is provided on the lower side. The light receiving surface 11 is provided with wirings 14 that run vertically and horizontally in a multilayer process, and each of the regions 15 that are defined by the wirings 14 that are in the form of a lattice (in this specification, regions 15). Each of the 15 pixels is referred to as a “pixel”.) An optical signal entering the pixel is converted into an electrical signal by a photoelectric conversion element (photodiode) provided below each region 15 (on the lower side of the paper). It is like.

  In each region 15, usually one photoelectric conversion element and a peripheral circuit for reading a signal from the photoelectric conversion element are provided. FIG. 6 is an equivalent circuit diagram of a photoelectric conversion element and a peripheral circuit described in Patent Document 1 below, and three transistors 19, 20, and 21 are connected to one photoelectric conversion element 18. Further, as wirings connected to the transistors 18, 20, and 21, four lines of VDD, reset RST, X selection, and signal readout are required.

  In the MOS type image sensor described in Patent Document 2 below, three photodiodes R, G, and B are stacked in the depth direction in one pixel, and red (R), green (G), and blue (B) Each photoelectric conversion signal is obtained from each photodiode. FIG. 7 is an equivalent circuit diagram in each pixel of this prior art. A total of nine transistors M1 to M9 are required for each photodiode, and VCC, VP, reset, ROW selection R, ROW selection G, ROW selection B, and signal readout (wiring connected to each transistor) A total of 7) is required.

US Pat. No. 5,471,515 US Pat. No. 5,965,875

  In recent years, solid-state imaging devices have increased in pixel count and density, and the distance between adjacent wirings 14 has become shorter and the wavelength order of incident light has decreased, so the amount of incident light reaching the photodiode has decreased and sensitivity has decreased. Is causing. For this reason, when a plurality of photodiodes are provided in one pixel to obtain photoelectric conversion signals of a plurality of colors from one pixel, the opening of each region 15 shown in FIG. 5 can be widened, which is advantageous in terms of sensitivity.

  On the other hand, however, when the number of wirings or the number of transistors provided in one pixel increases, a problem arises that a multi-layer process is required and the manufacturing yield deteriorates. Since this yield can be improved by reducing the number of manufacturing steps, it is necessary to reduce the number of wirings and the number of transistors.

  Therefore, the present applicant has previously proposed MOS type image sensors in which two photodiodes are provided in one pixel (Japanese Patent Application Nos. 2003-72102 and 2003-130732). When two photodiodes are provided in one pixel, the number of transistors and wirings are reduced compared to the case where three photodiodes are provided in one pixel, so that the yield is improved and the sensitivity is increased. You can enjoy the benefits.

  However, in order to make an image sensor provided with a plurality of photodiodes in one pixel fully compatible with an electronic shutter, it is necessary to increase the number of transistors and wirings provided in each pixel. Therefore, it is necessary to design a circuit that increases the number of transistors and the number of wirings as much as necessary to completely correspond to the electronic shutter.

  An object of the present invention is to provide a MOS type image sensor that can reduce the number of wirings and the number of transistors when a plurality of photoelectric conversion elements are provided in one pixel, and can completely correspond to an electronic shutter.

  The MOS image sensor of the present invention is a MOS image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and wiring is formed between the pixels, and two photoelectric conversion elements are provided for each pixel. At the same time, the number of reset transistors and floating diffusion amplifier transistors provided in each pixel for discharging unnecessary charges of the photoelectric conversion elements is made to be a total of five, and according to the amount of light received by each photoelectric conversion element. One transfer gate transistor for temporarily holding the accumulated charge is provided for each photoelectric conversion element.

  With this configuration, the number of transistors and the number of wirings can be reduced, and all the pixels can be exposed at the same timing, and the electronic shutter can be completely handled.

  The MOS image sensor according to the present invention is characterized in that the number of the wirings that partition the pixels in the vertical direction is three and the number of the wirings that partition in the horizontal direction is two.

  With this configuration, the number of wirings can be reduced, and the number of manufacturing processes can be reduced.

  The MOS image sensor of the present invention is a MOS image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and wiring is formed between the pixels. In each MOS pixel, two photoelectric conversion elements and Two reset transistors provided for each photoelectric conversion element and discharging unnecessary charges remaining in the corresponding photoelectric conversion element, and accumulated charges corresponding to the received light amount of the corresponding photoelectric conversion element provided for each photoelectric conversion element And two transfer gate transistors that are temporarily read out when a transfer signal is applied, and two signal read transistors that are provided corresponding to the respective transfer gate transistors and each output a signal corresponding to the temporarily held charge when a read signal is applied Common operation of the transistor and the two signal readout transistors when the readout signal is applied Characterized in that it comprises one driving transistor.

  With this configuration, the number of transistors and the number of wirings can be reduced, and all the pixels can be exposed at the same timing, and the electronic shutter can be completely handled.

  The MOS type image sensor of the present invention is characterized in that outputs of the two readout transistors of each pixel are connected to different wirings.

  With this configuration, photoelectric conversion signals from two photoelectric conversion elements in one pixel can be output simultaneously.

  The MOS image sensor of the present invention is a MOS image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and wiring is formed between the pixels. In each MOS pixel, two photoelectric conversion elements and , Two transfer gate transistors provided corresponding to each photoelectric conversion element, for reading out and temporarily storing the stored charge corresponding to the amount of light received by the corresponding photoelectric conversion element when a transfer signal is applied, and a selection signal provided for each transfer gate transistor Two selection transistors for outputting the temporary holding charge of the transfer gate transistor corresponding to the time of application to the subsequent stage, and a signal corresponding to the temporary holding charge output from the two selection transistors for outputting the read signal 1 One signal reading transistor and the signal reading transistor when the read signal is applied A region extending from the two photoelectric conversion elements to the signal reading transistor when each of the one driving transistor for operating the transistor, the two transfer gate transistors, and the two selection transistors is in a conductive state. And a common resetting transistor that discharges unnecessary charges remaining in the capacitor.

  Even with this configuration, the number of transistors and the number of wirings can be reduced, and all the pixels can be exposed at the same timing, and the electronic shutter can be completely handled.

  According to the present invention, the number of wirings and the number of transistors provided in each pixel can be reduced, and the electronic shutter can be completely handled, so that all pixels can be exposed at the same timing.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is an equivalent circuit diagram of a pixel portion of the MOS image sensor according to the first embodiment of the present invention. In this example, four pixels are illustrated. In the illustrated example, a first pixel 30, a second pixel 40, a third pixel 50, and a fourth pixel 60 are arranged in a square shape on a semiconductor substrate, and three pixels extending in the vertical direction are provided between the pixels. A total of five wires are provided, that is, the wires 3, 4, and 5 and two wires extending in the lateral direction.

  The two wirings extending in the horizontal direction are the wirings 6, 7 provided between the first pixel 30 and the second pixel 40 and the third pixel 50 and the fourth pixel 60. Wirings 7 and 8 are wirings between the two pixels 40 and the pixels provided on the upper side thereof, and wirings between the third pixel 50 and the fourth pixel 60 and the pixels provided on the lower side thereof.

  A power supply voltage VDD is applied to the wiring 4, a transfer signal is applied to the wiring 6, a ROW select signal is applied to the wiring 7, and a reset signal is applied to the wiring 8. Signal wirings 3 and 5 are signal readout wirings. Signals 1 and 2 described later are output from the signal wirings 3 and 5 on the right side of the pixels 30 and 50, respectively, and signals on the right side of the pixels 40 and 60 are output. Signals 3 and 4 described later are output from the wirings 3 and 5, respectively.

  Two photodiodes 31 and 32 are provided in the first pixel 30, and two photodiodes 41 and 42 are also provided in the second pixel 40 adjacent to the right.

  Now, the photodiode 31 converts the “Color 1” optical signal into an electrical signal, the photodiode 32 converts the “Color 2” optical signal into an electrical signal, and the photodiode 41 converts the “Color 3” optical signal. It is assumed that the photodiode 42 converts the “Color 4” optical signal into an electrical signal.

  Similarly, photodiodes 51 and 52 are provided in the third pixel 50 below the first pixel 30, and photodiodes 61 and 62 are provided in the fourth pixel 60 adjacent to the right side thereof. The photodiodes 51, 52, 61, 62 are opposite to the pixels 30, 40 in the upper stage, and respectively output optical signals of “Color 3”, “Color 4”, “Color 1”, “Color 2” as electrical signals. Convert to

  Seven MOS transistors 33 to 39 constituting a reset circuit, a floating diffusion amplifier, and the like are provided in the peripheral portion in the pixel 30, and seven MOS transistors 43 to 49 are also provided in the peripheral portion in the pixel 40. Seven MOS transistors 53 to 59 are also provided in the inner peripheral portion, and seven MOS transistors 63 to 69 are also provided in the peripheral portion in the pixel 60. Since the connection configuration of the seven MOS transistors in each pixel is the same, only the pixel 30 will be described below.

  In the embodiment shown in FIG. 1, when the color signals are read from the two photodiodes 31 and 32 provided in the pixel, the ROW select and the reset of the two photodiodes 31 and 32 are made common, respectively. The color signal of the color is output to the separate signal wirings 3 and 5.

  That is, the gates of the reset MOS transistors 33 and 34 are commonly connected to the wiring 8 to which the reset signal is applied, the sources of the transistors 33 and 34 are connected to the wiring 4, and the drain of the transistor 33 is the photodiode 31. And the drain of the transistor 34 is connected to the cathode of the photodiode 32 and the source of the MOS transistor 36 for the transfer gate. The drains of the transistors 35 and 36 are connected to the gates of the signal reading MOS transistors 37 and 38, respectively.

  The drain of the transistor 37 is connected to the signal line 3, the drain of the transistor 38 is connected to the signal line 5, and the sources of the transistors 37 and 38 are connected to the drain of the driving MOS transistor 39 in common. Are connected to the ROW select signal wiring 7, and the source of the transistor 39 is connected to the power supply wiring 4.

  FIG. 2 is a timing chart when an electronic shutter is applied to the MOS type image sensor of FIG. 1 and a photoelectric conversion signal is read from each photodiode. Since the MOS image sensor in the present embodiment includes the transfer gate transistors 35 and 36 described above, it is possible to perform imaging (exposure) at the same timing in all the pixels, and it is possible to completely correspond to an electronic shutter. The operation in the pixel 30 will be mainly described, but the operation in other pixels is the same.

  That is, the reset signal applied to all the wirings 8 in FIG. 1 is normally on, and the first transfer signal applied to all the wirings 6 in FIG. 1 immediately before the turn-off timing. T1 is turned on for a predetermined time. The transfer gate transistors 35 and 36 are turned on while the reset transistors 33 and 34 are turned on when the reset signal is turned on, so that the signal readout transistors 37 and 36 are transferred from the photodiodes 31 and 32. Unnecessary charges up to the sense gate 38 are discharged to the power supply wiring 4 through the reset transistors 33 and 34, and then the reset transistors 33 and 34 are cut off.

  Then, exposure to each of the photodiodes 31 and 32 is started from the reset signal off timing, and the second transfer signal T2 is turned on for a predetermined time while the reset signal is off. When the transfer signal T2 is turned on, the transfer gate transistors 35 and 36 become conductive, and the charges stored in the photodiodes 31 and 32 are moved to and held by the sense gates of the signal read transistors 37 and 38, and then reset. The signal is turned on. That is, the exposure time of each photodiode is from the timing when the reset signal is turned off to the timing when the second transfer signal T2 is turned on.

  Next, a ROW select signal, which is a pulse signal designating each pixel row, is sequentially applied from the uppermost pixel row to the lowermost pixel row to the wiring 7 provided for each pixel row. As a result, first, the transistors 39 and 49 of the pixels 30 and 40 in the uppermost row are turned on, and in the pixel 30, the current flows through the power supply wiring 4 → the transistor 39 → the transistor 37 → the signal wiring 3.

  This current value is a value corresponding to the charge held in the sense gate portion of the transistor 37, and as a result, a photoelectric conversion signal corresponding to Color 1 of the photodiode 31 is output to the signal wiring 3 as signal 1. In parallel with this, in the pixel 30, a current flows through the power supply wiring 4 → the transistor 39 → the transistor 38 → the signal wiring 5, and a photoelectric conversion signal corresponding to Color 2 of the photodiode 32 is output to the signal wiring 5 as signal 2. The

  Similarly, in the pixel 40, a photoelectric conversion signal corresponding to Color 3 of the photodiode 41 is output as signal 3 to the wiring 3 on the right side of the pixel 40, and a photodiode 42 is output to the wiring 5 on the right side of the pixel 40. A photoelectric conversion signal corresponding to Color 4 is output as signal 4.

  When a ROW select signal designating the pixels 50 and 60 is applied at the next timing, a photoelectric conversion signal corresponding to Color 3 of the photodiode 51 is output as signal 1 to the wiring 3 in the same manner as described above, and the photodiode A photoelectric conversion signal corresponding to Color 4 of 52 is output to the wiring 5 as signal 2, and a photoelectric conversion signal corresponding to Color 1 of the photodiode 61 is output to wiring 3 as signal 3 and corresponds to Color 2 of the photodiode 62. The photoelectric conversion signal thus output is output to the wiring 5 as signal 4.

  Thereafter, similarly, the photoelectric conversion signals of the respective pixel rows are read in order. In the MOS image sensor shown in FIG. 1, the first pixels 30 and the second pixels 50 are alternately arranged in the vertical direction, and the second pixels 40 and the fourth pixels 60 are alternately arranged in the vertical direction. Is a sequence of signals of Color 1, Color 3, Color 1, Color 3,..., Read in order from the upper pixel, and signal 2 is Color 2, Color 4, Color 2, Color 4,. Signals are arranged, as signal 3, signals of Color 3, Color 1, Color 3, Color 1, ... are arranged, and signals 4 are signals of Color 4, Color 2, Color 4, Color 2, ... line up. These read signals are taken into the circuit 13 shown in FIG. 5, and after A / D conversion or the like, are output from the MOS image sensor as image signals.

  Thus, in the MOS type image sensor of this embodiment having two photodiodes in one pixel, it is only necessary to provide seven transistors in each pixel and the number of wirings is five. The number of processes is reduced and the manufacturing yield is improved. Furthermore, since a transfer gate transistor is provided in each pixel, the electronic shutter can be completely handled, and image data obtained by exposing all pixels at the same timing can be obtained.

  FIG. 3 is an equivalent circuit diagram of a pixel portion of a MOS type image sensor according to the second embodiment of the present invention, and in the illustrated example, four pixels are shown. Also in this embodiment, the first pixel 70, the second pixel 80, the third pixel 90, and the fourth pixel 100 are arranged in a square shape, and three wirings 22 and 23 extending in the vertical direction are provided between the pixels. , 24 and two or three wirings extending in the horizontal direction.

  The wirings extending in the horizontal direction are the wirings 25, 26, 27 provided between the first pixel 70 and the second pixel 80, and the third pixel 90 and the fourth pixel 100. Wirings 28 and 29 are wirings between the pixel 80 and the pixel provided above the pixel 80 and wirings between the third pixel 90 and the fourth pixel 100 and the pixel provided therebelow.

  A power supply voltage VDD is applied to the wiring 22, and photoelectric conversion signals are output from the signal wirings 23 and 24. A first select signal (Select 1) and a second select signal (Select 2) are applied to the wirings 25 and 26, and a ROW select signal for simultaneously selecting two upper and lower pixel rows of the wiring 27 is applied to the wiring 27. Is applied. A transfer signal is applied to the wiring 28 and a reset signal is applied to the wiring 29.

  Two photodiodes 71 and 72 are provided in the first pixel 70, and two photodiodes 81 and 82 are also provided in the second pixel 80 adjacent to the right.

  Also in this embodiment, the photodiode 71 converts an optical signal of “Color 1” into an electric signal, the photodiode 72 converts an optical signal of “Color 2” into an electric signal, and the photodiode 81 has an output of “Color 3”. The optical signal is converted into an electrical signal, and the photodiode 82 converts the “Color 4” optical signal into an electrical signal.

  Similarly, photodiodes 91 and 92 are provided in the third pixel 90 below the first pixel 70, and photodiodes 101 and 102 are provided in the fourth pixel 100 adjacent to the right side thereof. The photodiodes 91, 92, 101, and 102 are opposite to the upper pixels 70 and 80, and the optical signals of “Color 3”, “Color 4”, “Color 1”, and “Color 2” are electrical signals, respectively. Convert to

  Seven MOS transistors 73 to 79 constituting a reset circuit, a floating diffusion amplifier, and the like are provided in the peripheral portion in the pixel 70, and seven MOS transistors 83 to 89 are also provided in the peripheral portion in the pixel 80. Seven MOS transistors 93 to 99 are also provided in the inner peripheral portion, and seven MOS transistors 103 to 109 are also provided in the peripheral portion in the pixel 100.

  Since the connection configuration of the internal transistors of the pixel 70 and the pixel 80 and the connection configuration to the wirings 22 to 29 are the same, only the pixel 70 will be described below, and the connection configuration of the internal transistors of the pixel 70 and the pixel 90 is the same. Since only the wiring connection is partially different, only the difference between the pixel 90 and the pixel 70 will be described.

  The gates of the transfer gate MOS transistors 73 and 74 are commonly connected to the wiring 28, the sources of the transistors 73 and 74 are connected to the cathodes of the photodiodes 71 and 72, respectively, and the drains of the transistors 73 and 74 are for selection. It is connected to the sources of the transistors 75 and 76.

  The gate of the transistor 75 is connected to the wiring 25, the gate of the transistor 76 is connected to the wiring 26, and the drains of the transistors 75 and 76 are commonly connected to the drain of the resetting transistor 77 and the gate of the signal reading transistor 78. The sources of the transistors 77 and 78 are connected to the power supply wiring 22, and the gate of the transistor 77 is connected to the reset wiring 29. The gate of the driving transistor 79 is connected to the wiring 27, the source is connected to the drain of the transistor 78, and the drain is connected to the signal wiring 23.

  In the pixel 70, the drain of the transistor 79 is connected to the wiring 23 on the right side of the pixel 70. In the lower pixel 90, the drain of the transistor 99 is connected to the wiring 24 on the left side of the pixel 90.

  In the embodiment shown in FIG. 1, when two-color signals are read out, dedicated source follower transistors (transistors 37 and 38 in the case of the pixel 30 in FIG. 1) corresponding to the respective colors are provided. There may be variations in characteristics between them. Therefore, in this embodiment, in order to avoid this characteristic variation, two-color signals are read out by one source follower transistor (transistor 78 in the case of the pixel 70 in FIG. 3).

  FIG. 4 is a signal read timing chart when the electronic shutter is applied to the MOS type image sensor shown in FIG. Since the MOS type image sensor according to the present embodiment includes the transfer gate transistors 73 and 74 described above, imaging (exposure) can be performed at the same timing in all the pixels, and the electronic shutter can be completely supported. Hereinafter, the operation of the pixel 70 will be mainly described, but the operation in other pixels is the same.

  In this embodiment, the exposure time is the timing from when the first signal T1 of the transfer signal, which is a pulse signal, is turned off to when the second transfer signal T2 is turned on. Exposure is performed on the pixels. Further, the reset signal applied to all the wirings 29 is turned on slightly before the first transfer signal T1 is turned on, and the reset signal is turned off simultaneously with the turn-off of the second transfer signal T2.

  The first select signal (select 1) and the second select signal (select 2) shown in FIG. 4 are the actual select signals a and b (the signals a and b are the second transfer signal T2). Preceding signals a0, b0 that are turned on at the same timing as the first transfer signal T1 is turned on and turned off before the second transfer signal T2 is turned on. It is formed by.

  The ROW select signal is a pulse signal that is turned on for a predetermined time after the second transfer signal T2 is turned off, and the actual select signals a and b are generated while the ROW select signal is on. .

  When the first transfer signal T1 and the signals a0 and b0 are turned on in a state where the reset signal is turned on and the resetting transistor 77 in FIG. 3 is in a conductive state, the transistors 73, 74, 75, and 76 are turned on. It becomes a conductive state. As a result, unnecessary charges existing in the region from the photodiodes 71 and 72 to the gate of the signal readout transistor 78 are discarded through the reset transistor 77 to the power supply wiring 22.

  When the transfer signal T1 is turned off and the transistors 73 and 74 are cut off, charges corresponding to the amount of incident light are accumulated in the photodiodes 71 and 72. Prior to turning off the electronic shutter, that is, turning on the second transfer signal T2, the signals a0 and b0 are turned off, and the transistors 75 and 76 are cut off. In this state, the transfer signal T2 is turned on for a predetermined time. . As a result, the accumulated charges in the photodiodes 71 and 72 move to the drain regions of the transistors 75 and 76 and are held in the transistors 75 and 76. Further, when the reset signal is turned off, the reset transistor 77 is cut off.

  Next, the ROW select signal applied to the wiring 27 is turned on to turn on the transistor 79. When the select signal a (first select signal) is generated in this state, the transistor 75 is turned on and held in the transistor 75. The applied charge is applied to the sense gate of transistor 78.

  Thereby, in the pixel 70, a current flows through the power supply wiring 22 → the transistor 78 → the transistor 79 → the signal wiring 23, and a photoelectric conversion signal corresponding to Color 1 of the photodiode 71 is output as signal 1. Similarly, in the pixel 80, a photoelectric conversion signal corresponding to Color 3 of the photodiode 81 is output as signal 3 to the wiring 23 on the right side of the pixel 80, and in the pixel 90, corresponding to Color 3 of the photodiode 91. A photoelectric conversion signal is output as signal 4 to the wiring 24 adjacent to the left of the pixel 90, and in the pixel 100, a photoelectric conversion signal corresponding to Color 1 of the photodiode 101 is output as signal 2 to the wiring 24 adjacent to the left of the pixel 100. Is done.

  After the output of these photoelectric conversion signals, the second select signal b is generated. As a result, in the pixel 70, the photoelectric conversion signal corresponding to Color 2 of the photodiode 72 is signal 1 and the signal wiring 23 on the right side of the pixel 70. Is output. Similarly, in the pixel 80, a photoelectric conversion signal corresponding to Color 4 of the photodiode 82 is output as signal 3 to the wiring 23 on the right side of the pixel 80, and in the pixel 90, corresponding to Color 4 of the photodiode 92. A photoelectric conversion signal is output as signal 4 to the wiring 24 adjacent to the left of the pixel 90, and in the pixel 100, a photoelectric conversion signal corresponding to Color 4 of the photodiode 102 is output as signal 2 to the wiring 24 adjacent to the left of the pixel 100. Is done.

  Similarly, the next two pixel rows after the two pixel rows shown in FIG. 3 are selected by the ROW select signal applied to the wiring 27 provided between these pixel rows. An operation in which a signal charge of each pixel row is read by applying a select signal (signal corresponding to the signals a and b in FIG. 4) to the wirings 25 and 26 provided between these pixel rows during the ON state. Is repeated.

  As described above, in the MOS image sensor of this embodiment, it is sufficient to provide seven transistors in each pixel, and the number of wirings is reduced. Therefore, the number of manufacturing steps is reduced, and the manufacturing yield is improved. In addition, it is possible to avoid the influence caused by the characteristic variation of the transistors and to eliminate the restriction for matching the transistor characteristics, thereby increasing the degree of freedom in layout design in each pixel. Furthermore, since a transfer gate transistor is provided in each pixel, the electronic shutter can be completely handled, and image data obtained by exposing all pixels at the same timing can be obtained.

  According to the present invention, it is possible to completely correspond to an electronic shutter and to reduce the number of manufacturing steps, so that the manufacturing cost can be reduced and the yield can be increased, which is useful when applied to a MOS type image sensor. is there.

It is an equivalent circuit diagram for four pixels of the MOS image sensor according to the first embodiment of the present invention. 2 is an operation timing chart of the MOS image sensor shown in FIG. 1. FIG. 5 is an equivalent circuit diagram for four pixels of a MOS image sensor according to a second embodiment of the present invention. 4 is an operation timing chart of the MOS image sensor shown in FIG. 3. It is a surface schematic diagram of a MOS type image sensor. It is an equivalent circuit diagram for one pixel of a conventional MOS type image sensor. It is an equivalent circuit diagram for one pixel of a conventional MOS type image sensor in which three photodiodes are provided in one pixel.

Explanation of symbols

3, 5, 23, 24 Signal wiring 4, 22 Power supply wiring 6, 28 Transfer signal wiring 7, 27 ROW selection wiring 8, 29 Reset wiring 25, 26 Select signal wiring 30, 40, 50, 60, 70 , 80, 90, 100 Pixel 31, 41, 51, 61, 71, 81, 91, 101, 32, 42, 52, 62, 72, 82, 92, 102 Photodiode (photoelectric conversion element)
33-39, 43-49, 53-59, 63-69, 73-79, 83-89, 93-99, 103-109 MOS transistors

Claims (5)

  In a MOS type image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and wiring is formed between the pixels, two photoelectric conversion elements are provided for each pixel, and each pixel is provided in each pixel. For a transfer gate that temporarily stores stored charges according to the amount of light received by each photoelectric conversion element, while the total number of resetting transistors and floating diffusion amplifier transistors for discharging unnecessary charges from the photoelectric conversion elements is five. A MOS type image sensor characterized in that one transistor is provided for each photoelectric conversion element.   2. The MOS image sensor according to claim 1, wherein the number of the wirings for partitioning the pixels in the vertical direction is three and the number of the wirings for partitioning in the horizontal direction is two.   In a MOS type image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and wiring is formed between the pixels, each pixel is provided with two photoelectric conversion elements and corresponding to each photoelectric conversion element. Two resetting transistors for discharging unnecessary charges remaining in the corresponding photoelectric conversion elements, and stored charges corresponding to the received light amounts of the corresponding photoelectric conversion elements provided for the respective photoelectric conversion elements are read and temporarily stored when a transfer signal is applied. Two transfer gate transistors, two signal read transistors provided corresponding to the respective transfer gate transistors, each outputting a signal corresponding to the temporarily held charge when a read signal is applied, and when the read signal is applied A common driving transistor for operating two signal reading transistors MOS type image sensor, characterized in that.   4. The MOS image sensor according to claim 3, wherein outputs of the two readout transistors of each pixel are connected to different wirings.   In a MOS image sensor in which a plurality of pixels arranged in an array are provided on a semiconductor substrate and a wiring is formed between the pixels, each pixel is provided with two photoelectric conversion elements and a corresponding photoelectric conversion element. Two transfer gate transistors that read and temporarily store the stored charge corresponding to the amount of light received by the corresponding photoelectric conversion element when a transfer signal is applied, and a transfer gate transistor that is provided corresponding to each transfer gate transistor and that corresponds to a selection signal application Two selection transistors for outputting temporary holding charges to the subsequent stage, one signal reading transistor for outputting a signal corresponding to the temporary holding charges output from the two selection transistors when a read signal is applied, and the reading One drive for operating the signal readout transistor when a signal is applied When the transistor, the two transfer gate transistors, and the two selection transistors are turned on, unnecessary charges remaining in the region from the two photoelectric conversion elements to the signal reading transistor are discharged. A MOS type image sensor comprising a common reset transistor.

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