JP2005150105A5

JP2005150105A5 -

Info

Publication number: JP2005150105A5
Application number: JP2004308397A
Authority: JP
Filing date: 2004-10-22
Publication date: 2008-01-10
Anticipated expiration: 2024-10-22

Claims

A thin film transistor;
A conductive layer electrically connected to the thin film transistor;
An insulating layer formed to cover the peripheral edge of the conductive layer and the thin film transistor;
Have
A display device, wherein an impurity element imparting one conductivity type is added to a surface of the insulating layer.

A thin film transistor;
A conductive layer electrically connected to the thin film transistor;
An insulating layer formed to cover the peripheral edge of the conductive layer and the thin film transistor;
Have
The display device, wherein an impurity element imparting one conductivity type is added to the conductive layer and the surface of the insulating layer.

A thin film transistor;
A first insulating layer formed over the thin film transistor;
A conductive layer electrically connected to the thin film transistor through an opening formed in the first insulating layer;
A second insulating layer formed to cover the peripheral edge of the conductive layer and the thin film transistor;
Have
An impurity element imparting one conductivity type is added to the conductive layer, the side surface of the opening of the first insulating layer, and the surface of the second insulating layer. apparatus.

A thin film transistor;
A first insulating layer formed over the thin film transistor;
A first conductive layer electrically connected to the thin film transistor through an opening formed in the first insulating layer;
A second insulating layer formed to cover the peripheral edge of the conductive layer and the thin film transistor;
A layer containing an organic compound formed on the first conductive layer;
A second conductive layer formed on the layer containing the organic compound;
Have
An impurity element imparting one conductivity type is added to the first conductive layer, the side surface of the opening of the first insulating layer, and the surface of the second insulating layer. Display device.

A thin film transistor;
A first insulating layer formed over the thin film transistor;
An electrode connected to the semiconductor layer of the thin film transistor through an opening formed in the first insulating layer;
A first conductive layer electrically connected to the thin film transistor through the electrode;
A second insulating layer formed to cover the peripheral edge of the conductive layer and the thin film transistor;
A layer containing an organic compound formed on the first conductive layer;
A second conductive layer formed on the layer containing the organic compound;
Have
An impurity element imparting one conductivity type is added to the first conductive layer, the side surface of the opening of the first insulating layer, and the surface of the second insulating layer. A display device.

In claim 4 or claim 5 ,
The display device, wherein the first conductive layer is indium tin oxide containing silicon oxide.

In any one of Claims 4 thru | or 6 ,
The impurity element imparting the one conductivity type contained in the first insulating layer, the first conductive layer, and the second insulating layer has a concentration range of 1 × 10 ^{18 to} 5 × 10 ²¹ / cm ³ . A display device characterized by the above.

In any one of Claims 3 thru | or 7 ,
The first insulating layer is a planarization film;
A display device, wherein a side surface of the opening of the first insulating layer has a tapered shape.

In any one of Claims 3 thru | or 8 ,
The outer peripheral side surface of the first insulating layer has a tapered shape,
The display device, wherein an impurity element imparting the one conductivity type is added to an outer peripheral side surface of the first insulating layer.

In any one of Claims 2 thru | or 9 ,
The display device, wherein the first insulating layer or the second insulating layer is silicon oxide containing an alkyl group.

In claims 2 to any one of claims 1 0,
The display device, wherein the first insulating layer or the second insulating layer is colored.

In claim 11,
The display device, wherein the colored first insulating layer or the second insulating layer is a black matrix.

In any one of claims 1 to 1 2,
The display device, wherein the impurity element imparting one conductivity type is at least one element selected from Group 13 or Group 15 of the periodic table .

In any one of claims 1 to 1 3,
The display device is characterized in that the impurity element imparting one conductivity type is at least one element selected from B, Al, Ga, In, Tl, P, As, Sb, and Bi.

In any one of Claims 1 thru | or 14,
The semiconductor layer of the thin film transistor includes a microcrystalline semiconductor layer and an n-type semiconductor layer,
The thin film transistor includes a gate electrode, a gate insulating film formed on the gate electrode, the microcrystalline semiconductor layer formed on the gate insulating film, and the n-type formed on the microcrystalline semiconductor layer. A semiconductor layer,
The microcrystalline semiconductor layer has a first film thickness and a second film thickness larger than the first film thickness,
The microcrystalline semiconductor layer having the first thickness has a channel formation region;
The display device, wherein the n-type semiconductor layer is formed on the microcrystalline semiconductor layer having the second thickness.

Forming a thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode over a first substrate having an insulating surface;
Forming a planarizing film over the thin film transistor;
Selectively removing the planarizing film to form an opening reaching the semiconductor layer and a peripheral end having a tapered shape;
An impurity element imparting one conductivity type is added to the side surface and the peripheral edge of the opening of the planarization film and the semiconductor layer to form a high concentration impurity region in the semiconductor layer,
Forming an electrode connected to the high-concentration impurity region of the semiconductor layer through the opening on the planarizing film;
Forming a first conductive layer in contact with the electrode;
Forming a second insulating layer covering the peripheral edge of the first conductive layer and the thin film transistor;
Adding an impurity element imparting one conductivity type to the surface of the second insulating layer and the first conductive layer;
Forming a layer containing an organic compound on the first conductive layer;
A method for manufacturing a display device, comprising forming a second conductive layer over a layer containing the organic compound.

Forming a thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode over a first substrate having an insulating surface;
Forming a planarizing film over the thin film transistor;
Selectively removing the planarizing film to form an opening reaching the semiconductor layer and a peripheral end having a tapered shape;
An impurity element imparting one conductivity type is added to the side surface and the peripheral edge of the opening of the planarization film and the semiconductor layer to form a high concentration impurity region in the semiconductor layer,
Forming an electrode connected to the high-concentration impurity region of the semiconductor layer through the opening on the planarizing film;
Forming a first conductive layer in contact with the electrode;
Forming a second insulating layer covering the peripheral edge of the first conductive layer and the thin film transistor;
An impurity element imparting one conductivity type is added to the first conductive layer and the second insulating layer;
Forming a layer containing an organic compound on the first conductive layer;
Forming a second conductive layer on the layer containing the organic compound;
A method for manufacturing a display device, wherein a second substrate is bonded to the first substrate with a sealing material surrounding an outer periphery of a peripheral end portion of the planarizing film.

In claim 16 or claim 17,
The concentration of the impurity element imparting one conductivity type added to the first conductive film, the first conductive layer, and the insulating layer is in a concentration range of 1 × 10 ^{18 to} 5 × 10 ²¹ / cm ^3. A method for manufacturing a display device.

In any one of Claims 16 thru | or 18,
A method for manufacturing a display device, comprising adding at least one element selected from Group 13 or Group 15 of the periodic table as the impurity element imparting one conductivity type.

In any one of claims 16 to 19,
A display device comprising: at least one element selected from B, Al, Ga, In, Tl, P, As, Sb, and Bi as an impurity element imparting one conductivity type; Manufacturing method.

In any one of Claims 16 to 20,
The method for manufacturing a display device is characterized in that the first insulating layer or the second insulating layer is formed using a silicon oxide film containing an alkyl group by a coating method.

In any one of Claims 16 to 21,
The method for manufacturing a display device, wherein the first conductive layer is formed by a sputtering method using a target made of indium tin oxide containing silicon oxide.

In any one of Claim 16 thru | or Claim 22,
A method for manufacturing a display device, wherein the first insulating layer or the second insulating layer is colored to form a black matrix.