JP2005148679A - Display element, display device, semiconductor integrated circuit, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a flat-panel display with high display quality. <P>SOLUTION: An display element 1 is composed of a display area 2 and a drive circuit area 3 formed on one and the same substrate. In the display area 2, dots as the minimum display unit are arranged in a matrix form. The drive circuit area 3 drives active elements corresponding to each dot. In the drive circuit area 3, a group of digital/analog conversion circuits provided in correspondence with each dot and driving the active elements by converting the drive data corresponding to the dots into analog values respectively, and a wiring pattern for providing a gradation reference voltage to the digital/analog conversion circuit according to each corresponding color. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display element having a display region in which dots as minimum display units are arranged in a matrix. The present invention also relates to a semiconductor integrated circuit including a drive circuit for driving a display element. The present invention also relates to a display device in which a display element and its drive circuit are mounted in the same housing. The present invention also relates to an electronic device equipped with a display element or a driving circuit thereof.

  There is a flat panel display as a display device that expresses an image by dots arranged in a matrix. A flat panel display is a display device having a plate-like casing and a flat screen. The flat panel display has a smaller volume than a CRT (Cathode Ray Tube) type display device. For this reason, it is rapidly spreading recently.

  There are two types of flat panel displays: self-luminous and non-self-luminous. The self-luminous type includes, for example, an EL (Electro Luminescence) display, an LED (Light Emitting Diode) display, a PDP (Plasma Display Panel) display, and an FED (Field Emission Display) display. Non-self-luminous type includes, for example, a liquid crystal display.

  In either case, lighting / extinguishing of each dot is realized by driving an active element. A driving signal for the active element is given through the data line. A plurality of active elements are arranged on the data line, and a drive signal is supplied only to the active element selected through the scanning line.

One drive circuit is provided for one data line. One drive circuit includes, for example, a sample / hold circuit and a digital / analog conversion circuit. Normally, this type of driving circuit is formed as a peripheral circuit of a display panel.
JP 2003-108033 A JP 2003-228341 A

  By the way, the display characteristics of the display are affected by aging and temperature changes. Reduction of such influence is necessary to maintain display quality. One of the adjustment items is a gradation reference voltage of the D / A conversion circuit. Conventionally, the adjustment of the gradation reference voltage is performed uniformly for all the D / A conversion circuits constituting the drive circuit.

  However, the influence of variations in element characteristics on display performance is not necessarily uniform. For example, even if the luminance changes are physically the same, the changes perceived by the naked eye are not uniform. In the case of a self-luminous element, the influence of the element characteristic affects the light emission characteristic itself.

  The present invention has been made in consideration of the above technical problems, and aims to solve one of the problems described above.

(1) Invention 1
In order to realize such an object, one of the present invention proposes a circuit configuration capable of adjusting the gradation reference voltage of the D / A conversion circuit for each color. The present invention can be applied to a case where a drive circuit adopting such a circuit configuration is formed integrally with a display element or to be incorporated in a semiconductor integrated circuit.

  FIG. 1 shows a configuration example of a display device in which a drive circuit is integrally formed on a display element. That is, the display element 1 has the display area 2 and the drive circuit area 3 on the same substrate. The substrate here is, for example, a glass substrate or a plastic substrate. The display element 1 can be applied to the various displays described above. For example, a liquid crystal display, EL display, LED display, PDP display, or FED display can be applied to the display element 1.

  In the display area 2, dots as minimum display units are arranged in a matrix. A dot corresponds to each color constituting one pixel. One pixel is composed of at least three dots of R (red), G (green), and B (blue).

  FIG. 2 shows an internal configuration example of the drive circuit region 3. In the drive circuit area 3, one D / A conversion circuit 3A is provided for one data line. That is, the D / A conversion circuit 3A corresponds to any one of R (red), G (green), and B (blue). Which color the D / A conversion circuit 3A corresponds to depends on the dot pattern on the display.

  These groups of D / A conversion circuits 3A are connected to wiring patterns 3B for applying gradation reference voltages for the corresponding colors. FIG. 2 shows an example in which R (red), G (green), and B (blue) repeatedly appear on one line (on the scanning line).

For example, a wiring pattern corresponding to the gradation reference voltage Vref-R is connected to a group of D / A conversion circuits 3A corresponding to R (red). Similarly, a wiring pattern corresponding to the gradation reference voltage Vref-G is connected to the group of D / A conversion circuits 3A corresponding to G (green). Similarly, a group of D / A conversion circuits 3A corresponding to B (blue) has a gradation reference voltage Vref-B.
A wiring pattern corresponding to is connected.

  Therefore, if the gradation reference voltage applied to the wiring pattern is individually adjusted, the display characteristics can be adjusted while maintaining the resolution. For example, only the brightness of R (red) can be increased or decreased independently. As a result, the perceptual hue can be moved and adjusted to the original color tone. Also, an integrated adjustment considering the perceptual characteristics of the three colors can be realized.

  FIG. 3 shows a configuration example of a display device in which the drive circuit unit 13 is provided outside the display element 11. The display element 11 has a display area 12 in which active elements corresponding to the dots are arranged in a matrix. Also in the case of the drive circuit unit 13, the D / A conversion circuit 13A is provided at a ratio of one for one data line. The circuit configuration of the D / A conversion circuit 13A is the same as the circuit configuration of FIG.

  Also in this case, if the gradation reference voltage applied to the wiring pattern is individually adjusted, the display characteristics can be adjusted while maintaining the resolution. Further, when the drive circuit 13A is formed inside the semiconductor integrated circuit as described above, a material capable of operating at a higher speed than that formed on the display element can be used. In addition, the influence of characteristic variation can be reduced.

  Each gradation reference voltage Vref-R, Vref-G, Vref-B is preferably the maximum output voltage value of the D / A conversion circuit. By adjusting the maximum output voltage value, it is possible to generate a drive voltage having a necessary number of gradations without reducing the resolution of display characteristics. Thus, the color and brightness can be adjusted effectively. The same applies to a binary resistance type D / A conversion circuit.

  Each gradation reference voltage Vref-R, Vref-G, Vref-B is preferably one or a plurality of intermediate voltage values of the D / A conversion circuit. The intermediate voltage value is a voltage that appears at the connection midpoint of each resistor. By making these voltage values individually set, finer control of conversion characteristics becomes possible. For example, the D / A conversion characteristic can be arbitrarily adjusted while the maximum output voltage value is fixed.

  Of course, the adjustment of the intermediate voltage value can be performed for each color. Thereby, the conversion characteristic (gamma curve) can be adjusted for each color. The intermediate voltage value may be adjusted for the entire luminance range. Thereby, the conversion characteristic can be adjusted as a whole. Further, the adjustment of the intermediate voltage value can be performed only for the luminance within a specific range. For example, only the high luminance part can be adjusted. For example, the change in the output voltage in the high luminance part can be reduced. Further, for example, only the middle luminance portion can be selectively adjusted.

  Further, the adjustment of the intermediate voltage value can be performed for each type of display content. Thereby, the optimal display performance according to display content is realizable. For example, when displaying text data, a gradation voltage with an emphasis on contrast can be generated. Also, for example, when displaying a movie or the like, it is possible to generate a gradation voltage that emphasizes halftone expression.

  Further, both the maximum output voltage value and the intermediate voltage value may be given as the gradation reference voltage for each color. Appropriate adjustment of both values makes it possible to achieve appropriate adjustment that takes into account changes in the light source over time and changes in temperature characteristics.

  Further, the wiring pattern for applying the gradation reference voltage may be common to each color as shown in FIG. In this case, the gradation reference voltage corresponding to each color may be given in time division in synchronization with the drive data. Even in this case, the gradation reference voltages Vref-R, Vref-G, and Vref-B for each color can be applied to the D / A conversion circuit corresponding to each color, as in the case described above.

  In addition, by changing the gray scale reference voltage applied to the wiring pattern in time series, variations between data lines and variations between pixels can be corrected. This gradation reference voltage may be generated based on, for example, variation measured in advance. The gradation reference voltage may be generated based on, for example, variation measured in real time. This time-series application method can also be applied to a case where a dedicated gradation reference voltage is supplied to each color.

  At this time, the order of the gradation reference voltages applied in time division can be arbitrarily changed. Therefore, by simply changing the arrangement of the gradation reference voltages, various pixel arrangements (for example, stripe arrangement, delta arrangement, diagonal arrangement, rectangle arrangement) and color arrangement (for example, RGB, GRB, BGR, etc. (Right, middle, right) This means that one drive circuit can cope with a plurality of types of pixel arrays. Further, in this case, since three kinds of gradation reference voltages can be shared by one wiring pattern, the internal wiring can be simplified.

  Further, the gradation reference voltage (analog voltage) may be generated inside the drive circuit region 3 on the display element or the drive circuit unit 13 in the semiconductor integrated circuit. That is, as shown in FIG. 5, a D / A conversion circuit 3C for generating a gradation reference voltage may be mounted on these circuits. At this time, the gradation reference voltage value (digital data) is supplied from an external circuit or device.

In this case, the wiring length from the generation source of the gradation reference voltage to the D / A conversion circuit 3A can be shortened. Thereby, it is difficult to be affected by noise. In addition, since the connection with the external circuit is digitized, the influence of external noise can be reduced.
In this case, an external circuit that provides the gradation reference voltage value can be operated with a single power source. Accordingly, the configuration of the external circuit can be simplified.

  Note that the external circuit or the external device gives digital data corresponding to each color as parallel data to the D / A conversion circuit 3C for generating the gradation reference voltage. Incidentally, digital data can also be given in time division. In this case, the digital data is given at a timing synchronized with the drive data.

  The external circuit or the external device can also provide digital data corresponding to the gradation reference voltage (analog voltage) as serial data. In this case, as shown in FIG. 6, a serial / parallel conversion circuit 3D may be arranged in the drive circuit region 3 on the display element or in the drive circuit unit 13 in the semiconductor integrated circuit.

  By using the S / P conversion circuit 3D, the number of wirings with an external circuit or an external device can be significantly reduced. In addition, the area required for the wiring pattern can be reduced. In the case of being incorporated in a semiconductor integrated circuit, the package can be downsized by greatly reducing the number of pins. Thereby, the area occupied by the semiconductor integrated circuit can be reduced.

(2) Invention 2
The display device described above is preferably used as a monitor and mounted in various electronic devices. For example, it is desirable to mount a signal processing unit (including the above-described external circuit or external device) that provides a gradation reference voltage value corresponding to each color.

  Note that the gradation reference voltage value may be given to the display element or the semiconductor integrated circuit as digital data. Further, an analog voltage generated according to the gradation reference voltage value may be applied to the display element or the semiconductor integrated circuit.

  In addition, it is preferable that a signal processing unit for processing information displayed on the display element is mounted on the electronic device. Such a signal processing unit includes, for example, a signal conversion unit that converts a composite signal into a signal form suitable for display by a display element.

  For example, the signal processing unit includes a signal conversion unit that converts the arrangement of image data in accordance with the pixel arrangement of color pixels on the display element. At this time, it is desirable that the pixel arrangement information is provided to a signal processing unit that generates a gradation reference voltage value. Thereby, the optimum adjustment can be realized even when the display is switched.

  For example, the signal processing unit includes a decoder that decodes compression-encoded image data (for example, image data encoded in the Moving Picture Coding Experts Group (MPEG) format).

  Such a signal processing unit can also be realized as a function of software executed by an electronic device equipped with a computer. FIG. 7 shows an example of the internal configuration of an electronic apparatus that employs this configuration. In the case of FIG. 7, the electronic device includes a display device 21, a central processing device 22, a main storage device 23, a secondary storage device 24, and an input device 25. Of course, the display device 21 uses the display device according to one aspect of the present invention.

  Here, the central processing unit 22 is in charge of computer control, instruction fetching, and execution. The main storage device 23 is responsible for temporary storage of programs and data describing processing procedures. The secondary storage device 24 is responsible for storing programs and data. For example, it may be a hard disk drive or other magnetic storage medium drive. Further, for example, it is a drive device for a compact disk or other optical recording medium. The input device 25 is in charge of inputting instructions and data to the computer. For example, it consists of a mouse and a keyboard.

Note that a communication device is mounted on the electronic device as necessary. The communication path may be a wired path or a wireless path. Moreover, it is preferable that this communication apparatus is equipped with a network function.
For example, a mobile phone, a portable information terminal, a display-integrated computer, an in-vehicle navigation terminal, a vending machine, an automatic ticket gate, and the like can be applied to the electronic device.

According to one aspect of the present invention, the output characteristics of each color constituting the three primary colors can be individually adjusted. Thereby, further improvement and optimization of display quality can be realized.
In addition, according to one aspect of the present invention, the number of wirings with an external circuit or an external device can be reduced by supplying the gray scale reference voltage in a time-sharing manner. Further, it is possible to adapt to a plurality of types of pixel arrangements with a single type of circuit configuration.

Also, according to one aspect of the present invention, since the gradation reference voltage value is given in the form of digital data, the influence of external noise can be reduced as compared with the case of an analog voltage.
In addition, according to one aspect of the present invention, since the gradation reference voltage value is given in the form of serial data, the number of wirings with an external circuit or an external device can be significantly reduced.

Hereinafter, an embodiment of the display device will be described with an organic EL display as an example. Here, a case where an organic EL display is driven by an active matrix method will be described. The active matrix method is a method of controlling light emission of each pixel (each dot) by switching an active element corresponding to each pixel (RGB dots in the case of color).
It should be noted that techniques not particularly shown or described in the specification apply techniques well known in the art.

(1) First Embodiment In this embodiment, a circuit configuration example that realizes a large screen of an organic EL display using an amorphous silicon TFT will be described. Note that an organic material that emits light when a voltage is applied, such as diamines, is used as the light emitter.

(1-1) Background Explanation In the case of this type of organic EL display, the luminance of the light emitter increases in proportion to the amount of current supplied by the pixel circuit (active element corresponding to each dot). That is, the characteristic variation of the pixel circuit is perceived as luminance unevenness as it is.

In order to reduce this luminance unevenness, polysilicon TFTs with high electron mobility, particularly low-temperature polysilicon TFTs, are currently used for pixel circuits.
In the case of low-temperature polysilicon, a small and fine TFT can be formed. For this reason, drive circuits other than pixels can be formed around the display panel.

  However, in a small panel, the occupied area including the panel and the thinness of the module are problems. In general, it is not preferable that the area occupied by the drive circuit increases. For this reason, a method of making a sample / hold circuit for each data line on the panel side is adopted. However, this method has unsolved problems in the manufacturing process such as homogenization of a large area of laser annealing.

  For this reason, there is a problem in the in-plane homogeneity in the production of a large panel, and the production of a large panel is regarded as difficult. In addition, forming a complicated circuit such as a driver circuit in the panel also causes a decrease in yield, leading to an increase in manufacturing cost.

(1-2) Circuit Configuration Accordingly, in the first embodiment, the pixel circuit of the organic EL display panel is configured by an amorphous silicon TFT, and the drive circuit is formed in the drive IC. Thereby, the enlargement of the organic EL display panel is realized. Further, since the drive circuit is provided in the drive IC, high-quality display can be achieved even when the display panel is enlarged.

  FIG. 8 shows an example of a drive circuit mounted on the drive IC. This drive circuit is an example of a data line drive circuit. This drive circuit functions as a source driver of the amorphous silicon TFT disposed at each pixel (dot) position. Note that a scanning line driving circuit is also mounted in the drive IC. This drive circuit functions as a gate driver for an amorphous silicon TFT disposed at each pixel (dot) position.

  The data line drive circuit includes a data switch 31, a D / A conversion circuit block 32, a sample / hold circuit block 33, and an output buffer block 34. The drive IC is realized by, for example, a MOS (Metal-Oxide-Semiconductor) transistor.

  The data switch 31 is supplied with image data that is a display image, a reference operation clock signal CLK that determines a driving speed, a driver control signal CTL, and the like from an external system. The image signal is an analog signal or a digital signal. In this example, a digital signal is used. By adopting digital signals, high resolution can be achieved by high-speed driving. In addition, by adopting a digital signal, it is possible to increase noise resistance during signal transmission.

  The data switch 31 executes processing for distributing image data to corresponding pixels (dots). Specifically, processing for distributing image data to data lines corresponding to pixels (dots) is executed. The data line is connected to the source electrode of a transistor that supplies current to the light emitter.

  Note that the gate electrode of the transistor is connected to a scanning line orthogonal to the data line. A transistor connected to the scanning line to which the active potential is applied is turned on. A current having a magnitude corresponding to the image data is supplied to the light emitter connected to the drain electrode of the transistor. The light emitter emits light with a light amount (including non-lighting) according to the amount of current.

  The D / A conversion circuit block 32 is a set of D / A conversion circuits 32A as many as the data lines. The D / A conversion circuit 32A converts a digital value corresponding to each pixel (dot) into an analog value. Here, the D / A conversion circuit 32A performs a function of converting the driver drive voltage into the panel drive voltage. That is, the D / A conversion circuit 32A has a level shift function.

  The D / A converter circuit block 32 is supplied with three types of maximum reference voltages Vref-R, Vref-G, and Vref-B that define the gamma characteristics of the respective emission colors. These gradation voltages are given from an external system of the drive IC. Examples of the external system include a computer and a reference voltage generation circuit.

  These maximum reference voltages (analog voltages) are given through independent wiring patterns. Each wiring pattern is connected to a corresponding D / A conversion circuit 32A, as shown in FIG. That is, the maximum reference voltage Vref-R is given to the D / A conversion circuit 32A corresponding to the R (red) light emitting element.

  Similarly, the maximum reference voltage Vref-G is given to the D / A conversion circuit 32A corresponding to the G (green) light emitting element. The maximum reference voltage Vref-B is given to the D / A conversion circuit 32A corresponding to the B (blue) light emitting element. In the case of this embodiment, the D / A conversion circuit 32A adopts a ladder resistance type circuit configuration. The gradation voltage here is the maximum reference voltage of the ladder resistor.

  The sample / hold circuit block 33 is a set of the same number of sample / hold circuit pairs 33A as the data lines. The sample / hold circuit pair 33A is composed of two sample / hold circuits connected in parallel. Analog value writing and reading are executed simultaneously by the two sample / hold circuits. That is, while an analog value is written in one sample / hold circuit, the other sample / hold circuit outputs the analog value to the panel. Note that writing and reading of analog values are performed alternately.

  The output buffer block 34 is a set of output buffers 34A having the same number as the data lines. Each output buffer 34A is connected to an output terminal of the driver IC. Through this output buffer 34A, analog values corresponding to the data lines on the panel side are output as drive signals.

(1-3) Configuration of D / A Conversion Circuit FIG. 9 shows a basic configuration of a ladder resistance type D / A conversion circuit 32A. FIG. 9 shows a basic circuit called 2R-R type. This indicates that the resistance value at the branch destination is 2R (2 × R), and the overall resistance value is R. In the case of this configuration, the current flowing at each branching in turn from the branch point on the reference power supply (maximum output voltage) side is halved. The branched current flows into the input terminals of the switches S1 to S4 (in the case of 4 bits). The reference power source corresponds to the above-described gradation reference voltages Vref-R, Vref-G, and Vref-B.

  Each switch is on / off controlled according to digital data. Each switch applies an inflowing current to the operational amplifier when it is on, and allows an inflowing current to flow to ground when it is off. As a result, a current corresponding to the digital value (current sum from each switch) flows into the output resistance r of the operational amplifier. At this time, the voltage appearing at both ends of the output resistor r becomes the output voltage.

  FIG. 10 shows a conceptual configuration of the D / A conversion circuit 32A. A divided output of the reference voltage (maximum output voltage) is taken out from each connection midpoint of the ladder resistors R1, R2,... Rn connected in series. In this example, one of the connection midpoints is selected based on the image data (drive data).

Incidentally, the reference voltage is the maximum reference voltage VO (0). Further, half-tone voltages VO (1) to VO (n) obtained by dividing the reference power supply are given by the number of ladder resistors and the resistance ratio. Here, the voltage across each resistor (for example, VO (0)
And VO (1) is divided by a fixed ratio. This is to prevent the number of resistors required for the required number of gradations. As a result, the circuit can be simplified.

  FIG. 11 shows the gradation voltages VO (0), VO (1) to VO (n) and the corresponding input / output relationships. The smoothness of the gamma curve is adjusted by the ratio between the resistance division number and each resistance value. The optimization of the gamma curve according to the device characteristics is also adjusted by the ratio of the resistance division number and each resistance value.

  Note that the halftone voltages VO (1) to VO (n) of each color rise and fall in conjunction with the adjustment (increase / decrease) of the maximum reference voltages Vref-R, Vref-G, and Vref-B corresponding to each color. That is, the gamma curve shown in FIG. 11 is deformed in the vertical direction. As a result, a voltage having the required number of gradations can be output without reducing the resolution of each color light.

(1-4) Circuit Operation In this embodiment, the organic EL display panel is driven by a drive IC mounted on the panel end. In general, the following processing operations are executed. Image data corresponding to each pixel (dot) is output to the D / A conversion circuit block 32 through the data switch 31. Image data is converted into an analog value by a corresponding D / A conversion circuit and stored in a sample / hold circuit. Thereafter, the analog value is read from the sample / hold circuit to the output buffer, and the potential of the data line is changed.

A current corresponding to the potential of the data line is supplied to the light emitter through a pixel circuit (amorphous silicon TFT) in which the gate potential is set to the active state. Thus, it is possible to express the brightness and gradation of each light emitter. The hue is determined according to the luminance and gradation of the light emitters (RGB) constituting one pixel.
Such a light emission operation is performed on the entire display area. Thus, an image is displayed on the organic EL display panel.

(1-5) Effects Realized in Embodiment First, the TFT on the organic EL display panel can be made of amorphous silicon. Thus, a large-screen display panel can be manufactured at low cost.

  The drive circuit can be manufactured by a MOS process. Therefore, it is possible to realize a drive circuit that can operate at high speed and has little variation between elements. Thus, even when the organic EL display panel is enlarged, sufficient display quality can be realized.

  In addition, the maximum reference voltage that defines the conversion characteristics of the D / A conversion circuit 32A can be adjusted for each color. For this reason, the light emission state of each color can be adjusted individually without reducing the resolution of each color. As a result, display quality can be further improved and optimized.

  Further, the maximum reference voltage can be set to a gradation voltage corresponding to the light emission characteristics of the light emitting element. From this point of view, further improvement and optimization of display quality can be realized.

  In addition, it is possible to cope with changes in light emission characteristics over time (such as material life) and temperature characteristics. For example, it is only necessary to store a change in characteristics that is known in advance in an external system and reflect this in the maximum reference voltage supplied by the external system. Thereby, an appropriate gradation voltage can always be supplied to the active element corresponding to each dot.

  It should be noted that the measurement result measured in real time can be reflected in the adjustment of the maximum reference voltage. Even in this case, an appropriate gradation voltage can always be supplied to the active element corresponding to each dot. Thus, further improvement and optimization of display quality can be realized.

(2) Second Embodiment In this embodiment, an example of a circuit configuration in which the conversion characteristics of the D / A conversion circuit 32A can be set more finely will be described. Specifically, an example of a circuit configuration in which the intermediate reference voltage can be individually adjusted in addition to the maximum reference voltage will be described. This circuit configuration is effective when, for example, the shape of the gamma curve differs for each color, or when the input / output characteristics may be a straight line.

(2-1) Circuit Configuration FIG. 12 shows a drive circuit mounted on the drive IC. Basic components constituting the drive circuit are the same as those in the first embodiment. That is, the drive circuit includes a data switch 31, a D / A conversion circuit block 32, a sample / hold circuit block 33, and an output buffer block 34.

  The difference is that a plurality of reference voltages are applied to the D / A conversion circuit 32A. FIG. 12 shows a case where n + 1 grayscale voltages (analog voltages) are supplied from an external system. As shown in FIG. 12, n + 1 gradation voltages are applied to each of the three colors. As a result, each D / A conversion circuit 32A is provided with one set of three types of reference voltage groups.

  Accordingly, the D / A conversion circuit block 32 is connected to 3 × (n + 1) wiring patterns. Further, n + 1 wiring patterns are connected to each D / A conversion circuit 32A. In the case of this embodiment, the number of wiring patterns is n + 1 times that of the first embodiment.

  FIG. 13 shows a conceptual configuration of the D / A conversion circuit according to the present embodiment. In this embodiment, a plurality of reference voltages generated by an external system are applied to a plurality of connection midpoints of the ladder voltage dividing resistor. If it does in this way, the both-ends voltage between the connection middle points which gave each reference voltage can be controlled freely.

As a result, as shown in FIG. 14, a unique gamma curve can be set for each color. For example, R (red) can make the input / output characteristics straight. Also, for example, the input / output characteristics of G (green) can be made higher than that of B (blue).
Also, different input / output characteristics can be provided depending on the gradation level (horizontal axis in the figure), such as input / output characteristics of G (green) and B (blue). In the case of FIG. 14, in the input / output characteristics of G (green) and B (blue), the luminance change is emphasized in the high luminance part, and conversely, the luminance change is compressed in the medium luminance part.

(2-2) Effects Realized by Embodiment As a result, in addition to the effects of the first embodiment, the following effects can be realized.
First, more detailed color and brightness adjustments than in the first embodiment can be realized.
Further, more detailed adjustment than the first embodiment can be performed with respect to changes over time and environmental changes.

  In the present embodiment, optimum conversion characteristics can be realized according to the luminance level. For this reason, optimal display characteristics can be provided for the display contents. For example, it is possible to generate a gradation voltage with an emphasis on contrast when displaying text. In addition, for example, when displaying a movie, it is possible to generate a gradation voltage that emphasizes the ability to express intermediate gradation.

  By the way, emphasizing the expressive power of the intermediate gradation means increasing the change in output voltage (light quantity change) with respect to the change in the luminance level (image data) in the intermediate gradation range. For this function, for example, a reference voltage group to be generated may be switched in accordance with display contents or the like in an external system.

  For example, a plurality of sets of gradation voltage generation circuits corresponding to each reference voltage group may be prepared, and the output of the corresponding gradation voltage generation circuit may be selected according to the display mode. Switching of the display mode is realized by a user operation instruction or an automatic discrimination function.

  Further, a reference voltage group corresponding to each display mode may be stored in a memory, and the selected or automatically determined reference voltage group may be generated in one gradation voltage generation circuit.

(3) Third Embodiment In the above-described embodiment, the set of D / A conversion circuits 32A to which the wiring patterns corresponding to the respective colors are connected is uniquely defined according to the pixel arrangement. That is, it is necessary to prepare a dedicated drive IC according to the pixel arrangement.

  Therefore, in this embodiment, an example of a circuit configuration that can be applied regardless of the difference in pixel arrangement will be described. Specifically, one internal wiring pattern is used and connected to all D / A conversion circuits 32A. A reference voltage corresponding to each color is applied to one internal wiring pattern in time division in synchronization with image data (drive data).

  Note that the present embodiment is also suitable for correcting variations between data lines of the display panel or variations between pixels.

(3-1) Circuit Configuration FIG. 15 shows a drive circuit mounted on the drive IC. Basic components constituting the drive circuit are the same as those in the first embodiment. That is, the drive circuit includes a data switch 31, a D / A conversion circuit block 32, a sample / hold circuit block 33, and an output buffer block 34.

One difference is that, for example, as shown in FIG. 4, one internal wiring pattern is connected in parallel to all the D / A conversion circuits 32A.
Another difference is that a switch 35 for converting a reference voltage corresponding to each color into a time-division signal is incorporated.

  The switch 35 and the D / A conversion circuit block 32 operate synchronously. Note that three types of maximum reference voltages Vref-R, Vref-G, and Vref-B corresponding to the respective colors are applied to the switch 35 from an external system.

  The switch 35 switches the reference voltage applied to the wiring pattern in synchronization with the clock. For example, the corresponding maximum reference voltages are cyclically applied in the order of R (red), G (green), and B (blue). The arrangement of the reference voltages applied to the wiring pattern is determined according to the pixel arrangement, for example.

(3-2) Effects Realized by Embodiment As a result, in addition to the effects of the first embodiment, the following effects can be realized.
That is, the three types of maximum reference voltages can be adjusted in units of data lines or pixels. Thereby, it is possible to cope with variations between data lines or pixels constituting the organic EL display.

  For example, it is only necessary to store the previously known variation in an external system and reflect this in the maximum reference voltage supplied by the external system. Thereby, an appropriate gradation voltage can always be supplied to the active element corresponding to each dot.

  It should be noted that the measurement result measured in real time can be reflected in the adjustment of the maximum reference voltage. Even in this case, an appropriate gradation voltage can always be supplied to the active element corresponding to each dot. Thus, further improvement and optimization of display quality can be realized.

  In the present embodiment, a common internal wiring pattern is connected to all the D / A conversion circuits 32A. For this reason, any pixel arrangement can be supported by controlling the transmission order of image data (drive data). Of course, the switch of the switch 35 is controlled to switch according to the pixel arrangement.

The switch switching procedure of the switch 35 is fixed, and can be realized by switching the maximum reference voltage applied to the input terminal of the switch 35.
Moreover, since the number of internal wiring patterns can be reduced from three to one, the wiring patterns can be simplified. Since the number of input terminals can be greatly reduced in this way, the area occupied by the driver IC can also be reduced.

(3-3) Modification In this embodiment, the conversion characteristic of the D / A conversion circuit 32A is realized by adjusting the maximum reference voltage. However, as in the second embodiment, the intermediate reference voltage is used. Can also be changed over time. In this case, the switch 35 may be arranged corresponding to each intermediate reference voltage. For example, n + 1 switches 35 may be arranged.

(4) Fourth Embodiment In this embodiment, a circuit configuration example that can reduce the influence of external noise will be described. Specifically, a configuration in which a reference voltage value (digital value) is given from an external system to the driver IC is employed.

(4-1) Circuit Configuration FIG. 16 shows a drive circuit mounted on the drive IC. Basic components constituting the drive circuit are the same as those in the first embodiment. That is, the drive circuit includes a data switch 31, a D / A conversion circuit block 32, a sample / hold circuit block 33, and an output buffer block 34.

  One difference is that the drive IC has a D / A conversion circuit block 36 for generating a reference voltage corresponding to each color. That is, it differs in that the maximum reference voltages Vref-R, Vref-G, and Vref-B, which are analog voltages, are generated inside the drive IC.

  In the D / A conversion circuit block 36, three D / A conversion circuits 36A corresponding to the respective colors are arranged. The maximum reference voltages Vref-R, Vref-G, and Vref-B corresponding to each color are generated by these three D / A conversion circuits.

  By the way, the external system and the drive IC are connected by a digital signal line having a width of several bits per color. That is, if the bit width per color is n, the external system and the drive IC are connected by a 3 × n bit width digital signal line.

  Note that the maximum reference voltages Vref-R, Vref-G, and Vref-B generated in each D / A conversion circuit 36A are given to the D / A conversion circuit 32A corresponding to each color through the wiring pattern shown in FIG. . Thus, the conversion characteristics of each D / A conversion circuit 32A are adjusted for each color.

(4-2) Effects Realized by Embodiment As a result, in addition to the effects of the first embodiment, the following effects can be realized.
First, the external system does not need to handle multiple types of analog voltages. As a result, the external system only needs to process the digital signal with a single voltage. Thus, simplification of the external system can be realized.

  Further, only digital data is transmitted between the external system and the drive IC. For this reason, the influence of external noise can be reduced compared with the case of transmitting an analog voltage. That is, it is possible to reduce the fluctuation of the reference voltage that defines the conversion characteristics of the D / A conversion circuit 32A due to external noise.

(4-3) Modification The technique of this embodiment can also be combined with the technique of the second embodiment. That is, in addition to the maximum reference voltage, the halftone reference voltage can be generated by the D / A conversion circuit block 36. In this case, in the D / A conversion circuit block 36, a plurality of D / A conversion circuits 36A for generating a reference voltage per color are arranged.

  The technique of this embodiment can also be combined with the technique of the third embodiment. That is, the internal wiring pattern may be shared for each connection point to be adjusted, and the reference voltage for each color may be applied to the internal wiring pattern in a time-sharing manner. In this case, the internal wiring pattern can be simplified.

  In addition, digital data to be given to the drive IC from an external system may be supplied in a time division manner. When this method is adopted, the number of input terminals of the drive IC can be reduced to 1/3. In this case, only one D / A conversion circuit for generating a reference voltage is required.

  That is, one D / A conversion circuit is shared by digital data for each color. In this case, a 1-input 3-output switch is connected to the output terminal of one D / A conversion circuit. Thereby, a reference voltage can be supplied to the internal wiring pattern corresponding to each color.

(5) Fifth Embodiment In the above-described embodiment, digital data from an external system is transmitted as parallel data. For this reason, the number of terminals of the drive IC increases. Therefore, in this embodiment, an example of a circuit configuration in which the number of terminals of the drive IC can be reduced will be described.

  Specifically, digital data is serially transmitted from an external system to the drive IC. That is, a method of converting into parallel data in the drive IC is adopted. Note that the post-conversion processing adopts the same configuration as that of the above-described fourth embodiment.

(5-1) Circuit Configuration FIG. 17 shows a drive circuit mounted on the drive IC. Basic components constituting the drive circuit are the same as those in the fourth embodiment. That is, the drive circuit includes a data switch 31, a D / A conversion circuit block 32 for data conversion, a sample / hold circuit block 33, an output buffer block 34, and a D / A conversion circuit block 36 for generating a reference voltage. Consists of.

  One difference is that the drive IC has a serial / parallel conversion circuit block 37 for converting serial data into parallel data. The S / P conversion circuit block 37 converts the serial format digital data generated by the external system into parallel format digital data corresponding to each color.

  In the S / P conversion circuit block 37, three S / P conversion circuits 37A corresponding to the respective colors are arranged. Parallel digital data representing the maximum reference voltage corresponding to each color is generated by these three S / P conversion circuits 37A.

  The parallel digital data generated by the S / P conversion circuit 37A is applied to the D / A conversion circuit block 36 for generating a reference voltage described in the fourth embodiment. The circuit configuration and operation contents after the D / A conversion circuit block 36 are the same as those in the fourth embodiment.

(5-2) Effects Realized by Embodiment As a result, in addition to the effects of the fourth embodiment, the following effects can be realized. That is, the number of digital data lines between the external system and the driver IC can be significantly reduced. Thus, the area occupied by the driver IC can be further reduced.

(5-3) Modification Note that the technique of this embodiment can also be combined with the technique of the second embodiment. In other words, in addition to the maximum reference voltage, the halftone reference voltage can be given to the drive IC as serial-format digital data. In this case, a plurality of S / P conversion circuits 37A are arranged for each color.

  The technique of this embodiment can also be combined with the technique of the third embodiment. That is, the internal wiring pattern may be shared for each connection point to be adjusted, and the reference voltage for each color may be applied to the internal wiring pattern in a time-sharing manner. In this case, the internal wiring pattern can be simplified.

  In addition, digital data to be given to the drive IC from an external system may be supplied in a time division manner. When this method is adopted, the number of input terminals of the drive IC can be reduced to 1/3. In this case, only one D / A conversion circuit for generating a reference voltage is required.

(6) Other Embodiments Regardless of the above-described embodiments, the pixel circuit of the organic EL display is manufactured using an amorphous silicon TFT. In this case, the drive circuit described in each embodiment may be formed as a peripheral circuit on the organic EL display. If this technology is applied, the area occupied by the peripheral circuit can be reduced.

  In addition, since the display area and the driver circuit can be manufactured over one panel, manufacturing cost can be reduced. This technique can be applied not only to a large display but also to a small display.

  The technique described in the above embodiment can be applied to a case where three dots constituting one pixel straddle a plurality of scanning lines (horizontal lines). Even in this case, display characteristics can be improved if an appropriate reference voltage can be generated when driving each color.

In the above-described embodiment, the organic EL display has been described. However, the present invention can be similarly applied to an inorganic EL display.
The technique described in the above-described embodiment can be applied to an EL display in which light emitters that emit only white light are arranged in a matrix. In this case, a color display can be configured by arranging color filters of three primary colors in the openings arranged in a matrix.

  The technology described in the above embodiment can be applied to flat displays other than organic EL displays. In particular, the technique described in each embodiment can be applied to the case where the drive circuit is arranged on the display panel or the case where the drive circuit is built in the driver IC chip.

It is a figure which shows the example of a conceptual structure of the display element which concerns on one invention. It is a figure which shows the example of a wiring pattern used for supply of a gradation reference voltage. It is a figure which shows the conceptual structural example of the display apparatus which concerns on one invention. It is a figure which shows the example of a wiring pattern used for supply of a gradation reference voltage. It is a figure which shows the example of a circuit used for supply of a gradation reference voltage, and a wiring pattern example. It is a figure which shows the example of a circuit used for supply of a gradation reference voltage, and a wiring pattern example. It is a figure which shows the internal structural example of an electronic device. It is a figure which shows the 1st example of embodiment of a drive circuit. It is a figure which shows the example of a basic composition of a D / A conversion circuit. It is a figure which shows the relationship between the gradation reference voltage supplied to a D / A converter circuit, and an output voltage. It is a figure which shows the input / output characteristic of a D / A conversion circuit. It is a figure which shows 2nd Example of a drive circuit. It is a figure which shows the relationship between the gradation reference voltage supplied to a D / A converter circuit, and an output voltage. It is a figure which shows the input / output characteristic of a D / A conversion circuit. It is a figure which shows the 3rd Embodiment of a drive circuit. It is a figure which shows the 4th example of embodiment of a drive circuit. It is a figure which shows the 5th example of embodiment of a drive circuit.

Explanation of symbols

1, 11 Display element 2, 12 Display region 3, 13 Drive circuit region (drive circuit unit)
3A D / A conversion circuit (for data)
3B wiring pattern 3C, 36A D / A conversion circuit (for generating gradation reference voltage)
3D, 37A S / P conversion circuit 31 Data switch 32 D / A conversion circuit block 33 Sample / hold circuit block 34 Output buffer block 35 Switch (for gradation reference voltage switching)

Claims (16)

A display element in which dots as minimum display units are arranged in a matrix and a drive circuit area for driving an active element corresponding to each dot is formed on the same substrate,
The drive circuit region is
A group of digital / analog conversion circuits for converting drive data corresponding to each dot into analog values,
And a wiring pattern for applying a gradation reference voltage to the group of digital / analog conversion circuits for each corresponding color. A semiconductor integrated circuit incorporating a drive circuit for driving a display element in which dots as a minimum display unit are arranged in a matrix,
The drive circuit is
A group of digital / analog conversion circuits for converting drive data corresponding to each dot into analog values,
A semiconductor integrated circuit comprising: a wiring pattern for applying a gradation reference voltage to the group of digital / analog conversion circuits for each corresponding color. The display element according to claim 1,
The gray scale reference voltage is a maximum output voltage value of a digital / analog conversion circuit. The semiconductor integrated circuit according to claim 2,
The gradation reference voltage is a maximum output voltage value of a digital / analog conversion circuit. A semiconductor integrated circuit, wherein: The display element according to claim 1,
The display element, wherein the gradation reference voltage is one or a plurality of intermediate voltage values of a digital / analog conversion circuit. The semiconductor integrated circuit according to claim 2,
The gradation reference voltage is one or a plurality of intermediate voltage values of a digital / analog conversion circuit. A semiconductor integrated circuit, wherein: The display element according to claim 1,
The display element, wherein the wiring pattern is connected in parallel to all the digital / analog conversion circuits, and the gradation reference voltage is given in time division in synchronization with drive data. The semiconductor integrated circuit according to claim 2,
The semiconductor integrated circuit characterized in that the wiring pattern is connected in parallel to all the digital / analog conversion circuits, and the gradation reference voltage is given in time division in synchronization with drive data. The display element according to claim 1,
A display element comprising: a digital / analog conversion circuit for generating a gradation reference voltage for generating the gradation reference voltage from digital data. The semiconductor integrated circuit according to claim 2 comprises:
A semiconductor integrated circuit comprising: a digital / analog conversion circuit for generating a gradation reference voltage that generates the gradation reference voltage from digital data. The display element according to claim 9 is:
A display element comprising: a serial / parallel conversion circuit that supplies the digital data input as serial data to the digital / analog conversion circuit as parallel data. The semiconductor integrated circuit according to claim 10 comprises:
A semiconductor integrated circuit comprising: a serial / parallel conversion circuit for supplying the digital data input as serial data to the digital / analog conversion circuit as parallel data. A display device comprising the display element according to claim 1. A display element in which dots as minimum display units are arranged in a matrix, and
A display device comprising: the semiconductor integrated circuit according to claim 2. A display element according to claim 1;
An electronic device comprising: a signal processing unit that provides a gradation reference voltage value to the display element. A semiconductor integrated circuit according to claim 2;
An electronic device comprising: a signal processing unit that provides a gradation reference voltage value to the semiconductor integrated circuit.

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