JP2005136481A - Transmission system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transmission system for automatically applying configuration to units and enhancing the flexibility, maintenance management and convenience for system operation. <P>SOLUTION: A slave control section 11 has a programmable logic element 11a and activates the element 11a by setting logic data. A state notice section 12 informs of the functions and the operating state of the units. A logic data write section 13 writes the logic data to the programmable logic element 11a. A state recognition section 22 recognizes the function and the operating state of each unit. A logic data storage section 24 stores the logic data by each unit function. A logic data transmission section 23 transmits logic data to automatically set logic data corresponding to each unit to the programmable logic element 11a. A unit connection section 30 distributes the same signal to an optional slot from any slot position to connect the units. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a transmission system, and more particularly to a transmission system that includes a programmable logic element and transmits a signal.

  In recent years, the gate array development cost has increased with the increase in product development speed of electronic devices. For this reason, as a gate array, development of a PLD (Programmable Logic Device) is more important than an ASIC (Application Specific Integrated Circuit).

  The ASIC is an IC module specially made for a specific application, and the logic contents of the ASIC once created cannot be rewritten. The ASIC has high performance such as operation speed and logic integration, but has a drawback that the development period is long and the design cost is high.

  On the other hand, a PLD is an IC module that allows a user to program logic operations even after manufacturing. In particular, FPGA (Field Programmable Gate Array) that can be designed by combining small LB (Logic Block) including logical table (LUT: Look Up Table) and CPLD (Complex Programmable Logic Device) combining multiple AND-OR array structures This is a typical example. FPGA / CPLD has the advantages that it has a high degree of freedom and can reduce design cost and development period.

  Setting (programming) a logical operation for a PLD such as an FPGA is called configuration, and information for defining the logical operation is called configuration information (configuration data).

As a conventional technique, a technique has been proposed in which an arithmetic processing unit is configured with a PLD to provide general-purpose functions to improve maintenance efficiency (for example, Patent Document 1).
Japanese Patent Laid-Open No. 2002-169602 (paragraph numbers [0012] to [0034], FIG. 1)

  The above-described conventional technology (Japanese Patent Laid-Open No. 2002-169602) is a system in which an arithmetic processing unit is configured by a PLD and a plurality of functions are realized by one general-purpose unit. In addition, when a failure occurs in a unit during system operation, the user can perform failure recovery by simply replacing the function of the failed unit with a spare unit configured in advance (PLD It can be handled by changing the program only).

  As described above, the prior art has an advantage that it is not necessary to always have a plurality of types of circuit configuration units for each function, but the faulty unit is not automatically determined and replaced with a spare unit. . Therefore, in the conventional technology, unit replacement is performed by manual operation, but in this case, a large time lag occurs from failure occurrence to unit replacement, which increases the efficiency and convenience in operation and maintenance. There was a problem of lacking.

  The present invention has been made in view of these points, and provides a transmission system that automatically configures a unit to improve system operation flexibility, maintenance management, and convenience. For the purpose.

  In the present invention, in order to solve the above-described problem, in the transmission system 1 that transmits signals as shown in FIG. 1, the slave control unit 11 that controls the programmable logic element 11a in which the logic data is written, and the function of the unit And a slave unit 10-1 to 10-n composed of a state notifying unit 12 for notifying the operation state and a logical data writing unit 13 for writing the received logical data to the programmable logic element 11a, and the function of each unit Based on the recognized state, the state recognition unit 22 for recognizing the operation state, the logical data storage unit 24 for storing the logical data for each function, and the logical data corresponding to each unit are automatically set in the programmable logic element 11a. A master unit 20 comprising a logical data transmitter 23 for transmitting logical data to A unit connection unit 30 that distributes the same signal from any slot position for insertion of the master unit 20 and the slave units 10-1 to 10-n to other slots so that the units can be connected to each other. A transmission system 1 is provided.

  Here, the slave control unit 11 controls the programmable logic element in which the logic data is written. The state notification unit 12 notifies the function and operation state of the unit. The logical data writing unit 13 writes the received logical data to the programmable logic element 11a. The state recognition unit 22 recognizes the function and operation state of each unit. The logical data storage unit 24 stores logical data for each function. Based on the recognized state, the logical data transmission unit 23 transmits logical data to the programmable logic element 11a in order to automatically set logical data corresponding to each unit. The unit connection section 30 distributes the same signal from any slot position for insertion of the master unit 20 and the slave units 10-1 to 10-n to other slots so that the units can be connected.

  In the transmission system of the present invention, the master unit recognizes the function and operation state of the slave unit with respect to the slave unit that controls the programmable logic element in which the logic data is written, and the programmable logic in the unit is based on the recognized state. The device is configured to automatically set logical data corresponding to each unit in the element. Thereby, since the configuration can be automatically performed, it is possible to improve the flexibility of system operation, maintenance management, and convenience.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a principle diagram of a transmission system according to the present invention. The transmission system 1 includes slave units 10-1 to 10-n (slave unit 10 when collectively referred to), a master unit 20, and a unit connection unit 30.

  The slave control unit 11 in the slave unit 10 has a programmable logic element (hereinafter referred to as PLD) 11a that can be set for logic operation programming, and controls the PLD 11a in which logic data is written. The state notification unit 12 notifies the function and operation state of the unit. The logical data writing unit 13 receives the logical data transmitted from the master unit 20 and writes it into the PLD 11a.

  The state recognition unit 22 in the master unit 20 recognizes the function and operation state of each unit with respect to the slave units 10-1 to 10-n. The logical data storage unit 24 stores logical data for each function of the slave units 10-1 to 10-n. The logical data transmission unit 23 automatically sets logical data corresponding to each unit in the PLD 11a in the slave units 10-1 to 10-n based on the states of the slave units 10-1 to 10-n. Send logical data. The logical data transmission unit 23 also stores information such as whether or not the corresponding logical data has been transmitted to a certain slave unit.

  The unit connection section 30 is wired to connect the units so that the same signal can be distributed to any slot from any slot position. For example, when there are slots # 1 to #n, if signal A can be transmitted from slot # 1 to slot # 2, signal A can be transmitted from slot # 1 to other slots # 3 to #n. It means that wiring is done.

  By adopting such a wiring structure, the slave units 10-1 to 10-n and the master unit 20 that can execute various functions with a unit having a common circuit configuration can be connected to any slot of the housing. Since it can be mounted, it becomes possible to facilitate maintenance and improve convenience.

  Here, an example of configuration operation will be described. Assume that the slave units 10-1 and 10-2 and the master unit 20 are connected to the unit connection unit 30, and the slave unit 10-1 operates with a modulator function and the slave unit 10-2 with a demodulator function.

  When the power is turned on, first, the state notification unit 12 of the slave unit 10-1 notifies the master unit 20 of its own unit ID. The state recognition unit 22 of the master unit 20 acquires the unit ID of the slave unit 10-1, and recognizes from the unit ID that the function of the slave unit 10-1 is a modulator.

  When the logical data transmission unit 23 confirms that the corresponding logical data has not been transmitted, the logical data corresponding to the slave unit 10-1 stored in the logical data storage unit 24 (the logic for becoming a modulator unit). Data) is extracted and transmitted to the slave unit 10-1. The logical data writing unit 13 in the slave unit 10-1 writes the received logical data into the PLD 11a (programming setting).

  Next, the status notification unit 12 of the slave unit 10-2 notifies the master unit 20 of its own unit ID. The state recognition unit 22 of the master unit 20 acquires the unit ID of the slave unit 10-2, and recognizes from the unit ID that the function of the slave unit 10-2 is a demodulator.

  When the logical data transmission unit 23 confirms that the corresponding logical data has not been transmitted, the logical data corresponding to the slave unit 10-2 stored in the logical data storage unit 24 (for becoming a demodulator unit). (Logical data) is extracted and transmitted to the slave unit 10-2. The logical data writing unit 13 in the slave unit 10-2 writes the received logical data to the PLD 11a.

  As described above, in the present invention, since logical data is automatically set and operates (in the above example, when power is turned on, the same applies when a slave unit is added during system operation). The operator can use the configuration tool to write logic data to individual PLDs, insert the written PLDs one by one into the board, and save them from mounting on the chassis, and work to add units Can be simplified, and maintenance efficiency can be improved.

  In FIG. 1, the master unit 20 is a dedicated unit that performs configuration for the slave units 10-1 to 10-n. (Or the configuration in which the master unit 20 has the function of the slave unit 10 is the same).

Next, configurations of the slave unit 10 and the master unit 20 will be described. Hereinafter, the logical data is referred to as configuration data.
FIG. 2 is a diagram showing the configuration of the slave unit 10. The slave unit 10 includes a slave control unit 11, a state notification unit 12, a configuration / data writing unit 13, and an I / F unit 14.

  The I / F unit 14 performs a communication interface between the own unit, the other slave unit, and the master unit 20 via the unit connection unit 30. The slave control unit 11 is a part of the main circuit in the slave unit, includes a single or a plurality of PLDs 11a, and executes operations of functions assigned to the unit based on logical operations of the PLD 11a.

  The status notification unit 12 transmits the unit ID as a status monitoring signal when the power is turned on or when a unit is added, and monitors the operation status of the slave control unit 11 during operation, and monitors the failure information when a failure is detected. Send as a signal. The configuration data writing unit 13 writes the configuration data transmitted from the master unit 20 to the PLD 11a.

  The configuration content of the slave control unit 11 is not limited to the PLD 11a. FIG. 25 shows a slave unit 10a having a different configuration using a macro computer 11d and a memory 11c. The slave control unit 11-1 includes a memory 11c and a microcomputer 11d.

  When the unit is activated, the microcomputer 11d is in a stopped state. The configuration data writing unit 13 writes configuration data to the memory 11c. The content is a program of the microcomputer 11d. After completion of the writing, the microcomputer 11d shifts to an operating state and starts a predetermined operation using the program written in the memory 11c.

  FIG. 3 is a diagram showing the configuration of the master unit 20. The master unit 20 includes a master control unit 21, a state recognition unit 22, a configuration / data writing unit 23, a configuration / data storage unit 24, a configuration / data transmission unit 25, and an I / F unit 26. The control console 27 is connected as necessary.

  The I / F unit 26 performs a communication interface between the own unit and the slave units 10-1 to 10-n via the unit connection unit 30. The master control unit 21 is a part of the main circuit in the master unit, includes a single or a plurality of PLDs 21a, and executes operations of functions assigned to the unit based on logical operations of the PLD 21a.

  The state recognition unit 22 recognizes the operation state of each unit based on the operation state of the master control unit 21 and the state monitoring signal transmitted from the slave unit 10. The configuration data storage unit 24 stores various configuration data necessary for the slave units 10-1 to 10-n and the master unit 20.

  The configuration data writing unit 23 extracts configuration data necessary for the unit from the configuration data storage unit 24 and writes the configuration data to the PLD 21a. The configuration data transmission unit 25 extracts the configuration data corresponding to each unit from the configuration data storage unit 24 based on the state recognition result, and configures the slave units 10-1 to 10-n in the configuration data.・ Send data. Also, information such as the transmission result of configuration data (whether or not transmission has been completed) is stored.

  The control console 27 is connected when the configuration data itself is updated. While the unit is performing a predetermined operation, the configuration data storage unit 24 is not operating. At this time, the control console 27 is connected to update the configuration data without interfering with the operation of the apparatus.

  The configuration data storage unit 24 can be physically removed from the master unit. By creating the configuration data at a location away from the master unit and exchanging it with the one on the master unit after completion, the connection of the control console 27 is unnecessary and the maintainability is improved.

  The configuration data storage unit 24 stores a plurality of sets of configuration data for determining the operation of the apparatus. It is possible to select which set of configuration data is to be used based on the request for equipment status or function change. Data selection is controlled by the state recognition unit 22.

  Next, the spare unit switching operation when a failure occurs in the slave unit 10 will be described. FIG. 4 is a diagram illustrating an operation when a failure occurs. The slave units 10-1 to 10-n, the master unit 20, and the spare unit 40 are mounted on the unit connection unit 30, and the slave units 10-1 to 10-n and the master unit 20 operate with assigned functions. Suppose that The spare unit 40 has the same circuit configuration as the slave units 10-1 to 10-n, and is not programmed in the PLD in the unit and is in a standby state (the operation of the main circuit is stopped). )

  At this time, it is assumed that a failure has occurred in the slave unit 10-1 (slave control unit 11 of the slave unit 10-1). When the status notification unit 12 of the slave unit 10-1 notifies the master unit 20 to that effect, the status notification unit 22 of the master unit 20 recognizes the fact.

  The configuration data transmission unit 25 of the master unit 20 extracts configuration data corresponding to the slave unit 10-1 from the configuration data storage unit 24, and transmits the configuration data to the spare unit 40 (when the spare unit 40 is mounted, By transmitting the unit ID of the spare unit 40, the master unit 20 has recognized that the spare unit 40 is mounted). When the configuration data writing unit of the spare unit 40 receives the data, the configuration data writing unit writes the data in its own PLD and executes the function of the slave unit 10-1 (actually, in the master unit 20, the configuration data writing is performed. When the completion is confirmed and the activation signal is transmitted from the master unit 20 to the spare unit 40, the spare unit 40 is moved).

  As described above, in the present invention, when a failure occurs in the slave unit 10, the failure unit is determined by the master unit 20 and automatically switched to the spare unit 40 (if the operator replaces the failed unit later). Good), flexibility of system operation, maintenance management and convenience can be improved.

  In the above description, the configuration data of each unit is stored in the configuration data storage unit 24 of the master unit 20 in advance. However, communication between the server and the master unit 20 is performed, and the master unit 20 May be configured to download configuration data from the server. At this time, after the download is completed, if any of the slave units 10-1 to 10-n fails or is expanded, the configuration operation is performed only between the master unit 20 and the corresponding slave unit. Is executed.

  Next, another embodiment of the configuration operation will be described. In the above description, the unit IDs of the slave units 10-1 to 10-n and various configuration data are associated with each other in advance, and automatic setting is performed. However, according to the number of mounted slave units, The master unit 20 can also set automatically by determining the optimal function allocation.

  In this case, the master unit 20 has a combination table for performing function allocation. The combination table is a table that describes the optimal combination of the number of units mounted and the setting function.

  For example, when slave units 10-1 to 10-6 are mounted, six unit IDs are sent, so that the state recognition unit 22 of the master unit 20 recognizes that six slave units are mounted. .

  Then, the state recognizing unit 22 recognizes the function corresponding to the corresponding number of implementations by referring to the combination table included therein (for example, the number of implementations = 6: modulator × 2, demodulator × 2, control × 1). . The configuration data transmission unit 25 extracts the corresponding configuration data from the configuration data storage unit 24 and transmits it to each of the slave units 10-1 to 10-6. With such a configuration, it is possible to select an optimum function corresponding to the number of mounted modules.

  Next, another embodiment of the configuration operation related to the failure will be described. In the above description, after one of the slave units 10-1 to 10-n has failed and recognized that, configuration data is transmitted to the spare unit 40 to automatically replace the unit. However, it is also possible to recognize a slave unit having a high probability of occurrence of a failure in advance and set the configuration data of the slave unit in the spare unit 40 in advance.

  In this case, while the slave units 10-1 to 10-n are in operation, the status notification unit 12 of each unit periodically transmits failure probability information to the master unit 20. The failure probability information includes the count number of data errors in the slave control unit 11 counted by each slave unit, the number of failure words when the memory is installed, and the failure in either of the two system configurations of Work / Protection. System information at the time of the occurrence, unit production date, or unit ID of a unit that has been considered to have a high probability of failure from experience (even if it is a common circuit configuration, it varies depending on the operating frequency, etc.) .

  The state recognition unit 22 in the master unit 20 determines a slave unit with a high possibility of failure based on the received failure probability information. The configuration data transmission unit 25 transmits configuration data of the operation function of the slave unit that is determined to have a high possibility of failure to the spare unit 40 in advance. When the state recognition unit 22 actually recognizes the occurrence of a failure, the configuration data transmission unit 25 transmits an activation signal to the spare unit 40. With such a configuration, it becomes possible to perform a configuration operation corresponding to the occurrence of a failure at a higher speed.

  Next, the unit connection part 30 will be described. FIG. 5 is a diagram showing the configuration of the unit connection section. The unit connecting portion is configured as a back board 30-1 that is a housing wiring board, and a connector C1 for mounting the slave unit 10 or the master unit 20 is mounted, and the same signal is output from any slot position to any slot. Wiring is made so that it can be distributed. In the case of the configuration in this figure, the wiring from end to end is the longest wiring (the length is L).

  FIG. 6 is a view showing a modification of the backboard 30-1. The backboard 30a-1 is a columnar (cylindrical in the figure) backboard. With the backboard 30a-1 having such a structure, the connection distance between the units can be shortened as compared with the shape of FIG. 5, so that the signal delay can be shortened.

  FIG. 7 is a diagram showing a cylindrical wiring pattern. The longest wiring shown in FIG. 5 corresponds to the circumference. In the case of the wiring patterns 30a-1a and 30a-1b as the wiring of the cylindrical backboard 30a-1, the length of the longest wiring (which becomes the diameter of the circle) is L / π. In the wiring patterns 30a-1c, the length of the longest wiring is L / 2, and in the wiring patterns 30a-1d, the length of the longest wiring is L / 2 or less. Thus, by making the backboard 30-1 into a cylindrical structure and inserting each unit radially, the signal delay for each unit can be treated equivalently (because there is no end), and the signal delay between units can be reduced. Wiring design that takes into account becomes easy.

  In the wiring pattern 30a-1a, for example, the signals from each slot are concentrated at the center, and the wiring is distributed radially from the center to the other slots so that the transmission path length between the slots is increased. Are equally easy to design.

  FIG. 8 shows a rotatable cylindrical backboard. The turntable 31 is attached to the columnar backboard 30a-1 so that the columnar backboard 30a-1 can be rotated. Thus, the operator can rotate the cylindrical backboard 30a-1 to bring the unit to be evaluated at hand, thereby improving maintenance efficiency.

  Next, an embodiment in which transmission at the unit connection unit 30 is performed using an optical fiber will be described. FIG. 9 is a diagram illustrating an overall configuration when the transmission of the unit connection unit 30 is performed using an optical fiber. In the unit connection unit 30-2, optical connection units 300-1 to 300-n and 300- (n + 1) are provided for each slot, and these optical connection units are connected by an optical fiber F. The optical fiber F shown in the figure has a ring shape, but may have a linear shape (a linear configuration will be described later with reference to FIGS. 14 to 17). With this configuration, high-speed signal transmission is possible.

  Next, the configuration of the optical connection unit will be described. The configuration of the optical connection unit differs between WDM (Wavelength Division Multiplex) transmission and burst transmission, and will be described for each transmission. FIG. 10 is a diagram illustrating a configuration of the optical connection unit. The structure of the optical connection part at the time of WDM transmission is shown. The optical connection unit 300a includes half mirrors 301 and 302, a wavelength selection unit 303, an O / E (light / electrical conversion) unit 304, and an E / O (electrical / optical conversion) unit 305.

  When receiving the wavelength-multiplexed optical signal from the left unit, the half mirror 301 reflects a part of the incident light and transmits it to the wavelength selection unit 303, and transmits a part of the incident light to the half mirror 302. The wavelength selection unit 303 filters a preset wavelength from the received optical signal and transmits the filtered wavelength to the O / E unit 304. The O / E unit 304 converts the received filter transmitted light into an electrical signal and transmits it to the unit.

  The E / O unit 305 converts an electrical signal from the unit into an optical signal (converts it into light having a wavelength unique to the unit), and transmits the optical signal to the half mirror 302. The half mirror 302 transmits the optical signal from the half mirror 301, reflects the optical signal from the E / O unit 305, and transmits the combined optical signal to the right unit of the next stage.

  The half mirrors 301 and 302 are not mirrors whose transmitted light intensity and reflected light intensity are completely equal, but are mirrors that transmit a part of incident light and reflect a part thereof, so that light gradually attenuates during transmission. The optical signal does not circulate and the light of a certain unit wavelength does not form an infinite loop.

  FIG. 11 is a diagram illustrating a configuration of the optical connection unit. The structure of the optical connection part at the time of burst transmission is shown. The optical connection unit 300b includes half mirrors 301 and 302, an O / E unit 304, and an E / O unit 305. When receiving the optical burst signal (which is an optical signal of one wavelength), the half mirror 301 reflects part of the signal and transmits it to the O / E unit 304, and transmits part of the signal to the half mirror 302. The O / E unit 304 converts the received optical burst signal into an electrical signal and transmits it to the unit.

  The E / O unit 305 converts the electrical signal from the unit into an optical signal, and transmits the optical signal to the half mirror 302 in a burst format (transmits at a timing assigned to each unit). The half mirror 302 transmits the optical signal from the half mirror 301 or reflects the optical signal from the E / O unit 305 and transmits it to the next stage.

  FIG. 12 is a diagram illustrating a configuration of the optical connection unit. The figure shows a configuration example different from that of FIG. 11 of the optical connection unit during burst transmission. The optical connection unit 300c includes an O / E unit 306, an E / O unit 307, an OR element 308, an AND element 309, a balanced transmission driver element 310, and receiver elements 311 and 312.

  Regarding the connection relationship of the elements, the output section of the O / E section 306 is connected to one input terminal of the OR element 308 and the input terminal of the driver 310. The output terminal of the receiver 311 is connected to the other input terminal of the OR element 308, and the output terminal of the OR element 308 is connected to one input terminal of the AND element 309. The output terminal of the receiver 312 is connected to the other input terminal of the AND element 309, and the output terminal of the AND element 309 is connected to the input part of the E / O unit 307.

  Here, the O / E unit 306 converts the optical burst signal transmitted from the left unit into an electric signal D2, and transmits it to the OR element 308 and the driver 310. The driver 310 converts the received electrical signal D2 into a differential signal and transmits it to the unit side. The receiver 311 receives the mask differential signal from the unit and transmits the mask signal D3 to the OR element 308. The OR element 308 takes the OR logic of the signal D2 from the O / E unit 306 and the mask signal D3 and outputs a signal D4.

  The receiver 312 receives the differential signal from the unit and transmits the output signal D1 to the AND element 309. The AND element 309 takes an AND logic of the output signal D4 from the OR element 308 and the signal D1 from the receiver 312 and transmits the output signal D5 to the E / O unit 307.

  FIG. 13 is a diagram illustrating a time chart during mask processing in the optical connection unit 300c. The time chart when the optical signal from the left unit is masked to block the optical signal transmitted by the unit from becoming an infinite loop is shown.

  For the signal D2 from the previous stage, the mask signal D3 is masked as “H”, and the output signal D4 of the OR element 308 is set as “H”. Then, the AND element 309 takes the AND logic of “H” of the output signal D4 and the signal D1 from the unit, and sends only the logic of the output signal D5 of the AND element 309 to the E / O unit 307. With such a configuration, it is possible to prevent looping by blocking the optical signal of the own unit transmitted from the previous stage.

  Next, an embodiment in which the optical fiber F is linear will be described. FIG. 14 is a diagram showing an overall configuration when connected by a linear optical fiber. The unit connection section 30-3 is provided with a two-surface optical connection section for each slot, and these optical connection sections are connected by two optical fibers F1 and F2, respectively.

  That is, the optical connection units 310a-1 to 310a-n and 310a- (n + 1) are connected by the optical fiber F1, and when performing transmission in the right direction, the optical connection units 310a-1 to 310a-1 are used by using the optical fiber F1. Optical connection control is performed by 310a-n and 310a- (n + 1).

  The optical connection units 310b-1 to 310b-n and 310b- (n + 1) are connected by the optical fiber F2, and when performing transmission in the left direction, the optical connection units 310b-1 to 310b-1 are used by using the optical fiber F2. Optical connection control is performed by 310b-n and 310b- (n + 1). In addition, since these optical connection parts are the same circuit structures as FIGS. 10-12, description of a structure and operation | movement of an optical connection part is abbreviate | omitted.

  FIG. 15 is a diagram showing an overall configuration when connected by a linear optical fiber. The structure in the case of one optical fiber is shown. In the unit connection section 30-4, optical connection sections 320-1 to 320-n and 320- (n + 1) are provided for each slot, and these optical connection sections are connected by an optical fiber F3. The optical fiber F3 in the figure is a linear optical fiber used for bidirectional transmission.

  FIG. 16 is a diagram illustrating a configuration of the optical connection unit. The structure of the optical connection part at the time of WDM transmission with respect to the unit connection part 30-4 is shown. The optical connection unit 320 a includes half mirrors 321 and 322, a wavelength selection unit 323, an O / E unit 324, and an E / O unit 325. In addition, optical fibers F3a and F3b are provided at the positions shown in the drawing.

  Regarding the flow of the optical signal from the left unit to the right unit, when the half mirror 321 receives the wavelength-multiplexed optical signal a0 from the left unit, the half mirror 321 reflects a part of the incident light and transmits the optical signal a1 to the wavelength selection unit 323. , And partly transmits the optical signal a2 to the half mirror 322. The wavelength selection unit 323 filters a wavelength set in advance from the received optical signal a1 and transmits the filtered wavelength to the O / E unit 324. The O / E unit 324 converts the received filter transmitted light into an electric signal and transmits it to the unit side.

  The E / O unit 325 converts the electrical signal from the unit into an optical signal a3 (converts it into light having a wavelength unique to the unit), and transmits the optical signal to the half mirror 322. The half mirror 322 transmits the optical signal a2 from the half mirror 321, reflects the optical signal a3 from the E / O unit 325, and transmits the combined wavelength multiplexed signal a4 to the next stage.

  Regarding the flow of the optical signal from the right unit to the left unit, the optical signal b1 from the E / O unit 325 passes through the optical fiber F3b, is reflected by the half mirror 322, and is a wavelength multiplexed signal transmitted from the right unit. b0 passes through the half mirror 322, so that the optical signals b0 and b1 are combined, and the wavelength multiplexed signal b2 is transmitted to the half mirror 321.

  A part of the wavelength multiplexed signal b2 is transmitted through the half mirror 321, and the transmitted signal b3 is transmitted to the left unit. A part of the wavelength multiplexed signal b 2 is reflected by the half mirror 321, passes through the optical fiber F 3 a, and the reflected light b 4 is transmitted to the wavelength selection unit 323 and filtered by the wavelength selection unit 323. Subsequent operations are the same.

  FIG. 17 is a diagram illustrating a configuration of the optical connection unit. The structure of the optical connection part at the time of the burst transmission with respect to the unit connection part 30-4 is shown. The optical connection unit 320b includes half mirrors 321 and 322, an O / E unit 324, and an E / O unit 325. In addition, optical fibers F3a and F3b are provided at the positions shown in the drawing.

  Regarding the flow of the optical signal from the left unit to the right unit, when receiving the optical burst signal c0 from the left unit, the half mirror 321 reflects a part of the incident light and transmits the signal c1 to the O / E unit 324. , Partly transmits the signal c2 to the half mirror 322. The O / E unit 324 converts the received signal c1 into an electric signal and transmits it to the unit side.

  The E / O unit 325 converts the electrical signal from the unit into an optical signal c3 and transmits it to the half mirror 322 (transmits at the timing assigned to each unit). The half mirror 322 transmits the optical signal c2 from the half mirror 321 or reflects the optical signal c3 from the E / O unit 325 and transmits it to the next stage.

  Regarding the flow of the optical signal from the right unit to the left unit, the optical signal d1 from the E / O unit 325 passes through the optical fiber F3b and is reflected by the half mirror 322, or the optical signal d0 transmitted from the right unit is By transmitting through the half mirror 322, the optical signal d0 or the optical signal d1 is transmitted to the half mirror 321.

  A part of the optical signal d0 or the optical signal d1 is transmitted through the half mirror 321, and the transmitted signal d3 is transmitted to the left unit. Further, a part of the optical signal d 0 or the optical signal d 1 is reflected by the half mirror 321, passes through the optical fiber F 3 a, and the reflected light d 4 is transmitted to the O / E unit 324.

  Next, an embodiment in which transmission in the unit connection unit 30 is performed by low voltage differential signaling (LVDS) will be described. FIG. 18 is a diagram illustrating an overall configuration when transmission of the unit connection unit 30 is performed by LVDS. In the unit connection unit 30-5, signal connection units 330-1 to 330-n and 330- (n + 1) are provided for each slot, and these signal connection units are connected by LVDS lines L1 and L2.

  FIG. 19 is a diagram illustrating the configuration of the signal connection unit. The structure of the signal connection part at the time of burst transmission is shown. The signal connection unit 330a includes driver elements Dr1 to Dr4 for LVDS balanced transmission, receiver elements Re1 to Re4 for LVDS balanced transmission, AND elements IC1 and IC2.

  Regarding the connection relationship of the elements, the output terminal of the receiver Re1 is connected to one input terminal of the AND element IC1 and the input terminal of the driver Dr4. The output terminal of the receiver Re3 is connected to the other input terminal of the AND element IC1, and the output terminal of the AND element IC1 is connected to the input terminal of the driver Dr1.

  The output terminal of the receiver Re2 is connected to one input terminal of the AND element IC2 and the input terminal of the driver Dr3. The output terminal of the receiver Re4 is connected to the other input terminal of the AND element IC2, and the output terminal of the AND element IC2 is connected to the input terminal of the driver Dr2.

  In response to the signal transmission on the line L1, when receiving the LVDS differential signal transmitted from the right unit, the receiver Re2 converts it into the serial signal D12 and transmits it to the AND element IC2 and the driver Dr3. The driver Dr3 converts the received signal D12 into an LVDS differential signal and transmits it to the unit side.

  When the receiver Re4 receives the LVDS differential signal transmitted from its own unit, the receiver Re4 converts it into the serial signal D11 and transmits it to the AND element IC2. The AND element IC2 takes the AND logic of the output signals D11 and D12 of the receivers Re4 and Re2 and transmits the output signal D13 to the driver Dr2. The driver Dr2 converts the received signal D13 to the LVDS differential signal and transmits it to the left unit. To do. The signal transmission on the line L1 is the same flow. FIG. 20 shows a time chart during burst transmission of the signal connection unit 330a.

  FIG. 21 is a diagram showing an overall configuration when the LVDS transmission line is formed in a ring shape. The unit connection unit 30-6 is provided with signal connection units 340-1 to 340-n and 340- (n + 1) for each slot, and these signal connection units are connected by two ring-shaped LVDS transmission lines L3 and L4. Is done. Line L3 is a line for main signals and control signals, and line L4 is a clock transmission line.

  FIG. 22 is a diagram illustrating the configuration of the signal connection unit. The signal connection unit 340a includes driver elements Dr5 to Dr8 for LVDS balanced transmission, receiver elements Re5 to Re8 for LVDS balanced transmission, an AND element IC3, and an OR element IC4.

  The connection relationship of each element is such that the output terminal of the receiver Re5 is connected to one input terminal of the OR element IC4 and the input terminal of the driver Dr7, and the output terminal of the receiver Re7 is connected to the other input terminal of the OR element IC4. To do. The output terminal of the OR element IC4 is connected to one input terminal of the AND element IC3, the output terminal of the receiver Re8 is connected to the other input terminal of the AND element IC3, and the output terminal of the AND element IC3 is connected to the driver Dr5. Connect to the input terminal. The output terminal of the receiver Re6 is connected to the input terminals of the drivers Dr6 and Dr8.

  Here, when receiving the LVDS differential signal transmitted from the right unit, the receiver Re5 converts it into a serial signal and transmits it to the OR element IC4 and the driver Dr7. Further, when receiving the LVDS differential clock signal transmitted from the right unit, the receiver Re6 converts it into a serial signal and transmits it to the drivers Dr6 and Dr8. The driver Dr6 converts the clock signal to the LVDS differential signal and transmits it to the left unit side. The drivers Dr7 and Dr8 transmit the main signal and the clock signal to the unit side as LVDS differential signals, respectively.

  The OR element IC4 takes the OR logic of the output signal from the receiver Re5 and the mask signal from the receiver Re7, and transmits the output signal to the AND element IC3. The receiver Re8 receives the LVDS differential signal transmitted from its own unit. When the signal is received, it is converted into a serial signal and transmitted to the AND element IC3.

  The AND element IC3 takes the AND logic of the output signals of the OR element IC4 and the receiver Re8, and transmits the output signal to the driver Dr5. The driver Dr5 converts the received signal into the LVDS differential signal and transmits it to the left unit.

  FIG. 23 is a diagram showing a time chart at the time of mask processing in signal connection. The time chart in the case of interrupting | blocking becoming an infinite loop by masking the signal which the own unit output is shown.

  For the signal D22 from the right unit, the mask signal D23 is masked as “H”, and the output signal D24 of the OR element IC4 is set as “H”. Then, the AND element IC3 takes the AND logic of the output signal D24 "H" and the signal D21 from the unit, and sends only the logic of the output signal D25 of the AND element IC3 to the left unit. With such a configuration, it is possible to prevent looping by shutting off the own signal that has circulated.

  Next, an embodiment in which units are connected to each other using the interface for peripheral devices of the computer in the unit connection unit 30 will be described. As an example of the peripheral device interface, a case where PCI-Express, which is one of the PCI (Peripheral Component Interconnect) bus standards, is used will be described as an example (PCI-Express is a serial interface with a maximum of 2. 5Gb / s interface).

  FIG. 24 is a diagram showing the configuration of the unit connection section. The unit connection unit 30-7 includes a PCI switch 350a and a backboard 350b. The PCI switch 350a is a bus switch that performs switching when a signal from each unit is transferred at high speed. The backboard 350b is a wiring board on which a PCI-Express connector C2 (× n link connector) is mounted.

  By using each PCI-Express switch 350a as a virtual channel, versatility and expandability can be improved. In the case of using a configuration using PCI-Express, the physical units are not provided inside the I / F units 14 and 26 of the slave units 10-1 to 10-n and the master unit 20 shown in FIGS. Control such as layer link establishment and data link layer link establishment is performed (in PCI-Express, specifications are defined separately for each layer so that communication is possible for each layer).

  Further, as shown in the figure, when one unit uses a plurality of slots, a unit having a double capacity can be mounted and the processing capability can be increased. Further, since the external terminal 50 can be connected to the switch 350a, maintenance efficiency can be improved.

  In addition to the master unit and the slave unit, other boards (such as a hard disk and a processing memory) can be mounted if PCI-Express is adopted. Furthermore, since connection between shelves is possible by PCI-Express, multi-stage connection can be easily performed.

(Supplementary note 1) In a transmission system for transmitting signals,
A slave control unit that controls a programmable logic element in which logic data is written, a state notification unit that notifies the function and operating state of the unit, and a logic data writing unit that writes the received logic data to the programmable logic element Slave unit to be
A state recognition unit that recognizes the function and operation state of each unit, a logical data storage unit that stores logical data for each function, and a logical data corresponding to each unit are automatically input to the programmable logic element based on the recognized state. A master unit composed of a logical data transmission unit that transmits logical data to set to
A unit connection section that allows the same signal to be distributed to other slots from any slot position for insertion of the master unit and the slave unit, and to connect the units;
A transmission system comprising:

  (Additional remark 2) The transmission system of Additional remark 1 characterized by the said master unit and the said slave unit having a common circuit structure, and performing various functions by the setting content of a programmable logic element.

  (Appendix 3) When the power supply is turned on or when the slave unit is added during operation, the state notification unit transmits its own unit ID to the master unit, and the state recognition unit receives the unit ID from the unit ID. The transmission system according to appendix 1, wherein an operation function corresponding to a slave unit is recognized, and the logical data transmission unit transmits logical data of the operation function to the slave unit.

  (Supplementary Note 4) When a failure occurs in the slave unit, the state notification unit transmits failure information to the master unit, the state recognition unit recognizes the failure unit from the failure information, and the logical data transmission unit The transmission system according to appendix 1, wherein logical data of the operation function of the failed unit is transmitted to a spare unit to perform failure recovery.

  (Additional remark 5) The said state recognition part judges the combination of the function which the said slave unit should operate | move from the number of the mounted said slave units, The said logical data transmission part is based on the judgment result, and the said slave unit The transmission system according to appendix 1, wherein logical data of an operation function is transmitted to the transmission system.

  (Additional remark 6) The said status notification part transmits failure probability information to the said master unit, The said status recognition part judges the slave unit with high possibility of a failure occurrence from the said failure probability information, The said logical data transmission part Is characterized in that the logical data of the operation function of the slave unit having a high possibility of failure is transmitted to the spare unit in advance, and when the occurrence of the failure is recognized, an activation signal is transmitted to the spare unit. The transmission system according to appendix 1.

  (Supplementary note 7) The transmission system according to supplementary note 1, wherein the slot of the unit connection portion is configured by a columnar backboard, and is arranged at a position where the slave unit and the master unit can be inserted radially. .

  (Additional remark 8) The said unit connection part is provided for every slot, and the optical connection control for mutually converting an electrical signal and an optical signal and connecting a unit to the said optical fiber is provided between slots The transmission system according to claim 1, wherein the optical connection unit performs optical connection control in which transmission between units corresponds to either WDM transmission or burst transmission.

  (Supplementary Note 9) When the optical fiber is configured in a ring shape, the optical connection unit attenuates an optical signal using a half mirror, or is transmitted from the slave unit or the master unit using a logic element. 9. The transmission system according to appendix 8, wherein the signal from the previous stage is masked by the mask signal to block the circulating signal.

  (Supplementary Note 10) The unit connection section is provided for each slot and a balanced transmission line that connects between the slots, and converts the electrical signal and the low-voltage differential signal to each other to convert the unit into the balanced transmission line. The transmission system according to claim 1, further comprising: a signal connection unit that performs signal connection control for connection, wherein the signal connection unit performs signal connection control corresponding to burst transmission between units.

  (Supplementary Note 11) When the balanced transmission line is configured in a ring shape, the signal connection unit masks a signal from the previous stage using a mask signal transmitted from the slave unit or the master unit using a logic element. 11. The transmission system according to appendix 10, characterized in that the signal that has circulated is blocked by processing.

  (Supplementary Note 12) The unit connection unit includes a switch unit that performs switching of a peripheral device interface of a computer, and a backboard that has a connector for mounting a unit corresponding to the peripheral device interface. The transmission system according to claim 1, wherein the master unit and the slave unit are connected to each other by a connection process.

  (Supplementary note 13) The logical data storage unit in the master unit uses a detachable nonvolatile storage device, and performs both rewriting of logical data in a state of being mounted on the master unit and rewriting separately from the master unit. The transmission system according to supplementary note 1, wherein:

  (Supplementary note 14) The transmission according to supplementary note 1, wherein the logical data writing unit in the slave unit is capable of supporting not only a programmable logic element but also a memory of a microprocessor or an element that requires initial setting. system.

(Supplementary Note 15) The transmission system according to Supplementary Note 1, wherein the logical data storage unit holds a plurality of versions of logical data and is selectively applicable as necessary.
(Supplementary Note 16) In a transmission unit that transmits signals,
A control unit that operates the function of the programmable logic element with logic data;
A status notification unit for notifying the function and operating status of the unit;
A logical data writing unit for writing the received logical data to the programmable logic element;
A state recognition unit for recognizing the function and operation state of each unit;
A logical data storage for storing logical data for each function of the unit;
A logical data transmission unit for transmitting logical data to automatically set logical data corresponding to each unit to programmable logic elements in the unit based on the state of the unit;
A transmission unit comprising:

(Supplementary Note 17) In a unit connection device for connecting units,
An optical fiber connecting between the slots;
Provided for each slot, converts electrical signals and optical signals to each other, and connects the units to the optical fiber to perform optical connection control corresponding to either WDM transmission or burst transmission between the units. An optical connection;
A unit connection device comprising:

(Supplementary Note 18) In a unit connection device for connecting units,
A balanced transmission line connecting the slots;
A signal connection unit that is provided for each slot and performs signal connection control corresponding to burst transmission between units in order to convert electrical signals and low-voltage differential signals to each other and connect the units to the balanced transmission line. When,
A unit connection device comprising:

(Supplementary note 19) In a unit connection device for connecting units,
A switch for switching the interface for the peripheral device of the computer;
And a backboard having a connector for mounting the unit corresponding to the interface for peripheral devices.

It is a principle figure of the transmission system of this invention. It is a figure which shows the structure of a slave unit. It is a figure which shows the structure of a master unit. It is a figure which shows the operation | movement at the time of failure occurrence. It is a figure which shows the structure of a unit connection part. It is a figure which shows the modification of a backboard. It is a figure which shows a cylindrical wiring pattern. It is a figure which shows the cylindrical backboard which can rotate. It is a figure which shows the structure at the time of performing transmission of a unit connection part by an optical fiber. It is a figure which shows the structure of an optical connection part. It is a figure which shows the structure of an optical connection part. It is a figure which shows the structure of an optical connection part. It is a figure which shows the time chart at the time of the mask process in an optical connection part. It is a figure which shows the whole structure at the time of connecting with a linear optical fiber. It is a figure which shows the whole structure at the time of connecting with a linear optical fiber. It is a figure which shows the structure of an optical connection part. It is a figure which shows the structure of an optical connection part. It is a figure which shows the whole structure at the time of performing transmission of a unit connection part by LVDS. It is a figure which shows the structure of a signal connection part. It is a figure which shows the time chart at the time of the burst transmission of a signal connection part. It is a figure which shows the whole structure at the time of making a LVDS transmission line into a ring shape. It is a figure which shows the structure of a signal connection part. It is a figure which shows the time chart at the time of the mask process in signal connection. It is a figure which shows the structure of a unit connection part. It is a figure which shows the slave unit of a different structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Transmission system 10-1 to 10-n Slave unit 11 Slave controller 11a Programmable logic element (PLD)
DESCRIPTION OF SYMBOLS 12 Status notification part 13 Logical data writing part 20 Master unit 22 State recognition part 23 Logical data transmission part 24 Logical data storage part 30 Unit connection part

Claims (5)

In a transmission system that transmits signals,
A slave control unit that controls a programmable logic element in which logic data is written, a state notification unit that notifies the function and operating state of the unit, and a logic data writing unit that writes the received logic data to the programmable logic element Slave unit to be
A state recognition unit that recognizes the function and operation state of each unit, a logical data storage unit that stores logical data for each function, and a logical data corresponding to each unit are automatically input to the programmable logic element based on the recognized state. A master unit composed of a logical data transmission unit that transmits logical data to set to
A unit connection section that allows the same signal to be distributed to other slots from any slot position for insertion of the master unit and the slave unit, and to connect the units;
A transmission system comprising:   When the slave unit is added at power-on or during operation, the status notification unit transmits its own unit ID to the master unit, and the status recognition unit responds to the slave unit from the unit ID. 2. The transmission system according to claim 1, wherein the logical data transmission unit transmits logical data of the operational function to the slave unit.   The unit connection unit is an optical fiber that connects between the slots, and an optical connection that is provided for each slot and performs optical connection control for converting an electrical signal and an optical signal to connect the unit to the optical fiber. The transmission system according to claim 1, wherein the optical connection unit performs optical connection control in which transmission between units corresponds to either WDM transmission or burst transmission.   The logical data storage unit in the master unit uses a removable non-volatile storage device, and performs both rewriting of the logical data in a state mounted on the master unit and rewriting separately from the master unit. The transmission system according to claim 1. The transmission system according to claim 1, wherein the logical data writing unit in the slave unit is compatible with a memory of a microprocessor or an element that requires initial setting in addition to a programmable logic element.

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