JP2005135292A - Counter device and image forming apparatus provided with counter device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the utilization efficiency of a storage area of a memory by approximately uniformizing the rewrite frequency of the memory when data to be successively added or subtracted are written in a nonvolatile memory under limited rewrite frequency. <P>SOLUTION: Under a condition that the lowermost word storage area for storing a lower digit word (lowermost word W<SB>1</SB>) arranged on the lowermost position out of two words constituting input data written in an input data storage area is rewritten by a prescribed number of times, the upper digit word (uppermost word W<SB>a</SB>) arranged on the uppermost position out of the two words constituting the input data is written in a storage area in which the lower digit word directly under the upper digit word has been stored, the lower digit word is written in a further lower word storage area, and the write processing described above is repeated until the lower digit word is written in a storage area arranged in an address directly under the lower digit word storage area. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a counter device that writes data that is sequentially added to or subtracted from a non-volatile memory with a limited number of rewrites, and in particular, can improve the use efficiency of the non-volatile memory under a limited number of rewrites. The present invention relates to a counter device and an image forming apparatus including the counter device.

Non-volatile memories such as flash memory and EEPROM (hereinafter simply referred to as “memory”) have the feature that data can be rewritten, and the written data will not disappear even if the power supply to the memory is cut off. Currently widely used. However, if the number of rewrites exceeds a certain number, the storage characteristics of the memory deteriorate and the reliability of the memory decreases. Therefore, there is a limit (lifetime) on the number of rewrites depending on the type of memory. In general, the EPROM can be rewritten about 100 times, the flash memory and the EEPROM can be rewritten about 10 ⁵ times, and the FeRAM (Ferroelectric Random Access Memory) can be rewritten about 10 ⁸ times. Conventionally, when the number of memory rewrites exceeds the limit, access to the memory is prohibited and the memory is disabled. In this case, even if other usable areas remain, the entire memory is disabled because the number of times of rewriting exceeds the limit in a part of the memory, so that the entire memory cannot be effectively used. is there.

As a method for solving such a problem, there is a known rewriting method in which when the number of times of rewriting a specific area of the memory reaches the number of lifetimes, the writing area to the memory is shifted to another unused area. Specifically, for example, when rewriting 3 × 10 ⁵ times (300,000 times) in a memory having a limit number of 10 ⁵ times (100,000 times), data is stored from address 0 until 0 to 10 ⁵ times. written, 10 to ⁵ times to 2 × 10 ⁵ times the data to the new unused area from the address address 4 is written, 2 × 10 ⁵ new unused area is up to 3 × 10 ⁵ times from the address address 8 Data is written to
Further, Patent Document 1 discloses a memory control device that inverts a memory address when an all erase command for all memory areas is input. This is because the memory data is erased once when the memory is rewritten, and by reversing the memory address, the probability of data rewriting to the storage area of the same memory address is reduced, The memory is effectively used by increasing the number of times of rewriting the memory by appropriately distributing the rewriting destination.
JP 2001-56785 A

However, in the known rewriting method, for example, when data expressed in 4 bytes (32 bits) is written in a 16-bit (1 word) width memory, the storage area of the memory is not fully utilized. There is a problem of requiring memory capacity. That is, a count value such as the number of printed sheets counted by a copying machine or the like (assuming that the maximum count is 3 × 10 ⁵ times, where 3 × 10 ⁵ is represented by 4 bytes) is sequentially 16 bits wide. when writing of the memory, the count value is 0 to ⁵ times is written in the area of 4byte from address 0, written in the area of 4byte from 10 ⁵ times 4 address address up to 2 × 10 ⁵ times Thus, from 2 × 10 ^{5 to} 3 × 10 ⁵ times, data is written in the area of address 8 from address 4 bytes. As a result, a memory capacity of 4 bytes × 3 = 12 bytes (6 words) is required. 10 ⁵ is a hexadecimal number represented as [0001 — 86A0] (2 words (4 bytes)). In the above-described conventional rewriting method, the upper word area (area where 2 bytes, [0001] is written) is one time. Despite only rewriting, since the rewriting was performed 10 ⁵ times in the lower word area (area where 2 bytes, [86A0] is rewritten), the writing area becomes the next unused area (from address 4). 4 bytes). For this reason, the upper word area cannot be effectively used, and a large memory capacity is required accordingly. This is due to the fact that the write area is shifted with the storage area corresponding to the data size to be written as one unit.
Further, in the memory control device of Patent Document 1, since the memory address switching is started by the input of the all erase command, it cannot be applied when rewriting only data in a partial area.
Accordingly, the present invention has been made in view of the above circumstances, and the object of the present invention is to write data that is sequentially added or subtracted to a nonvolatile memory under a limited number of times of rewriting. An object of the present invention is to provide a counter device capable of increasing the use efficiency of a storage area of a memory by making the number of rewrites substantially uniform and an image forming apparatus including the counter device.

In order to achieve the above object, the present invention provides a non-volatile memory accessible in units of one word and N bits (where N is an integer of 1 or more), and a word that is added or subtracted one by one (where a is A controller that rewrites the data in the input data storage area by writing the input data of an integer of 2 or more) into the input data storage area in the nonvolatile memory with reference to address information designated in advance In the counter device, as the non-volatile memory, the input data storage area having a storage area corresponding to at least (a + 1) words is used, and the control device writes the input data written in the input data storage area. the lowest stored least significant word W _1, which is located in the least significant word storage regions are the control device of a number of words that make up the Ri a predetermined number rewritten that condition, the word W _a-1 of the next lower most significant word W _a which is positioned uppermost among a number of words constituting the input data is stored Write to the storage area, write the word W _a-1 further to the storage area in which the lower word W _a-2 was stored, and write the write to the lowest word W ₁ to the lowest word storage area. It is configured as a counter device that is repeatedly executed until it is written in a storage area provided at a lower address.
As a result, the number of times the storage area is rewritten is made substantially uniform, so that the memory utilization efficiency can be improved.

In this case, the write executed by the control device is performed when there is no storage area at the address one level lower than the word storage area in which the predetermined word constituting the input data is stored in the input data storage area. The word is preferably written in a storage area located at the highest address in the input data storage area.
As a result, when the storage area of the lowest word W _{1 is in} the storage area located at the lowest address in the input data storage area, the storage area of the lowest word W ₁ is stored in the storage area located at the highest address. Since the shift is performed, the writing process by the control device is continuously executed repeatedly. As a result, the number of rewrites in the entire storage area can be made substantially uniform.

  In addition, after the write processing by the control device is performed, it is necessary to write the input data to the storage area after the shift. Therefore, the control device changes the storage area in which the input data is written by the control device. In this case, it is desirable to update the address information to address information indicating the changed storage area.

Further, the address information, the address of the storage area in which the most significant word W _a is stored, information that associates the one lower word of the word and the word constituting the input data, the least significant word W ₁ as long as it is constituted by the information to be associated with the most significant word W _a, only refers to the address of the storage area the most significant word is stored, identifying a storage area for storing input data consisting of a number of words It becomes possible to do.

Further, the input data may be data indicating time, data indicating date, or data indicating a predetermined number of event occurrences.
Furthermore, even the image forming apparatus provided with the counter device can solve the above-mentioned problems.

As described above, according to the present invention, the counter device can be accessed in units of one word and N bits (where N is an integer of 1 or more), and a word that is sequentially added or subtracted one by one. A control device for rewriting data in the input data storage area by writing input data (where a is an integer of 2 or more) to the input data storage area in the nonvolatile memory with reference to address information designated in advance. As the non-volatile memory, the input data storage area having a storage area corresponding to at least (a + 1) words is used, and is written into the input data storage area by the control device. least significant word storage area most significant word W _1, which is positioned lower is stored among a number of words constituting the input data is the On condition that it has been rewritten a predetermined number of times by control device, the word W _a-1 of the next lower most significant word W _a which is positioned uppermost among a number of words constituting the input data is stored The word W _a-1 is written to the storage area where the lower word W _a-2 is stored, and such a writing process is performed so that the lowest word W ₁ is It is repeatedly executed until it is written in a storage area provided at an address one level lower than the lowest-order word storage area. Therefore, the number of times of rewriting the storage area of the non-volatile memory is made substantially uniform, and the memory utilization efficiency can be improved.

Hereinafter, embodiments and examples of the present invention will be described with reference to the accompanying drawings so that the present invention can be understood. It should be noted that the following embodiments and examples are examples embodying the present invention, and do not limit the technical scope of the present invention.
1 is a block diagram showing a schematic configuration of the counter device A according to the embodiment of the present invention, FIG. 2 is a schematic diagram showing a configuration of an input data storage area provided in the flash memory 30, and FIG. FIG. 4 is a schematic diagram showing a storage state corresponding to the number of prints in the input data storage area composed of 4 words, and FIG. 5 is input data composed of 3 words. It is a schematic diagram which shows the memory | storage state according to the number of printed sheets of a memory area.

Here, the schematic configuration of the counter device A according to the embodiment of the present invention will be described with reference to the block diagram of FIG. In the present embodiment, the counter device A is described as a device for counting (counting) the number of sheets printed out in an image forming apparatus such as a printer or a copying machine. For example, a device that counts the time and date, or a device that counts the number of occurrences of a predetermined event such as the number of rotations of the photoconductor and the number of times of use of the copy may be used. Of course, the counter apparatus A can be applied to apparatuses other than the image forming apparatus.
As shown in FIG. 1, the counter device A includes a CPU 10 (control device), a buffer memory 20, a program memory 30, a flash memory 40 (nonvolatile memory), an external interface (I / F) 60, Are connected to the data bus 70. Further, the counter device A is connected to the copier 1 so as to be able to perform data communication so as to receive data indicating the number of prints (hereinafter referred to as “print number data”) via the I / F 60.

Here, each component constituting the counter device A will be described.
The buffer memory 20 is a work area that is temporarily read in order to efficiently process the print number data input from the copying machine 1 to the I / F 60, and is a semiconductor such as a RAM, DRAM, or SDRAM. It is memory.
The program memory 30 is a semiconductor memory such as a ROM that stores a program for realizing data rewriting processing, shift writing processing, and address information updating processing executed by the CPU 10. The details of the data rewriting process, the shift writing process, and the address information update process will be described later with reference to flowcharts.

The flash memory 40 is an example of a nonvolatile semiconductor memory that can be accessed in units of one word and N bits (where N is an integer of 1 or more). Other examples of the nonvolatile semiconductor memory include EEPROM, FeRAM, and the like. In this embodiment, the flash memory 40 is described as a memory that can be accessed in units of 16 bits (2 bytes) per word, that is, a flash memory having a 16-bit width. It may be a non-volatile memory accessible in bit units.
In the flash memory 40, a print number data storage area (corresponding to an input data storage area) in which the print number data is written is provided. This print number data is an example of input data of a word (where a is an integer of 2 or more) that is sequentially added or subtracted one by one. For example, the print number data expressed by 2 words (4 bytes) It is. Further, the print number data storage area is constituted by a storage area corresponding to at least (a + 1) words. For example, if the print number data is expressed by a maximum of two words, the print number data storage area is It is composed of a storage area of 3 words or more.
The CPU 10 is an example of a central processing unit, i.e., a control device, that controls each component of the counter device A in an integrated manner. When the CPU 10 stores the program stored in the program memory 30 and performs predetermined arithmetic processing, the data rewriting processing, the shift writing processing, and the address information updating processing are executed. The CPU 10 is an example of a control device, and may be a control device such as an IC equipped with a CPU such as an ASIC or a memory controller, or a control circuit.

Here, the configuration of the print count data storage area 50 will be briefly described with reference to the schematic diagram of FIG. FIG. 2 is a schematic diagram showing a schematic configuration of the print number data storage area 50 including a 4-word storage area.
The number-of-printed-data storage area 50 is located at a one-word storage area 51 located at the highest address A0, a one-word storage area 52 located at the next order address A2, and further at the next order address A4. 1 word storage area 53 and 1 word storage area 54 located at the lowest address A6 are combined to form a storage area corresponding to 4 words. The address is assigned every 16 bits starting with the address A0. The number-of-printed-data storage area 50 shown in FIG. 2 shows an initialized state (a state in which no data is written), that is, shows no data in any of the storage areas 51 to 54 [0000] (16 (Bit notation) is written.

Subsequently, using the flowchart of FIG. 3 and the schematic diagram of FIG. 4, the print number data expressed by 2 words (4 bytes) is written in the print number data storage area 50 having a storage area of 4 words (8 bytes). In this case, the procedure of the data rewriting process executed by the CPU 10 of the counter device A will be described. 3, S10, S20,... Indicate processing procedure (step) numbers. The processing is started from step S10 in a state where the print sheet data storage area 50 is initialized (data is not written (state shown in FIG. 2)). In the following description, (corresponding to the least significant word W ₁₎ the word portions positioned on lowest among the print count data of the two words the lower digit word, upper digit word word portions positioned on the highest level called (corresponding to the uppermost word W _a), for example, if the two words of the print count data represented by [0001_24F8], upper digit word portions of [0001], part of the lower digit word [24F8] Called.

When a print output is first made in the copying machine 1 and the print number data output from the copy machine 1 is input to the I / F 60, a flag indicating that the print number data has been input is input to the I / F 60. Asserted. The CPU 10 detects whether or not the print number data has been input by detecting the asserted flag (S10). Such determination processing is repeated until data is input. The print number data input at this time is data ([0000 — 0001] in 4-byte notation) indicating “one print number”. The input print sheet number data is temporarily stored in the buffer memory 20 (FIG. 1).
If it is determined in step S10 that the print sheet number data has been input, then the CPU 10 refers to (reads out) address information stored (designated) in advance in an address information storage area (not shown) in the flash memory 40. (S20). That is, the address of the data writing destination inputted by the CPU 10 is referred. In this address information storage area (not shown), in order to write data to the storage area 51 located at the highest address of the print number data storage area 50, the write destination address A0 (FIG. 4) of the upper digit word, and , Information for associating the upper digit word constituting the print sheet number data with the lower digit word which is one word lower than the word is stored. The CPU 10 can access not only the upper digit word storage area but also the lower digit word storage area by referring to the write destination address and the associated information.
Subsequently, in step S30, the lower rank position positioned at the lowest position among the two words (upper digit word and lower digit word) constituting the print number data written in the print number data storage area 50 by the CPU 10 is shown. It is determined whether or not the storage area 52 (FIG. 4) in which the digit word is stored has been rewritten a predetermined number of times (75,000 times in this embodiment). Specifically, the number of prints obtained based on the print number data written in the storage areas 51 and 52 (FIG. 4) accessed with reference to the address information is regarded as the number of rewrites, and this print number is “75000. It is judged whether it is "sheet". Since nothing is written in the print number data storage area 50 at the present time, the process proceeds to the No side of step S30.
Next, in step S50, the input print number data, that is, the data [0000 — 0001] indicating “print number 1” is accessed by referring to the address information (write address A0). By writing in the storage areas 51 and 52 of the area 50, the data in the print number data storage area 50 is rewritten. Thus, the data rewriting process is completed.

Thereafter, every time print number data is input from the copying machine 1, the number of prints written in the storage areas 51 and 52 is determined until it is determined in step S30 that the number of rewrites is "75000". Until it is determined that the data is “75,000 sheets”, the data rewrite process is performed in the above-described steps S10 → S20 → S30 → S50.
Next, when print number data [0001 — 24F9] indicating “print number 75001” is input from the copying machine 1, the determination process in step S30 proceeds to Yes in step S30. That is, at the time when the print number data indicating “print number 75001” is inputted, the print number data [0001 — 24F8] indicating 75,000 sheets is written in the storage areas 51 and 52. Therefore, the CPU 10 determines that the number of printed sheets 75000 indicated by the number-of-printed data written in the storage areas 51 and 52 is the number of times of rewriting, and performs the determination in step S30.
Subsequently, in step S40, the CPU 10 executes shift writing processing. That is, the upper digit word (the portion [[0001]) positioned at the uppermost position of the two words constituting the input print number data [0001_24F8] is stored as the lower digit word one lower order. Is written in the storage area 52 (FIG. 4), and the lower digit word ([24F8] portion) is further written in the unwritten storage area 53 provided one level lower (FIG. 4A). )reference). However, when there is no storage area at an address one lower than the storage area in which the lower digit word is stored in the print number data storage area 50 (see FIG. 4C), the lower digit word is The data is written in the storage area 51 located at the highest address in the print number data storage area 50.
Thereafter, in step S60, the CPU 10 executes an address information update process. By executing this process, the storage area in which the input print number data is written is changed by the shift writing process in step S40, that is, the storage area in which the upper digit word has been stored so far. On the condition that 51 is changed to the storage area 52, the address information (address A0 indicating the storage area 51) stored in the address information storage area (not shown) indicates the storage area 52 after the change. The address information (address A2 indicating the storage area 52) is updated (changed).

In addition, when the print number data [0002 — 49F1] indicating “print number of 150001” and the print number data [0003 — 6EE9] indicating “print number of 2250001” are input, Similarly, the CPU 10 determines the number of rewrites (S30), and then performs the shift writing process (S40). In this case, the rewrite count determination process in step S30 is performed in any case by determining whether the number of prints after the storage area for the print count data is changed is 75000. Is judged.
As described above, the upper digit word is one lower order on the condition that the lower digit word storage area of the print number data storage area 50 having the four word storage area is rewritten a predetermined number of times (75,000 times). The lower digit word is written in the storage area where the lower digit word is stored, and the lower digit word is further written in the unwritten storage area provided below the lower digit word. The number of rewrites is made substantially uniform. That is, the number of rewrites in the storage areas 51 and 52 is both 75002, and the number of rewrites in the storage areas 53 and 54 is both 75005. As a result, the storage area of the memory can be used efficiently. As a result, the above known data rewriting method requires a memory capacity of 12 bytes for rewriting 3 × 10 ⁵ times. According to the counter apparatus A according to the invention, rewriting can be performed with a memory capacity of 8 bytes.

In the above description of the embodiment, the shift document executed by the CPU 10 when writing the print number data expressed in 2 words (4 bytes) in the print number data storage area 50 having a storage area of 4 words (8 bytes). The process of embedding has been described. However, even when the print number data is written in a print number data storage area having a storage area of three words (6 bytes) or more, the shift writing process (S40 in FIG. ), The number of times of rewriting the memory is made substantially uniform, and the memory storage area can be used efficiently. FIG. 5 shows the storage state of the print number data storage area when 2-word print number data is written in the print number data storage area composed of three words.
In addition, the print number data in which the print number data is expressed by 3 words (6 bytes), the print number data having a storage area of 4 words (8 bytes) exceeding 3 words or more. The above shift writing process (S40 in FIG. 3) can also be applied when writing to the storage area.

The block diagram which shows schematic structure of the counter apparatus A which concerns on embodiment of this invention. FIG. 2 is a schematic diagram showing a configuration of an input data storage area provided in a flash memory 30. 5 is a flowchart showing a procedure of data rewriting processing executed by a CPU. The schematic diagram which shows the memory | storage state according to the number of printed sheets of the input data storage area comprised by 4 words. The schematic diagram which shows the memory | storage state according to the number of printed sheets of the input data storage area comprised by 3 words.

Explanation of symbols

1 ... copier 10 ... CPU (control device)
20 ... Buffer memory 30 ... Program memory 40 ... Flash memory (nonvolatile memory)
50 ... Number of printed data storage area 60 ... External interface 70 ... Data bus

Claims (6)

A non-volatile memory accessible in units of 1 word N bits (where N is an integer of 1 or more);
The input data of a word (where a is an integer of 2 or more) sequentially added or subtracted by 1 is written in the input data storage area in the non-volatile memory by referring to predetermined address information. A controller for rewriting data in the data storage area;
In a counter device comprising
As the nonvolatile memory, the input data storage area is provided with a storage area corresponding to at least (a + 1) words,
The control device has a least significant word storage area in which the lowest word W ₁ positioned at the lowest position among the a words constituting the input data written in the input data storage area is stored in the control device. On the condition that it has been rewritten a predetermined number of times
Write the most significant word W _a positioned at the top of the a words constituting the input data to the storage area in which the word W _a-1 that is one lower level is stored,
Write the word W _a-1 in the storage area where the lower word W _a-2 is stored,
Such writing, the counter device in which the least significant word W _1, characterized in that the repeatedly executed until written to the storage area provided in one lower address of the least significant word storage area.   The writing executed by the control device is performed when the storage area does not exist at the address one level lower than the word storage area in which the predetermined word constituting the input data is stored in the input data storage area. 2. The counter device according to claim 1, wherein the counter device is written in a storage area located at the highest address in the input data storage area.   3. The control device according to claim 1, wherein when the storage area to which the input data is written is changed by the control device, the control apparatus updates the address information to address information indicating the changed storage area. Counter device. The address information, the address of the storage area in which the most significant word W _a is stored, information that associates the one lower word of the word and the word constituting the input data, the said least significant word W ₁ top counter device according to claims 1 to 3 is formed using the information associated with the higher word W _a.   5. The counter device according to claim 1, wherein the input data is data indicating time, data indicating date, or data indicating a predetermined number of event occurrences.   An image forming apparatus comprising the counter device according to claim 1.

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