JP2005130615A - Motor driving unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a motor driving unit which protects a plurality of drivers for driving a plurality of motor generators from breakage due to overvoltage. <P>SOLUTION: An ECU73 judges the operation of motor generators M1, M2, based on the numbers MRN1, 2 of generations of motors and the torque command values TR1, TR2. When the motor generators MG1, MG2 are in regenerative mode and power run mode, respectively, the ECU73 generates a break permission signal RG1 and outputs it to an AND gate 71, when the generated power in the motor generator MG1 becomes larger than the threshold. An inverter 50 generates a fail signal FE2 and outputs it to the AND gate 71, when it detects an overcurrent. The AND gate 71 calculates the logical product of the break permission signal RG1 and the fail signal FE2, and outputs a break signal DWN1 to an inverter 40. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a motor driving device that drives a plurality of motor generators.

  An engine, first and second rotating electrical machines, an inverter device, a power storage device, an engine control device, and a hybrid control device are known.

  The inverter device drives the first and second rotating electric machines. The engine control device performs fuel injection control of the engine. The hybrid control device commands a torque control amount to the engine control device and controls driving of the inverter device.

The hybrid control device compares the power stored in the power storage device with the power balance of each rotating electrical machine, and calculates the power balance of the entire system from the comparison result. And a hybrid control apparatus determines the presence or absence of system abnormality based on the calculated electric power balance of the whole system, and controls a vehicle output according to the determination result (patent document 1).
Japanese Patent Laid-Open No. 11-18213 JP 2002-271910 A

  However, in Patent Document 1, if one of the two rotating electrical machines is in the regenerative mode and the other is in the powering mode, and if the rotating electrical machine in the powering mode fails, how is the rotating electrical machine in the regenerative mode? Since it is not specifically proposed whether to control, there is a problem that an overvoltage is applied to the inverter devices that drive the first and second rotating electrical machines.

  In addition, when the rotating electrical machine in the regeneration mode fails, if the rotating electrical machine in the power running mode is continuously driven, the amount of power of the capacitor provided on the input side of the inverter device decreases, and an inrush current flows to the capacitor. There is.

  Therefore, the present invention has been made to solve such a problem, and an object of the present invention is to provide a motor drive device that protects a plurality of drive devices that drive a plurality of motor generators from overvoltage breakdown.

  Another object of the present invention is to provide a motor drive device that prevents an inrush current to capacitive elements provided on the input side of a plurality of drive devices that drive a plurality of motor generators.

  According to the present invention, a motor drive device is a motor drive device that drives n (n is a natural number of 2 or more) motor generators in a power running mode or a regeneration mode, and includes a capacitive element, n drive devices, And a shut-off device. The capacitive element smoothes the DC voltage. The n driving devices are connected in parallel to both ends of the capacitive element, each drive a corresponding motor generator based on a DC voltage from the capacitive element, and output a fail signal at a predetermined time. When the cutoff device receives at least one fail signal from m (m is a natural number satisfying m <n) drive devices, the power change amount on the capacitive element side is larger than the allowable power change amount of the drive device or the capacitive element. Out of r (r is a natural number satisfying nm ≦ r ≦ n−1) drive devices, k (k is a natural number satisfying k ≦ r) drive devices are blocked.

  Preferably, the allowable power change amount is a power change amount on the capacitive element side when the driving device causes overvoltage breakdown.

  Preferably, the allowable power change amount is a power change amount on the capacitive element side when an inrush current to the capacitive element occurs.

  Preferably, the m motor generators driven by the m driving devices are in a power running mode. The r motor generators driven by the r drive devices are in the regeneration mode. When the cutoff device receives at least one fail signal, the cutoff device blocks the k drive devices so that the amount of power change on the capacitive element side is smaller than the first amount of power change.

  Preferably, the shut-off device detects k motor generators whose r generated power is larger than a power difference obtained by subtracting a predetermined power from the total power consumption of m motor generators from the r motor generators. The k drive devices corresponding to the k motor generators are shut off. The predetermined power is the maximum power change amount on the capacitive element side when the voltage applied to each of the n drive devices is smaller than the maximum applicable voltage of the drive device when m drive devices are stopped. It is.

  Preferably, the total power consumption is power consumed by a motor generator having the maximum power consumption among m motor generators.

  Preferably, the cutoff device includes a control circuit and n cutoff circuits. The control circuit generates a cutoff permission signal for permitting cutoff of the k drive devices. The n cutoff circuits are provided corresponding to the n drive devices. Each of the n blocking circuits receives n−1 fail signals from n−1 driving devices other than the corresponding driving device and a blocking permission signal from the control circuit. Of the n cutoff circuits, each of the k cutoff circuits corresponding to the k drive devices receives at least one fail signal from the m drive devices and receives a cutoff permission signal from the control circuit. When one of the cut-off permission signals is received, the corresponding driving device is cut off.

  Preferably, each of the n cutoff circuits includes an OR element and an AND element. The OR element calculates a logical sum of n-1 fail signals. The AND element calculates a logical product of the output of the OR element and the cutoff permission signal from the control circuit to generate a cutoff signal, and outputs the generated cutoff signal to the corresponding driving device. The OR element included in each of the k cutoff circuits calculates a logical sum of at least one fail signal. The AND element included in each of the k cutoff circuits outputs a cutoff signal generated by calculating a logical product of the output of the OR element and the cutoff permission signal from the control circuit to the corresponding driving device.

  Preferably, the n motor generators include first and second motor generators. The n driving devices include a first inverter that drives the first motor generator and a second inverter that drives the second motor generator. The control circuit generates the first or second cutoff permission signal. The n cut-off circuits are composed of first and second AND elements. The first AND element is provided corresponding to the first inverter, calculates a logical product of the fail signal from the second inverter and the first cutoff permission signal from the control circuit, and calculates the first cutoff signal. And the generated first cutoff signal is output to the first inverter. The second AND element is provided corresponding to the second inverter, calculates the logical product of the fail signal from the first inverter and the second cutoff permission signal from the control circuit, and outputs the second cutoff signal. And the generated second cutoff signal is output to the second inverter.

  Preferably, when the first motor generator is driven in the regeneration mode and the second motor generator is driven in the power running mode, the control circuit causes the generated power in the first motor generator to be lower than the threshold value. When it becomes larger, a first cutoff permission signal is generated and output to the first AND element.

  Preferably, the first motor generator drives an internal combustion engine mounted on the vehicle and generates electric power by power from the internal combustion engine. The second motor generator drives the drive wheels of the vehicle.

  Preferably, the m motor generators driven by the m driving devices are in the regeneration mode. The r motor generators driven by the r drive devices are in a power running mode. When the cutoff device receives at least one fail signal, the cutoff device blocks the k drive devices so that the amount of power change on the capacitive element side is smaller than the second amount of power change.

  Preferably, the cutoff device includes a control circuit and n cutoff circuits. The control circuit generates k cutoff permission signals for permitting cutoff of the k drive devices. The n cutoff circuits are provided corresponding to the n drive devices. Each of the n blocking circuits receives n−1 fail signals from n−1 driving devices other than the corresponding driving device and a blocking permission signal from the control circuit. Then, when the total power consumption in the r motor generators exceeds the threshold value, the control circuit generates a cutoff permission signal, and sends the generated k cutoff permission signals to k driving devices one by one. Output to the corresponding k cutoff circuits. Further, of the n cutoff circuits, each of the k cutoff circuits corresponding to the k drive devices receives at least one fail signal from the m drive devices, and receives a cutoff permission signal from the control circuit. When received, the corresponding drive is shut off.

  Preferably, the n motor generators include first and second motor generators. The n driving devices include a first inverter that drives the first motor generator and a second inverter that drives the second motor generator. The n cut-off circuits are composed of first and second AND elements. The first AND element is provided corresponding to the first inverter, calculates a logical product of the fail signal from the second inverter and the first cutoff permission signal from the control circuit, and calculates the first cutoff signal. And the generated first cutoff signal is output to the first inverter. The second AND element is provided corresponding to the second inverter, calculates the logical product of the fail signal from the first inverter and the second cutoff permission signal from the control circuit, and outputs the second cutoff signal. And the generated second cutoff signal is output to the second inverter. When the first motor generator is driven in the regeneration mode and the second motor generator is driven in the power running mode, the control circuit causes the power consumption in the second motor generator to be greater than the threshold value. Then, a second cutoff permission signal is generated and output to the second AND element.

  Preferably, the second motor generator has a capacity larger than that of the first motor generator.

  Preferably, the first motor generator drives an internal combustion engine mounted on the vehicle and generates electric power by power from the internal combustion engine. The second motor generator drives the drive wheels of the vehicle.

  Preferably, the predetermined time is when an overcurrent flows through a semiconductor element constituting the driving device.

  According to the motor drive device of the present invention, when m drive devices that drive m motor generators out of n motor generators generate at least one fail signal, the amount of power change on the capacitive element side is Alternatively, a blocking device that blocks k (k ≦ r) driving devices out of r (n−m ≦ r ≦ n−1) driving devices so as to be smaller than the allowable power change amount of the capacitive element. Therefore, regardless of whether the operation mode of the n motor generators is the power running mode or the regeneration mode, the amount of power change on the capacitive element side is suppressed more than the allowable power change amount of the driving device or the capacitive element.

  Therefore, according to the present invention, each driving device and capacitive element can be protected.

  In the motor drive device according to the present invention, when m drive devices that drive m motor generators out of n motor generators generate at least one fail signal, the amount of power change on the capacitive element side is: K (k ≦ r) of the r (nm−r ≦ r ≦ n−1) drive devices so that the amount of power change on the capacitive element side when the drive device is overvoltage destroyed is reduced. Since the shut-off device that shuts off the drive device is provided, an overvoltage is not applied to each drive device regardless of whether the operation mode of the n motor generators is the power running mode or the regenerative mode.

  Therefore, according to the present invention, a plurality of drive devices can be protected from overvoltage breakdown.

  Furthermore, in the motor drive device according to the present invention, when m drive devices that drive m motor generators among the n motor generators generate at least one fail signal, the amount of power change on the capacitive element side is: K (k ≦ r) among r (nm−r ≦ r ≦ n−1) drive devices so that the amount of power change on the capacitive element side when an inrush current to the capacitive element occurs is reduced. Since the shut-off device for shutting off the drive devices is provided, the occurrence of inrush current to the capacitive element is suppressed regardless of whether the operation mode of the n motor generators is the power running mode or the regenerative mode.

  Therefore, according to this invention, generation | occurrence | production of the inrush current to a capacitive element can be prevented.

  Furthermore, in the motor driving device according to the present invention, when the m driving devices that drive the m motor generators in the power running mode generate at least one fail signal, the amount of power change on the capacitive element side is K (k ≦ r) of the r (nm−r ≦ r ≦ n−1) driving devices in the regenerative mode so as to be smaller than the amount of power change on the capacitive element side at the time of destruction. Since the shut-off device that shuts off the drive device is provided, even if the drive device that drives the motor generator in the power running mode fails, no overvoltage is applied to each drive device.

  Therefore, according to the present invention, a plurality of drive devices can be protected from overvoltage breakdown.

  Furthermore, in the motor drive device according to the present invention, when m drive devices that drive m motor generators in the regeneration mode generate at least one fail signal, the amount of power change on the capacitive element side enters the capacitive element. K (k ≦ r) of r (nm−r ≦ r ≦ n−1) driving devices in the power running mode so that the amount of power change on the capacitive element side when a current is generated is reduced. Therefore, even if the drive device that drives the motor generator in the regeneration mode fails, the inrush current to the capacitive element is suppressed.

  Therefore, according to this invention, generation | occurrence | production of the inrush current to a capacitive element can be prevented.

  Embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a schematic block diagram of a motor drive device according to the first embodiment. Referring to FIG. 1, motor drive device 100 includes a DC power supply 10, a capacitor 20, a voltage sensor 30, inverters 40 and 50, current sensors 61 and 62, and a control device 70.

  Motor drive device 100 is a device that drives two motor generators MG1 and MG2. Motor generator MG1 is a motor that generates power by driving power from an engine (not shown) mounted on the hybrid vehicle or drives the engine. Motor generator MG2 is a drive motor for generating torque for driving the drive wheels of the hybrid vehicle.

  Capacitor 20 and inverters 40 and 50 are connected in parallel to both ends of DC power supply 10. Control device 70 includes AND gates 71 and 72 and an ECU (Electrical Control Unit) 73.

  The DC power source 10 is composed of a secondary battery such as nickel metal hydride or lithium ion. The DC power supply 10 outputs a DC voltage. Capacitor 20 smoothes the DC voltage from DC power supply 10 and supplies the smoothed DC voltage to inverters 40 and 50. Voltage sensor 30 detects voltage Vm across capacitor 20 and outputs the detected voltage Vm to ECU 73 of control device 70.

  Inverters 40 and 50 are provided corresponding to motor generators MG1 and MG2, respectively. Invar 40 drives motor generator MG1 in the power running mode or the regenerative mode by signal PWM1 from control device 70. Further, when an overcurrent flows due to failure of motor generator MG1 or the like, inverter 40 generates fail signal FE1 and outputs it to AND gate 72 of control device 70. Further, inverter 40 is cut off when receiving cut-off signal DWN1 from AND gate 71 of control device 70.

  Inverter 50 drives motor generator MG2 in powering mode or regenerative mode by signal PWM2 from control device 70. Further, when an overcurrent flows due to failure of motor generator MG2 or the like, inverter 50 generates fail signal FE2 and outputs it to AND gate 71 of control device 70. Further, inverter 50 is cut off when receiving cutoff signal DWN2 from AND gate 72 of control device 70.

  In addition, the mechanism by which inverters 40 and 50 generate fail signals FE1 and FE2, respectively, will be described later.

  Current sensor 61 detects motor current MCRT1 flowing through motor generator MG1, and outputs the detected motor current MCRT1 to ECU 73 of control device 70. Current sensor 62 detects motor current MCRT2 flowing through motor generator MG2, and outputs the detected motor current MCRT2 to ECU 73.

  AND gate 71 calculates the logical product of fail signal FE2 from inverter 50 and cutoff permission signal RG1 from ECU 73, and outputs the calculation result to inverter 40 as cutoff signal DWN1. AND gate 72 calculates the logical product of fail signal FE1 from inverter 40 and cutoff permission signal RG2 from ECU 73, and outputs the calculation result to inverter 50 as cutoff signal DWN2.

  ECU 73 receives voltage Vm from voltage sensor 30, and receives motor currents MCRT1 and MCRT2 from current sensors 61 and 62, respectively. ECU 73 also receives motor rotational speeds MRN1, MRN2 and torque command values TR1, TR2 from an external ECU provided outside motor driving device 100.

  ECU 73 generates a signal PWM1 for driving motor generator MG1 by a method described later based on voltage Vm, motor current MCRT1 and torque command value TR1, and outputs the generated signal PWM1 to inverter 40. Further, ECU 73 generates signal PWM2 for driving motor generator MG2 by a method described later based on voltage Vm, motor current MCRT2 and torque command value TR2, and outputs the generated signal PWM2 to inverter 50.

  Further, ECU 73 calculates electric power generation GPW1 or power consumption SPW1 in motor generator MG1 based on motor rotational speed MRN1 and torque command value TR1, and in motor generator MG2 based on motor rotational speed MRN2 and torque command value TR2. The generated power GPW2 or the power consumption SPW2 is calculated. Then, ECU 73 monitors the operating state of motor generator MG1 based on calculated generated power GPW1 or consumed power SPW1, and monitors the operating state of motor generator MG2 based on calculated generated power GPW2 or consumed power SPW2.

  Then, ECU 73 generates blocking permission signals RG1, RG2 by a method described later, and outputs the generated blocking permission signals RG1, RG2 to AND gates 71, 72, respectively.

  FIG. 2 is a circuit diagram of inverter 40 shown in FIG. Referring to FIG. 2, inverter 40 includes a U-phase arm 41, a V-phase arm 42, a W-phase arm 43, and an OR gate 44. U-phase arm 41, V-phase arm 42, and W-phase arm 43 are provided in parallel between the power supply line and the ground.

  The U-phase arm 41 includes IGBTs (Insulated Gate Bipolar Transistors) Q1 and Q2, diodes D1 and D2, and driving units Dr1 and Dr2. IGBTs Q1 and Q2 are connected in series between the power supply line and the earth line. Diodes D1 and D2 are connected so that current flows from the emitter side to the collector side between the collectors and emitters of IGBTs Q1 and Q2, respectively.

  Drive unit Dr1 is connected to the emitter of IGBT Q1 so as to shunt current between the collector and emitter of IGBT Q1. The drive unit Dr1 includes NPN transistors 1 and 5, a PNP transistor 6, resistors 2 to 4, and a drive IC 7. NPN transistor 1 is connected between resistor 2 and ground node GND. In this case, the collector is connected to the resistor 2 and the emitter is connected to the ground node GND. The base is connected to the emitter of IGBT Q1 so as to shunt current between the collector and emitter of IGBT Q1. Resistor 2 is connected between node N1 and the collector of NPN transistor 1. Node N1 is connected to the gate of IGBT Q1.

  Resistor 3 is connected between the base of NPN transistor 1 and ground node GND. Resistor 4 is connected between nodes N1 and N2. NPN transistor 5 and PNP transistor 6 are connected in series between power supply node Vc and ground node GND. The collector of NPN transistor 5 is connected to power supply node Vc, and the emitter is connected to the emitter of PNP transistor 6. The collector of PNP transistor 6 is connected to ground node GND. Note that the node N 2 is an intermediate point between the NPN transistor 5 and the PNP transistor 6.

  The drive IC 7 has ports P1 to P4. Port P 1 is connected to the bases of NPN transistor 5 and PNP transistor 6. The port P2 is connected to the base of the NPN transistor 1. The port P3 outputs a fail signal fe1 to the OR gate 44. Port P4 receives blocking signal DWN1 from AND gate 71 and receives signal PWM1 from ECU 73.

  When an overcurrent occurs in the IGBT Q1, the NPN transistor 1 is turned on, the gate voltage input to the gate of the IGBT Q1 is lowered, and the IGBT Q1 reduces the current flowing between the collector and the emitter. Then, the drive IC 7 receives an overcurrent at the port P2, and when the voltage at the port P2 becomes higher than a predetermined voltage value, the drive IC 7 turns off the gate of the IGBT Q1 from the port P1, generates the fail signal fe1 from the port P3, and generates an OR gate. 44. More specifically, drive IC 7 outputs a voltage of 0 V to the bases of NPN transistor 5 and PNP transistor 6, thereby setting the voltage at node N1 to 0 V and turning off IGBT Q1.

  Further, when the drive IC 7 receives the shut-off signal DWN1 at the port 4, the drive IC 7 outputs a voltage of 0V from the port P1 to the bases of the NPN transistor 5 and the PNP transistor 6 so as to shut off the IGNQ1. Further, when receiving the signal PWM1, the drive IC 7 outputs a predetermined voltage from the port P1 to the bases of the NPN transistor 5 and the PNP transistor 6, and switches the IGBT Q1 according to the signal PWM1.

  As described above, the drive unit Dr1 performs switching control and interruption of the IGBT Q1, detects an overcurrent in the IGBT Q1, and generates the fail signal fe1.

  Drive unit Dr2 is connected to the emitter of IGBT Q2 so as to shunt current between the collector and emitter of IGBT Q2. The drive unit Dr2 has the same configuration as that of the drive unit Dr1, cuts off the IGBT Q2 based on the cutoff signal DWN1, switches the IGBT Q2 on the basis of the signal PWM1, detects the overcurrent of the IGBT Q2, and outputs the fail signal fe2. The generated fail signal fe 2 is output to the OR gate 44.

  V-phase arm 42 includes IGBTs Q3 and Q4, diodes D3 and D4, and drive units Dr3 and Dr4. IGBTs Q3 and Q4 are connected in series between the power supply line and the earth line. Diodes D3 and D4 are connected to flow current from the emitter side to the collector side between the collectors and emitters of IGBTs Q3 and Q4, respectively.

  Drive unit Dr3 is connected to the emitter of IGBT Q3 so as to shunt current between the collector and emitter of IGBT Q3. Drive unit Dr4 is connected to the emitter of IGBT Q4 so as to shunt current between the collector and emitter of IGBT Q4.

  The drive unit Dr3 has the same configuration as that of the drive unit Dr1, cuts off the IGBT Q3 based on the cut-off signal DWN1, switches the IGBT Q3 based on the signal PWM1, detects the overcurrent of the IGBT Q3, and outputs the fail signal fe3. The generated fail signal fe 3 is output to the OR gate 44. Further, the drive unit Dr4 has the same configuration as the drive unit Dr1, cuts off the IGBT Q4 based on the cut-off signal DWN1, controls the switching of the IGBT Q4 based on the signal PWM1, detects the overcurrent of the IGBT Q4, and outputs the fail signal fe4. The generated fail signal fe 4 is output to the OR gate 44.

  W-phase arm 43 includes IGBTs Q5 and Q6, diodes D5 and D6, and drive units Dr5 and Dr6. IGBTs Q5 and Q6 are connected in series between the power supply line and the earth line. Diodes D5 and D6 are connected to flow current from the emitter side to the collector side between the collectors and emitters of IGBTs Q5 and Q6, respectively.

  Drive unit Dr5 is connected to the emitter of IGBT Q5 so as to shunt the current between the collector and emitter of IGBT Q5. Drive unit Dr6 is connected to the emitter of IGBT Q6 so as to shunt current between the collector and emitter of IGBT Q6.

  The drive unit Dr5 has the same configuration as the drive unit Dr1. The drive unit Dr5 blocks the IGBT Q5 based on the cutoff signal DWN1, controls the switching of the IGBT Q5 based on the signal PWM1, detects the overcurrent of the IGBT Q5, and outputs the fail signal fe5. The generated fail signal fe 5 is output to the OR gate 44. The drive unit Dr6 has the same configuration as that of the drive unit Dr1. The drive unit Dr6 blocks the IGBT Q6 based on the cutoff signal DWN1, switches the IGBT Q6 based on the signal PWM1, detects the overcurrent of the IGBT Q6, and outputs the fail signal fe6. The generated fail signal fe6 is output to the OR gate 44.

  The OR gate 44 receives the fail signals fe1 to fe6 from the drive units Dr1 to Dr6, calculates a logical sum of the received fail signals fe1 to fe6, and generates a fail signal FE1. Then, the OR gate 44 outputs the generated fail signal FE1 to the AND gate 72.

  An intermediate point of each phase arm is connected to each phase end of each phase coil of motor generator MG1. That is, motor generator MG1 is a three-phase permanent magnet motor, and is configured by commonly connecting one end of three coils of U, V, and W phases to a midpoint. The intermediate point of IGBTs Q1 and Q2 is connected to the other end of the U-phase coil, the intermediate point of IGBTs Q3 and Q4 is connected to the other end of the V-phase coil, and the intermediate point of IGBTs Q5 and Q6 is the intermediate point of the W-phase coil. Connected to the other end.

  The inverter 50 has the same configuration as the inverter 40. In this case, the OR gate 44 included in the inverter 50 generates the fail signal FE2 by the above-described method, and outputs the generated fail signal FE2 to the AND gate 71.

  FIG. 3 is a functional block diagram of ECU 73 shown in FIG. Referring to FIG. 3, ECU 73 includes a motor control phase voltage calculation unit 731, an inverter PWM signal conversion unit 732, and a cutoff control unit 734.

  Motor control phase voltage calculation unit 731 receives voltage Vm, which is an input voltage to inverter 40 (or 50), from voltage sensor 30, and motor current MCRT1 (or MCRT2) that flows in each phase of motor generator MG1 (or MG2). Is received from the current sensor 61 (or 62), and the torque command value TR1 (or TR2) is received from the external ECU. Based on these input signals, motor control phase voltage calculation unit 731 calculates a voltage to be applied to the coils of each phase of motor generator MG1 (or MG2), and the calculated result is PWM for inverter. The signal is supplied to the signal conversion unit 732. The inverter PWM signal conversion unit 732 is a signal PWM1 (or PWM2) that actually turns on / off each of the IGBTs Q1 to Q6 of the inverter 40 (or 50) based on the calculation result received from the motor control phase voltage calculation unit 731. And the generated signal PWM1 (or PWM2) is supplied to each of the drive units Dr1 to Dr6 of the inverter 40 (or 50).

  Thus, drive units Dr1 to Dr6 perform switching control of IGBTs Q1 to Q6, respectively, and control currents that flow through the phases of motor generator MG1 (or MG2) so that motor generator MG1 (or MG2) outputs a commanded torque. To do. In this way, the motor drive current is controlled, and a motor torque corresponding to the torque command value TR1 (or TR2) is output.

  Cutoff control unit 734 receives motor rotational speeds MRN1, MRN2 and torque command values TR1, TR2 from an external ECU. Then, cutoff control unit 734 determines whether motor generator MG1 is in the regeneration mode or the power running mode based on motor rotation speed MRN1 and torque command value TR1.

  More specifically, the relationship between the motor rotational speed MRN1 and the torque command value TR1 exists in the first quadrant or the second quadrant in the orthogonal coordinates with the motor rotational speed on the horizontal axis and the torque command value on the vertical axis. When the motor generator MG1 is in the power running mode and the relationship between the motor rotational speed MRN1 and the torque command value TR1 exists in the third quadrant or the fourth quadrant, the motor generator MG1 is in the regeneration mode. Therefore, cutoff control unit 734 determines whether motor generator MG1 is in the power running mode or the regenerative mode depending on whether the relationship between motor rotational speed MRN1 and torque command value TR1 exists in the first quadrant to the fourth quadrant. judge.

  Similarly, cutoff control unit 734 determines whether motor generator MG2 is in the power running mode or the regenerative mode based on motor rotational speed MRN2 and torque command value TR2.

  Further, cutoff control unit 734 calculates power consumption SPW1 or generated power GPW1 in motor generator MG1 based on motor rotational speed MRN1 and torque command value TR1, and motor generator MG2 based on motor rotational speed MRN2 and torque command value TR2. The power consumption SPW2 or the generated power GPW2 is calculated.

  When cutoff controller 734 determines that motor generator MG1 is in the regeneration mode and motor generator MG2 is in the power running mode, generation power GPW1 in motor generator MG1 is greater than threshold value PWth1. If it is determined, a cutoff permission signal RG1 is generated and output to the AND gate 71. Threshold value PWth1 is a capacitor when inverters 40 and 50 do not cause overvoltage breakdown when motor generator MG1 continuously generates generated power GPW1 in a state where consumption of power consumption SPW2 in motor generator MG2 is stopped. 20 is set to the maximum power stored in 20.

  If the motor generator MG2 in the power running mode fails and the power generation in the motor generator MG1 is continued, the inverters 40 and 50 cause overvoltage breakdown, so the power generation in the motor generator MG1 is stopped and the inverters 40 and 50 become overvoltage breakdown. In order to avoid this, the interruption of the inverter 40 is permitted.

  When cutoff controller 734 determines that motor generator MG1 is in the regeneration mode and motor generator MG2 is in the power running mode, power consumption SPW2 in motor generator MG2 is greater than threshold value PWth2. If it is determined, a cutoff permission signal RG2 is generated and output to the AND gate 72. The threshold value PWth2 is a value obtained when the inrush current to the capacitor 20 does not occur when the motor generator MG2 continuously consumes the power consumption SPW2 in the state where the generation of the generated power GPW1 in the motor generator MG1 is stopped. Is set to the minimum power stored in.

  When the motor generator MG1 in the regeneration mode fails, if the consumption in the motor generator MG2 is continued, the accumulated power in the capacitor 20 is reduced and an inrush current to the capacitor 20 is generated, so the power consumption in the motor generator MG2 is stopped. Thus, in order to prevent the inrush current from flowing into the capacitor 20, the interruption of the inverter 50 is permitted.

  Furthermore, when control unit 734 determines that motor generator MG1 is in the power running mode and motor generator MG2 is in the regeneration mode, power consumption SPW1 in motor generator MG1 is greater than threshold value PWth3. If it is determined, a cutoff permission signal RG1 is generated and output to the AND gate 71. The threshold value PWth3 is a value obtained when the inrush current to the capacitor 20 does not occur when the motor generator MG1 continuously consumes the power consumption SPW1 in the state where the generation of the generated power GPW2 in the motor generator MG2 is stopped. Is set to the minimum power stored in.

  When the motor generator MG2 in the regeneration mode fails, if the consumption in the motor generator MG1 is continued, the accumulated power in the capacitor 20 decreases and an inrush current to the capacitor 20 is generated, so the power consumption in the motor generator MG1 is stopped. Thus, in order to prevent the inrush current to the capacitor 20 from occurring, the interruption of the inverter 40 is permitted.

  Furthermore, when it is determined that motor generator MG1 is in the power running mode and motor generator MG2 is in the regeneration mode, cutoff control unit 734 further generates power GPW2 in motor generator MG2 greater than threshold value PWth4. If it is determined, a cutoff permission signal RG2 is generated and output to the AND gate 72. Threshold value PWth4 is a capacitor when inverters 40 and 50 do not cause overvoltage breakdown when motor generator MG2 continuously generates generated power GPW2 in a state where consumption of power consumption SPW1 in motor generator MG1 is stopped. 20 is set to the maximum power stored in 20.

  If the motor generator MG1 in the power running mode fails and the power generation in the motor generator MG2 is continued, the inverters 40 and 50 cause overvoltage breakdown, so the power generation in the motor generator MG2 is stopped and the inverters 40 and 50 become overvoltage breakdown. In order to avoid this, the inverter 50 is allowed to be shut off.

  Thus, when one of the two motor generators MG1 and MG2 fails, the power change amount on the capacitor 20 side is the power change amount on the capacitor 20 side when the inverters 40 and 50 cause overvoltage breakdown or the capacitor 20 side. The inverter 40 or the inverter 50 is cut off so as to be smaller than the amount of power change on the capacitor 20 side when an inrush current occurs.

  When both motor generators MG1 and MG2 are in the power running mode or the regenerative mode and one of them fails, shut-off control unit 734 does not perform shut-off control for shutting off inverter 40 or 50.

  This is because even if one of the motor generators MG1 and MG2 is in the power running mode, even if one of them stops, the electric power stored in the capacitor 20 increases, so that no inrush current to the capacitor 20 occurs, and the motor generator MG1 and This is because even if one of the MGs 2 is in the regenerative mode, even if one of them stops, the power stored in the capacitor 20 decreases, so that the inverters 40 and 50 do not cause overvoltage breakdown.

  As a result of the cutoff control unit 734 generating the cutoff permission signal RG1 or RG2 by the above-described operation and outputting it to the AND gate 71 or 72, the presence or absence of cutoff in the inverter 40 or 50 is as shown in Table 1 or 2, respectively.

  Referring to Table 1, when the cutoff control unit 734 generates the cutoff permission signal RG1 and outputs it to the AND gate 71, when the inverter 50 driving the motor generator MG2 is normal, the AND gate 71 Since the fail signal FE2 is not received from the inverter 40, the inverter 40 is not shut off. That is, the gate is allowed.

  Further, when the cutoff control unit 734 generates the cutoff permission signal RG1 and outputs it to the AND gate 71, when the inverter 50 that drives the motor generator MG2 fails, the AND gate 71 receives the failure signal FE2 from the inverter 50. Therefore, the inverter 40 is shut off. That is, the gate is blocked.

  Further, when the cutoff control unit 734 generates the cutoff permission signal RG1 and does not output it to the AND gate 71, the inverter 40 is not cut off regardless of “normal” and “fail” of the inverter 50 that drives the motor generator MG2. . That is, the gate is allowed.

  Referring to Table 2, when the interruption control unit 734 generates the interruption permission signal RG2 and outputs it to the AND gate 72, when the inverter 40 driving the motor generator MG1 is normal, the AND gate 72 Since the fail signal FE1 is not received from the inverter 50, the inverter 50 is not shut off. That is, the gate is allowed.

  Further, when the cutoff control unit 734 generates the cutoff permission signal RG2 and outputs it to the AND gate 72, when the inverter 40 that drives the motor generator MG1 fails, the AND gate 72 receives the failure signal FE1 from the inverter 40. Therefore, the inverter 50 is shut off. That is, the gate is blocked.

  Further, when the cutoff control unit 734 generates the cutoff permission signal RG2 and does not output it to the AND gate 72, the inverter 50 is not cut off regardless of “normal” and “fail” of the inverter 40 that drives the motor generator MG1. . That is, the gate is allowed.

  In this way, when the cutoff permission signal RG1 is generated, if the inverter 50 fails, the inverter 40 is blocked. When the cutoff permission signal RG2 is generated, if the inverter 40 fails, the inverter 50 is blocked. .

  With reference to FIG. 1 again, the overall operation of the motor drive device 100 will be described. When the entire operation is started, the DC power supply 10 supplies a DC voltage to the capacitor 20, and the capacitor 20 smoothes the DC voltage from the DC power supply 10 and supplies it to the inverters 40 and 50.

  Voltage sensor 30 detects voltage Vm across capacitor 20 and outputs the detected voltage Vm to ECU 73 of control device 70. Current sensor 61 detects motor current MCRT1 flowing through motor generator MG1 and outputs the detected current to ECU 73. Current sensor 62 detects motor current MCRT2 flowing through motor generator MG2 and outputs the detected current to ECU 73. ECU 73 receives torque command values TR1, TR2 and motor rotational speeds MRN1, MRN2 from the external ECU.

  Then, ECU 73 generates signal PWM1 by the above-described method based on voltage Vm, motor current MCRT1 and torque command value TR1, and outputs the generated signal PWM1 to inverter 40. ECU 73 generates signal PWM2 by the method described above based on voltage Vm, motor current MCRT2, and torque command value TR2, and outputs the generated signal PWM2 to inverter 50.

  Then, inverter 40 converts the DC voltage smoothed by capacitor 20 into an AC voltage by signal PWM1 from ECU 73, and drives motor generator MG1. Inverter 50 converts DC voltage smoothed by capacitor 20 into AC voltage by signal PWM2 from ECU 73 to drive motor generator MG2. Thereby, motor generator MG1 generates torque specified by torque command value TR1, and motor generator MG2 generates torque specified by torque command value TR2.

  Thus, when motor generators MG1 and MG2 are driven, ECU 73 calculates power consumption SPW1 or generated power GPW1 in motor generator MG1 based on motor rotational speed MRN1 and torque command value TR1, and motor rotation Based on number MRN2 and torque command value TR2, power consumption SPW2 or generated power GPW2 in motor generator MG2 is calculated. ECU 73 determines an operation mode (powering mode or regeneration mode) in motor generator MG1 based on motor rotational speed MRN1 and torque command value TR1, and in motor generator MG2 based on motor rotational speed MRN2 and torque command value TR2. The operation mode (power running mode or regenerative mode) is determined.

  When ECU 73 determines that generated power GPW1 in motor generator MG1 is larger than threshold value PWth1 when motor generator MG1 is in the regenerative mode and motor generator MG2 is in the power running mode, cutoff permission signal RG1 And output to the AND gate 71. Inverter 50 generates fail signal FE2 and outputs it to AND gate 71 when an overcurrent is detected by the mechanism described above.

  Then, AND gate 71 calculates the logical product of cutoff permission signal RG1 from ECU 73 and fail signal FE2 from inverter 50, and outputs cutoff signal DWN1 to inverter 40. And the inverter 40 is interrupted | blocked. Thereby, even if motor generator MG2 in the power running mode stops due to a failure, inverters 40 and 50 can be prevented from being overvoltage destroyed.

  When ECU 73 determines that power consumption SPW2 in motor generator MG2 is greater than threshold value PWth2 when motor generator MG1 is in the regeneration mode and motor generator MG2 is in the power running mode, cutoff permission signal RG2 And output to the AND gate 72. Further, when the inverter 40 detects an overcurrent by the above-described mechanism, the inverter 40 generates a fail signal FE1 and outputs it to the AND gate 72.

  Then, AND gate 72 calculates the logical product of cutoff permission signal RG2 from ECU 73 and fail signal FE1 from inverter 40, and outputs cutoff signal DWN2 to inverter 50. And the inverter 50 is interrupted | blocked. Thereby, even if the motor generator MG1 in the regeneration mode stops due to a failure, the occurrence of an inrush current to the capacitor 20 can be prevented.

  Further, when ECU 73 determines that power consumption SPW1 in motor generator MG1 is larger than threshold value PWth3 when motor generator MG1 is in the power running mode and motor generator MG2 is in the regeneration mode, cutoff permission signal RG1 And output to the AND gate 71. Inverter 50 generates fail signal FE2 and outputs it to AND gate 71 when an overcurrent is detected by the mechanism described above.

  Then, AND gate 71 calculates the logical product of cutoff permission signal RG1 from ECU 73 and fail signal FE2 from inverter 50, and outputs cutoff signal DWN1 to inverter 40. And the inverter 40 is interrupted | blocked. Thereby, even if the motor generator MG2 in the regeneration mode stops due to a failure, the occurrence of an inrush current to the capacitor 20 can be prevented.

  Further, when ECU 73 determines that generated power GPW2 in motor generator MG2 is larger than threshold value PWth4 when motor generator MG1 is in the power running mode and motor generator MG2 is in the regenerative mode, cutoff permission signal RG2 And output to the AND gate 72. Further, when the inverter 40 detects an overcurrent by the above-described mechanism, the inverter 40 generates a fail signal FE1 and outputs it to the AND gate 72.

  Then, AND gate 72 calculates the logical product of cutoff permission signal RG2 from ECU 73 and fail signal FE1 from inverter 40, and outputs cutoff signal DWN2 to inverter 50. And the inverter 50 is interrupted | blocked. Thereby, even if motor generator MG1 in the power running mode stops due to a failure, inverters 40 and 50 can be prevented from being overvoltage destroyed.

  When motor drive device 100 is mounted on a hybrid vehicle, motor generator MG1 is coupled to the engine, and motor generator MG2 is coupled to the drive wheels of the hybrid vehicle. Motor generator MG1 starts the engine or generates electric power by the rotational force of the engine. Motor generator MG2 generates power by driving the driving wheels or by the rotational force of the driving wheels when the brake is stepped on.

  Therefore, when motor drive device 100 is mounted on a hybrid vehicle, motor generator MG1 is mainly driven in a regeneration mode in which electric power is generated by the rotational force of the engine after starting, and motor generator MG2 is mainly driven in a power running mode in which it is driven. Driven. Motor generator MG2 has a larger capacity than motor generator MG1.

  As a result, when motor generator MG2 is in the power running mode and motor generator MG1 is in the regenerative mode, if motor generator MG2 stops due to a failure, inverter 40 is shut off and power generation in motor generator MG1 is stopped. This is important in protecting the inverters 40 and 50 from overvoltage breakdown. This is because when the motor generator MG2 that consumes a large amount of power is stopped, the power stored in the capacitor 20 increases rapidly, so that overvoltage is likely to be applied to the inverters 40 and 50 when power generation in the motor generator MG1 is continued.

  Further, when the motor generator MG2 is in the power running mode and the motor generator MG1 is in the regenerative mode, if the motor generator MG1 is stopped due to a failure, the inverter 50 is shut off to stop the power consumption in the motor generator MG2. This is important in preventing inrush current to the capacitor 20. When the motor generator MG1 that is generating power is stopped, if the motor generator MG2 that consumes a large amount of power continues to be driven in the power running mode, the accumulated power of the capacitor 20 decreases rapidly and an inrush current to the capacitor 20 occurs. It is easy.

  Further, when the motor generator MG2 is in the regenerative mode and the motor generator MG1 is in the power running mode, if the motor generator MG2 stops due to a failure, the inverter 40 is shut off and power consumption in the motor generator MG1 is stopped. This is important in preventing inrush current to the capacitor 20. When the motor generator MG2 that generates a large amount of generated power GPW2 stops, the stored power in the capacitor 20 decreases rapidly. Therefore, if the motor generator MG1 is continuously driven in the power running mode, an inrush current to the capacitor 20 is likely to occur. Because.

  Further, when the motor generator MG2 is in the regenerative mode and the motor generator MG1 is in the power running mode, if the motor generator MG1 stops due to a failure, the inverter 50 is shut off and the power generation in the motor generator MG2 is stopped. This is important in protecting the inverters 40 and 50 from overvoltage breakdown. When the motor generator MG1 that consumes electric power stops due to a failure, if the motor generator MG2 that generates a large amount of generated power GPW2 is continuously driven in the regeneration mode, the electric power stored in the capacitor 20 increases rapidly. This is because an overvoltage is easily applied to the inverters 40 and 50.

  Therefore, in the present invention, inverters 40 and 50 for driving motor generators MG1 and MG2 according to the operating state (powering mode or regenerative mode) of motor generator MG2 having a large capacity among two motor generators MG1 and MG2 are provided. You may make it determine whether it interrupts | blocks.

  In the above, regardless of whether or not the fail signals FE1 and FE2 are received from the inverters 40 and 50, the ECU 73 determines that the cutoff permission signal RG1 when the power consumption or generated power of the motor generators MG1 and MG2 is greater than the threshold value. In the present invention, the ECU 73 receives the fail signals FE1 and FE2 from the inverters 40 and 50, but the power consumption or generated power of the motor generators MG1 and MG2 is less than the threshold value. It may be determined whether it is large or not, and the cutoff permission signal RG1 or RG2 may be generated.

  Note that the control device 70 is manufactured as one semiconductor chip.

  Inverter 40 constitutes a “drive device” provided corresponding to motor generator MG1, and inverter 50 constitutes a “drive device” provided corresponding to motor generator MG2.

  Further, the operation state of the motor generators MG1 and MG2 is determined, and in a fixed case, the ECU 73 that generates the cutoff permission signal RG1 or RG2 and outputs it to the AND gate 71 or 72 and the AND gates 71 and 72, respectively, Device ".

  Further, the AND gate 71 constitutes a “breaking circuit” provided corresponding to the inverter 40 (driving device), and the AND gate 72 is a “breaking circuit” provided corresponding to the inverter 50 (driving device). Configure.

  Further, ECU 73 that determines the operating state of motor generators MG1 and MG2 and generates cutoff permission signal RG1 or RG2 and outputs the same to AND gate 71 or 72, respectively, constitutes a “control circuit”.

[Embodiment 2]
FIG. 4 is a schematic block diagram of the motor driving apparatus according to the second embodiment. Referring to FIG. 4, motor drive device 200 controls DC power supply 10, inverters 11 to 1 n (n is a natural number of 2 or more), capacitor 20, voltage sensor 30, and current sensors 61 to 6 n. Device 80. Control device 80 includes cutoff circuits 81 to 8n, ECUs 91 to 9n, and bus BS.

  The DC power supply 10, the capacitor 20, and the voltage sensor 30 are as described above. The voltage sensor 30 outputs the detected voltage Vm to each of the ECUs 91 to 9n of the control device 80.

  Inverters 11 to 1n are provided corresponding to motor generators MG1 to MGn, respectively. Inverters 11 to 1n are provided in parallel between the power supply line and the earth line. That is, the inverters 11 to 1 n are connected in parallel to both ends of the capacitor 20. Each of inverters 11 to 1n has the same configuration as inverter 40 shown in FIG.

  Therefore, inverters 11 to 1n generate fail signals FE1 to FEn, respectively, when an overcurrent is detected by the mechanism described above. Then, the inverter 11 outputs a fail signal FE1 to the cutoff circuits 82 to 8n. Further, the inverter 12 outputs a fail signal FE2 to the cutoff circuits 81, 83 to 8n. Hereinafter, similarly, the inverter 1n outputs the fail signal FEn to the cutoff circuits 81 to 8n-1. That is, the inverters 11 to 1n output the fail signals FE1 to FEn to n−1 cutoff circuits other than the cutoff circuits provided corresponding to the inverters 11 to 1n, respectively.

  Inverters 11-1n drive motor generators MG1-MGn based on signals PWM1-PWMn from ECUs 91-9n, respectively.

  Further, inverters 11 to 1n are cut off by cutoff signals DWN1 to DWNn from cutoff circuits 81 to 8n, respectively.

  Current sensors 61-6n detect motor currents MCRT1-MCRTn flowing through motor generators MG1-MGn, respectively, and output the detected motor currents MCRT1-MCRTn to ECUs 91-9n, respectively.

  Breaking circuits 81 to 8n are provided corresponding to inverters 11 to 1n, respectively. The cutoff circuit 81 receives fail signals FE2 to FEn from the inverters 12 to 1n, respectively, and receives a cutoff permission signal RG1 from the ECU 91. Then, cutoff circuit 81 generates cutoff signal DWN1 based on fail signals FE2-FEn and cutoff permission signal RG1, and outputs the generated cutoff signal DWN1 to inverter 11.

  Cutoff circuit 82 receives fail signals FE1, FE3 to FEn from inverters 11 and 13 to 1n, respectively, and receives cut off permission signal RG2 from ECU 92. Then, cutoff circuit 82 generates cutoff signal DWN2 based on fail signals FE1, FE3-FEn and cutoff permission signal RG2, and outputs the generated cutoff signal DWN2 to inverter 12.

  Similarly, cutoff circuit 8n receives fail signals FE1 to FEn-1 from inverters 11 to 1n-1, and receives cutoff permission signal RGn from ECU 9n. Then, cut-off circuit 8n generates cut-off signal DWNn based on fail signals FE1-FEn-1 and cut-off permission signal RGn and outputs them to inverter 1n.

  The blocking circuit 81 includes an OR gate 21 and an AND gate 31. The OR gate 21 calculates a logical sum of the fail signals FE <b> 2 to FEn and outputs the calculation result to the AND gate 31. The AND gate 31 calculates the logical product of the output of the OR gate 21 and the cutoff permission signal RG1, and outputs the calculation result to the inverter 11 as the cutoff signal DWN1.

  The blocking circuit 82 includes an OR gate 22 and an AND gate 32. The OR gate 22 calculates a logical sum of the fail signals FE1, FE3 to FEn, and outputs the calculation result to the AND gate 32. The AND gate 32 calculates the logical product of the output of the OR gate 22 and the cutoff permission signal RG2, and outputs the calculation result to the inverter 12 as the cutoff signal DWN2.

  Hereinafter, similarly, the cutoff circuit 8n includes an OR gate 2n and an AND gate 3n. The OR gate 2n calculates the logical sum of the fail signals FE1 to FEn-1 and outputs the calculation result to the AND gate 3n. The AND gate 3n calculates the logical product of the output of the OR gate 2n and the cutoff permission signal RGn, and outputs the calculation result to the inverter 1n as the cutoff signal DWNn.

  In this way, the cutoff circuits 81 to 8n receive a fail signal from n-1 inverters other than the corresponding inverter, and the logical sum of the received n-1 fail signals and the cutoff permission signals RG1 to RGn. The cutoff signals DWN1 to DWNn are generated by calculating the logical product. That is, cutoff circuits 81 to 8n receive at least one fail signal from n-1 inverters other than the corresponding inverters, and cutoff permission signals RG1 to RGn for permitting the cutoff of corresponding inverters 11 to 1n, respectively. Is received from ECUs 91 to 9n, cutoff signals DWN1 to DWNn are generated and output to inverters 11 to 1n, respectively.

  ECUs 91 to 9n are provided corresponding to inverters 11 to 1n, respectively, and are connected to each other by a bus BS. Each of ECUs 91 to 9n has the same configuration as ECU 73 shown in FIG. In this case, the cutoff control units 734 included in the ECUs 91 to 9n output the generated cutoff permission signals RG1 to RGn to the AND gates 31 to 3n of the cutoff circuits 81 to 8n, respectively.

  ECUs 91-9n receive voltage Vm from voltage sensor 30, receive motor rotational speeds MRN1-MRNn and torque command values TR1-TRn from external ECUs, respectively, and receive motor currents MCRT1-MCRTn from current sensors 61-6n, respectively. ECU 91 generates signal PWM1 by the method described above based on voltage Vm, motor current MCRT1 and torque command value TR1, and outputs the signal PWM1 to inverter 11. ECU 92 generates signal PWM2 by the method described above based on voltage Vm, motor current MCRT2, and torque command value TR2, and outputs the signal PWM2 to inverter 12. Similarly, ECU 9n generates signal PWMn by the method described above based on voltage Vm, motor current MCRTn, and torque command value TRn, and outputs the signal PWMn to inverter 1n.

  Further, ECU 91 determines the operation mode (regeneration mode or power running mode) of motor generator MG1 by the above-described method based on motor rotation speed MRN1 and torque command value TR1. ECU 92 determines the operation mode (regeneration mode or power running mode) of motor generator MG2 by the above-described method based on motor rotation speed MRN2 and torque command value TR2. Hereinafter, similarly, ECU 9n determines the operation mode (regeneration mode or power running mode) of motor generator MGn by the above-described method based on motor rotational speed MRNn and torque command value TRn.

  Further, ECU 91 calculates electric power W1 in motor generator MG1 (power consumption when W1> 0, electric power generation when W1 <0) based on motor rotational speed MRN1 and torque command value TR1. Based on motor rotation speed MRN2 and torque command value TR2, ECU 92 calculates electric power W2 in motor generator MG2 (power consumption when W2> 0, power generation when W2 <0). Similarly, ECU 9n calculates electric power Wn in motor generator MGn (power consumption when Wn> 0, electric power generated when Wn <0) based on motor rotational speed MRNn and torque command value TRn. .

  ECUs 91 to 9n communicate with each other the operation modes of motor generators MG1 to MGn and electric powers W1 to Wn via bus BS. That is, ECUs 91 to 9n share the operation mode and electric power W1 to Wn of motor generators MG1 to MGn.

  If it does so, ECU91-9n will generate | occur | produce the interruption | blocking permission signals RG1-RGn by the method mentioned later, and will output it to the interruption | blocking circuits 81-8n, respectively.

Hereinafter, a method of generating the cutoff permission signals RG1 to RGn in the ECUs 91 to 9n will be described. In normal control, when the input / output power of the DC power supply 10 is W,
W1 + W2 + ... + Wn = W (1)
Is established. However, the voltage Vm across the capacitor 20 is constant.

When the inverter 1k (Wk> 0, k is a natural number satisfying 1 ≦ k ≦ n) that drives the motor generator MGk in the power running mode fails, the inverter 1k instantaneously stops power consumption. If the power that can be absorbed instantaneously is Win (> 0 and << Wk),
ΔW = Wk−Win (2)
Therefore, ΔW is supplied to the capacitor 20 and the voltage Vm across the capacitor 20 rises to the maximum voltage Vmax determined by the following equation.

Vmax = {2ΔW / C + (V ₀ ) ² } ^1/2 (3)
However, V ₀ is the initial voltage of the capacitor 20, and C is the capacity of the capacitor 20.

  When the maximum voltage Vmax becomes higher than the withstand voltage of each of the inverters 11 to 1n, the inverters 11 to 1n are overvoltage destroyed (also referred to as “secondary failure”).

  In order to prevent this overvoltage breakdown, the ECUs 91 to 9n calculate the electric power W1 to Wn and monitor the operation states of the inverters 11 to 1n, and the regenerative mode inverter 1i (i is 1 ≦ i) that satisfies the following equation: A cut-off permission signal RGi for cutting off (a natural number satisfying ≦ n−1) is generated and output.

Wmaxs−Σ | Wi | <ΔWlmts (4)
However, Wi <0 (generated power), and Wmaxs is the maximum value of the power consumption W1 to Wn. ΔWlmts is the amount of power change on the capacitor 20 side when the inverters 11 to 1n are overvoltage destroyed when the motor generator with the maximum power consumption Wmaxs driven in the power running mode is stopped. That is, ΔWlmts is when the voltage applied to each of the inverters 11 to 1n is smaller than the maximum applicable voltage of the inverters 11 to 1n when the motor generator with the maximum power consumption Wmaxs driven in the power running mode is stopped. Is the maximum power change amount on the capacitor 20 side. ΔWlmts is also referred to as “allowable power change amount of inverters 11 to 1n”.

  In Expression (4), the number of inverters in the regeneration mode is not limited to one and may be plural. Therefore, Σ | Wi | in Equation (4) represents the total sum of the power generated by the plurality of inverters.

(A) When motor generator with maximum power consumption fails For example, inverter 11 generates fail signal FE1 when power consumption W1 in motor generator MG1 is maximum and motor generators MG2 to MG5 are in the regeneration mode. Assuming that The ECUs 91 to 9n share the power consumption W1 and the generated power W2 to W5 as described above, and the ECUs 91 to 9n substitute the power consumption W1 for Wmaxs in the equation (4), and the generated power W2 to W5 Substituting into Wi of (4), it is determined whether or not the power consumption W1 and the generated power W2 to W5 satisfy Expression (4). When power consumption W1 and generated power W2 to W5 satisfy Expression (4), ECUs 92 to 95 generate cutoff permission signals RG2 to RG5 and output them to cutoff circuits 82 to 85, respectively.

  When the inverter 11 detects an overcurrent and generates a fail signal FE1, the cutoff circuit 82 generates a cutoff signal DWN2 based on the fail signal FE1 from the inverter 11 and the cutoff permission signal RG2 from the ECU 92. Output to the inverter 12. The cutoff circuit 83 generates a cutoff signal DWN3 based on the fail signal FE1 from the inverter 11 and the cutoff permission signal RG3 from the ECU 93, and outputs it to the inverter 13. Further, cutoff circuit 84 generates cutoff signal DWN4 based on fail signal FE1 from inverter 11 and cutoff permission signal RG4 from ECU 94, and outputs it to inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signal FE1 from inverter 11 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  And inverters 12-15 are interrupted. As a result, power generation in motor generators MG2 to MG5 is stopped, and voltage Vm across capacitor 20 does not rise to a voltage that causes inverters 11 to 1n to be overvoltage destroyed. As a result, each of the inverters 11 to 1n can be protected from overvoltage breakdown.

(B) When the motor generator whose power consumption is not maximum fails For example, the power consumption W1 in the motor generator MG1 is maximum, the motor generators MG1, MG3 are in the power running mode, and the motor generators MG2, MG4, MG5 are in the regeneration mode. In this case, it is assumed that the inverter 13 generates the fail signal FE3. The ECUs 91 to 9n share the power consumption W1, W3 and the generated power W2, W4, W5 as described above, and the ECUs 91 to 9n substitute the power consumption W3 for Wmaxs in the equation (4) to generate the generated power W2. , W4, W5 are substituted into Wi in the equation (4) to determine whether the power consumption W3 and the generated power W2, W4, W5 satisfy the equation (4). When the power consumption W3 and the generated power W2, W4, W5 satisfy the equation (4), the ECUs 92, 94, 95 generate the cutoff permission signals RG2, RG4, RG5, respectively, and the cutoff circuits 82, 84, 85. Output to.

  When the inverter 13 detects an overcurrent and generates a fail signal FE3, the cutoff circuit 82 generates a cutoff signal DWN2 based on the fail signal FE3 from the inverter 13 and the cutoff permission signal RG2 from the ECU 92. Output to the inverter 12. The cutoff circuit 84 generates a cutoff signal DWN4 based on the fail signal FE3 from the inverter 13 and the cutoff permission signal RG4 from the ECU 94, and outputs it to the inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signal FE3 from inverter 13 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  Inverters 12, 14, and 15 are shut off. As a result, power generation in motor generators MG2, MG4, and MG5 is stopped, and voltage Vm across capacitor 20 does not rise to a voltage that causes inverters 11 to 1n to be overvoltage destroyed. As a result, each of the inverters 11 to 1n can be protected from overvoltage breakdown.

(C) When multiple motor generators in power running mode fail For example, when motor generators MG1, MG3 are in power running mode and motor generators MG2, MG4, MG5 are in regenerative mode, inverters 11 and 13 fail respectively. Assume that the signals FE1 and FE3 are generated. The ECUs 91 to 9n share the power consumption W1, W3 and the generated power W2, W4, W5 as described above, and the ECUs 91 to 9n calculate the sum W1 + W3 of the power consumption W1 and the power consumption W3 as shown in the equation (4). Substituting into Wmaxs and substituting the generated power W2, W4, and W5 into Wi in Expression (4), it is determined whether or not the power consumption W1 + W3 and the generated power W2, W4, and W5 satisfy Expression (4). When the power consumption W1 + W3 and the generated power W2, W4, W5 satisfy the equation (4), the ECUs 92, 94, 95 generate the cutoff permission signals RG2, RG4, RG5, respectively, and the cutoff circuits 82, 84, 85. Output to.

  When the inverters 11 and 13 detect the overcurrent and generate the fail signals FE1 and FE3, respectively, the cutoff circuit 82 receives the fail signals FE1 and FE3 from the inverters 11 and 13 and the cutoff permission signal RG2 from the ECU 92. Based on this, a cutoff signal DWN2 is generated and output to inverter 12. The cutoff circuit 84 generates a cutoff signal DWN4 based on the fail signals FE1 and FE3 from the inverters 11 and 13 and the cutoff permission signal RG4 from the ECU 94, and outputs it to the inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signals FE1 and FE3 from inverters 11 and 13 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  Inverters 12, 14, and 15 are shut off. As a result, power generation in motor generators MG2, MG4, and MG5 is stopped, and voltage Vm across capacitor 20 does not rise to a voltage that causes inverters 11 to 1n to be overvoltage destroyed. As a result, each of the inverters 11 to 1n can be protected from overvoltage breakdown.

  In the above (A) to (C), one or two inverters 11 for driving one or two motor generators MG1 or MG1 and MG3 in the power running mode among the n motor generators MG1 to MGn. Alternatively, when 11 and 13 generate a fail signal, three or four inverters 12, 14, 15 that drive motor generators MG2, MG4, MG5 or MG2-MG5 in three or four regeneration modes, or Although the case where 12-15 is interrupted | blocked was demonstrated, this invention is not restricted to this, Generally, m (m is 1 <= m <n) in a power running mode among n motor generators MG1-MGn. A natural number satisfying the condition) When m inverters that drive motor generators generate at least one fail signal K (k is k ≦ r) inverters among r inverters driving r (r is a natural number satisfying nm−r ≦ n−1) motor generators in the regeneration mode. May be blocked.

  That is, when m inverters that drive the corresponding motor generator in the power running mode generate at least one fail signal, among the r inverters that drive the corresponding motor generator in the regeneration mode, k inverters are cut off. The inverters 11 to 1n may be prevented from being overvoltage destroyed.

  Further, if the total power generated by the k motor generators in the regenerative mode increases, the inverters 11 to 1n may break down overvoltage, so the total power generated by the k motor generators is larger than the threshold value. When this happens, k cut-off permission signals for cutting off the k inverters may be generated.

  The ECUs 91 to 9n may generate and output a cutoff permission signal RGj for cutting off the inverter 1j (j is a natural number satisfying 1 ≦ j ≦ n−1) in the power running mode that satisfies the following expression. .

ΣWj− | Wmaxg | <ΔWlmtg (5)
However, Wj> 0 (power consumption), Wmaxg is the maximum value of the generated power W1 to Wn, and ΔWlmtg is a capacitor when the motor generator with the maximum generated power Wmaxg driven in the regeneration mode is stopped. This is the amount of power change on the capacitor 20 side when an inrush current to 20 occurs. ΔWlmtg is referred to as “allowable power change amount of capacitor 20”.

  In Equation (5), the number of inverters in the power running mode is not limited to one and may be plural. Therefore, Σ | Wj | in Equation (5) represents the total power consumption consumed by the plurality of inverters.

(D) When the motor generator with the maximum generated power fails For example, when the generated power W1 in the motor generator MG1 is maximum and the motor generators MG2 to MG5 are in the power running mode, the inverter 11 generates the fail signal FE1. Assuming that As described above, the ECUs 91 to 9n share the power consumption W2 to W5 and the generated power W1, and the ECUs 91 to 9n substitute the generated power W1 for Wmaxg in the equation (5) to calculate the power consumption W2 to W5 as the equation. By substituting for Wj in (5), it is determined whether or not the generated power W1 and the power consumption W2 to W5 satisfy Expression (5). When generated power W1 and consumed power W2 to W5 satisfy Expression (5), ECUs 92 to 95 generate cutoff permission signals RG2 to RG5 and output them to cutoff circuits 82 to 85, respectively.

  When the inverter 11 detects an overcurrent and generates a fail signal FE1, the cutoff circuit 82 generates a cutoff signal DWN2 based on the fail signal FE1 from the inverter 11 and the cutoff permission signal RG2 from the ECU 92. Output to the inverter 12. The cutoff circuit 83 generates a cutoff signal DWN3 based on the fail signal FE1 from the inverter 11 and the cutoff permission signal RG3 from the ECU 93, and outputs it to the inverter 13. Further, cutoff circuit 84 generates cutoff signal DWN4 based on fail signal FE1 from inverter 11 and cutoff permission signal RG4 from ECU 94, and outputs it to inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signal FE1 from inverter 11 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  And inverters 12-15 are interrupted. Thereby, power consumption in motor generators MG <b> 2 to MG <b> 5 is stopped, and voltage Vm across capacitor 20 does not decrease to a voltage at which an inrush current to capacitor 20 occurs. As a result, inrush current to the capacitor 20 can be prevented.

(E) When the motor generator whose generated power is not maximum fails For example, the generated power W1 in the motor generator MG1 is maximum, the motor generators MG1, MG3 are in the regeneration mode, and the motor generators MG2, MG4, MG5 are in the power running mode In this case, it is assumed that the inverter 13 generates the fail signal FE3. As described above, the ECUs 91 to 9n share the generated power W1, W3 and the consumed power W2, W4, W5, and the ECUs 91 to 9n substitute the generated power W3 for Wmaxs in the equation (5) to consume the consumed power W2. , W4, W5 are substituted into Wj in the equation (5) to determine whether the generated power W3 and the power consumption W2, W4, W5 satisfy the equation (5). When the generated power W3 and the power consumption W2, W4, W5 satisfy the expression (4), the ECUs 92, 94, 95 generate the cutoff permission signals RG2, RG4, RG5, respectively, and the cutoff circuits 82, 84, 85. Output to.

  When the inverter 13 detects an overcurrent and generates a fail signal FE3, the cutoff circuit 82 generates a cutoff signal DWN2 based on the fail signal FE3 from the inverter 13 and the cutoff permission signal RG2 from the ECU 92. Output to the inverter 12. The cutoff circuit 84 generates a cutoff signal DWN4 based on the fail signal FE3 from the inverter 13 and the cutoff permission signal RG4 from the ECU 94, and outputs it to the inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signal FE3 from inverter 13 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  Inverters 12, 14, and 15 are shut off. As a result, power consumption in motor generators MG2, MG4, and MG5 is stopped, and voltage Vm across capacitor 20 does not drop to a voltage at which an inrush current to capacitor 20 occurs. As a result, inrush current to the capacitor 20 can be prevented.

(F) When multiple motor generators in regeneration mode fail For example, when motor generators MG1, MG3 are in regeneration mode and motor generators MG2, MG4, MG5 are in power running mode, inverters 11, 13 fail respectively Assume that the signals FE1 and FE3 are generated. The ECUs 91 to 9n share the generated power W1, W3 and the consumed power W2, W4, and W5 as described above, and the ECUs 91 to 9n calculate the sum W1 + W3 of the generated power W1 and the generated power W3 in the equation (5). Substituting into Wmaxs and substituting the power consumption W2, W4, and W5 into Wj in Expression (5), it is determined whether or not the generated power W1 + W3 and the power consumption W2, W4, and W5 satisfy Expression (5). When the generated power W1 + W3 and the power consumption W2, W4, W5 satisfy the equation (5), the ECUs 92, 94, 95 generate the cutoff permission signals RG2, RG4, RG5, respectively, and the cutoff circuits 82, 84, 85. Output to.

  When the inverters 11 and 13 detect the overcurrent and generate the fail signals FE1 and FE3, respectively, the cutoff circuit 82 receives the fail signals FE1 and FE3 from the inverters 11 and 13 and the cutoff permission signal RG2 from the ECU 92. Based on this, a cutoff signal DWN2 is generated and output to inverter 12. The cutoff circuit 84 generates a cutoff signal DWN4 based on the fail signals FE1 and FE3 from the inverters 11 and 13 and the cutoff permission signal RG4 from the ECU 94, and outputs it to the inverter 14. Further, cutoff circuit 85 generates cutoff signal DWN5 based on fail signals FE1 and FE3 from inverters 11 and 13 and cutoff permission signal RG5 from ECU 95, and outputs it to inverter 15.

  Inverters 12, 14, and 15 are shut off. As a result, power consumption in motor generators MG2, MG4, and MG5 is stopped, and voltage Vm across capacitor 20 does not drop to a voltage at which an inrush current to capacitor 20 occurs. As a result, inrush current to the capacitor 20 can be prevented.

  In the above (D) to (F), one or two inverters 11 for driving one or two motor generators MG1 or MG1 and MG3 in the regeneration mode among the n motor generators MG1 to MGn. Or three or four inverters 12, 14, 15 driving motor generators MG2, MG4, MG5 or MG2 to MG5 in three or four powering modes when 11 and 13 generate a fail signal Although the case where 12-15 is interrupted | blocked was demonstrated, this invention is not restricted to this, Generally, it is m in regeneration mode among n motor generators MG1-MGn (m satisfy | fills m <n. (Natural number) When m inverters that drive motor generators generate at least one fail signal Out of r inverters driving r (r is a natural number satisfying nm−r ≦ n−1) motor generators in the power running mode, k (k is k ≦ r) inverters are cut off. You may be made to do.

  That is, when m inverters that drive the corresponding motor generator in the regeneration mode generate at least one fail signal, among the r inverters that drive the corresponding motor generator in the power running mode, k inverters are cut off. Inrush current to the capacitor 20 may be prevented.

  In addition, if the total power consumption by the k motor generators in the power running mode increases, an inrush current to the capacitor 20 may occur. Therefore, the total power consumption by the k motor generators is larger than the threshold value. When this happens, k cut-off permission signals for cutting off the k inverters may be generated.

  When all of the motor generators MG1 to MGn are in the power running mode or the regeneration mode, when s (natural number satisfying 1 ≦ s <n) motor generators fail, the ECUs 91 to 9n The shut-off control for shutting off the n-s inverters that drive the non-s motor generators other than the motor generator is not performed.

  This is because even if some of the motor generators MG1 to MGn are in the power running mode, even if some of the motor generators are stopped, the electric power accumulated in the capacitor 20 increases, so that no inrush current to the capacitor 20 occurs. This is because even if some of the motor generators MG1 to MGn are in the regenerative mode, even if some of the motor generators are stopped, the electric power stored in the capacitor 20 decreases, so that the inverters 11 to 1n do not cause overvoltage breakdown. .

  In the above, when some of the n motor generators MG1 to MGn fail in the power running mode, the inverter that drives the motor generator in the regeneration mode is shut off, and n In the motor generators MG1 to MGn, when some of the motor generators in the regenerative mode break down, the inverter that drives the motor generator in the power running mode is shut off. More generally, of the n motor generators MG1 to MGn, m inverters that drive m motor generators (m is a natural number satisfying m <n) receive at least one fail signal. When this occurs, the amount of power change on the capacitor 20 side becomes the power change amount ΔWlmts. Or, out of r inverters that drive r (r is a natural number satisfying nm ≦ r ≦ n−1) motor generators so as to be smaller than ΔWlmtg, k (k is k ≦ r). The individual inverters may be cut off. That is, the inverter that generates the fail signal is not limited to the inverter that drives the motor generator in either the regenerative mode or the power running mode, and the inverter that is shut off also has the motor generator operated in either the regenerative mode or the power running mode. It is not limited to the inverter to drive.

  With reference to FIG. 4 again, the overall operation of the motor drive device 200 will be described. When the entire operation is started, the DC power supply 10 supplies a DC voltage to the capacitor 20, and the capacitor 20 smoothes the DC voltage from the DC power supply 10 and supplies it to the inverters 11 to 1n.

  Voltage sensor 30 detects voltage Vm across capacitor 20 and outputs the detected voltage Vm to ECUs 91-9n of control device 80. Current sensors 61-6n detect motor currents MCRT1-MCRTn flowing through motor generators MG1-MGn, respectively, and output them to ECUs 91-9n, respectively. ECUs 91-9n receive torque command values TR1-TRn and motor rotational speeds MRN1-MRNn, respectively, from the external ECU.

  Then, ECUs 91 to 9n generate signals PWM1 to PWMn by the above-described methods based on voltage Vm, motor currents MCRT1 to MCRTn and torque command values TR1 to TRn, and the generated signals PWM1 to PWMn are inverters 11 to 11 respectively. Output to 1n respectively.

  Then, inverters 11 to 1n convert the DC voltage smoothed by capacitor 20 into AC voltage by signals PWM1 to PWMn from ECUs 91 to 9n, respectively, and drive motor generators MG1 to MGn in the power running mode or the regeneration mode. Thus, motor generators MG1 to MGn generate torques specified by torque command values TR1 to TRn, respectively.

  When motor generators MG1 to MGn are driven in this way, when at least one fail signal is received from m inverters that drive m motor generators, control device 80 receives equation (4) described above. The method described above includes a part of inverters that drive some motor generators that generate generated power that satisfies the above condition, or a part of inverters that drive some motor generators that consume power consumption that satisfies Equation (5) above. Block by.

  As a result, the inverters 11 to 1n can be prevented from being overvoltage destroyed, or an inrush current to the capacitor 20 can be prevented.

  ECUs 91 to 9n may be constituted by one ECU that generates signals PWM1 to PWMn and cutoff permission signals RG1 to RGn.

  Further, the control device 80 is manufactured by one semiconductor chip.

  Further, the ECUs 91 to 9n, the bus BS, and the cutoff circuits 81 to 8n, which generate the cutoff permission signals RG1 to RGn, respectively, receive at least one fail signal from the m inverters. Configures a “shut-off device” that shuts off the inverter.

  Furthermore, each of inverters 11 to 1n constitutes a “drive device” that drives the motor generator.

  Further, the ECUs 91 to 9n constitute a “control circuit” that generates k cutoff permission signals that permit the cutoff of k inverters when Expression (4) or Expression (5) is satisfied.

  Further, the ECUs 91 to 9n may generate at least one block permission signal when receiving at least one fail signal.

  Further, although it has been described that the inverters 11 to 1n, 40, and 50 generate a fail signal when an overcurrent flows, the temperature of the inverters 11 to 1n, 40, and 50 rises to a reference value or more. A fail signal may be generated when a circuit failure occurs.

  Further, in the above description, the inverters 11 to 1n, 40, and 50 are made of IGBTs. However, in the present invention, the inverters 11 to 1n, 40, and 50 are not limited to these, such as NPN transistors and MOS transistors. What is necessary is just to be comprised from the semiconductor switching element.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

  The present invention relates to a motor drive device that protects a plurality of drive devices that drive a plurality of motor generators from overvoltage breakdown, or a rush into a capacitive element provided on the input side of a plurality of drive devices that drive a plurality of motor generators It is applied to a motor drive device that prevents current.

1 is a schematic block diagram of a motor drive device according to Embodiment 1. FIG. It is a circuit diagram of the inverter shown in FIG. It is a functional block diagram of ECU shown in FIG. FIG. 5 is a schematic block diagram of a motor drive device according to a second embodiment.

Explanation of symbols

  1, 5 NPN transistor, 2 to 4 resistor, 6 PNP transistor, 7 drive IC, 10 DC power supply, 11 to 1n, 40, 50 inverter, 20 capacitor, 21 to 2n, 44 OR gate, 30 voltage sensor, 31 to 3n , 71, 72 AND gate, 41 U-phase arm, 42 V-phase arm, 43 W-phase arm, 61-6n current sensor, 70, 80 control device, 73, 91-9n ECU, 81-8n cutoff circuit, 100, 200 Motor drive device, 731 motor control phase voltage calculation unit, 732 inverter PWM signal conversion unit, 734 cutoff control unit, Q1 to Q6 IGBT, D1 to D6 diode, Dr1 to Dr6 drive unit, P1 to P4 port, BS bus, MG1-MGn Motor generator.

Claims (17)

A motor driving device that drives n (n is a natural number of 2 or more) motor generators in a power running mode or a regeneration mode,
A capacitive element for smoothing the DC voltage;
N driving devices connected in parallel to both ends of the capacitive element, each driving a corresponding motor generator based on a DC voltage from the capacitive element, and outputting a fail signal at a predetermined time;
When at least one fail signal is received from m (m is a natural number satisfying m <n) drive devices, the amount of power change on the capacitive element side is less than the allowable power change amount of the drive device or the capacitive element. A blocking device that blocks k (k is a natural number satisfying k ≦ r) of r (r is a natural number satisfying n−m ≦ r ≦ n−1) drive devices. A motor driving device provided.   2. The motor drive device according to claim 1, wherein the allowable power change amount is a power change amount on the capacitive element side when the drive device reaches overvoltage breakdown.   The motor drive device according to claim 1, wherein the allowable power change amount is a power change amount on the capacitive element side when an inrush current to the capacitive element is generated. M motor generators driven by the m driving devices are in a power running mode;
R motor generators driven by the r drive devices are in a regeneration mode;
2. When the at least one fail signal is received, the shut-off device shuts off the k drive devices so that a power change amount on the capacitive element side is smaller than the first power change amount. The motor drive device according to claim 3. The shut-off device detects k motor generators whose total generated power is larger than a power difference obtained by subtracting predetermined power from total power consumed by the m motor generators from the r motor generators, and detects the detected motor generators. shut off k drive units corresponding to k motor generators,
The predetermined power is a maximum on the capacitive element side when a voltage applied to each of the n drive devices is smaller than a maximum applicable voltage of the drive device when the m drive devices are stopped. The motor driving device according to claim 4, wherein the motor driving amount is a power change amount.   6. The motor drive device according to claim 4, wherein the total power consumption is power consumed by a motor generator having the maximum power consumption among the m motor generators. 7. The blocking device is
A control circuit for generating k block permission signals for permitting block of the k drive devices;
Provided in correspondence with the n drive devices, each receives n-1 fail signals from n-1 drive devices other than the corresponding drive devices and the cutoff permission signal from the control circuit. n interruption circuits,
Of the n blocking circuits, each of the k blocking circuits corresponding to the k driving devices receives the at least one fail signal from the m driving devices, and receives the at least one fail signal from the control circuit. The motor drive device according to any one of claims 1 to 6, wherein when the one of the k block permission signals is received, the corresponding drive device is blocked. Each of the n blocking circuits is
An OR element for calculating a logical sum of the n-1 fail signals;
An AND element that calculates a logical product of the output of the OR element and the cutoff permission signal from the control circuit to generate a cutoff signal, and outputs the generated cutoff signal to a corresponding driving device,
An OR element included in each of the k cutoff circuits calculates a logical sum of the at least one fail signal,
An AND element included in each of the k cutoff circuits outputs a cutoff signal generated by calculating a logical product of an output of the OR element and the cutoff permission signal from the control circuit to a corresponding driving device. The motor driving device according to claim 7. The n motor generators include first and second motor generators,
The n driving devices are:
A first inverter for driving the first motor generator;
A second inverter for driving the second motor generator,
The control circuit generates a first or second cutoff permission signal,
The n cutoff circuits are:
A first cutoff signal is generated by calculating a logical product of the fail signal from the second inverter and the first cutoff permission signal from the control circuit, provided corresponding to the first inverter. A first AND element that outputs the generated first cutoff signal to the first inverter;
A second cutoff signal is generated by calculating a logical product of the fail signal from the first inverter and the second cutoff permission signal from the control circuit, provided corresponding to the second inverter. The motor drive device according to claim 7, further comprising a second AND element that outputs the generated second cutoff signal to the second inverter. When the first motor generator is driven in the regeneration mode and the second motor generator is driven in the power running mode,
10. The control circuit according to claim 9, wherein when the generated power in the first motor generator becomes larger than a threshold value, the control circuit generates the first cutoff permission signal and outputs the first cutoff permission signal to the first AND element. Motor drive device. The first motor generator drives an internal combustion engine mounted on a vehicle, generates electric power by power from the internal combustion engine,
The motor driving device according to claim 9 or 10, wherein the second motor generator drives a driving wheel of the vehicle. M motor generators driven by the m driving devices are in a regeneration mode;
The r motor generators driven by the r drive devices are in a power running mode,
2. When the at least one fail signal is received, the shut-off device shuts off the k drive devices so that a power change amount on the capacitive element side is smaller than the second power change amount. The motor drive device according to claim 3. The blocking device is
A control circuit for generating k block permission signals for permitting block of the k drive devices;
Provided in correspondence with the n drive devices, each receives n-1 fail signals from n-1 drive devices other than the corresponding drive devices and the cutoff permission signal from the control circuit. n interruption circuits,
The control circuit generates the k block permission signals when the total power consumption in the r motor generators exceeds a threshold value, and the k block permission signals generated one by one. Output to k interrupting circuits corresponding to one driving device,
Of the n blocking circuits, each of the k blocking circuits corresponding to the k driving devices receives the at least one fail signal from the m driving devices, and receives the at least one fail signal from the control circuit. The motor drive device according to claim 12, wherein the motor drive device corresponding to the device is shut off upon receipt of the cutoff permission signal. The n motor generators include first and second motor generators,
The n driving devices are:
A first inverter for driving the first motor generator;
A second inverter for driving the second motor generator,
The n cutoff circuits are:
A first cutoff signal is generated by calculating a logical product of the fail signal from the second inverter and the first cutoff permission signal from the control circuit, provided corresponding to the first inverter. A first AND element that outputs the generated first cutoff signal to the first inverter;
A second cutoff signal is generated by calculating a logical product of the fail signal from the first inverter and a second cutoff permission signal from the control circuit, provided corresponding to the second inverter. And a second AND element that outputs the generated second cutoff signal to the second inverter,
When the first motor generator is driven in the regenerative mode and the second motor generator is driven in the power running mode, the control circuit is configured so that the power consumption in the second motor generator The motor driving device according to claim 13, wherein when it becomes larger than a threshold value, the second cutoff permission signal is generated and output to the second AND element.   The motor driving device according to claim 14, wherein the second motor generator has a capacity larger than that of the first motor generator. The first motor generator drives an internal combustion engine mounted on a vehicle, generates electric power by power from the internal combustion engine,
The motor driving device according to claim 14 or 15, wherein the second motor generator drives driving wheels of the vehicle.   The motor driving device according to any one of claims 1 to 16, wherein the predetermined time is a time when an overcurrent flows through a semiconductor element constituting the driving device.

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