JP2005124241A - Reencoding apparatus and method, decoding apparatus and method, encoding apparatus and method, and transmission apparatus and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To conduct the repetition of a codec process keeping the quality thereof. <P>SOLUTION: A phase information detecting circuit 11 detects phase information showing a phase relation of an intraframe and an interframe of image data from output image data. A control circuit 12 controls the changeover of switches 14, 23, and 26 according to the phase information. A subtractor 13 subtracts a motion compensation MC component from the image data and supplies it to the switch 14. The switch 14 switches the image data and a subtractive output according to the control of the control circuit and supplies it to a DTC circuit 15. The DTC circuit 15 conducts the discrete cosine transform of a changeover output of the switch 14. A quantization circuit 16 reduces a code quantity by expressing a DTC conversion output by a small value. A variable length encoding circuit 17 further reduces the code quantity of the output of the quantization circuit 16. An ECC encoder 18 conducts an ECC process to this variable length encoding output. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a digital signal transmission, reception, and transmission / reception apparatus that transmits, receives, and transmits / receives a digital signal accompanied by data compression / decompression.

  Generally, there is a large amount of image data. If this data is transmitted as it is, a wide band is required, and if it is stored, a large storage capacity is required. In particular, since the amount of moving image data is enormous, a large transmission bandwidth and storage capacity are required. For this reason, in recent years, compression of image data, that is, a digital image encoding technique has been considered.

  For compression of moving image data, an encoding technique standardized by MPEG (abbreviation of Moving Picture Expert Group) of the international standard conference for moving image encoding of storage media is used. This encoding technique will be described below simply as MPEG. This MPEG consists of technologies such as discrete cosine transform DCT (Discrete Cosine Transform), motion compensation MC (Motion Compensation), and B picture.

  MPEG is an I picture that is a frame encoded within a frame (intra-frame), a P picture that is encoded using a past frame in the forward direction, and a bidirectional frame between the past and the future. A coded frame is composed of B pictures that are coded using. Here, the P picture and the B picture are frames encoded between frames (inter-frame).

In such encoding, an input image is divided into N × N macroblocks, a motion vector is prepared for each block, and a difference between the motion vector and the input image is encoded. Encoding make a difference by shifting the motion vector V _M content as shown FIG. 12 of (A) a (m-1) I-picture which is earlier reproduced image frame (predictive picture) in FIG. 12 (B) .

  Here, when a codec consisting of an encoder and a decoder is continuously performed, for example, when dubbing is repeated with a digital video tape recorder, for example, between a B picture encoded between frames and an I picture encoded within a frame. If the phase relationship is the same in the previous stage and the next stage, the image quality does not deteriorate even if the number of codecs overlaps. In other words, in the connection between digital video equipment that realizes data compression in the form of mixed interframe and intraframe, in the case of a closed system that delivers data in a data format specific to the equipment that has been compressed and encoded, If these phase information is recorded and transmitted in a header or the like, the image quality is not deteriorated even if the number of codecs overlaps.

Japanese Patent No. 3163830 Japanese Patent No. 3307379 Japanese Patent No. 3164110

  Recently, for connection of digital video equipment, it has become a standard to interface video data using a serial digital interface (referred to as SDI). For this reason, in a connection between video devices that compress data of video signals in a mixed inter-frame and intra-frame format, CCIR.com, which is a so-called 4: 2: 2 component encoding system, is generated from compressed video data interfaced by SDI. Considering the case where the codec is repeated in the format of the existing video format such as Rec601, the method for transmitting the phase information as described above is not used, so the phase is not discontinuous by connection and editing. Image quality degradation occurred each time the codec was repeated. That is, for example, when the phase of an inter frame and an intra frame alternates for a video signal interfaced by SDI, image quality degradation that cannot be ignored occurs unless there is a method for transmitting the phase information. I was doing it.

  The present invention has been made in view of the above circumstances, and transmits phase information indicating a phase relationship between an inter frame and an intra frame of the video data together with a decoded signal of the interfaced video data. An object of the present invention is to provide a digital signal transmitting apparatus that does not impair the deterioration of image quality.

  In addition, the present invention has been made in view of the above circumstances, and receives interfaced decoded video data and the phase relationship between interframes and intraframes of the video data, and impairs image quality degradation during codec. An object of the present invention is to provide a digital signal receiving apparatus that does not.

  Another object of the present invention is to provide a digital signal transmission / reception apparatus that does not impair image quality degradation during codec.

  The digital signal transmitting apparatus according to the present invention transmits phase information indicating a phase relationship between an intra-frame decoded signal and an inter-frame decoded signal in a grouped block together with each decoded signal in the block. Solve the above problems.

  In this case, the phase information may be information indicating the distance between the intra-frame decoded signal and the inter-frame decoded signal or the distance between the intra-frame decoded signals.

  Further, the digital signal receiving apparatus according to the present invention detects phase information indicating a phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block, and the intra-block internal signal is detected according to the phase information. The above-mentioned problem is solved by obtaining an intra-frame encoded signal and an inter-frame encoded signal so as to be in the same order as the order of each decoded signal.

  In this case, the phase information may be information indicating the distance between the intra-frame decoded signal and the inter-frame decoded signal or the distance between the intra-frame decoded signals.

  In addition, the digital signal transmitting / receiving apparatus according to the present invention detects phase information of the intra-frame decoded signal and the inter-frame decoded signal in the grouped block, and the intra-block decoded signal is detected according to the phase information. An intra-frame encoded signal and an inter-frame decoded signal are obtained in the same order as the order, the intra-frame encoded signal and the inter-frame encoded signal are decoded, and the intra-frame decoded signal and the inter-frame decoded signal are decoded. The above-mentioned problem is solved by transmitting in block units grouped together with the phase information.

  In this case, the phase information may be information indicating the distance between the intra-frame decoded signal and the inter-frame decoded signal or the distance between the intra-frame decoded signals.

  If the intra-frame decoded signal and the inter-frame decoded signal in the grouped block are transmitted together with the phase information indicating these phase relationships, the receiving side performs the intra-block decoding based on the phase information. Intraframe encoded signals and interframe encoded signals can be obtained in the same order as the signal order. For this reason, digital signal transmission, reception, and transmission / reception devices do not impair image quality degradation during codec.

  The digital signal transmitting apparatus according to the present invention transmits phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block together with each decoded signal in the block. Does not impair image quality degradation during codec.

  The digital signal receiving apparatus according to the present invention detects phase information indicating a phase relationship between an intra-frame decoded signal and an inter-frame decoded signal in a grouped block, and each of the blocks in the block according to the phase information. Since the intra-frame encoded signal and the inter-frame encoded signal are obtained in the same order as the order of the decoded signals, the deterioration of the image quality is not impaired during the codec.

  The digital signal transmitting / receiving apparatus according to the present invention detects the phase information of the intra-frame decoded signal and the inter-frame decoded signal in the grouped block, and determines the order of the intra-block decoded signal according to the phase information. The intra-frame encoded signal and the inter-frame decoded signal are obtained in the same order, the intra-frame encoded signal and the inter-frame encoded signal are decoded, and the phases of the intra-frame decoded signal and the inter-frame decoded signal are decoded. Since transmission is performed in units of blocks grouped together with information, it is possible to repeat codec processing while maintaining quality, without impairing image quality degradation during codec processing.

  Embodiments of a digital signal transmission, reception and transmission / reception apparatus according to the present invention will be described below. This embodiment is a digital video data transmission / reception apparatus that transmits / receives digital video data compressed by an encoding technique standardized by MPEG (abbreviation of Moving Picture Expert Group) of an international standard conference for moving image encoding of storage media.

  This digital video data transmission / reception apparatus includes an I picture that is a frame encoded within an intra-frame, a P picture that is encoded using a past frame in the forward direction, a past and a future. Digital video data is transmitted / received using an encoded frame composed of B pictures encoded using bidirectional frames. In particular, the I picture is obtained by transform coding by discrete cosine transform DCT (Discrete Cosine Transform), and the B picture is obtained by motion compensation MC (Motion Compensation) + predictive coding by DCT + transform coding.

  This digital video data transmission / reception apparatus includes the encoder 10 shown in FIG. 1 and the decoder 30 shown in FIG. 2, and the encoder 10 and the decoder 30 perform codec processing of encoding processing and decoding processing. Here, the encoder 10 corresponds to a receiving device, detects phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block, and the block is in accordance with the phase information. An intra-frame encoded signal and an inter-frame encoded signal are obtained in the same order as the order of each decoded signal. The decoder 30 corresponds to a transmission device, and transmits phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block together with each decoded signal in the block. .

  In the following description, the digital video data transmitting / receiving apparatus is described as being connected in multiple stages using a serial digital interface (referred to as SDI).

  First, video input interfaced by SDI is supplied to the encoder 10. This video input is video data decoded by the decoder of the preceding digital video data transmitting / receiving apparatus. The encoder of the digital video data transmitting / receiving apparatus in the previous stage outputs I picture, P picture, and B picture as encoded data. Here, the I picture, the P picture, and the B picture are arranged in a predetermined order, and constitute a group of pictures (GOP) that is a unit for encoding video data. On the other hand, the decoder decodes a GOP composed of an I picture, a P picture, and a B picture.

  Then, the encoder 10 of the succeeding digital video data transmitting / receiving device connected to the preceding digital video data transmitting / receiving device via the SDI again performs the GOP consisting of the I picture, P picture, and B picture decoded by the preceding decoder. Encoding process.

  The video data is supplied to the phase information detection circuit 11, the subtracter 13 and the selected terminal b of the switch 14. The phase information detection circuit 11 detects later-described phase information indicating the phase relationship between the intra frame and the inter frame of the video data from the video data. The phase information detected by the phase information detection circuit 11 is supplied to the control circuit 12. The control circuit 12 controls switching of the switches 14, 23 and 26 in accordance with the phase information.

  The subtracter 13 subtracts a motion compensation MC (Motion Compensation) component, which will be described later, from the video data, and supplies it to the selected terminal c of the switch 14. The switch 14 switches the video data supplied to the selected terminal b and the subtraction output supplied to the selected terminal c at the selection terminal a according to the control of the control circuit 12 and supplies it to the DCT circuit 15.

  The DCT circuit 15 performs a discrete cosine transform on the switching output of the switch 14, thereby reducing the code amount depending on how the image in the frame changes, and supplies the DCT conversion output to the quantization circuit 16. The quantization circuit 16 reduces the code amount by expressing the DCT conversion output with a small value, and supplies the quantized output as the output to the variable length encoding circuit 17 and the inverse quantization circuit 19.

  In order to further reduce the amount of code reduced by the quantization circuit 16, the variable length encoding circuit 17 assigns a short code to a code having a high appearance degree, and further reduces the code amount as a whole. The variable length encoded output of the variable length encoding circuit 17 is supplied to the ECC encoder 18 and subjected to error correction processing to become the encoded output of the encoder 10.

  On the other hand, the inverse quantization circuit 19 inversely quantizes the quantized output whose code amount has been reduced by the quantization circuit 16 and supplies the inverse quantized output to an inverse DCT (shown as IDCT in the figure) circuit 20. To do. The inverse DCT circuit 20 performs inverse discrete cosine transform on the inverse quantization output and supplies the inverse DCT output to the adder 21.

  The adder 21 adds the MC component to the inverse DCT output via the switch 22 and supplies it to the selection terminal a of the switch 23. When the switch 23 switches the selection terminal a to the selected terminal b under the control of the control circuit 12, the addition output of the adder 21 is supplied to the frame memory 24.

  The frame memory 24 stores the addition output of the adder 21 for one frame. The stored data for one frame in the frame memory 24 is used for the backward predicted motion compensation process in the backward predicted motion compensation circuit 25. The backward predicted motion compensation circuit 25 performs backward motion compensation processing on the stored data for one frame and supplies the backward motion compensation output to the selected terminal b of the switch 26. The stored data for one frame stored in the frame memory 24 is further stored in the frame memory 28. The stored data stored in the frame memory 28 is delayed by a total of two frames and supplied to the forward prediction motion compensation circuit 27. The forward prediction motion compensation circuit 27 performs forward motion compensation processing on the delayed output delayed by two frames, and supplies the forward motion compensation output to the selected terminal c of the switch 26.

  The switch 26 supplies the motion compensation signal based on the backward prediction or the motion compensation signal based on the forward prediction to the subtractor 13 by switching the selection terminal a to the selected terminal b or the selected terminal c under the control of the control circuit 12.

  For example, if it is determined that the video data input to the encoder 10 is a decoded I picture, the encoder 10 does not take the difference and the DCT circuit 15, the quantization circuit 16, and the variable length encoding 17. And the decoded I picture is encoded via the ECC encoder 18.

  Also, for example, if the video data input to the encoder 10 is found to be a decoded P picture, the encoder 10 inputs time as an estimated image (an image serving as a reference for obtaining a difference). In other words, the P picture is encoded again using the I picture or the P picture that has been previously positioned and has been decoded.

  Further, for example, if it is found that the video data input to the encoder 10 is a decoded B picture, the encoder 10 is positioned in front as a predicted image and is already decoded. The B picture is encoded again using three kinds of pictures or P pictures, an already decoded I picture or P picture located behind in time, and an interpolated image made from both.

  Here, the phase information detection circuit 11 detects phase information added during the decoding process of the preceding decoder. This phase information may be a signal indicating, for example, where the I picture, P picture, and B picture are arranged in the GOP. That is, this phase information is information indicating how the GOP is configured. For example, as the phase information, the distance between the I picture and the P picture or the distance between the P picture and the P picture (indicated by how many frames are separated in units of one frame) M and the distance N between the I picture and the I picture are: Conceivable. For example, the GOP shown in FIG. 3A is M = 3 and N = 9, and the GOP shown in FIG. 3B is M = 2 and N = 2. For example, the phase information may be a signal indicating how the GOP is divided. Furthermore, the phase information may be a signal indicating that each of the frames is an I picture, a P picture, and a B picture.

  Since this phase information is for preventing deterioration of the video signal, it is necessary to be positioned before the active video of the even-numbered line and the odd-numbered line. For this reason, this phase information must be inserted into vertical blanking that is at least approximately equal to digital field blanking. Furthermore, it is necessary to place this phase information after the video switching point. Therefore, this phase information is shown in FIG. 4B, for example, in an auxiliary (Ancillary, hereinafter referred to as ANC) area in the vertical blanking of even and odd lines as shown in FIG. It is preferably written in the DID area. Here, DID is a data ID. The ANC area is an auxiliary data area provided between the EAV and the SAV. EAV stands for End of Active Video, and SAV stands for Start of Active Video. The ADF area is an ANC data flag recording area. The DBN area is an area where the unit number of ANC data is recorded. The DC area is an area indicating the number of words of ANC data. The ANC data area can record up to 255 words of ANC data. The CS area before SAV is an area in which a checksum of DID to ANC data is indicated.

  When the phase information detection circuit 11 detects the phase information, the control circuit 12 controls switching of the switches 14, 23 and 26 based on the phase information, and a decoding process in the decoder of the preceding digital video data transmitting / receiving apparatus. It is possible to cause the encoder 10 to perform an encoding process synchronized with the encoder 10.

  Next, the encoded input of the I picture, P picture and B picture encoded by the encoder 10 is supplied to the decoder 30 of the digital video data transmitting / receiving apparatus.

  In FIG. 2, the ECC decoder 32 constituting the transform decoding system 31 performs error correction processing on the supplied encoded input, and outputs the ECC decoded output to the variable length decoding circuit 33, the control circuit 38 and the SDI encoder 37. Supply. The variable length decoding circuit 33 performs variable length decoding processing on the ECC decoder output, and supplies the decoded output to the inverse quantization circuit 34. The inverse quantization circuit 34 performs inverse quantization processing on the decoded output and supplies the inverse quantization output to the inverse DCT circuit 35. The inverse DCT circuit 35 performs inverse DCT processing on the inverse quantization output and supplies the inverse DCT output to the selected terminal b of the switch 36 and the adder 39.

  The adder 39 adds a motion compensation MC component described later to the inverse DCT output of the inverse DCT circuit 35 and supplies the addition output to the selected terminal c of the switch 36. The switch 36 switches the reverse DCT output supplied to the selected terminal b and the addition output supplied to the selected terminal c at the selection terminal a under the control of the control circuit 38 to switch the SDI encoder 37 and the frame memory. 42.

  The SDI encoder 37 encodes the output of the switch 36 for the serial digital interface in accordance with the ECC decode output supplied from the ECC decoder 32, and outputs the decoded video data. At this time, the SDI encoder 37 adds the phase information to the video data as described with reference to FIG.

  The frame memory 42 stores the switching output of the switch 36 for one frame. The stored data for one frame in the frame memory 42 is used for the forward prediction motion compensation processing in the forward prediction motion compensation circuit 41. The forward prediction motion compensation circuit 41 performs forward motion compensation processing on the stored data for one frame, and supplies the forward motion compensation output to the selected terminal b of the switch 40. The stored data stored in the frame memory 42 is further stored in the frame memory 43. The stored data stored in the frame memory 43 is delayed by a total of two frames and supplied to the backward predicted motion compensation circuit 44. The backward motion compensation circuit 44 performs backward motion compensation on the delayed output delayed by two frames, and supplies the backward motion compensation output to the selected terminal c of the switch 40.

  The switch 40 supplies the adder 39 with a motion compensation signal based on forward prediction or a motion compensation signal based on backward prediction by switching the selection terminal a to the selected terminal b or the selected terminal c under the control of the control circuit 38.

  Hereinafter, an encoding process and a decoding process performed by the digital video data transmitting / receiving apparatus according to the phase information will be described. The encoder 10 of this digital video data transmitter / receiver detects the phase information inserted into the ANC area by the SDI encoder of the decoder of the preceding digital video data transmitter / receiver by the phase information detection circuit 11, and according to the detected phase information. The reason for encoding the intra frame and the inter frame is to advance the process without destroying the relationship between the process related to the intra frame and the process related to the inter frame of the preceding digital video data transmitting / receiving apparatus, that is, without destroying the GOP.

  If the codec processing is advanced without damaging the GOP in the above-described relationship, that is, the preceding digital video data transmitting / receiving device and the succeeding digital video data device, the signal deterioration in the second and subsequent codec processing except the first time is eliminated. For example, consider a case where digital video data transmitting / receiving devices are connected as shown in FIG. In FIG. 5, digital video data transmission / reception devices 51, 59, and 64 maintain the phase relationship between an I picture that is an intra-frame encoded image and a B picture that is an inter-frame encoded image within each device. Codec processing is in progress. Here, the I picture is obtained by DCT transform coding, and the B picture is obtained by MC + DCT transform coding. Also, forward prediction is made when the difference is taken in the temporal motion compensation frame in the temporal direction, backward prediction is made when the difference is taken in the temporal motion compensation frame in the temporal direction, and bidirectional prediction is made when both are taken. That's it.

  When the digital video data transmission / reception devices 51, 59, and 64 generate a differential signal of a prediction code, a transform coding circuit (hereinafter referred to as a DCT-Q-IDCT circuit) indicated as DCT-Q-IDCT in each figure in each device. The I picture that is the image after the transform coding process in (1) is used. Such a case is assumed to have a local decoder. In each digital video data transmitter / receiver 51, 59 and 64, since three frames are completed, the frame arrangement is IBI. That is, a B picture is made with three frames.

For example, the input video signal f ₀ is supplied to the digital video data transmitter / receiver 51. The input video signal f ₀ is originally are supplied to the digital video data transceiver 51 in one SDI interface, will be described here with reference to convenience three lines of description. These three lines are used to simultaneously indicate frame images that are input with a time shift. Of these three lines, the first input video signal (first input data in the case of a serial interface) is assumed to be f ₀ (1), and hereinafter referred to as f ₀ (2) and f ₀ (3). . Similarly, the output of the digital video data transmitter / receiver 51 (the input of the digital video data transmitter / receiver 59, but hereinafter the output of the digital video data transmitter / receiver connected in the previous stage) is f ₁ (1), f ₁ (2) and f ₁ (3), the output of the digital video data transmitter / receiver 59 is f ₂ (1), f ₂ (2) and f ₂ (3), and the output of the digital transmitter / receiver 64 is f ₃ (1). , F ₃ (2) and f ₃ (3).

  Also, for example, inside the digital video data transmitter / receiver 51, codec processing is performed by an encoder and a decoder, respectively, but a DCT-Q-IDCT circuit 52, a DCT-Q-IDCT circuit 55, and a DCT-Q-IDCT circuit. Each of the 58 re-quantization circuits Q is a part that separates the encoding process and the decoding process. The quantization step of the re-quantization circuit Q and the output rounding of the IDCT circuit distort the signal and cause image distortion.

  However, in the DCT-Q-IDCT circuit that is a transform coding circuit, signal distortion does not always occur. When the transform is simply repeated, the first time if the calculation accuracy satisfying the target accuracy is given to this system. There is no signal degradation in the second and subsequent codec processes except for.

For example, codec processing inside the digital video data transmitting / receiving apparatus 51 is considered. First, motion-compensated (referred to as MC in the figure) circuits 53 and 57 perform motion compensation on conversion outputs obtained by transforming input video signals f ₀ (1) and f ₀ (3) by DCT-Q-IDCT circuits 52 and 58. The two MC outputs are subtracted from the input video signal f ₀ (2) by the subtractor 54. Next, the subtraction output of the subtracter 54 is transform-coded by the DCT-Q-IDCT circuit 55. Then, the two MC outputs of the MC circuits 53 and 57 are added to the converted output of the DCT-Q-IDCT circuit 55 by the adder 56. Then, the adder 56 outputs a B picture. That is, the digital video data transmitter / receiver 51 outputs a B picture as the decoded output f ₁ (2). Here, the decoded outputs f ₁ (1) and f ₁ (3) are signals generated by the requantization unit Q and the IDCT unit in the DCT-Q-IDCT circuits 52 and 58 that perform the first transform coding process. The I picture is distorted.

  Here, when the I picture is simply repeated, signal degradation does not occur after the second time, so the outputs of the MC circuits 60 and 61 of the digital video data transmitter / receiver 59 are not changed. Therefore, the first conversion output of the DCT-Q-IDCT circuit 55 and the subtraction output of the subtractor 62 obtained by subtracting the MC output from the image obtained by restoring the B picture are the same. Since this becomes an input to the DCT-Q-IDCT circuit 63, the B picture also has no signal deterioration after the second time.

  Next, consider the case where the digital video data transmitting / receiving apparatus is connected as shown in FIG. Also in FIG. 6, the digital video data transmitting / receiving apparatuses 71, 81, and 86 protect the phase relationship between an I picture that is an intra-frame encoded image and a B picture that is an inter-frame encoded image within each apparatus. While proceeding with codec processing. In addition, when the digital video data transmitting / receiving apparatuses 71, 81, and 86 generate the difference signal of the prediction code, the difference of the prediction encoding is generated by the input signal before transform encoding in each apparatus. Such a case is assumed to have no local decoder.

For example, codec processing inside the digital video data transmitting / receiving apparatus 71 is considered. First, before supplying the input video signals f ₀ (1) and f ₀ (3) to the DCT-Q-IDCT circuits 72 and 80, motion compensation is performed by the MC circuits 73 and 78, and the two MC outputs are input to the input video signal. Subtracter 75 subtracts from f ₀ (2). Next, the subtracted output of the subtracter 75 is transform-coded by the DCT-Q-IDCT circuit 76. The two MC outputs of the MC circuits 74 and 79 are added to the converted output of the DCT-Q-IDCT circuit 76 by an adder 77. Then, the adder 77 outputs a B picture. Here, the MC circuits 74 and 79 MC compensate the conversion outputs of the DCT-Q-IDCT circuits 72 and 80. That is, the digital video data transmitter / receiver 71 outputs a B picture as the decoded output f ₁ (2). Here, the decoded outputs f ₁ (1) and f ₁ (3) are signals generated by the requantization unit Q and the IDCT unit in the DCT-Q-IDCT circuits 72 and 80 that perform the first transform coding process. The I picture is distorted.

  Here, when the I picture is simply repeated, signal degradation does not occur after the second time, so the outputs of the MC circuits 82 and 83 of the digital video data transmitter / receiver 81 are not changed, and the MC circuit 74 And 79 outputs. Accordingly, since the same one is subtracted from the B picture which is the decoded output f1 (2) by the subtractor 84, the conversion output of the DCT-Q-IDCT circuit 76 and the conversion output of the DCT-Q-IDCT circuit 85 are Will be equal. Therefore, the condition is the same as the condition for no deterioration of the I picture. In this case, the B picture does not cause the second and subsequent deteriorations.

  For example, in the case where the local decoder shown in FIG. 5 is provided, when the codec is repeated in a state where the phase of the IBI in the GOP is not broken, as shown in FIG. No signal degradation occurs. In FIG. 7, the scale of signal degradation is indicated by S / N indicated on the vertical axis. The horizontal axis indicates the number of codecs. However, as shown in FIG. 7, the S / N is constant when the orthogonal transformer including the quantizer is designed to satisfy the output accuracy. Other than that, it falls slowly to the right depending on the calculation accuracy.

  In the following, a case where the I picture and the B picture alternate will be described on the assumption that the phase in the GOP is lost for each codec process.

  For example, consider the case shown in FIG. 8, that is, the case where the digital video data transmission / reception devices 91, 92, 93 and 94 are connected via the SDI interface and the codec processing is repeated.

An input video signal f ₀ is supplied to the digital video data transmitter / receiver 91. The input video signal f ₀ is originally supplied to the digital video data transmitter / receiver 91 through one SDI interface. Here, for convenience of explanation, description will be made using five lines. These five lines are used to simultaneously indicate frame images that are input with a time shift. The input video signal of the first of these five lines (the first input data in the case of a serial interface) is f ₀ (1), and hereinafter, f ₀ (2), f ₀ (3), f Let ₀ (4) and f ₀ (5). Similarly, the output of the digital video data transmitter / receiver 91 (the input of the digital video data transmitter / receiver 92, but hereinafter the output of the digital video data transmitter / receiver connected in the previous stage) is f ₁ (1), f ₁ (2), f ₁ (3), f ₁ (4), and f ₁ (5). Similarly, the outputs of the digital video data transmitter / receiver 92 are assumed to be f ₂ (1), f ₂ (2), f ₂ (3), f ₂ (4) and f ₂ (5). The outputs of the digital video data transmitter / receiver 93 are assumed to be f ₃ (1), f ₃ (2), f ₃ (3), f ₃ (4), and f ₃ (5). Similarly, the outputs of the digital video data transmitter / receiver 94 are assumed to be f ₄ (1), f ₄ (2), f ₄ (3), f ₄ (4) and f ₄ (5). FIG. 8 shows a case where a local decoder is provided.

  In the case shown in FIG. 8, between each digital video data transmitting / receiving apparatus, the phase relationship between an I picture encoded by an intra frame and a B picture or a P picture encoded by an inter frame is set for each codec process. Since they are alternated, the relationship as shown in FIG. 5 is not established, and signal degradation occurs as shown in the characteristic diagram of FIG. 9 each time the number of codec processes is repeated. In FIG. 9, the state of signal degradation is shown as a change in S / N.

  FIG. 10 shows connections assuming a case where the phase relationship between the digital video data transmission / reception devices 95, 96, 97, and 98 is lost when there is no local decoder.

  Even in this case, in each digital video data transmitting / receiving apparatus, the phase relationship between the I picture encoded by the intra frame and the B picture or P picture encoded by the inter frame is alternated for each codec process. The relationship as shown in FIG. 5 is not established, and signal degradation occurs as shown in the characteristic diagram of FIG. 11 every time the number of codec processes is repeated.

  As described above, in order to suppress the occurrence of image quality deterioration due to the alternating phase relationship of the I picture, P picture, and B picture in the GOP for each codec process, the digital video data transmitting / receiving apparatus according to the embodiment of the present invention is described above. Thus, the phase information is detected by the phase information detection circuit 11, and the control circuit 12 controls the switches 14, 23 and 26 in accordance with the detected phase information to perform codec processing.

  The digital signal transmission, reception, and transmission / reception apparatus according to the present invention is not limited to the above-described embodiment, and may be applied to a transmission / reception apparatus that performs codec processing that repeats other video compression / decoding, for example.

  Further, since the phase information provides spare information as, for example, ANC data, if the type of codec is different between devices, it may be ignored or partially used.

  According to the embodiment of the digital signal transmitting apparatus according to the present invention, the phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block is obtained from each decoding in the block. Since it is transmitted together with the signal, the deterioration of the image quality is not impaired during the codec.

  According to the embodiment of the digital signal receiving apparatus of the present invention, phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block is detected, and the phase information is Thus, since the intra-frame encoded signal and the inter-frame encoded signal are obtained in the same order as the order of the decoded signals in the block, the deterioration of the image quality is not impaired during the codec.

  According to the embodiment of the digital signal transmitting / receiving apparatus of the present invention, the phase information of the intra-frame decoded signal and the inter-frame decoded signal in the grouped block is detected, and the intra-block decoded signal is detected according to the phase information. An intra-frame encoded signal and an inter-frame decoded signal are obtained in the same order as the order of the decoded signal, and the intra-frame encoded signal and the inter-frame encoded signal are decoded, and the intra-frame decoded signal and the frame are decoded. Since transmission is performed in units of blocks grouped together with the phase information of the inter-decoded signal, it is possible to repeat codec processing while maintaining quality, without impairing image quality degradation during codec processing.

It is a block diagram which shows schematic structure of the encoding side of the digital video data transmitter / receiver of the Example of this invention. It is a block diagram which shows schematic structure on the decoding side of the digital video data transmitter / receiver of the Example of this invention. It is a figure for demonstrating phase information. It is a figure for demonstrating the insertion place of phase information. It is a figure for demonstrating operation | movement of the digital video data transmitter / receiver in the case of having a local decoder. It is a figure for demonstrating operation | movement of the digital video data transmitter / receiver in the case of no local decoder. FIG. 10 is a characteristic diagram for showing that image quality does not deteriorate in the second and subsequent codecs in the digital video data transmitting / receiving apparatus. It is a figure for demonstrating operation | movement of the conventional digital video data transmitter / receiver in case with a local decoder. FIG. 9 is a characteristic diagram for illustrating image quality degradation in a codec of the conventional digital video data transmitting / receiving apparatus described with reference to FIG. 8. It is a figure for demonstrating operation | movement of the conventional digital video data transmitter / receiver in the case of no local decoder. FIG. 11 is a characteristic diagram illustrating image quality degradation in a codec of the conventional digital video data transmitting / receiving apparatus described with reference to FIG. 10. It is a figure for demonstrating the encoding process by MPEG.

Explanation of symbols

  11 phase information detection circuit, 12 control circuit, 15 discrete cosine transform circuit, 16 quantization circuit, 17 variable length coding circuit, 18 error correction processing circuit, 19 inverse quantization circuit, 20 inverse DCT circuit, 24, 28 frame memory 25 backward prediction motion compensation circuit, 27 forward prediction motion compensation circuit

Claims (6)

  A digital signal transmitting apparatus for transmitting phase information indicating a phase relationship between an intra-frame decoded signal and an inter-frame decoded signal in a grouped block together with each decoded signal in the block.   2. The digital signal transmitting apparatus according to claim 1, wherein the phase information is information indicating a distance between an intra-frame decoded signal and an inter-frame decoded signal or a distance between intra-frame decoded signals.   Phase information indicating the phase relationship between the intra-frame decoded signal and the inter-frame decoded signal in the grouped block is detected, and the same order as the order of each decoded signal in the block is detected according to the phase information. Thus, a digital signal receiving apparatus characterized in that an intra-frame encoded signal and an inter-frame encoded signal are obtained.   4. The digital signal receiving apparatus according to claim 3, wherein the phase information is information indicating a distance between an intra-frame decoded signal and an inter-frame decoded signal or a distance between intra-frame decoded signals.   Detect phase information of intra-frame decoded signal and inter-frame decoded signal in the grouped block, and intra-frame encoding so that the same order as the order of the intra-block decoded signal according to the phase information Obtains a signal and an inter-frame encoded signal, decodes the intra-frame encoded signal and the inter-frame encoded signal, and transmits them in block units grouped together with phase information of the intra-frame decoded signal and the inter-frame decoded signal. A digital signal transmitting / receiving apparatus. 6. The digital signal transmitting / receiving apparatus according to claim 5, wherein the phase information is information indicating a distance between an intra-frame decoded signal and an inter-frame decoded signal or a distance between intra-frame decoded signals.

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