JP2005116940A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device equipped with a ferroelectric capacitor having a stereoscopic structure capable of effectively utilizing a curved surface region. <P>SOLUTION: The ferroelectric capacitor used for the semiconductor device such as a memory comprises a first electrode 15 in which a section vertical to a substrate is formed in a projected or recessed shape; a capacity insulating film 17 that is formed on the first electrode 15 and made of a ferroelectric; and a second electrode 19 provided on the capacity insulating film 17. The thickness of the capacity insulating film 17 becomes 35% or less of a smaller radius of curvature in the radius of curvature of the first electrode 15 and that of the second one 19 in the section vertical to the substrate of the ferroelectric capacitor, thus reducing the difference of the strength of an electric field applied to the capacity insulating film 17 in operation as compared with a conventional one. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device having a ferroelectric capacitor, and more particularly to a semiconductor device having a ferroelectric capacitor including a concave portion or a convex portion.

  A ferroelectric memory is a non-volatile memory that can be rewritten at high speed using high-speed polarization reversal and remanent polarization of a ferroelectric thin film. As a typical ferroelectric memory, there is a memory having a so-called 1T (transistor) 1C (capacitor) configuration in which a DRAM capacitor is replaced with a ferroelectric capacitor.

  In this type of ferroelectric memory, data is held in accordance with the charge held in the capacitor. The MISFET connected to the capacitor is turned on when data is written and read, and is turned off when data is held.

  Of the conventional ferroelectric memory, a ferroelectric capacitor will be described below.

  FIG. 9 is a cross-sectional view schematically showing a conventional ferroelectric capacitor. As shown in the figure, a conventional ferroelectric capacitor is provided on a lower electrode 103 provided on a substrate 101, a ferroelectric layer 105 provided on the lower electrode 103, and a ferroelectric layer 105. The upper electrode 107 is provided. In such a capacitor, the polarization state of the ferroelectric layer 105 is changed by applying a voltage between the upper electrode 107 and the lower electrode 103 so that an electric field higher than the coercive electric field is applied to the ferroelectric layer 105. Can be made.

  Incidentally, in recent years, the miniaturization of the ferroelectric memory has progressed, and accordingly, the cell area has also been reduced. However, a planar capacitor as shown in FIG. 9 requires a large area in order to ensure a necessary capacity. For this reason, in recent years, capacitors are often made into a three-dimensional structure such as a trench type.

  FIG. 10A is a vertical sectional view showing an example of a conventional semiconductor memory device having a ferroelectric capacitor having a three-dimensional structure, and FIG. 10B is an XIb− of the conventional semiconductor memory device shown in FIG. It is a horizontal sectional view in the XIb line. This semiconductor memory device is described in Patent Document 2.

  Each memory cell of the conventional semiconductor memory device shown in FIGS. 10A and 10B includes a Si (silicon) substrate 141, a poly Si layer 140 provided on the Si substrate 141, and a poly Si layer 140. A first interlayer insulating film provided, a ferroelectric capacitor Cap provided in a trench formed in the first interlayer insulating film, and a second provided on the first interlayer insulating film. An interlayer insulating film 121, a semiconductor layer 111 provided on the second interlayer insulating film 121, and a control MISFET including a part of the semiconductor layer 111 and provided on the second interlayer insulating film 121. I have.

  The ferroelectric capacitor Cap includes a first electrode 133 that covers a trench formed in the first interlayer insulating film 124, a ferroelectric layer 132 provided on the first electrode 133, and a ferroelectric layer. And a columnar second electrode 131 provided on 132.

  The control MISFET is provided on the semiconductor layer 111 with a gate insulating film (not shown) sandwiched between the source 112 connected to the second electrode 131, the drain 113 connected to the bit line 152, and the semiconductor layer 111. A gate electrode 151.

  As described above, since the ferroelectric capacitor has a three-dimensional structure, it is possible to reduce the cell area while securing the capacity.

  In the conventional semiconductor memory device, a write voltage is applied between the first electrode 133 and the second electrode 131 via a control MISFET (not shown) when writing data. At this time, when an electric field higher than the coercive electric field is applied to the ferroelectric layer 132, the polarization state of the ferroelectric layer 132 changes, and the data is rewritten.

  When reading data, the control MISFET is turned on to detect the current flowing through the bit line 152. Since the current flowing from the memory cell varies depending on the polarization state of the ferroelectric layer 132, the retained data can be read by detecting the current flowing through the bit line 152.

In the conventional semiconductor memory device, the thicknesses of the first electrode 133, the ferroelectric layer 132, and the second electrode 131 are about 200 nm, 150 nm, and 200 nm in all portions. The thickness of the ferroelectric layer 132 is set to a value at which the flat portion of the ferroelectric layer 132 can reverse the polarization with respect to the write voltage.
JP-A-8-139293 JP-A-10-56148

  However, when the miniaturization is further advanced, it is difficult to realize the theoretically expected operation performance in the semiconductor memory device described above. For example, even when an operating voltage as set is applied to a conventional semiconductor memory device, data reading and writing may not be performed as expected.

  Therefore, the inventors of the present application tried to investigate the reason why the conventional semiconductor memory device cannot operate as designed. As a result of various experiments, it has been found that the cause of the failure is the ferroelectric capacitor. Next, they investigated the polarization state by changing the shape of the capacitor and the thickness of the ferroelectric layer. As a result, in a conventional ferroelectric capacitor having a three-dimensional structure, a part of the ferroelectric layer may not be in a desired polarization state, particularly when the thickness of the ferroelectric layer in a curved region exceeds a predetermined value. I understood. In this specification, the “curved region” means at least the upper surface of the first electrode 15 (the surface closer to the capacitor insulating film 17), the upper and lower surfaces of the capacitor insulating film 17, and the second electrode 19. The lower surface (the surface closer to the capacitor insulating film 17) is a curved surface.

  In the conventional ferroelectric capacitor, the corner portions 160 and 162 in the vertical cross section shown in FIG. 10A and the corner portion 164 in the horizontal cross section shown in FIG. It has become. Therefore, in the following, the corner portion 164 is cited as an example of the curved surface region, and the principle of the above-described problem that the inventors of the present application have found will be described. In the present specification, the “corner portion (in the cross section)” means a corner portion in which two lines form an angle other than 180 ° and a portion obtained by rounding the corner portion in the outline of the cross section of the member. means.

  FIG. 11 is an enlarged cross-sectional view showing a corner portion 164 in the horizontal cross section of the ferroelectric capacitor Cap shown in FIG.

  As shown in the figure, in the corner portion 164, the area of the first electrode 133 on the ferroelectric layer 132 side is larger than the area of the second electrode 131 on the ferroelectric layer 132 side. The difference between the area of the first electrode 133 and the area of the second electrode 131 becomes larger as the ferroelectric layer 132 becomes thicker.

  On the other hand, when a conventional ferroelectric capacitor is used in a semiconductor memory device, a predetermined voltage is applied between the first electrode 133 and the second electrode 131 when data is written. However, since the first electrode 133 ferroelectric layer 132 is thick, the portion of the ferroelectric layer 132 close to the first electrode 133 has a higher electric field strength than the portion close to the second electrode 131. It was getting smaller. For this reason, an electric field higher than the coercive electric field is not applied at the portion near the first electrode 133 at the time of data writing, and it is difficult to obtain a desired polarization state.

  Thus, in the conventional ferroelectric capacitor, a part of the ferroelectric layer 132 cannot be used in the curved region. Therefore, there are cases where sufficient reliability cannot be obtained in a conventional semiconductor memory device using a ferroelectric capacitor.

  In addition, if the difference in electric field strength applied between the portion close to the first electrode 133 and the portion close to the second electrode 131 in the ferroelectric layer 132 is large, the difference in the amount of spontaneous polarization generated in both portions In order to compensate for this, internal charges are generated, and the operation reliability of the ferroelectric capacitor may be lowered.

  The above-described problem may occur not only in the corner portion 164 but also in the entire curved region of the ferroelectric capacitor including the corner portions 160 and 162.

  In addition, ferroelectric capacitors used in recent semiconductor memory devices have a more complicated three-dimensional structure in order to gain capacity in a small area, and the ratio of the area of the curved surface area to the entire capacitor has increased. ing. For this reason, the above-described defects are particularly apparent in a semiconductor memory device having a small design rule, for example.

  Although a conventional example using a ferroelectric capacitor in a semiconductor memory device has been described here, the ferroelectric capacitor can also be used in other semiconductor devices such as a high frequency filter and an infrared sensor.

  An object of the present invention is to provide a semiconductor device including a three-dimensional ferroelectric capacitor that can effectively use a curved surface region.

  A first semiconductor device of the present invention includes a substrate, a first electrode provided on the substrate, a capacitive insulating film provided on the first electrode and made of a ferroelectric, and the capacitive insulating film. A ferroelectric capacitor having a second electrode provided on the capacitor, wherein the ferroelectric capacitor has a curved region, and in the curved region, the capacitive insulating film Is 35% or less of the smaller one of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section perpendicular to the substrate of the ferroelectric capacitor. It has become.

  With this configuration, in the curved region of the ferroelectric capacitor during operation, the electric field strength applied to the portion of the capacitive insulating film close to the electrode with the larger radius of curvature and the portion closer to the electrode with the smaller radius of curvature. This difference can be made smaller than before. Therefore, in the curved region at the time of operation, an electric field higher than the coercive electric field can be applied to the entire capacitor insulating film, so that the polarization state can be made uniform. As a result, the capacitor insulating film in the curved region can be sufficiently utilized, so that the operational reliability of the ferroelectric capacitor can be improved, and consequently the operational reliability of the semiconductor device can be improved.

  The capacitance insulating film has a smaller curvature radius of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section perpendicular to the substrate of the ferroelectric capacitor. By being 20% or less, even when the voltage applied to the ferroelectric capacitor during operation varies or the thickness of the capacitor insulating film varies, the entire capacitor insulating film can be surely exceeded the coercive electric field. Since an electric field can be applied, the polarization state can be made more uniform. As a result, the operational reliability of the ferroelectric capacitor is further improved, and as a result, the operational reliability of the semiconductor device can be further improved.

  A second semiconductor device of the present invention includes a substrate, a first electrode provided on the substrate, a capacitive insulating film provided on the first electrode and made of a ferroelectric, and the capacitive insulating film. A ferroelectric capacitor having a second electrode provided on the capacitor, wherein the ferroelectric capacitor has a curved region, and in the curved region, the capacitive insulating film Is 35% or less of the smaller one of the radius of curvature of the first electrode and the radius of curvature of the second electrode in a cross section horizontal to the substrate of the ferroelectric capacitor. It has become.

  With this configuration, in the curved region of the ferroelectric capacitor during operation, the electric field strength applied to the portion of the capacitive insulating film close to the electrode with the larger radius of curvature and the portion closer to the electrode with the smaller radius of curvature. This difference can be made smaller than before. Therefore, in the curved region at the time of operation, an electric field higher than the coercive electric field can be applied to the entire capacitor insulating film, so that the polarization state can be made uniform. As a result, the operational reliability of the ferroelectric capacitor is improved, and as a result, the operational reliability of the semiconductor device can be improved. By taking a horizontal cross section of the ferroelectric capacitor, it is possible to define the thickness of the capacitive insulating film even in the curved area where the radius of curvature of the electrode cannot be measured in the vertical cross section.

  The capacitance insulating film has a smaller radius of curvature of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section horizontal to the substrate of the ferroelectric capacitor. By being 20% or less, even when the voltage applied to the ferroelectric capacitor during operation varies or the thickness of the capacitor insulating film varies, the entire capacitor insulating film can be surely exceeded the coercive electric field. Since an electric field can be applied, the polarization state can be made more uniform. As a result, the operational reliability of the ferroelectric capacitor is further improved, and as a result, the operational reliability of the semiconductor device can be further improved.

  Since the ferroelectric capacitor has a concave portion, for example, a trench type capacitor having high operational reliability can be realized. In particular, since the areas of the first electrode and the second electrode can be increased without increasing the projected area on the substrate, miniaturization can be promoted while maintaining the capacitance of the ferroelectric capacitor. For this reason, the entire semiconductor device can be miniaturized.

  Since the ferroelectric capacitor has a convex portion, the area of the first electrode and the second electrode can be increased without increasing the projected area onto the substrate. It is possible to proceed with miniaturization while maintaining the capacity of the above.

  In the curved region, since the radius of curvature of the first electrode and the radius of curvature of the second electrode are both 1 μm or less, a fine semiconductor device having a design rule of 0.18 μm or less, for example, can be realized. .

Since the projected area of the ferroelectric capacitor on the main surface of the substrate is 1 μm ² or less, the area of the ferroelectric capacitor can be kept small, so that the area of the semiconductor device can also be reduced. .

  Since the thickness of the capacitor insulating film is 100 nm or less, the shape of the ferroelectric capacitor can be easily processed three-dimensionally into a concave shape or a convex shape, thereby reducing the projection area of the ferroelectric capacitor onto the substrate. However, the predetermined capacity can be easily secured.

  The capacitive insulating film is preferably made of a ferroelectric material having a layered perovskite structure.

The first electrode and the second electrode are preferably made of at least one material of Pt, Ir, IrO ₂ , PtO ₂ , SrRuO ₃ , Ru, RuO ₂ .

  Field-effect transistors for recording data according to the amount of charge held in the ferroelectric capacitor and for passing a write current to the ferroelectric capacitor and a read current from the ferroelectric capacitor are further provided. Accordingly, the semiconductor device can be operated as a nonvolatile memory.

  A third semiconductor device of the present invention includes a substrate, a first electrode provided on the substrate, a capacitive insulating film provided on the first electrode and made of a ferroelectric, and the capacitive insulating film. A ferroelectric device having a curved region formed thereon, the area a on the side of the capacitive insulating film of the first electrode; The difference between the area “b” of the second electrode on the side of the capacitive insulating film is 35% or less of the area of the electrode having the smaller area. Of these, the difference in electric field strength applied between the portion closer to the electrode with the larger radius of curvature and the portion closer to the electrode with the smaller radius of curvature can be made smaller than before. Therefore, in the ferroelectric capacitor during operation, an electric field higher than the coercive electric field can be applied to the entire capacitive insulating film, so that the polarization state can be made uniform. As a result, the operational reliability of the ferroelectric capacitor is improved, and as a result, the operational reliability of the semiconductor device can be improved.

  The difference between the area a of the first electrode on the side of the capacitive insulating film and the area b of the second electrode on the side of the capacitive insulating film is 20% or less of the electrode area of the smaller area. Therefore, even when the voltage applied to the ferroelectric capacitor during operation varies or the thickness of the capacitor insulating film varies, an electric field higher than the coercive electric field can be reliably applied to the entire capacitor insulating film. The polarization state can be made more uniform. As a result, the operational reliability of the ferroelectric capacitor is further improved, and as a result, the operational reliability of the semiconductor device can be further improved.

  The semiconductor device of the present invention has a ferroelectric capacitor in which a curved region is formed, and in the curved region of the ferroelectric capacitor, the thickness of the capacitive insulating film is relative to the substrate surface of the ferroelectric capacitor. Of the curvature radius of the first electrode and the curvature radius of the second electrode in the vertical or horizontal cross section, it is 35% or less of the smaller curvature radius. For this reason, the difference in electric field strength applied to the upper and lower portions of the capacitor insulating film can be made smaller than before. Can be improved.

(First embodiment)
As a first embodiment of the present invention, an FeRAM having a trench type ferroelectric capacitor will be described.

-Structure of semiconductor memory device-
FIG. 1 is a cross-sectional view showing a cross section perpendicular to the substrate surface of the memory cell of the semiconductor memory device according to the first embodiment of the present invention. 2A is an enlarged cross-sectional view showing a portion of the ferroelectric capacitor in the semiconductor memory device of the present embodiment, and FIG. 2B is a ferroelectric body shown in FIG. FIG. 2 is a cross-sectional view of the capacitor taken along line IIb-IIb and showing a horizontal cross section on the substrate surface, and FIG. 4C is a plan view of the ferroelectric capacitor of this embodiment when viewed from above the substrate.

  The semiconductor memory device of this embodiment is a so-called 1T1C type FeRAM, and includes a large number of memory cells each having one control MISFET and one ferroelectric capacitor connected to the control MISFET. Have.

  As shown in FIG. 1, the memory cell of the semiconductor memory device of this embodiment includes a semiconductor substrate 1 having an active region, an element isolation insulating film 3 provided on the semiconductor substrate 1 and surrounding the active region, and a semiconductor substrate. A gate insulating film (not shown) provided on one active region, a gate electrode 5, and an impurity diffusion layer 7 provided in a region located on both sides of the gate electrode 5 in the semiconductor substrate 1; MISFET (field effect transistor), first interlayer insulating film 11 provided on semiconductor substrate 1, second interlayer insulating film 14 provided on first interlayer insulating film 11, and impurity diffusion layer 7, a contact plug 9 penetrating the first interlayer insulating film 11 and the second interlayer insulating film 14, and an electrode connected to the contact plug 9 and provided on the second interlayer insulating film 14 Pad 13; Provided on the second interlayer insulating film 14, provided on the third interlayer insulating film 16 in which a trench opening at the position of the electrode pad 13 is formed, and on the electrode pad 13 and the third interlayer insulating film 16, A ferroelectric capacitor having a concave portion covering the trench, and a fourth interlayer insulating film 21 provided on the third interlayer insulating film 16 and the ferroelectric capacitor are provided. One of the impurity diffusion layers 7 of the control MISFET is connected to the bit line 12 through a contact plug.

  The ferroelectric capacitor is provided on the electrode pad 13, the first electrode 15 covering the trench formed in the third interlayer insulating film 16, and the strong capacitor provided on the first electrode 15. The capacitor insulating film 17 made of a dielectric and the second electrode 19 provided on the capacitor insulating film 17 have a curved region. Here, the concave portion is a portion of the concave portion formed along the trench in the ferroelectric capacitor, and does not mean a fine concave portion generated due to a variation in a manufacturing process or the like. In this concave portion, the first electrode 15, the capacitive insulating film 17, and the second electrode 19 all have a concave shape.

  As shown in FIG. 2C, when the ferroelectric capacitor of this embodiment is viewed from above the substrate, the overall shape is, for example, a substantially quadrangular shape having a length of about 1 μm and a width of about 0.7 μm. ing. As can be seen from FIG. 2B, in the concave portion of the ferroelectric capacitor, the outlines of the cross sections horizontal to the substrates of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 are both angular. It is a rounded approximate quadrilateral. The cross section of the concave portion horizontal to the substrate becomes smaller as it goes downward, and the shapes of the bottom surfaces of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 are also substantially four sides with rounded corners. It is in shape. Further, “corner portion A” and “corner portion B” shown in FIG. 2A are the peripheral edge portion of the bottom surface of the concave portion and the upper edge portion of the concave portion of the ferroelectric capacitor, respectively. In the example, it is part of the curved area. Furthermore, the corner part D in the horizontal cross section of the concave part shown in FIG. 2B is also formed round and is a part of the curved surface area. That is, the curved region of the ferroelectric capacitor of the present embodiment includes at least the corner portion (corner portion D) of the side walls in the concave portion, the peripheral edge portion (corner portion A) of the bottom surface of the concave portion, and the upper edge portion of the concave portion. (Corner part B) is included. Among the ferroelectric capacitors, in the portions excluding the corner portions A, B, and D, the upper surface of the first electrode 15 (surface close to the capacitor insulating film 17), the upper and lower surfaces of the capacitor insulating film 17, and the second electrode 19 Each of the lower surfaces (surfaces close to the capacitor insulating film 17) is substantially flat except for fine irregularities.

  The trench provided in the third interlayer insulating film 16 has a substantially quadrangular shape with a length of about 460 nm and a width of about 460 nm, and the depth is about 300 nm. In addition, of the interface between the second electrode 19 and the capacitor insulating film 17, the upper edge of the concave portion has a shape obtained by rounding four corners of a quadrilateral having a length of about 300 nm and a width of about 300 nm, and the bottom of the concave portion. Has a shape in which the four corners of a quadrilateral having a length of about 200 nm and a width of about 200 nm are rounded. And the thickness in the plane part of the 1st electrode 15, the capacity | capacitance insulating film 17, and the 2nd electrode 19 is 30 nm, 50 nm, and 30 nm, respectively. In the example shown in FIGS. 1 and 2, the thicknesses of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 are 30 nm, 50 nm, and 30 nm, respectively, in the curved region of the ferroelectric capacitor. Yes. Therefore, the thickness of the entire ferroelectric capacitor is about 110 nm.

Note that Pt (platinum) is usually used as the material of the first electrode 15 and the second electrode 19, but Ir (iridium), IrO ₂ , PtO ₂ , SrRuO ₃ , Ru, RuO ₂ may also be used. These laminated films may be used. The material of the capacitive insulating film 17 is, for example, SBT (strontium bismuth tantalate), but also PZT (Pb (Ti, Zr) O ₃ ), BIT (Bi ₄ Ti ₃ O ₁₂ ), BLT (( BiLa) ₄ Ti ₃ O ₁₂ ), BaTiO ₃ and other ferroelectric materials having a perovskite structure or a layered perovskite structure can also be used.

  A feature of the semiconductor memory device of this embodiment is that the thickness of the capacitive insulating film in the curved region of the ferroelectric capacitor is equal to the curvature radius of the first electrode and the second radius in a cross section perpendicular or horizontal to the substrate surface. The radius of curvature of the electrode is 20% or less of the smaller radius of curvature.

  For example, in the corner portion A, the radius of curvature of the first electrode 15 is 300 nm and the radius of curvature of the second electrode 19 is 250 nm. In the corner portion B, the radius of curvature of the first electrode 15 is 250 nm and the radius of curvature of the second electrode 19 is 300 nm. In the corner portion D, the radius of curvature of the first electrode 15 is 300 nm and the second radius of curvature is 300 nm. The radius of curvature of the electrode 19 is 250 nm. The film thickness of the capacitive insulating film 17 in each of the corner portions A, B, and D is 50 nm.

  In the present specification, the “radius of curvature of the electrode” refers to the radius of curvature of the surface of the electrode closer to the capacitor insulating film 17. Further, the film thickness of the capacitive insulating film 17 in the curved region of the ferroelectric capacitor is approximately the minimum distance between the first electrode 15 and the second electrode 19 in the vertical or horizontal cross section with respect to the substrate. The film thickness in the direction. In the curved surface region, there is a portion where the radius of curvature of the electrode can be taken in both a vertical cross section and a horizontal cross section with respect to the substrate surface. It is 20% or less of the smaller one of the curvature radii of the electrodes on the inner peripheral side in the cross section.

  The operation and effect of this configuration will be described in detail later. A specific method for measuring the radius of curvature will also be described later.

-Manufacturing method of semiconductor memory device-
Next, a method for manufacturing the semiconductor memory device of this embodiment will be briefly described.

First, a semiconductor substrate 1 is prepared, and a control MISFET is formed on the semiconductor substrate 1 by a known method. That is, after a gate insulating film made of, for example, SiO ₂ and a gate electrode 5 made of, for example, polysilicon are sequentially formed on the semiconductor substrate 1, impurity ions are introduced into regions on both sides of the gate electrode 5 in the semiconductor substrate 1. The impurity diffusion layer 7 is formed by implantation.

Thereafter, SiO ₂ is deposited on the substrate by CVD, and then the upper surface is planarized by CMP (mechanical chemical polishing) to form the first interlayer insulating film 11. Thereafter, a contact hole is opened on one of the impurity diffusion layers 7 and a contact plug filling the hole is formed. Next, after forming the bit line 12, SiO ₂ is deposited on the first interlayer insulating film 11 by CVD or the like, and then the upper surface is planarized by CMP to form a second interlayer insulating film.

  Next, after forming a contact hole that penetrates the first interlayer insulating film 11 and the second interlayer insulating film 14 and reaches the impurity diffusion layer 7 that is not connected to the bit line 12, the contact hole is made of a conductor such as tungsten. The contact plug 9 is formed by filling with.

Next, a TiAlN or Ir, IrO ₂ film is formed on the second interlayer insulating film 14 by sputtering or the like and then patterned to form an electrode pad 13.

Subsequently, SiO ₂ is deposited on the substrate by CVD or the like, and then the upper surface is planarized by CMP to form a third interlayer insulating film 16. Thereafter, a part of the third interlayer insulating film 16 is etched to form a trench having a depth of 300 nm and reaching the electrode pad 13. The trench is formed so that the shape seen from the upper surface is a substantially quadrilateral having a length of about 460 μm and a width of about 460 μm.

  Next, a first Pt film (not shown) having a thickness of 30 nm is formed on the third interlayer insulating film 16 on the substrate by sputtering or the like. Here, a portion of the first Pt film located on the trench is concave along the trench. In this step, the curvature radius of the contour line in a cross section perpendicular to the substrate at the upper edge portion of the upper surface of the concave portion is about 250 nm. In the concave portion of the first Pt film, the radius of curvature of the corner portion of the inner contour line (upper surface contour line) in the cross section horizontal to the substrate is about 250 nm.

  Subsequently, an SBT film having a thickness of 50 nm or less is formed on the first Pt film by MOCVD (Metal Organic Chemical Vapor Deposition) or the like. Here, the SBT film is formed so that the flat portion and the bent portion are equal in thickness. Note that a portion of the SBT film located above the trench is a concave portion. By this step, the thickness of the upper edge portion of the concave portion of the SBT film is formed to be 20% or less of the thickness of the first Pt film.

  Next, a second Pt film (not shown) having a thickness of 30 nm is formed on the SBT film by sputtering or the like. A portion of the second Pt film located above the trench is a concave portion. In this step, the curvature radius of the vertical cross section of the peripheral portion of the bottom surface of the bottom surface (surface on the SBT film side) of the concave portion of the second Pt film is 250 nm.

  Next, the first Pt film, the SBT film, and the second Pt film are patterned using a mask having a substantially quadrangular opening having a length of about 1 μm and a width of about 0.7 μm, respectively. The electrode 15, the capacitor insulating film 17, and the second electrode 19 are formed. Here, the capacitance at the portion where the upper surface of the first electrode 15 (the surface closer to the capacitor insulating film 17) and the lower surface of the second electrode 19 (the surface closer to the capacitor insulating film 17) are both curved. The thickness of the insulating film 17 is 20% or less of the smaller one of the curvature radius of the first electrode 15 and the curvature radius of the second electrode 19 in a cross section perpendicular or horizontal to the substrate. Yes.

  Thereafter, a fourth interlayer insulating film 21 and an Al wiring 23 are formed on the third interlayer insulating film 16. The semiconductor memory device of this embodiment is manufactured as described above.

Note that the first Pt film and the second Pt film may be formed by CVD in addition to sputtering. A seed layer may be formed between the first electrode 15 and the capacitor insulating film 17 and between the capacitor insulating film 17 and the second electrode 19. The seed layer formed between the first electrode 15 and the capacitor insulating film 17 may be a ferroelectric, or a paraelectric such as SrTaO ₃ , SrO ₃ , Bi ₂ O ₃ , Ta ₂ O _5. It may be a body. Even when a paraelectric material is used as a seed layer, the first electrode 15 and the second electrode 19 are substantially in contact with the capacitive insulating film 17 because they are integrated with the capacitive insulating film 17 by the heating process. Can be considered.

-Operation of semiconductor memory device-
The operation method of the semiconductor memory device of this embodiment is the same as that of the conventional semiconductor memory device described above.

  That is, in the semiconductor memory device of this embodiment, the control MISFET is turned on when data is written, and a write voltage is applied between the first electrode 15 and the second electrode 19 of the ferroelectric capacitor. At this time, when an electric field higher than the coercive electric field is applied to the capacitor insulating film 17, the polarization state of the capacitor insulating film 17 changes and data is rewritten.

  When reading data, the control MISFET is turned on to detect the current flowing through the bit line 12. Since the current flowing from the memory cell varies depending on the polarization state of the capacitor insulating film 17, the stored data can be read by detecting the current flowing through the bit line 12.

-Actions and effects of the configuration of the semiconductor memory device of this embodiment-
FIG. 3 is an enlarged sectional view showing a corner portion D of the ferroelectric capacitor of the present embodiment. Hereinafter, a corner portion D will be described as an example of a curved surface region.

  As shown in FIG. 3, in the corner portion D, 20% or less of the smaller one of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section horizontal to the substrate. It has become. Thereby, in the corner portion D when the write voltage is applied, an electric field equal to or higher than the coercive electric field is uniformly applied to both the inner peripheral portion and the outer peripheral portion of the capacitive insulating film 17. As a result, the operational reliability of the ferroelectric capacitor is improved, and as a result, the reliability of the memory operation of the semiconductor memory device can be improved. Hereinafter, the measurement results that serve as the basis will be described.

  FIG. 4 is a diagram showing the relationship between the electric field strength applied to the capacitive insulating film and the average radius of the electrode in a horizontal section relative to the substrate of the trench type ferroelectric capacitor. This measurement was performed on a portion corresponding to the corner portion D shown in FIG. 3 using a ferroelectric capacitor having the same shape as that of the ferroelectric capacitor of the present embodiment and the thickness of the capacitive insulating film being changed. In FIG. 4, the vertical axis represents the electric field intensity, and the horizontal axis represents {(electrode curvature radius) + capacitance insulating film thickness)} / (electrode curvature radius). In addition, the curvature radius of an electrode here is a curvature radius of the 2nd electrode which is an inner peripheral side.

  As a result of the measurement shown in FIG. 4, when an operating voltage is applied to the ferroelectric capacitor, the value of {(electrode radius of curvature) + capacitance insulating film thickness)} / (electrode radius of curvature) is about 1.35. It was found that the electric field applied to the capacitive insulating film exceeded the coercive electric field if it was below. That is, if the thickness of the capacitor insulating film is 35% or less of the curvature radius of the second electrode, even when the write voltage is applied, the portion of the capacitor insulating film that is close to the first electrode becomes the second electrode. A voltage higher than the coercive electric field can be applied in the same manner as in the vicinity. This result is an examination of a corner portion in a horizontal section with respect to the substrate surface of the ferroelectric capacitor, but it can be applied to the entire curved region of the ferroelectric capacitor.

  Further, in a semiconductor memory device having a ferroelectric capacitor, it is conceivable that variation in data write voltage, variation in film thickness of the capacitor insulating film, and the like occur. Considering this variation, the value of {(electrode radius of curvature) + capacity insulating film thickness)} / (electrode radius of curvature) is about 1.2 or less, that is, the thickness of the capacitive insulating film is the second electrode. If it is 20% or less of the curvature radius, the entire capacitor insulating film can be polarized to a desired state more reliably and uniformly.

In this measurement, the material of the capacitive insulating film is SBT, for example, but almost the same result is obtained even with a ferroelectric material having a perovskite structure such as PZT, BIT, BLT, BaTiO ₃ or a layered perovskite structure. It was.

  The operation and effect of the ferroelectric capacitor and the semiconductor memory device of the present embodiment will be described using the above measurement results.

  In the corner portion D of the ferroelectric capacitor of the present embodiment shown in FIG. 3, the radius of curvature of the first electrode 15 is 300 nm, the radius of curvature of the second electrode 19 is 250 nm, and the film thickness of the capacitive insulating film 17 is 50 nm. Thus, the thickness of the capacitive insulating film 17 is 20% of the radius of curvature of the second electrode 19 which is the inner peripheral electrode. Therefore, when a predetermined write voltage is applied to the ferroelectric capacitor, even if there is a variation in film thickness, the portion of the capacitive insulating film 17 that is close to the first electrode 15 and the portion that is close to the second electrode 19 The difference in the strength of the applied electric field can be kept small. As a result, an electric field equal to or higher than the coercive electric field is applied to all the portions of the capacitive insulating film 17 including the portion close to the first electrode 15, so that the polarization state of the capacitive insulating film 17 can be made uniform. . For this reason, the ferroelectric capacitor of this embodiment can use the capacitive insulating film 17 in the curved region, which has not been sufficiently used in the past, and the operation reliability is greatly improved as compared with the ferroelectric capacitor. . Therefore, in the semiconductor memory device provided with the ferroelectric capacitor of this embodiment, it is possible to perform the data write operation more reliably than in the past.

  Further, in the ferroelectric capacitor of this embodiment, the amount of spontaneous polarization in the capacitive insulating film 17 can be made substantially uniform, so that generation of internal charges can be suppressed.

  The operating voltage of the semiconductor memory device of this embodiment is about 1.0 V, for example, and an electric field of about 200 V / cm is applied in the vicinity of the interface with the first electrode 15 in the capacitive insulating film 17. This exceeds, for example, about 45 V / cm, which is the coercive electric field of SBT.

  Here, the corner portion D has been described as an example. However, in the ferroelectric capacitor according to the present embodiment, the thickness of the capacitive insulating film in each portion in the curved region is a vertical or horizontal cross section relative to the substrate. Of the curvature radius of the first electrode and the curvature radius of the second electrode, it is 20% or less of the smaller curvature radius.

  For example, in the vertical section of the ferroelectric capacitor according to this embodiment shown in FIG. 2A, for the corner portion B, the radius of curvature of the first electrode 15 on the inner peripheral side is 250 nm, and the capacitive insulating film 17 The thickness of the capacitor insulating film 17 is 20% of the radius of curvature of the first electrode 15. In the corner portion A, the thickness of the capacitive insulating film 17 is 20% of the radius of curvature of the second electrode 19 on the inner peripheral side. Accordingly, even in these portions, the polarization state of the capacitive insulating film 17 can be made uniform during operation.

  As described above, since the capacitive insulating film can be effectively used in almost all curved regions, the operation reliability of the ferroelectric capacitor of this embodiment can be further improved.

As the semiconductor memory device is miniaturized, a complicated three-dimensional structure is required to secure the capacity of the ferroelectric capacitor while reducing the projected area on the substrate. Therefore, as the miniaturization progresses, the ratio of the curved surface area in the ferroelectric capacitor increases. Therefore, the configuration described in this embodiment is effective regardless of the size of the semiconductor memory device. However, the miniaturization has progressed, the design rule becomes 0.18 μm or less, and the ferroelectric on the main surface of the substrate. This is particularly effective when the projected area of the capacitor is 1 μm ² or less. In this case, the surface area of the ferroelectric capacitor is preferably 1.5 μm ² or more in order to ensure the operation of the FeRAM. Therefore, when the value of (surface area of the ferroelectric capacitor electrode) / (projected area of the ferroelectric capacitor) is 1.5 or more, the configuration of this embodiment is more effective.

  Further, the thickness of the capacitive insulating film 17 is preferably 100 nm or less, and more preferably 50 nm or less so that it can be easily formed in three dimensions.

  In the case of further miniaturization, the depth of the trench is increased to about 300 nm, the thickness of the capacitor insulating film 17 is made smaller than 50 nm, and the thickness of the first electrode 15 and the second electrode 19 is increased to 30 nm. What is necessary is just to make it smaller and to form two or more concave parts and uneven parts. In the case where a plurality of concave portions and concave and convex portions are formed, since the ratio of the curved surface area to the electrode surface area of the ferroelectric capacitor is further increased, the effect of the configuration described in the present embodiment is further increased. The same applies to the embodiments described later.

  Further, in the curved region of the ferroelectric capacitor, since the first electrode 15 and the second electrode 19 cannot be miniaturized if the curvature radii of the first electrode 15 and the second electrode 19 are too large, both the curvature radii of these electrodes may be 1 μm or less. preferable.

  In the ferroelectric capacitor of the present embodiment, the thickness of the capacitive insulating film in each part in the curved region is the curvature radius of the first electrode and the second electrode in a cross section perpendicular or horizontal to the substrate. The curvature radius is 0% or more of the smaller curvature radius.

  In the semiconductor memory device of this embodiment, the thickness of the capacitive insulating film 17 is the same in the curved region and the planar portion of the ferroelectric capacitor. However, the thickness of the capacitive insulating film 17 in the planar portion is the same as that of the conventional example. Even when the thickness is 50 nm only in the curved region, the entire capacitance insulating film 17 can be functioned.

  In the memory cell of the semiconductor memory device of the present embodiment, the configuration connected to the impurity diffusion layer of the MISFET is taken as an example. However, in the memory cell of the semiconductor memory device, a ferroelectric capacitor is provided on the gate electrode of the MISFET. A connected configuration may be used. In this case, since the value of the current flowing through the MISFET when the same gate voltage is applied varies depending on the polarization state of the ferroelectric capacitor, data can be written and read using this. .

  Further, the ferroelectric capacitor of this embodiment can be used not only for semiconductor memory devices such as FeRAM but also for high frequency filters, infrared sensors, actuators, etc., and can improve the operational reliability of these devices. it can.

-Measuring method of radius of curvature of electrode and film thickness of capacitive insulating film-
Next, a method for measuring the radius of curvature of the electrode and the film thickness of the capacitive insulating film in the ferroelectric capacitor of this embodiment will be described. The radius of curvature of the electrode used in the above description can be measured by the following method.

  First, the ferroelectric capacitor of this embodiment is prepared. Next, a cross section that passes through the concave portion and is horizontal to the substrate surface or a vertical cross section that passes through the concave portion and is exposed to the substrate surface is exposed. At this time, means such as FIB (focused ion beam), polishing, and cleavage are used. Thereby, the cross section shown in FIG. 2A or 2B is exposed.

  Next, a scanning electron microscope (SEM) image of the exposed cross section is taken to obtain image data. Next, based on the obtained image data, the contour lines of the surfaces of the first electrode 15 and the second electrode 19 are obtained using software. Specifically, the image data is binarized, and the fine irregularities on the surfaces of the first electrode 15 and the second electrode 19 are averaged. Thereafter, contour lines fitted with curved lines or straight lines of the cross sections of the first electrode 15 and the second electrode 19 are obtained.

  Next, of the first electrode 15 and the second electrode 19, an electrode on the inner peripheral side having a small curvature radius is determined in the portion to be analyzed using the fitting result. For example, when it is desired to measure the corner portion A in the vertical cross section shown in FIG. 2A, the second electrode 19 is selected. Moreover, when it is desired to measure the corner portion B shown in FIG. 2A, the first electrode 15 is selected.

  Subsequently, image processing is performed on the surface of the selected electrode closer to the capacitive insulating film 17, and the distribution of the curvature radius is calculated.

  FIG. 5A is a diagram showing the distribution of the radius of curvature of the second electrode 19 in the vertical cross section of the ferroelectric capacitor of the present embodiment shown in FIG. 2A, and FIG. It is a figure which shows distribution of the curvature radius of the 2nd electrode 19 in the horizontal cross section of the ferroelectric capacitor of this embodiment shown to (b).

  When the above-described processing is performed on the vertical cross section of the ferroelectric capacitor of the present embodiment, as shown in FIG. 5A, the frequency increases as the radius of curvature increases after the two peaks. It is done. The second electrode 19 is on the inner peripheral side in the corner portion A and on the outer peripheral side in the corner portion B, and since the magnitude of the curvature radius at both corner portions is known, the peak with the smaller value is the second peak. The radius of curvature at the corner A of the electrode 19 and the peak with the larger value are measured as the radius of curvature at the corner B. Then, a region C in which the contour of the cross section is a substantially straight line or a loose curve is measured as a portion having the largest curvature radius. For simplicity of explanation, it is assumed here that the cross section is axisymmetric.

  Further, since the film thickness at the corner portion of the capacitive insulating film 17 can be obtained from the image of the vertical section subjected to the fitting process, the direction in which the distance between the first electrode 15 and the second electrode 19 is the shortest. It can be measured easily.

  In the corner portion A, it is determined whether or not the film thickness of the capacitive insulating film 17 is 35% or 20% or less of the curvature radius of the second electrode 19 measured as described above.

  On the other hand, when the above-described processing is performed on the horizontal cross section of the ferroelectric capacitor of the present embodiment, the frequency of the intermediate radius of curvature decreases after one peak, as shown in FIG. The result is that the frequency of the larger portion is maximized. Here, in the horizontal cross section of the second electrode 19 shown in FIG. 2B, since the curvature radii of the four corners including the corner portion D are equal, the curvature radius of the portion where the frequency is a peak is the curvature radius of the corner portion D. Measured. A region E where the contour of the cross section is a substantially straight line corresponds to a portion having the largest curvature radius and the highest frequency. And the film thickness in the corner part D of the capacity | capacitance insulating film 17 can be easily measured from the image data of the horizontal cross section shown in FIG.2 (b). Therefore, in the corner portion D, it is determined whether or not the film thickness of the capacitive insulating film 17 is 35% or 20% or less of the curvature radius of the second electrode 19 measured as described above.

  By the same method as described above, the radius of curvature can be measured for the other curved region of the ferroelectric capacitor.

  Note that the radius of curvature can be measured in the entire curved surface region by measuring both the horizontal and vertical cross sections of the ferroelectric capacitor by the measurement method described above. This is because the contour line of any cross section of the electrode is always a curved line in the curved region.

  The thickness of the capacitive insulating film 17 is originally desirable to obtain the thickness in the direction of the electric field applied during operation, but it is difficult to actually measure, and as in this measurement method, in the horizontal or vertical section. It is preferable to treat the film thickness approximately as the film thickness of the capacitive insulating film. However, the ferroelectric capacitor may be cut at a cross section other than the horizontal cross section and the vertical cross section with respect to the substrate, and the radius of curvature of the electrode and the thickness of the capacitor insulating film 17 in the cross section may be measured.

(Second Embodiment)
Since the semiconductor memory devices described in the following embodiments are different from the semiconductor memory device described in the first embodiment only in the shape of the ferroelectric capacitor, the shape of the ferroelectric capacitor will be mainly described. .

  FIG. 6A is a cross-sectional view showing a cross section perpendicular to the substrate surface of the ferroelectric capacitor in the semiconductor memory device according to the second embodiment of the present invention, and FIG. FIG. 7 is a cross-sectional view of the ferroelectric capacitor according to FIG. 6 passing through the VIb-VIb line shown in FIG.

  As shown in FIGS. 6A and 6B, the ferroelectric capacitor of the present embodiment is similar to the ferroelectric capacitor of the first embodiment on the first electrode 15 and the first electrode 15. And a second electrode 19 provided on the capacitor insulating film 17, and a curved region is formed. Further, the ferroelectric capacitor of the present embodiment is provided with a concave portion formed in a concave shape and a flat portion surrounding the concave portion as in the ferroelectric capacitor of the first embodiment.

  However, in the ferroelectric capacitor of this embodiment, in the concave portion, the first electrode 15, the capacitor insulating film 17, and the second electrode 19 each have a bottom surface and have a cylindrical shape that protrudes downward. This is different from the ferroelectric capacitor of the first embodiment.

  The curved region in the ferroelectric capacitor of the present embodiment includes corner portions A and B shown in FIG. 6A and a side wall portion of a concave portion whose horizontal section is substantially circular as shown in FIG. 6B. Contains. Here, “corner portion A” and “corner portion B” are the peripheral edge portion of the bottom surface of the concave portion and the upper edge portion of the concave portion, respectively, as in the first embodiment.

  In the corner portion A of the ferroelectric capacitor of the present embodiment, the radius of curvature of the first electrode 15 is 300 nm and the radius of curvature of the second electrode 19 is 250 nm. In the corner portion B, the radius of curvature of the first electrode 15 is 250 nm and the radius of curvature of the second electrode 19 is 300 nm. The film thicknesses of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 in the corner portions A and B are 35 nm, 60 nm, and 35 nm, respectively.

  Therefore, in the corner portion A of the ferroelectric capacitor according to this embodiment, the film thickness of the capacitive insulating film 17 is 35% or less of the curvature radius of the second electrode 19 that is the inner peripheral electrode. . In the corner portion B, the thickness of the capacitive insulating film 17 is 20% of the radius of curvature of the first electrode 15 which is the inner peripheral electrode.

  Therefore, when a predetermined write voltage is applied to the ferroelectric capacitor of this embodiment, even if there is a variation in film thickness, the portion of the capacitive insulating film 17 close to the first electrode 15 and the second electrode The difference in the intensity of the electric field applied to the portion close to 19 can be kept small. As a result, an electric field equal to or higher than the coercive electric field is applied to all portions of the capacitive insulating film 17 including the portion close to the electrode on the outer peripheral side, so that the polarization state of the capacitive insulating film 17 can be made uniform. For this reason, the ferroelectric capacitor of this embodiment can use the capacitive insulating film 17 in the curved region, which has not been sufficiently used in the past, and the operation reliability is greatly improved as compared with the ferroelectric capacitor. .

  On the other hand, in the horizontal cross section shown in FIG. 6B, the first electrode 15 and the second electrode 19 are circular or substantially circular. In this case, the radius of curvature of the second electrode 19 serving as the inner peripheral electrode is approximately equal to the outer radius, which is approximately 250 nm. The film thicknesses of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 are 30 nm, 50 nm, and 30 nm, respectively. The film thickness of the capacitive insulating film 17 is 20% of the radius of curvature of the second electrode 19 which is the inner peripheral electrode. This applies not only to the cross section shown in FIG. 6B, but also to the entire side wall portion of the concave portion.

  Therefore, in the side wall portion of the concave portion, the difference in the strength of the electric field applied between the portion near the first electrode 15 and the portion near the second electrode 19 in the capacitive insulating film 17 can be suppressed to be small. Therefore, since the ferroelectric capacitor of this embodiment can fully utilize the capacitor insulating film 17 on the side wall portion in the concave portion, the semiconductor device including the ferroelectric capacitor of this embodiment is more than conventional. Operation reliability can be improved, for example, data can be reliably written.

  In the ferroelectric capacitor of this embodiment, the first electrode 15 and the second electrode 19 are both concave in the same shape as the capacitor insulating film 17, but the upper surface of the first electrode 15 and the second electrode The entire shape of the first electrode 15 and the entire shape of the second electrode 19 may be any shape as long as both of the lower surfaces of the electrodes 19 are concave.

(Third embodiment)
FIG. 7A is a cross-sectional view showing a cross section perpendicular to the substrate surface of the semiconductor memory device according to the third embodiment of the present invention, and FIG. 7B is a cross-sectional view of the ferroelectric capacitor according to the present embodiment. FIG. 8 is a cross-sectional view taken along the line VIIb-VIIb shown in FIG.

  In the semiconductor memory device of this embodiment, the structure of the control MISFET having the gate electrode 5 and the impurity diffusion layer 7, the first interlayer insulating film 11, the second interlayer insulating film 14, and the contact plug 9 is shown in FIG. The semiconductor memory device is the same as that of the first embodiment, and is different from the semiconductor device of the first embodiment in that the ferroelectric capacitor has a convex portion. Here, the convex portion is a portion of the ferroelectric capacitor in which the first electrode 15, the capacitor insulating film 17, and the second electrode 19 all have a convex shape. It does not mean a fine convex portion generated due to the variation of

  As shown in FIG. 7A, the semiconductor memory device of this embodiment is provided on the electrode pad 13 provided on the contact plug 9, the second interlayer insulating film 14, and the electrode pad 13. A first electrode 15 having a part of the upper surface having a convex shape, a capacitor insulating film 17 provided on the first electrode 15 and having a part formed in a convex shape, and a capacitor insulating film 17 A second electrode 19 partially formed in a convex shape, and a fifth interlayer insulating film 25 provided on the second interlayer insulating film 14 and the second electrode 19. I have. Further, as shown in FIG. 7B, the top surface of the first electrode 15 (the surface closer to the capacitor insulating film 17) in the cross section of the convex portion of the ferroelectric capacitor horizontal to the substrate. Both the contour line and the contour line of the lower surface of the second electrode 19 (the surface closer to the capacitor insulating film 17) are circular or substantially circular. Although not shown, when the entire ferroelectric capacitor including the convex portion is viewed from above, the shape is, for example, a substantially quadrangular shape having a length of 1 μm and a width of 0.7 μm.

  The ferroelectric capacitor of the present embodiment has a curved region in part, as with the ferroelectric capacitors according to the first and second embodiments. As shown in FIGS. 7A and 7B, the curved surface region includes the corner portion F and the corner portion G in the vertical cross section, and the entire side wall portion in the convex portion. Here, the corner portion F is an upper edge portion of the convex portion, and the corner portion G is a rising portion of the convex portion.

  In the curved region of the ferroelectric capacitor of the present embodiment, the thickness of the capacitive insulating film 17 is the inner peripheral side of the first electrode 15 and the second electrode 19 in a cross section perpendicular or horizontal to the substrate. It is 20% or less of the curvature radius of the electrode.

  For example, in the vertical cross section shown in FIG. 7A, in the corner portion F, the radius of curvature of the first electrode 15 on the inner peripheral side is 250 nm, and the radius of curvature of the second electrode 19 on the outer peripheral side is 300 nm. . In the corner portion G, the radius of curvature of the first electrode 15 on the outer peripheral side is 300 nm, and the radius of curvature of the second electrode 19 on the inner peripheral side is 250 nm. In the horizontal cross section shown in FIG. 7B, the radius of curvature of the first electrode 15 serving as the inner peripheral electrode is approximately equal to the outer radius, which is about 250 nm. The film thicknesses of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 in these curved regions are 30 nm, 50 nm, and 30 nm, respectively.

  For this reason, in the curved region of the ferroelectric capacitor of this embodiment, the difference in electric field strength applied during operation between the portion near the outer peripheral electrode and the portion near the inner peripheral electrode in the capacitive insulating film 17. Is smaller than before. Therefore, a voltage higher than the coercive electric field can be applied to the entire capacitor insulating film 17 in the curved region when a write voltage is applied to the semiconductor memory device. As a result, the ferroelectric capacitor of the present embodiment can fully utilize the capacitive insulating film 17 in the curved region, so that the semiconductor device including the ferroelectric capacitor of the present embodiment is more reliable than before. Thus, it is possible to improve the reliability of operation, such as being able to write data.

  As described above, even when the ferroelectric capacitor has a convex portion, the operational reliability can be improved by setting the thickness of the capacitive insulating film 17 as described above.

  Even if the shape of the convex portion is a shape other than the example shown in FIGS. 7A and 7B, the thickness of the capacitor insulating film 17 is set to the vertical or horizontal cross section if the curved region is formed. The reliability of the operation can be improved by setting the curvature radius of the inner circumferential side electrode to 35% or less, and further 20% or less.

(Fourth embodiment)
FIG. 8A is a cross-sectional view showing a cross section perpendicular to the substrate surface of a ferroelectric capacitor in a semiconductor memory device according to the fourth embodiment of the present invention, and FIG. FIG. 9 is a cross-sectional view of the ferroelectric capacitor according to FIG. 8 passing through the line VIIIb-VIIIb shown in FIG.

  Similar to the semiconductor memory device of the second embodiment, the semiconductor memory device of this embodiment includes a ferroelectric capacitor having a concave portion. Further, the ferroelectric capacitor of the present embodiment shown in FIG. 8A is similar to the second embodiment in the shape of a cross section perpendicular to the substrate, but the substrate shown in FIG. On the other hand, the shape of the horizontal cross section is different from the ferroelectric capacitor of the second embodiment.

  That is, as shown in FIG. 8B, the upper surface of the first electrode 15 (the surface closer to the capacitor insulating film 17) in the cross section of the concave portion of the capacitor of the present embodiment that is horizontal to the substrate. And the outline of the lower surface of the second electrode 19 (the surface closer to the capacitor insulating film 17) are both square. The contour of the upper surface of the first electrode 15 has a side of 300 nm, and the contour of the lower surface of the second electrode 19 has a side of about 200 nm. In the ferroelectric capacitor of the present embodiment, unlike the second embodiment, the corner portion H in the horizontal cross section is not rounded out of the side walls in the concave portion. The film thicknesses of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 at portions other than the corner portion H are 30 nm, 50 nm, and 30 nm, respectively. 35 nm, 60 nm, and 35 nm. .

  In the concave portion of the ferroelectric capacitor of the present embodiment, the area a closer to the capacitive insulating film 17 of the first electrode 15 serving as the outer peripheral electrode and the second electrode 19 serving as the inner peripheral electrode. The difference between the area b of the surface closer to the capacitor insulating film 17 is 35% or less of the area b of the second electrode 19 having a smaller area closer to the capacitor insulating film 17.

  For this reason, in the corner part H shown in FIG.8 (b), the difference of the electric field strength added to the outer peripheral side and inner peripheral side of the capacitive insulating film 17 can be made smaller than before. Therefore, a voltage higher than the coercive electric field can be applied to the entire capacitor insulating film 17 in the curved region when the write voltage is applied to the semiconductor memory device. In particular, the difference between the area a of the first electrode 15 closer to the capacitive insulating film 17 and the area b of the surface of the second electrode 19 closer to the capacitive insulating film 17 is the second electrode having a smaller area. 19 is 20% or less of the area b on the side of the capacitive insulating film 17, so that even if the thickness of the capacitive insulating film 17 and the writing voltage vary, the entire capacitive insulating film 17 is uniformly over the coercive electric field. The electric field can be applied. As a result, the ferroelectric capacitor according to the present embodiment can fully utilize the capacitive insulating film 17 in the corner portion H. Therefore, in the semiconductor device provided with the ferroelectric capacitor according to the present embodiment, it is more than conventional. Operation reliability can be improved, for example, data can be reliably written.

  As described above, since the radius of curvature of the electrode cannot be obtained at the corner portion not included in the curved region, the film thickness of the capacitive insulating film 17 cannot be set from the radius of curvature of the electrode. By setting the difference between the electrode area on the outer circumference and the electrode area on the outer circumference side to 35% or less, more preferably 20% or less of the electrode area on the inner circumference side, a ferroelectric capacitor with higher reliability than before can be realized. can do.

  The definition using the above-described difference in electrode area is derived from the measurement results shown in FIG. For example, in the ferroelectric capacitor according to the second embodiment having a concave section with a horizontal cross section as shown in FIG. 6B, the film thickness of the capacitive insulating film 17 is 35% of the radius of curvature of the second electrode 19. Or less and 20% or less, the difference between the area a of the surface of the first electrode 15 close to the capacitive insulating film 17 and the area b of the surface of the second electrode 19 close to the capacitive insulating film 17 is approximate. The area b is 35% or less and 20% or less of the area b. Therefore, this regulation can be used even when the upper surface and the lower surface of the first electrode 15, the capacitor insulating film 17, and the second electrode 19 constituting the concave portion or the convex portion have only a flat surface. Further, the present invention can also be applied to the capacitor including the curved region described in the first to third embodiments.

  The semiconductor device having the ferroelectric capacitor of the present invention can be used as a nonvolatile memory such as FeRAM, a high frequency filter, an infrared sensor, and an actuator. Further, when the semiconductor device of the present invention is used as a semiconductor memory device, it can be used for various purposes such as a memory of a computer or a mobile phone.

1 is a cross-sectional view showing a cross section perpendicular to a substrate surface of a memory cell of a semiconductor memory device according to a first embodiment of the present invention; (A) is sectional drawing which expands and shows the part of a ferroelectric capacitor among the semiconductor memory devices which concern on 1st Embodiment, (b) is a ferroelectric capacitor shown to Fig.2 (a). FIG. 2C is a cross-sectional view showing a cross section passing through the IIb-IIb line and being horizontal to the substrate surface, and FIG. 4C is a plan view of the ferroelectric capacitor of this embodiment as viewed from above the substrate. 2 is an enlarged sectional view showing a corner portion D of the ferroelectric capacitor according to the first embodiment. FIG. It is a figure which shows the relationship between the electric field strength concerning a capacity | capacitance insulating film, and the average radius of an electrode in the horizontal cross section with respect to a board | substrate of a trench type ferroelectric capacitor. (A) is a figure which shows distribution of the curvature radius of a 2nd electrode in the vertical cross section of the ferroelectric capacitor shown to Fig.2 (a), (b) is a ferroelectric shown in FIG.2 (b). It is a figure which shows distribution of the curvature radius of a 2nd electrode in the horizontal cross section of a body capacitor. (A) is sectional drawing which shows a cross section perpendicular | vertical to a substrate surface of a ferroelectric capacitor among the semiconductor memory devices which concern on the 2nd Embodiment of this invention, (b) is 2nd Embodiment. FIG. 7 is a cross-sectional view of the ferroelectric capacitor according to FIG. 6 passing through the VIb-VIb line shown in FIG. (A) is sectional drawing which shows a cross section perpendicular | vertical to a substrate surface of the semiconductor memory device which concerns on the 3rd Embodiment of this invention, (b) is a ferroelectric capacitor which concerns on 3rd Embodiment. FIG. 8 is a cross-sectional view taken along the line VIIb-VIIb shown in FIG. (A) is sectional drawing which shows a cross section perpendicular | vertical to a substrate surface of a ferroelectric capacitor among the semiconductor memory devices which concern on the 4th Embodiment of this invention, (b) is 4th Embodiment. FIG. 9 is a cross-sectional view of the ferroelectric capacitor according to, showing a cross section that passes through the line VIIIb-VIIIb shown in FIG. It is sectional drawing which shows the conventional ferroelectric capacitor roughly. (A) is a vertical sectional view showing an example of a conventional semiconductor memory device having a ferroelectric capacitor having a three-dimensional structure, and (b) is a XIb-XIb line of the conventional semiconductor memory device shown in (a). FIG. It is sectional drawing which shows an example of the conventional semiconductor memory device which has a ferroelectric capacitor of a three-dimensional structure.

Explanation of symbols

1 Semiconductor substrate 5 Gate electrode 7 Impurity diffusion layer 9 Contact plug 11 First interlayer insulating film 12 Bit line 13 Electrode pad 14 Second interlayer insulating film 15 First electrode 16 Third interlayer insulating film 17 Capacitive insulating film 19 Second electrode 21 Fourth interlayer insulating film 23 Al wiring 25 Fifth interlayer insulating film

Claims (14)

A strong electrode having a first electrode provided on the substrate, a capacitive insulating film made of a ferroelectric material provided on the first electrode, and a second electrode provided on the capacitive insulating film. A semiconductor device comprising a dielectric capacitor,
The ferroelectric capacitor has a curved region,
In the curved area,
The capacitance insulating film has a smaller curvature radius of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section perpendicular to the substrate of the ferroelectric capacitor. A semiconductor device of 35% or less. The semiconductor device according to claim 1,
The capacitance insulating film has a smaller curvature radius of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section perpendicular to the substrate of the ferroelectric capacitor. A semiconductor device that is 20% or less. A substrate, a first electrode provided on the substrate, a capacitive insulating film made of a ferroelectric material provided on the first electrode, and a second electrode provided on the capacitive insulating film A semiconductor device comprising a ferroelectric capacitor having
The ferroelectric capacitor has a curved region,
In the curved area,
The thickness of the capacitive insulating film is a smaller one of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section horizontal to the substrate of the ferroelectric capacitor. A semiconductor device of 35% or less. The semiconductor device according to claim 3.
The capacitance insulating film has a smaller radius of curvature of the curvature radius of the first electrode and the curvature radius of the second electrode in a cross section horizontal to the substrate of the ferroelectric capacitor. A semiconductor device that is 20% or less. In the semiconductor device according to any one of claims 1 to 4,
A semiconductor device, wherein the ferroelectric capacitor has a concave portion. In the semiconductor device according to any one of claims 1 to 5,
The ferroelectric capacitor is a semiconductor device having a convex portion. In the semiconductor device according to claim 1,
In the curved surface region, a semiconductor device in which a radius of curvature of the first electrode and a radius of curvature of the second electrode are both 1 μm or less. In the semiconductor device according to any one of claims 1 to 7,
A semiconductor device, wherein a projected area of the ferroelectric capacitor onto the main surface of the substrate is 1 μm ² or less. In the semiconductor device according to claim 1,
The thickness of the said capacitive insulating film is a semiconductor device which is 100 nm or less. In the semiconductor device according to any one of claims 1 to 9,
The semiconductor device, wherein the capacitive insulating film is made of a ferroelectric material having a layered perovskite structure. In the semiconductor device according to claim 1,
The semiconductor device, wherein the first electrode and the second electrode are made of at least one material of Pt, Ir, IrO ₂ , PtO ₂ , SrRuO ₃ , Ru, RuO ₂ . The semiconductor device according to any one of claims 1 to 11,
Data is recorded according to the amount of charge held in the ferroelectric capacitor,
A semiconductor device further comprising a field effect transistor for passing a write current to the ferroelectric capacitor and a read current from the ferroelectric capacitor. A substrate, a first electrode provided on the substrate, a capacitive insulating film made of a ferroelectric material provided on the first electrode, and a second electrode provided on the capacitive insulating film Including a ferroelectric capacitor in which a curved region is formed,
The difference between the area a of the first electrode on the side of the capacitive insulating film and the area b of the second electrode on the side of the capacitive insulating film is 35% or less of the electrode area having the smaller area. Semiconductor device. The semiconductor device according to claim 13,
The difference between the area a of the first electrode on the side of the capacitive insulating film and the area b of the second electrode on the side of the capacitive insulating film is 20% or less of the electrode area having the smaller area. Semiconductor device.

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