JP2005116924A5 - - Google Patents
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- JP2005116924A5 JP2005116924A5 JP2003351789A JP2003351789A JP2005116924A5 JP 2005116924 A5 JP2005116924 A5 JP 2005116924A5 JP 2003351789 A JP2003351789 A JP 2003351789A JP 2003351789 A JP2003351789 A JP 2003351789A JP 2005116924 A5 JP2005116924 A5 JP 2005116924A5
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- mask
- conductive film
- thin film
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Claims (17)
前記導電膜上に、前記マスクを覆って半導体膜を形成する薄膜トランジスタの作製方法であって、
前記半導体膜は、前記導電膜の側面に接するように形成することを特徴とする薄膜トランジスタの作製方法。 Patterning the conductive film using a mask,
On the conductive film, a method for manufacturing a thin film transistor that form a semiconductor film over the mask,
The method for manufacturing a thin film transistor, wherein the semiconductor film is formed in contact with a side surface of the conductive film .
前記導電膜上にマスクを形成し、
前記マスクを用いて前記導電膜をパターニングし、
前記マスクを覆って半導体膜を形成する薄膜トランジスタの作製方法であって、
前記半導体膜は、前記導電膜の側面に接するように形成することを特徴とする薄膜トランジスタの作製方法。 Forming a conductive film;
Forming a mask on the conductive film;
Patterning the conductive film using the mask;
A method for manufacturing a thin film transistor that form a semiconductor film over the mask,
The method for manufacturing a thin film transistor, wherein the semiconductor film is formed in contact with a side surface of the conductive film .
前記導電膜上にマスクを形成し、
前記マスクを用いて前記導電膜をパターニングし、
前記マスクを覆って半導体膜を形成する薄膜トランジスタの作製方法であって、
前記半導体膜は、前記導電膜の側面に接するように形成することを特徴とする薄膜トランジスタの作製方法。 A conductive film is formed by an inkjet method,
Forming a mask on the conductive film;
Patterning the conductive film using the mask;
A method for manufacturing a thin film transistor that form a semiconductor film over the mask,
The method for manufacturing a thin film transistor, wherein the semiconductor film is formed in contact with a side surface of the conductive film .
前記マスクはゲート絶縁膜として機能することを特徴とする薄膜トランジスタの作製方法。 In any one of Claim 1 thru | or 3 ,
The method for manufacturing a thin film transistor, wherein the mask functions as a gate insulating film.
前記導電膜上にマスクを形成し、
前記マスクを用いて前記導電膜をパターニングし、
前記マスクを覆って半導体膜を形成し、
前記半導体膜を覆ってゲート絶縁膜を形成し、
前記パターニングされた導電膜間にゲート電極を形成する薄膜トランジスタの作製方法であって、
前記半導体膜は、前記導電膜の側面に接するように形成することを特徴とする薄膜トランジスタの作製方法。 A conductive film is formed by an inkjet method,
Forming a mask on the conductive film;
Patterning the conductive film using the mask;
Forming a semiconductor film covering the mask;
Forming a gate insulating film covering the semiconductor film;
A said patterned conductive film between a method for manufacturing a thin film transistor that form a gate electrode,
The method for manufacturing a thin film transistor, wherein the semiconductor film is formed in contact with a side surface of the conductive film .
前記ゲート電極は前記パターニングされた導電膜間を利用したセルフアライメントにより形成することを特徴とする薄膜トランジスタの作製方法。 Oite to claim 4,
The method for manufacturing a thin film transistor wherein the gate electrode is characterized by formed by self-alignment utilizing between said patterned conductive film.
前記マスクは珪素と酸素との結合で骨格構造が構成され、置換基に少なくとも水素を含み、置換基にフッ素、アルキル基、若しくは芳香族炭化水素のうち少なくとも１種を有するポリマー材料、又は珪素と窒素の結合を有するポリマー材料を用いて形成することを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 1 thru | or 6 ,
The mask has a skeletal structure composed of a bond of silicon and oxygen, has a substituent containing at least hydrogen, and the substituent has at least one of fluorine, an alkyl group, or an aromatic hydrocarbon, or silicon, A method for manufacturing a thin film transistor, which is formed using a polymer material having a nitrogen bond.
前記マスクはポリイミド及びポリビニルアルコールのいずれかを用いて形成することを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 1 thru | or 6 ,
The method for manufacturing a thin film transistor, wherein the mask is formed using one of polyimide and polyvinyl alcohol.
インクジェット法より前記マスクを形成することを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 1 thru | or 8 ,
A method for manufacturing a thin film transistor, wherein the mask is formed by an ink-jet method.
フォトリソグラフィー法より前記マスクを形成することを特徴とする薄膜トランジスタの作製方法。A method for manufacturing a thin film transistor, wherein the mask is formed by a photolithography method.
前記導電膜は、金、銀、銅、白金、パラジウム、タングステン、ニッケル、タンタル、ビスマス、鉛、インジウム、錫、亜鉛、チタン、若しくはアルミニウム、これらからなる合金、又はこれらからなる分散性ナノ粒子を用いて形成することを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 1 thru | or 10 ,
The conductive film is made of gold, silver, copper, platinum, palladium, tungsten, nickel, tantalum, bismuth, lead, indium, tin, zinc, titanium, aluminum, an alloy made of these, or dispersible nanoparticles made of these. A method for manufacturing a thin film transistor, wherein
前記半導体膜に接する導電膜をパターニングして、ソース電極及びドレイン電極を形成することを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 1 thru | or 11 ,
A method for manufacturing a thin film transistor, wherein a source electrode and a drain electrode are formed by patterning a conductive film in contact with the semiconductor film .
前記ソース電極及び前記ドレインの側面に接する半導体膜にチャネルが形成されることを特徴とする薄膜トランジスタ。 In claim 12,
A thin film transistor, wherein a channel is formed in a semiconductor film in contact with side surfaces of the source electrode and the drain.
前記ソース電極及び前記ドレイン電極のいずれかに接続するように電極を形成し、
前記電極上に電界発光層を形成し、
前記電界発光層上に第２の電極を形成することを特徴とする発光装置の作製方法。 Oite to claim 13,
Forming an electrode to connect to either the source electrode or the drain electrode;
Forming an electroluminescent layer on the electrode;
A method for manufacturing a light-emitting device, wherein a second electrode is formed over the electroluminescent layer.
前記電界発光層からの光が、前記電極及び前記第２の電極側へ射出するように、前記電極及び前記第２の電極に透明導材料を用いて形成することを特徴とする発光装置の作製方法。 In claim 14,
Fabrication of a light-emitting device, wherein the electrode and the second electrode are formed using a transparent conductive material so that light from the electroluminescent layer is emitted to the electrode and the second electrode side Method.
前記ソース電極及び前記ドレイン電極のいずれかに接続するように電極を形成し、
前記電極上に配向膜を形成し、
対向電極、カラーフィルタ、及び配向膜が形成された対向基板を張り合わせ、
前記基板間に液晶を注入することを特徴とする液晶表示装置の作製方法。 Oite to claim 13,
Forming an electrode to connect to either the source electrode or the drain electrode;
Forming an alignment film on the electrode;
Laminating the counter substrate on which the counter electrode, the color filter, and the alignment film are formed,
A method for manufacturing a liquid crystal display device, wherein liquid crystal is injected between the substrates.
前記ソース電極及び前記ドレイン電極のいずれかに接続するように電極を形成し、
前記電極上に配向膜を形成し、
前記配向膜上に液晶を滴下し、
対向電極、カラーフィルタ、及び配向膜が形成された対向基板を張り合わせることを特徴とする液晶表示装置の作製方法。
Oite to claim 13,
Forming an electrode to connect to either the source electrode or the drain electrode;
Forming an alignment film on the electrode;
A liquid crystal is dropped on the alignment film,
A method for manufacturing a liquid crystal display device, comprising attaching a counter substrate on which a counter electrode, a color filter, and an alignment film are formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003351789A JP4610173B2 (en) | 2003-10-10 | 2003-10-10 | Method for manufacturing thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003351789A JP4610173B2 (en) | 2003-10-10 | 2003-10-10 | Method for manufacturing thin film transistor |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006228726A Division JP4657173B2 (en) | 2006-08-25 | 2006-08-25 | Thin film transistor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005116924A JP2005116924A (en) | 2005-04-28 |
| JP2005116924A5 true JP2005116924A5 (en) | 2006-10-12 |
| JP4610173B2 JP4610173B2 (en) | 2011-01-12 |
Family
ID=34542929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003351789A Expired - Fee Related JP4610173B2 (en) | 2003-10-10 | 2003-10-10 | Method for manufacturing thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4610173B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4675730B2 (en) * | 2005-09-08 | 2011-04-27 | シャープ株式会社 | Film pattern forming substrate, film pattern forming substrate, thin film transistor forming substrate, liquid crystal display element and manufacturing method thereof |
| GB2448174B (en) * | 2007-04-04 | 2009-12-09 | Cambridge Display Tech Ltd | Organic thin film transistors |
| JP5281457B2 (en) * | 2009-03-31 | 2013-09-04 | 日本曹達株式会社 | Partial thin film forming method |
| GB201112548D0 (en) * | 2011-07-21 | 2011-08-31 | Cambridge Display Tech Ltd | Method of forming a top-gate transistor |
| CN105655295A (en) * | 2016-01-28 | 2016-06-08 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof as well as display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3136193B2 (en) * | 1992-06-05 | 2001-02-19 | 富士通株式会社 | Thin film transistor and method of manufacturing the same |
| JP3528388B2 (en) * | 1995-12-27 | 2004-05-17 | カシオ計算機株式会社 | Method for manufacturing transistor array |
| JPH11340129A (en) * | 1998-05-28 | 1999-12-10 | Seiko Epson Corp | Method and device for manufacturing pattern |
| KR100412743B1 (en) * | 1999-03-30 | 2003-12-31 | 세이코 엡슨 가부시키가이샤 | Method of manufacturing thin-film transistor |
| JP2002033331A (en) * | 2000-05-12 | 2002-01-31 | Semiconductor Energy Lab Co Ltd | Semiconductor device and method for manufacturing the same |
-
2003
- 2003-10-10 JP JP2003351789A patent/JP4610173B2/en not_active Expired - Fee Related
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