JP2005116586A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the deterioration of the SN ratio of a delta sigma type analog-to-digital converting circuit or digital-to-analog converting circuit formed on a semiconductor device due to crosstalk noise detouring through a substrate. <P>SOLUTION: On the semiconductor device, a plurality of regions A and B electrically separated from each other by pn junction separation or insulator separation is formed and a switched capacitor and a digital filter causing crosstalk are disposed dividedly in the regions A and B. Consequently, the high-performance analog-to-digital converting circuit or digital-to-analog converting circuit which can easily prevent the deterioration of the performance of the circuit in the SN ratio caused by the crosstalk noise detouring through the substrate 5 without requiring the setting of complicated operating timing can be provided. At the same time, a plurality of asynchronous analog-to-digital converting circuits or digital-to-analog circuits can be provided easily in one semiconductor device. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an analog-digital conversion circuit and / or a semiconductor device incorporating a digital-analog conversion circuit each having, for example, a digital circuit and a switched capacitor filter. In particular, the present invention relates to a technique related to high performance of a semiconductor device incorporating a delta-sigma type analog-digital conversion circuit or a digital-analog conversion circuit.

  Conventionally, a delta-sigma type analog-digital conversion circuit or a digital-analog conversion circuit having a digital circuit such as a digital filter circuit, a noise shaping circuit, a PWM modulation circuit, and a switched capacitor filter is configured by a semiconductor device. In this semiconductor device, a digital circuit and a switched capacitor filter are constituted by a P-type diffusion layer region formed on a P-type or N-type semiconductor substrate and elements formed in the N-type diffusion layer region.

  In this case, either diffusion layer region of the opposite conductivity type to the semiconductor substrate is electrically isolated by PN junction isolation, but the diffusion layer region of the same conductivity type as the semiconductor substrate is electrically isolated from the semiconductor substrate. Conducted. For this reason, the digital noise of the digital circuit often circulates from the semiconductor substrate and often deteriorates the SN performance of analog circuits such as switched capacitor filters. The same phenomenon also occurs between a plurality of analog-digital conversion circuits or a plurality of digital-analog conversion circuits. Further, in a switched capacitor filter, a switch that generates switching noise, and a switched capacitor filter It also occurs between capacitors and operational amplifiers that are constituent elements. As a result, the SN performance of the delta sigma type analog-digital conversion circuit or digital-analog conversion circuit configured on the semiconductor device is deteriorated.

  This problem, that is, the path through which crosstalk goes from the digital circuit to the analog circuit through the substrate will be described with reference to FIGS.

  A conventional delta-sigma type analog-to-digital conversion circuit or digital-to-analog conversion circuit built in a semiconductor device is a switched circuit in a semiconductor substrate, for example, a P-type substrate 5 as shown in FIGS. An N well 4A and a P well 3A are formed in the capacitor forming region A, and an N well 4B and a P well 3B are formed in the digital filter forming region B. Then, as shown in FIG. 8, P channel MOS transistor 8A, N channel MOS transistor 9A and other elements are formed on N well 4A and P well 3A, respectively, and P channel MOS transistor 8A and P well 3B are formed on P well 3B. Channel MOS transistor 8B, N channel MOS transistor 9B and other elements are formed. A P-channel MOS transistor 8A, N-channel MOS transistor 9A and other elements are used to form a switched capacitor, and a P-channel MOS transistor 8B, N-channel MOS transistor 9B and other elements are used to form a digital filter. ing.

  In this case, the P wells 3A and 3B and the P-type substrate 5 are electrically connected, and the P wells 3A and 3B which are back gates of all the N channel MOS transistors 9A and 9B are electrically connected. . When a digital circuit such as a digital filter operates in this state, a transient current flowing in the gate oxide film capacitor 10 in FIG. 8 existing between the gate of the N-channel MOS transistor 9B and the P well 3B of the back gate becomes digital noise. It goes around the switched capacitor circuit via the P-type substrate 5.

  For the above reasons, when a delta-sigma type analog-to-digital conversion circuit or digital-to-analog conversion circuit having a digital circuit and a switched capacitor filter on a semiconductor device is configured on the semiconductor device, digital noise or switching noise is generated on the semiconductor substrate. It is widely known that crosstalk noise that is transmitted and circulates occurs, and the SN performance deteriorates due to the crosstalk noise.

  In order to avoid such a problem, for example, as disclosed in Patent Documents 1 and 2, a method for preventing the deterioration of SN by shifting the sampling timing of the switched capacitor filter and the operation timing of the digital circuit has been reported. Has been.

  For example, as reported in Patent Document 1, a delta-sigma modulator is often composed of a switched capacitor filter. As shown in FIGS. 9 and 10, after the analog input is subjected to delta sigma modulation by a delta sigma modulator 13, the digital output is taken out by performing decimation by a digital decimation filter 14. A clock ACLK for sampling is supplied from the clock generator 15 to the delta-sigma modulator 13, and a clock DCLK having a phase shifted from the clock ACLK is supplied from the clock generator 15 to the digital decimation filter 14. FIG. 10 also shows a waveform of noise generated in synchronization with the rising and falling edges of both clocks ACLK and DCLK.

As shown in FIGS. 9 and 10, the sampling timing of the switched capacitor filter of the delta sigma modulator 13 and the operation timing of the logic circuit of the digital decimation filter 14 are determined by the clock generator 15 at the timing of the clock ACLK and the clock DCLK. It is shifted by shifting. As a result, the generation timing of digital noise can be shifted from the sampling timing of the switched capacitor filter, and in a semiconductor device incorporating an analog circuit and a digital circuit, it is possible to prevent deterioration of SN performance due to crosstalk noise. it can.
US Pat. No. 4,746,899 JP 63-126320 A

  However, in this method, the operation timing control becomes more complicated as the number of analog-digital conversion circuits or digital-analog conversion circuits built in the semiconductor device increases.

  In addition, the method for improving the S / N ratio in Patent Document 1 is also such that the operation timings of a plurality of delta-sigma analog-digital conversion circuits or digital-analog conversion circuits and other digital circuits built in the semiconductor device are all simple. This is an effective measure only when it is synchronized with one clock. When any one of them has an asynchronous operation timing, it is impossible to prevent the influence of crosstalk noise due to timing control.

  The present invention facilitates deterioration of SN performance due to various crosstalks generated in a semiconductor device incorporating a delta-sigma type analog-to-digital conversion circuit or a digital-to-analog conversion circuit without requiring complicated operation timing setting. An object of the present invention is to provide a high-performance semiconductor device that can be prevented.

  Another object of the present invention is to prevent deterioration of SN performance due to crosstalk in a semiconductor device incorporating a plurality of asynchronous analog-digital conversion circuits or digital-analog conversion circuits and digital circuits. An object of the present invention is to provide a high-performance semiconductor device.

  In order to solve the above problems, a semiconductor device according to a first aspect of the present invention includes an analog-digital conversion circuit or a digital-analog conversion circuit each having a digital circuit and a switched capacitor filter, and is electrically separated. The digital circuit and the switched capacitor filter are divided and arranged in a plurality of regions formed on the substrate in such a state.

  According to this configuration, the digital circuit and the switched capacitor filter are divided and arranged in a plurality of regions formed on the substrate so as to be electrically separated from each other. Crosstalk with the capacitor filter can be prevented, and deterioration of SN performance due to crosstalk can be easily prevented without requiring complicated operation timing setting, and an analog-digital conversion circuit and / or digital- A high-performance semiconductor device incorporating an analog conversion circuit can be obtained. In addition, even a semiconductor device incorporating a plurality of asynchronous analog-digital conversion circuits or a digital-analog conversion circuit and a digital circuit can prevent the above-described crosstalk. Deterioration of performance can be prevented and a high-performance semiconductor device can be obtained.

  Further, the semiconductor device of the second invention includes, for example, one or more analog-digital conversion circuits and / or one or more digital-analog conversion circuits each having a digital circuit and a switched capacitor filter. One or more analog-digital conversion circuits and / or one or more digital-analog conversion circuits are divided and arranged in a plurality of regions formed on the substrate so as to be electrically separated. .

  According to this configuration, one or more analog-to-digital conversion circuits and / or one or more digital-to-analog conversion circuits are divided into a plurality of regions formed on the substrate in an electrically isolated state. Therefore, crosstalk between analog-digital conversion circuits, between digital-analog conversion circuits, or between analog-digital conversion circuits and digital-analog conversion circuits can be prevented, and SN caused by crosstalk can be prevented. Deterioration of performance can be easily prevented without requiring complicated operation timing setting, and a high-performance semiconductor device incorporating an analog-digital conversion circuit and / or a digital-analog conversion circuit can be obtained. Further, even a semiconductor device incorporating a plurality of asynchronous analog-digital conversion circuits or a digital-analog conversion circuit and a digital circuit can prevent the above-described crosstalk, and SN caused by crosstalk. Deterioration of performance can be prevented and a high-performance semiconductor device can be obtained.

  A semiconductor device according to a third aspect of the invention includes, for example, an analog-digital conversion circuit or a digital-analog conversion circuit each having a digital circuit and a switched capacitor filter including a switch, a capacitor, and an operational amplifier as components. Divide one or both of the switch, capacitor and operational amplifier, which are components of the switched capacitor filter, and the remaining one or two into a plurality of regions formed on the substrate in an electrically isolated state Arranged.

  According to this configuration, in the plurality of regions formed on the substrate in a state of being electrically separated, any one of a switch, a capacitor, and an operational amplifier that is a component of the switched capacitor filter and the remaining one or Since the two are divided, the crosstalk between the switch, the capacitor and the operational amplifier, which are the components of the switched capacitor filter, can be prevented, and the deterioration of the SN performance due to the crosstalk can be complicated. A high-performance semiconductor device incorporating an analog-digital conversion circuit and / or a digital-analog conversion circuit can be easily obtained without requiring timing setting. In addition, even a semiconductor device incorporating a plurality of asynchronous analog-digital conversion circuits or a digital-analog conversion circuit and a digital circuit can prevent the above-described crosstalk. Deterioration of performance can be prevented and a high-performance semiconductor device can be obtained.

  The plurality of regions include, for example, a plurality of second conductivity type diffusion layer regions formed on the first conductivity type semiconductor substrate, and the plurality of second conductivity type diffusion layer regions are respectively formed on the first conductivity type semiconductor substrate. By being surrounded by the first conductivity type diffusion layer region formed in, the PN junction is separated.

  The plurality of regions include a plurality of second conductivity type diffusion layer regions formed on the first conductivity type semiconductor substrate, and each of the plurality of second conductivity type diffusion layer regions is a first conductivity type semiconductor substrate. It may be configured to be insulated and separated by being surrounded by the insulator region formed above.

  Further, the plurality of regions include a plurality of diffusion layer regions formed on the insulator substrate, and each of the plurality of diffusion layer regions is surrounded by the insulator region formed on the insulator substrate, It may be configured to be insulated and separated.

  When the first conductivity type semiconductor substrate is a P type substrate, the second conductivity type diffusion layer region is an N type diffusion layer region, and the first conductivity type diffusion layer region is a P type diffusion layer region. When the first conductivity type semiconductor substrate is an N type substrate, the second conductivity type diffusion layer region is a P type diffusion layer region, and the first conductivity type diffusion layer region is an N type diffusion layer region.

  As described above, in the semiconductor device of the present invention, when a delta-sigma analog-digital conversion circuit or a digital-analog conversion circuit is incorporated, a plurality of regions formed on the substrate in an electrically separated state The digital circuit and the switched capacitor filter are respectively divided and arranged, or one or more analog-digital conversion circuits and / or one or more digital-analog conversion circuits are separately arranged, or switched By dividing and arranging any one of the switch, capacitor and operational amplifier, which are the components of the capacitor filter, and the remaining one or two, crosstalk between the divided elements can be prevented, Degradation of SN performance due to crosstalk requires complicated operation timing setting Easily prevented without an analog - digital converter and / or digital - analog conversion circuit can be obtained a high-performance semiconductor device with a built-in. Further, even a semiconductor device incorporating a plurality of asynchronous analog-digital conversion circuits or a digital-analog conversion circuit and a digital circuit can prevent the above-described crosstalk, and SN caused by crosstalk. Deterioration of performance can be prevented and a high-performance semiconductor device can be obtained.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1: corresponding to claims 1 and 4)
The semiconductor device incorporating the delta-sigma type analog-to-digital conversion circuit or the digital-to-analog conversion circuit in the first embodiment of the present invention is, for example, as shown in FIGS. 1 (a) and 1 (b). A switched capacitor forming region A and a digital filter forming region B (a plurality of regions) are arranged and formed on a semiconductor substrate, for example, a P-type substrate 5 in an electrically separated state.

  In the switched capacitor forming region A, a switched capacitor for forming a delta sigma type analog-digital conversion circuit or a digital-analog conversion circuit is formed. In the digital filter forming region B, for example, a digital filter (digital circuit) for forming a delta sigma type analog-digital conversion circuit or a digital-analog conversion circuit is formed. That is, the digital filter and the switched capacitor filter are separately arranged.

  More specifically, the plurality of regions A and B include a plurality of second conductivity type diffusion layer regions formed on the P-type substrate 5, for example, N-type diffusion layer regions 1A and 1B. The N type diffusion layer regions 1 </ b> A and 1 </ b> B are surrounded by a first conductivity type diffusion layer region formed on the P type substrate 5, for example, the P type diffusion layer region 2, so that the PN junction is separated.

  An N well 4A and a P well 3A are formed in the N type diffusion layer region 1A, and an N well 4B and a P well 3B are formed in the N type diffusion layer region 1B. As shown in FIG. 6, P channel MOS transistor 8A, N channel MOS transistor 9A and other elements are formed on N well 4A and P well 3A, respectively, and also on N well 4B and P well 3B. P channel MOS transistor 8B, N channel MOS transistor 9B and other elements are formed. A P-channel MOS transistor 8A, an N-channel MOS transistor 9A and other elements are used to form a switched capacitor, and a P-channel MOS transistor 8B, an N-channel MOS transistor 9B and other elements are used to form a digital filter. ing.

  In this case, the elements used in the circuit are electrically isolated from the P-type substrate 5 by the PN junction separation by the N-type diffusion layer regions 1A and 1B and the P-type diffusion layer region 2.

  Therefore, in the conventional example, as shown in FIG. 8, P wells 3A and 3B of all N channel MOS transistors are electrically connected to P type substrate 5, whereas in this embodiment, P wells 3A and 3B are The junction capacitance 11 between the P wells 3A, 3B and the N type diffusion layer regions 1A, 1B and the PN junction capacitance 12 between the N type diffusion layer regions 1A, 1B and the P type substrate 5 are in series with the gate oxide film capacitance 10. Therefore, the impedance between the P wells 3A and 3B of the P channel MOS transistors 9A and 9B incorporated in the semiconductor device is remarkably increased. Thereby, the digital noise due to the transient current of the gate oxide film capacitor 10 does not affect the switched capacitor filter and does not deteriorate the SN ratio.

  In this case, when an N-type substrate is used as the semiconductor substrate, the N-type diffusion layer regions 1A and 1B are changed to P-type diffusion layer regions, and the P-type diffusion layer region 2 is changed to an N-type diffusion layer region.

(Embodiment 2: corresponding to claims 2 and 4)
The semiconductor device incorporating one or more delta sigma type analog-digital conversion circuits or one or more digital-analog conversion circuits in the second embodiment of the present invention is as shown in FIGS. In addition, a digital-analog conversion circuit formation region C and an analog-digital conversion circuit formation region D (a plurality of regions) are arranged and formed on a first conductivity type semiconductor substrate, for example, a P-type substrate 5. ing.

  In the digital-analog conversion circuit formation region C, a delta-sigma type digital-analog conversion circuit is formed. In the analog-digital conversion circuit formation region D, a delta-sigma analog-digital conversion circuit is formed. That is, the delta sigma type digital-analog conversion circuit and the delta sigma type analog-digital conversion circuit are arranged separately.

  The specific configuration of the plurality of regions C and D is the same as that in FIG. 1, and the circuits formed in each region are different.

  Note that FIG. 2 shows an example in which the analog-digital conversion circuit and the digital-analog conversion circuit are divided and arranged in a plurality of areas. Something to arrange is also conceivable. Further, a configuration in which a plurality of digital-analog conversion circuits are dividedly arranged in a plurality of regions can be considered in the same manner.

  According to this embodiment, a plurality of analog-digital conversion circuits or a plurality of digital-analog conversion circuits or digital circuits are divided and arranged in a plurality of regions that can be electrically separated. Based on the same principle as described above, crosstalk noise that occurs between a plurality of analog-digital conversion circuits or digital-analog conversion circuits or digital circuits through the substrate is prevented, and deterioration of the SN ratio due to crosstalk is prevented. .

(Third embodiment: corresponding to claims 3 and 4)
The semiconductor device incorporating the delta-sigma type analog-to-digital conversion circuit or the digital-to-analog conversion circuit in the third embodiment of the present invention is the same as that in the first embodiment as shown in FIGS. The switch formation region E, the capacitor formation region F, and the operational amplifier formation region G are formed on the P-type substrate 5 in a plurality of regions that can be electrically separated by the above configuration. 4C is an N-well. Others are the same as in FIG.

  Then, the switch, capacitor, and operational amplifier of the switched capacitor filter are divided and arranged in the switch formation region E, the capacitor formation region F, and the operational amplifier formation region G, so that the switching of the switched capacitor filter is performed according to the same principle as described above. Noise prevents the SNR from deteriorating as crosstalk noise to capacitors and operational amplifiers that are constituent elements of the noise.

(Embodiment 4: corresponding to claims 1 and 5)
As shown in FIGS. 4A and 4B, the semiconductor device incorporating the delta-sigma type analog-to-digital conversion circuit or the digital-to-analog conversion circuit according to the fourth embodiment of the present invention has an N-type diffusion layer region 1A. , 1B is surrounded by an insulator region 6 instead of the P-type diffusion layer region 2, so that the N-type diffusion layer regions 1A, 1B are electrically separated. Others are the same as the embodiment of FIG. In this embodiment, a plurality of regions that can be electrically separated are formed by PN junction separation and insulator separation. In this electrically isolated region, P wells 3A and 3B and N wells 4A and 4B are formed as in the first embodiment, and P channel MOS transistors 8A and 8B, N channel MOS transistors 9A and 9B, and others. These elements are formed and a switched capacitor filter and a digital circuit are formed using these elements.

  In this case, the elements used in the circuit are electrically separated by PN junction separation between the N-type diffusion layer regions 1A and 1B and the P-type substrate 5, and the lateral N-type diffusion layer regions 1A and 1B. The space is insulated and separated by the insulator region 6.

  Thereby, the crosstalk noise through the P-type substrate 5 can be prevented by the same principle as in the first embodiment, and the SN ratio can be prevented from deteriorating due to the crosstalk noise. When an N-type substrate is used as the substrate, the N-type diffusion layer regions 1A and 1B are changed to P-type diffusion layer regions.

(Embodiment 5: corresponding to claims 1 and 6)
The semiconductor device incorporating the delta-sigma type analog-digital conversion circuit or digital-analog conversion circuit in the fifth embodiment of the present invention is replaced with a P-type substrate 5 as shown in FIGS. The other is the same as that of the first embodiment.

  That is, the N type diffusion layer regions 1A and 1B are formed on the insulator substrate 7, and the N type diffusion layer regions 1A and 1B are separated by the insulator region 6. Thus, a plurality of regions that can be electrically separated are formed by insulator separation. P wells 3A and 3B and N wells 4A and 4B and other elements are formed in this electrically isolated region, and P channel MOS transistors 8A and 8B, N channel MOS transistors 9A and 9B, and other elements are formed. Then, using these elements, a switched capacitor filter and a digital circuit are formed. In this case, elements used in the circuit are electrically insulated and separated by the insulator region 6 and the insulator substrate 7. Thereby, it is possible to prevent crosstalk noise via the substrate and to prevent deterioration of the S / N ratio due to crosstalk noise based on the same principle as in the first embodiment. N-type diffusion layer regions 1A and 1B may be P-type diffusion layer regions.

  In the above-described embodiments of FIGS. 4 and 5, the case where the switched capacitor formation region A and the digital filter formation region B are formed has been described as an example. An analog conversion circuit formation region C and an analog-digital conversion circuit formation region D may be formed, and a switch formation region E, a capacitor formation region F, and an operational amplifier formation region G may be formed in the same manner as in FIG. .

  The semiconductor device according to the present invention can easily prevent the deterioration of SN performance due to crosstalk without requiring complicated operation timing setting, and has a built-in analog-digital conversion circuit and / or digital-analog conversion circuit. It has the effect that a high performance semiconductor device can be obtained, and is useful as a semiconductor device incorporating a delta-sigma type analog-digital conversion circuit or a digital-analog conversion circuit.

(A) is a schematic top view which shows the structure of the semiconductor device of Embodiment 1 of this invention, (b) is XY sectional drawing of the figure (a). (A) is a schematic top view which shows the structure of the semiconductor device of Embodiment 2 of this invention, (b) is XY sectional drawing of the figure (a). (A) is a schematic top view which shows the structure of the semiconductor device of Embodiment 3 of this invention, (b) is XY sectional drawing of the figure (a). (A) is a schematic top view which shows the structure of the semiconductor device of Embodiment 4 of this invention, (b) is XY sectional drawing of the figure (a). (A) is a schematic top view which shows the structure of the semiconductor device of Embodiment 5 of this invention, (b) is XY sectional drawing of the figure (a). It is a schematic diagram which shows operation | movement of the semiconductor device of Embodiment 1 of this invention. (A) is a schematic top view which shows the structure of the semiconductor device which incorporates the analog-digital conversion circuit or digital-analog conversion circuit in a prior art example, (b) is XY sectional drawing of the figure (a). It is a schematic diagram explaining the noise wraparound operation in the prior art of the semiconductor device. It is a block diagram which shows the noise reduction method by the operation timing in a prior art. FIG. 10 is a timing chart showing the operation timing of FIG. 9.

Explanation of symbols

1A, 1B N-type diffusion layer region 2 P-type diffusion layer region 3A, 3B P-well 4A, 4B N-well 5 P-type substrate 6 Insulator region 7 Insulator substrate 8A, 8B P-channel MOS transistor 9A, 9B N-channel MOS transistor DESCRIPTION OF SYMBOLS 10 Gate capacity of N channel MOS transistor 11 Junction capacity of P well and N type diffusion layer region 12 Junction capacity of N type diffusion layer region and P type substrate 13 Delta sigma modulator composed of switched capacitor filter 14 Digital filter 15 Clock generator

Claims (6)

A semiconductor device including an analog-digital conversion circuit or a digital-analog conversion circuit each having a digital circuit and a switched capacitor filter,
A semiconductor device, wherein the digital circuit and the switched capacitor filter are divided and arranged in a plurality of regions formed on a substrate in a state of being electrically separated. A semiconductor device incorporating one or more analog-digital conversion circuits and / or one or more digital-analog conversion circuits,
The one or more analog-digital conversion circuits and / or the one or more digital-analog conversion circuits are divided and arranged in a plurality of regions formed on the substrate so as to be electrically separated from each other. A semiconductor device. A semiconductor device including an analog-digital conversion circuit or a digital-analog conversion circuit each having a switched capacitor filter including a switch, a capacitor, and an operational amplifier as components,
Any one of the switch, capacitor, and operational amplifier, which is a component of the switched capacitor filter, and the remaining one or two are divided into a plurality of regions formed on the substrate in an electrically isolated state. A semiconductor device characterized by being arranged. The plurality of regions include a plurality of second conductivity type diffusion layer regions formed on the first conductivity type semiconductor substrate, and the plurality of second conductivity type diffusion layer regions are respectively formed on the first conductivity type semiconductor substrate. 4. The semiconductor device according to claim 1, wherein the semiconductor device is isolated by being surrounded by a first conductivity type diffusion layer region formed on the substrate. The plurality of regions include a plurality of second conductivity type diffusion layer regions formed on the first conductivity type semiconductor substrate, and the plurality of second conductivity type diffusion layer regions are respectively formed on the first conductivity type semiconductor substrate. 4. The semiconductor device according to claim 1, wherein the semiconductor device is isolated by being surrounded by an insulator region formed on the substrate. The plurality of regions include a plurality of diffusion layer regions formed on the insulator substrate, and the plurality of diffusion layer regions are separated by being surrounded by the insulator regions formed on the insulator substrate. The semiconductor device according to claim 1, 2, or 3.

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