JP2005109035A - Manufacturing method for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the accuracy of the anisotropic etching of a film to be worked by reducing a line-edge roughness. <P>SOLUTION: An SiN film 9 is deposited thin on the pattern 4a of the SiN film, having comparatively deep irregularities 4b at line edges. The SiN films 4a and 9 are etched isotropically by a CDE method by the mixed gas of a CF<SB>4</SB>gas and an O<SB>2</SB>gas, and the patterns 10 of the new SiN films are formed. A tungsten film 3 is etched anisotropically by an RIE method, while using the patterns 10 of the SiN films as protective masks. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  With the recent miniaturization of semiconductor processes, the problem of line edge roughness that occurs during etching of polysilicon, wiring metal, etc. has become more prominent.

  In the normal etching process, the etched film is etched using the patterned photoresist formed on the etched film as a protective mask.

  For example, after uniformly applying a photoresist on the film to be etched, the portion to be dissolved is exposed and dissolved in a developer by a catalytic reaction of an acid generated from a photoacid generator contained in the photoresist. Change the photoresist.

  The exposed photoresist is removed by the developer, but the unexposed portions are not removed, so that a photoresist pattern can be formed. This photoresist pattern is transferred to the film to be etched.

  Here, since the photoresist material is mainly made of a polymer (polymer resin) having a large molecular unit, the unit dissolved by the developer becomes large. Therefore, as shown in FIG. 7, irregularities 104 are generated at the line edge of the photoresist 103 on the etching target film 102 formed on the silicon substrate 101. As shown in FIG. 8, since the irregularities 104 of the line edge of the photoresist 103 are transferred as they are to the etched film 102, the width of the etched film 102, for example, the gate electrode of the transistor is locally reduced. As a result, transistor characteristics deteriorate due to an increase in off-state current.

In order to eliminate this line edge roughness, there is a proposal to improve the line edge roughness by selectively heating the surface of the photoresist pattern by irradiating light to the photoresist pattern formed through the exposure / development process. (For example, refer to Patent Document 1).
JP 2001-332484 A

  As described above, since the molecules of the photoresist itself are large, even if the photoresist is processed by the method described in Patent Document 1, there is a limit in molecular unit for eliminating unevenness generated on the surface. Therefore, the unevenness on the surface is transferred to the film to be etched, and there is a limit to improving the line edge roughness.

  Therefore, an object of the present invention is to improve the accuracy of anisotropic etching of a film to be processed by reducing line edge roughness.

In order to solve the above problems, according to one embodiment of the present invention, a first film forming step of depositing a first film on a semiconductor substrate and a second film of depositing a second film on the first film are performed. And forming a resist pattern on the second film, and anisotropically etching the second film using the resist pattern as a mask to form the resist pattern on the first film. A first etching step for forming a first mask pattern comprising the second film, a resist stripping step for stripping the resist pattern, and the second film for forming the first mask pattern. A third film forming step of depositing a third film having substantially the same etching rate as the second film, and isotropically etching the second and third films to form the first film A second film comprising at least the second film on the film; There is provided a method for manufacturing a semiconductor device, comprising: a second etching step for forming a mask pattern of the second layer; and a third etching step for anisotropically etching the first film using the second mask pattern as a mask. The

  According to another aspect of the present invention, a first film forming step for depositing a first film on a semiconductor substrate, and a second film for depositing a second film composed of a plurality of layers on the first film. Film forming step, a resist pattern forming step of forming a resist pattern on the uppermost layer of the second film, and an uppermost layer of the second film anisotropic with the resist pattern as a mask A first etching step of etching to form a first mask pattern comprising the uppermost layer of the second film on the lower layer of the uppermost layer of the second film; and the resist pattern A resist stripping step for stripping and an uppermost layer film of the second film forming the first mask pattern have substantially the same etching rate as the uppermost layer film of the second film. A third film forming step of depositing a third film; A second layer comprising at least the uppermost layer of the second layer on the lower layer of the uppermost layer of the second layer by isotropically etching the uppermost layer of the second layer and the third layer. A second etching step for forming a mask pattern, and anisotropically etching a film below the uppermost film of the second film by using the second mask pattern as a mask to form the mask pattern on the first film A third etching step for forming a third mask pattern made of at least the second film; and a fourth etching step for anisotropically etching the first film using the third mask pattern as a mask. A method for manufacturing a semiconductor device is provided.

  According to the present invention, line edge roughness can be reduced and the precision of anisotropic etching of a film to be processed can be improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
As a method for manufacturing a semiconductor device according to the first embodiment of the present invention, a method for forming a gate electrode using polysilicon as a film to be etched is shown in FIGS.

  First, in FIG. 1A, the silicon substrate 1 is heat-treated in an oxygen atmosphere to form a gate oxide film 2 on the silicon substrate 1. Subsequently, a tungsten film 3 is deposited on the gate oxide film 2 by a CVD (Chemical Vapor Deposition) method.

  Next, as shown in FIG. 1B, a SiN film 4 is deposited on the tungsten film 3 by plasma CVD.

  Then, as shown in FIG. 1C, a photoresist 5 is applied on the SiN film 4. The photoresist 5 used in this embodiment is a positive resist. The photoresist may be either a positive type or a negative type.

After the silicon substrate 1 is pre-baked, the reticle 6 on which the pattern 6 a is formed is aligned on the upper surface of the photoresist 5, and the photoresist 5 is irradiated with ultraviolet rays 7 from the upper surface through the reticle 6. Acid is generated from the photoacid generator contained in the region of the photoresist 5 located on the lower surface of the pattern 6a region of the reticle 6 through which the ultraviolet rays 7 pass, and the polymer in this region is altered so as to have a property of dissolving in an alkaline aqueous solution.

  Next, as shown in FIG. 2D, the photoresist 5 is developed with a developer (not shown) that is an alkaline aqueous solution, and the region of the photoresist 5 that has been altered by the ultraviolet rays 7 in the step of FIG. Removal is performed to form a resist pattern 5a. Then, rinse with pure water. The development method is not particularly limited, and any method such as immersion development, spray development, shower development, paddle development, etc. may be used. After development, post-baking is performed to improve etching resistance.

  Since the photoresist 5 is mainly composed of a polymer, the unit dissolved in the developer is large, and the line edge of the photoresist pattern 5a after development has relatively deep irregularities 5b on the surface as shown in FIG. .

Next, as shown in FIG. 2 (e), a mixed gas 8 of CF ₄ gas and O ₂ is caused to collide from the resist pattern 5a and the exposed upper surface of the SiN film 4 by RIE (Reactive Ion Etching), thereby causing the resist pattern 5a to collide. The exposed SiN film 4 is anisotropically etched using a protective mask.

  In this etching by the RIE method, since the photoresist pattern 5a having the unevenness 5b at the line edge is used as a protective mask, the surface of the SiN film 4 to be etched has a relatively deep unevenness 4b as in the photoresist pattern 5a. The resulting pattern 4a of the SiN film 4 is formed.

  Next, as shown in FIG. 2F, the photoresist pattern 5a is peeled off.

  Further, as shown in FIG. 3G, a SiN film 9 is further deposited on the pattern 4a of the SiN film 4 and the exposed tungsten film 3 by a plasma CVD method. Due to the process in FIG. 2E, relatively deep irregularities 4b are generated at the line edge of the pattern 4a of the SiN film 4.

  In general, when an attempt is made to deposit deposits evenly on an uneven surface, the amount of deposition in the recesses is greater than the protrusions. Accordingly, the concave portion at the line edge of the pattern 4a of the SiN film 4 is deposited to have a larger film thickness than the convex portion. As a result, the unevenness 9a of the line edge of the SiN film 9 formed on the pattern 4a of the SiN film 4 is reduced as compared with the unevenness 4b of the line edge of the pattern 4a of the SiN film 4 formed in FIG. Will be.

Next, as shown in FIG. 3H, the SiN films 4a and 9 are isotropically etched by a CDE (Chemical Dry Etching) method using a mixed gas obtained by adding O ₂ gas to CF ₄ gas.

Here, the reaction between the SiN films 4a and 9 and the mixed gas of CF ₄ and O ₂ is as follows. CF ₄ dissociates into C and F atoms as CF ₄ → C + 4F. In the absence of plasma, these C atoms and F atoms recombine, but when O ₂ is added, CO and CO ₂ are generated (CF ₄ + O ₂ → CO, CO ₂ + COF ₃ ). The by-product COF ₃ undergoes a reaction of COF ₃ → COF ₂ + F to generate ground-state long-life F atoms. Since these F atoms cause a reaction of SiN films 4a and 9 and Si + 4F → SiF ₄ , the SiN films 4a and 9 can be etched. Further, the etching product SiF ₄ reacts with O ₂ (SiF ₄ + O ₂ → Si _x O _y , where x and y are positive integers) to produce oxyfluoride Si _x O _y .

In such a reaction, since the concentration of the etching product SiF ₄ is higher in a portion having a negative curvature, such as a concave portion on the uneven surface, and the equilibrium vapor pressure with respect to the gas phase substance is lower than that in the flat portion, the oxyfluoride is reduced. Si _x O _y is easily deposited.

Therefore, in the recesses on the uneven surface, the deposition of oxyfluoride Si _x O _y is promoted compared to the flat part, and the etching rate is lowered.

On the other hand, oxyfluoride Si _x O _y is less likely to be deposited in a portion having a positive curvature, such as a convex portion on the concavo-convex surface, compared to a flat portion, and thus the etching rate is increased.

  When a film having an uneven surface is etched in this manner, the etching is delayed in the concave portion and the etching proceeds in the convex portion, so that the uneven surface is gradually flattened by etching.

  Accordingly, by subjecting the SiN films 4a and 9 to isotropic etching by the CDE method, the line edge unevenness 4b of the SiN film pattern 4a generated by the process of FIG. A new shallow pattern 10 is formed.

Next, as shown in FIG. 3I, the tungsten film 3 is anisotropically etched by the RIE method using NH ₃ -based mixed gas using the SiN film pattern 10 as a protective mask. Since the surface of the SiN film is flattened by the process of FIG. 3H, the line edge of the tungsten film 3a etched using this pattern 10 as a protective mask has few irregularities. Thus, the line edge roughness can be improved.

(Second Embodiment)
In the first embodiment described above, a single-layer SiN film is used as a mask. However, the present invention is not limited to this, and a multi-layer mask of two or more layers may be used. A method for manufacturing a semiconductor device according to the second embodiment will be described with reference to FIGS.

  First, in FIG. 4A, the silicon substrate 21 is heat-treated in an oxygen atmosphere to form a gate oxide film 22 on the silicon substrate 21. Subsequently, polysilicon 23 is deposited on the gate oxide film by the CVD method. Further, a TEOS (Tetra Ethoxy Silane) film 24 and a SiN film 25 are sequentially deposited on the polysilicon 23. A photoresist pattern 26 is formed on the SiN film 25. As described above, since the molecules of the photoresist 26 made of a polymer are large, relatively deep irregularities 26 a are generated at the line edge of the photoresist 26.

  Next, as shown in FIG. 4B, the SiN film 25 exposed by the RIE method is anisotropically etched using the resist pattern 26 as a protective mask.

  Since the photoresist pattern 26 having the relatively deep unevenness 26a at the line edge is transferred to the SiN film 25, the line edge of the etched SiN film pattern 25a has the relatively deep unevenness 25b. .

  Then, as shown in FIG. 4C, after the resist pattern 26 is peeled off, a thin SiN film 27 is deposited on the SiN film pattern 25a and the exposed TEOS film 24 by plasma CVD. As described in the first embodiment, by depositing a thin film on the SiN film having the relatively deep unevenness 25b on the surface, the unevenness 27a on the surface becomes shallow.

Next, as shown in FIG. 5D, the SiN films 25a and 27 are isotropically etched by the CDE method using a mixed gas obtained by adding O ₂ gas to CF ₄ gas. Even in this step, the unevenness of the line edge can be further reduced, so that the pattern 28 of the SiN film is further planarized.

Further, as shown in FIG. 5E, the TEOS film 24 is anisotropically etched by the RIE method of C ₄ F ₈ based gas using the SiN film pattern 28 as a protective mask. SiN film pattern 28
Since the line edge unevenness 28a is shallow, the line edge of the transferred TEOS film pattern 24a also becomes shallower.

  Then, as shown in FIG. 5F, the unnecessary pattern of the SiN film 28 is peeled off.

  Next, as shown in FIG. 6G, the polysilicon 23 is etched using the TEOS film pattern 24a as a protective mask. Since the line edge irregularities 24b are shallow TEOS film patterns 24a, the line edge irregularities 23b of the polysilicon pattern 23a are also shallow.

  Note that the step of FIG. 5F may be omitted. Even if the polysilicon 23 is etched using the laminated pattern of the SiN film 28 and the TEOS film 24 as a protective mask, the same effect can be obtained.

  Next, as shown in FIG. 6H, the TEOS film pattern 24a can be peeled off to form a gate electrode 23a made of polysilicon having a shallow line edge unevenness 23b.

  Thus, also in the second embodiment of the present invention, the problem of the edge roughness of the polysilicon pattern can be reduced.

  3 (g) and FIG. 3 (h) of the first embodiment of the present invention described above and FIGS. 4 (c) and 5 (d) of the second embodiment of the present invention. As a modification of the process, the process of isotropic etching by the CDE method after depositing the SiN thin films 9 and 27 on the SiN film patterns 4a and 25a can be repeated two or more times. In this case, the unevenness of the line edge of the SiN film patterns 10 and 28 can be further flattened, so that the line etch roughness can be further improved.

  The etching method of the thin films 9 and 27 deposited on the SiN film patterns 4a and 25a is not limited to the CDE method, and other isotropic etching methods such as a wet etching method may be used.

  In addition, the thin film deposited on the SiN film patterns 4a and 25a is not limited to the same material as SiN, but a thin film made of a material having substantially the same etching rate with respect to an etching gas or an etchant. May be.

In the embodiment, the tungsten film 3 and the polysilicon 23 are used as the etching target film, and the SiN films 4 and 25 are used as the mask. However, the present invention is not limited to these materials. For example, the mask material may be amorphous Si, SiO ₂ or the like.

It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is the perspective view which showed the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is the perspective view which showed the manufacturing method of the conventional semiconductor device. It is the perspective view which showed the manufacturing method of the conventional semiconductor device.

Explanation of symbols

1, 2: 1: Silicon substrate 2, 22: Gate oxide film 3: Tungsten film 3a: Tungsten film pattern (gate electrode)
4, 9, 25, 27: SiN film 4a, 10, 25a, 28: SiN film pattern 5: Photo resist 5a, 26: Photo resist pattern 6: Reticle 6a: Reticle pattern 7: Ultraviolet light 8: CF ₄ / O ₂ mixed gas 23: polysilicon 23a: pattern of polysilicon (gate electrode)
24: TEOS film

Claims (5)

A first film forming step of depositing a first film on a semiconductor substrate;
A second film forming step of depositing a second film on the first film;
A resist pattern forming step of forming a resist pattern on the second film;
A first etching step of anisotropically etching the second film using the resist pattern as a mask to form a first mask pattern made of the second film on the first film;
A resist stripping step for stripping the resist pattern;
A third film forming step of depositing a third film having substantially the same etching rate as the second film on the second film forming the first mask pattern;
A second etching step of isotropically etching the second and third films to form a second mask pattern made of at least the second film on the first film;
And a third etching step of anisotropically etching the first film using the second mask pattern as a mask. A first film forming step of depositing a first film on a semiconductor substrate;
A second film forming step of depositing a second film composed of a plurality of layers on the first film;
A resist pattern forming step of forming a resist pattern on the uppermost film of the second film;
Using the resist pattern as a mask, the uppermost film of the second film is anisotropically etched to form the uppermost film of the second film on the lower film of the uppermost film of the second film. A first etching step for forming a first mask pattern comprising:
A resist stripping step for stripping the resist pattern;
A third film having substantially the same etching rate as the uppermost film of the second film is deposited on the uppermost film of the second film forming the first mask pattern. A third film forming step;
The uppermost film of the second film and the third film are isotropically etched to form at least the uppermost film of the second film on the lower film of the uppermost film of the second film. A second etching step for forming a second mask pattern comprising:
A third mask composed of at least the second film on the first film by anisotropically etching a film below the uppermost film of the second film using the second mask pattern as a mask. A third etching step for forming a pattern;
And a fourth etching step of anisotropically etching the first film using the third mask pattern as a mask.   The method of manufacturing a semiconductor device according to claim 1, wherein the third film is made of the same material as the second film.   The method of manufacturing a semiconductor device according to claim 1, wherein the isotropic etching is etching by a chemical dry etching method or a wet etching method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the third film forming step and the second etching step are repeated a plurality of times.

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