JP2005101043A - Method for manufacturing multilayer printed-wiring board having recess for embedding electronic component and through hole - Google Patents

Method for manufacturing multilayer printed-wiring board having recess for embedding electronic component and through hole Download PDF

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JP2005101043A
JP2005101043A JP2003329615A JP2003329615A JP2005101043A JP 2005101043 A JP2005101043 A JP 2005101043A JP 2003329615 A JP2003329615 A JP 2003329615A JP 2003329615 A JP2003329615 A JP 2003329615A JP 2005101043 A JP2005101043 A JP 2005101043A
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wiring board
printed wiring
hole
electronic component
multilayer printed
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Satoshi Otsuki
聡 大槻
Yoichi Matsuoka
洋一 松岡
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Shinko Seisakusho KK
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Shinko Seisakusho KK
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<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer printed-wiring board having a recess for embedding electronic components and a through hole that reduces costs, prevents deterioration in insulation performance, prevents the restriction of applicability, further, can suppress influence to a circuit portion, and enables high-density wiring and high-density packaging. <P>SOLUTION: At the upper side of a lower printed-wiring board having a circuit 9 for electronic components to be embedded, an upper printed-wiring board 16 on which a hole of desired size is punched is heated and crimped via a bonding sheet 11 at a place in which the electronic components are packaged. Additionally, the through hole 4 and external layer wiring 8 are formed, and then the bonding sheet 11 at the bottom of the recess 13 for embedding electronic components of the multilayer printed-wiring board is removed by laser machining or chemical treatment for exposing the circuit 9 for electronic components. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、電子部品埋込み用の窪みを備える多層プリント配線板の製造方法に関する。   The present invention relates to a method for manufacturing a multilayer printed wiring board having a recess for embedding an electronic component.

電子機器の軽薄短小化および多機能化に伴い、電子機器に使用するプリント配線板にも、高速度化、薄板化の要求が高まっている。また、電子機器に使用する電子部品の再配線用に、プリント配線板を用いることが増えているが、その場合には、一層の高密度化、薄板化が求められている。   As electronic devices become lighter, thinner, and more multifunctional, printed wiring boards used in electronic devices are also demanded to be faster and thinner. In addition, printed wiring boards are increasingly used for rewiring electronic components used in electronic devices. In that case, higher density and thinner plates are required.

そのため、比較的、厚い電子部品および半導体のベアチップ等をプリント配線板の窪みに搭載したり、挟み込むことにより、層厚を抑えたり、面積を低減することが可能な多層プリント配線板に対する要求が、年々増加している。   Therefore, there is a demand for a multilayer printed wiring board capable of suppressing the layer thickness or reducing the area by mounting or sandwiching relatively thick electronic components and semiconductor bare chips, etc. in the depression of the printed wiring board. Increasing year by year.

たとえば、特開平7−22536号公報には、多層プリント配線板の内層回路を削り出して形成した窪みの内部に半導体を搭載する多層プリント配線板が記載されている。   For example, Japanese Patent Application Laid-Open No. 7-22536 discloses a multilayer printed wiring board in which a semiconductor is mounted in a recess formed by cutting out an inner layer circuit of the multilayer printed wiring board.

従来、電子部品埋込み用の窪みを備える多層プリント配線板を製造する場合、積層後に内層パターンを削り出す方法が用いられてきた。内層パターンを刃物によって削り出す場合、切削装置の上下方向位置精度と、プリント配線板の厚さバラツキを吸収するために、70〜100μmの厚さの内層銅厚が必要となるが、この厚さでは、近年増加しているフリップチップ実装に対応する120μmピッチ以下のパターンを形成することは、薄くて困難である。また、削り出し加工は、配線板を重ねて加工することができず、1枚ごとの加工となり、作業効率が悪いこと、および刃物の先端部分しか使用しないことから、コスト高となる問題がある。   Conventionally, when manufacturing a multilayer printed wiring board having a recess for embedding an electronic component, a method of cutting out an inner layer pattern after lamination has been used. When cutting the inner layer pattern with a blade, the inner layer copper thickness of 70 to 100 μm is required to absorb the vertical position accuracy of the cutting device and the thickness variation of the printed wiring board. Then, it is thin and difficult to form a pattern with a pitch of 120 μm or less corresponding to flip chip mounting which has been increasing in recent years. In addition, since the cutting process cannot be performed by overlapping the wiring boards, it is a process for each sheet, and there is a problem that the working efficiency is low and only the tip portion of the blade is used, resulting in high cost. .

この対策として、電子部品を埋め込むための孔を設けた上側プリント配線板と、この孔に埋め込まれる電子部品用の回路を有する下側プリント配線板とを、前記上側プリント配線板の孔に対応する位置に孔を有する接着剤層を介して、接着して形成した電子部品埋込み用の窪み備える多層プリント配線板がある。このように形成した電子部品埋込み用の窪みを備える多層プリント配線板では、上側プリント配線板と下側プリント配線板の電気的接続を取るために、スルーホールを用いる。   As a countermeasure, an upper printed wiring board provided with a hole for embedding an electronic component and a lower printed wiring board having a circuit for an electronic component embedded in the hole correspond to the hole of the upper printed wiring board. There is a multilayer printed wiring board provided with a depression for embedding an electronic component formed by bonding through an adhesive layer having a hole at a position. In the multilayer printed wiring board having the depressions for embedding electronic parts formed in this way, through holes are used to establish electrical connection between the upper printed wiring board and the lower printed wiring board.

たとえば、かかるスルーホール付きの多層プリント配線板を製造するためには、(1)電子部品埋込み用の孔を設けた上側プリント配線板と、電子部品用の回路を有する下側プリント配線板とを、該電子部品埋込み用の孔に対応する位置に孔を有する接着剤層を介して接合し、窪み開口部を形成する。(2)スルーホール用の貫通孔を開口し、その後、窪み開口部に保護膜を形成し、表面全面に無電解銅めっき層を設けて、スルーホール用の貫通孔の内面に導電性を付与する。(3)窪み開口部の保護膜を除去してソフトエッチングして、配線部とスルーホール内面以外の無電解銅めっき層を除去する。(4)窪み開口部に保護膜を形成し、配線部とスルーホールの無電解銅めっき層の上に電解銅めっきを行い、スルーホールを完成する。(5)配線部の厚さの調整と無電解めっき層残存部の完全除去のためのソフトエッチングを行う。(6)窪み開口部の保護膜を除去する。   For example, in order to manufacture such a multilayer printed wiring board with a through hole, (1) an upper printed wiring board provided with holes for embedding electronic components and a lower printed wiring board having a circuit for electronic components Then, bonding is performed via an adhesive layer having a hole at a position corresponding to the hole for embedding the electronic component, thereby forming a recess opening. (2) Open through-holes for through-holes, and then form a protective film in the recessed openings, and provide an electroless copper plating layer on the entire surface to give conductivity to the inner surfaces of through-holes for through-holes. To do. (3) The protective film in the recess opening is removed and soft etching is performed to remove the electroless copper plating layer other than the wiring portion and the inner surface of the through hole. (4) A protective film is formed in the recessed opening, and electrolytic copper plating is performed on the wiring portion and the electroless copper plating layer of the through hole to complete the through hole. (5) Soft etching is performed to adjust the thickness of the wiring portion and to completely remove the remaining portion of the electroless plating layer. (6) The protective film of the hollow opening is removed.

このような製造方法を採ると、製造工程が複雑で、コストが高くなるばかりか、スルーホール形成のための無電解銅めっき工程では、パラジウム触媒が必要であり、該触媒を付与するときに、保護膜と下側プリント配線板との間に液が滲入し、パラジウムが析出して、絶縁性能が低下する問題があった。また、保護膜を張れる窪み開口部の大きさに限界があり、このような方法を適用できる範囲に制約が生じるという問題があった。   When such a manufacturing method is adopted, the manufacturing process is complicated and the cost is increased, and in the electroless copper plating process for forming the through hole, a palladium catalyst is required, and when applying the catalyst, There was a problem that the liquid permeated between the protective film and the lower printed wiring board, palladium was deposited, and the insulating performance was deteriorated. Further, there is a limit to the size of the recessed opening where the protective film can be applied, and there is a problem that the range in which such a method can be applied is limited.

さらに、電子部品用の回路部分に、無電解銅めっきを除去するためにソフトエッチング工程が二回加わるため、回路幅が細くなってしまい、電子部品の実装がやり難くなるという問題もあった。
特開平7−22536号公報
In addition, since the soft etching process is added twice to remove the electroless copper plating on the circuit part for the electronic component, there is a problem that the circuit width is narrowed and it is difficult to mount the electronic component.
Japanese Patent Laid-Open No. 7-22536

本発明の目的は、低コストで、絶縁性能を低下させることなく、適用範囲の制約を受けず、さらに、回路部分への影響を抑えることを可能としつつ、高密度配線および高密度実装を可能とする、電子部品埋込み用の窪みとスルーホールとを備える多層プリント配線板の製造方法を提供することにある。   The object of the present invention is low-cost, does not degrade insulation performance, is not subject to application scope restrictions, and can control high-density wiring and high-density mounting while suppressing the influence on the circuit part. An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board having a recess for embedding an electronic component and a through hole.

本発明の電子部品埋込み用の窪みとスルーホールとを備える多層プリント配線板を製造する方法は、(1)電子部品用の回路を有する下側プリント配線板と、前記電子部品を埋め込むための孔を設けた上側プリント配線板とを、接着剤層を介して接合して、多層プリント配線板を形成するステップ、(2)該多層プリント配線板にスルーホール用の貫通孔を設けるステップ、(3)無電解めっきおよび該無電解めっきの上に電解めっきを施し、エッチングして、前記多層プリント配線板に最外層回路を形成するステップ、(4)レーザー照射、薬液処理およびプラズマデスミア処理からなる群から選ばれる少なくとも一つの方法により、前記上側プリント配線板の孔により形成された前記多層プリント配線板の前記電子部品埋込み用の窪みの底部に露出した前記接着剤層の一部または全部を除去するステップ、からなることを特徴とする。   The method of manufacturing a multilayer printed wiring board having a recess for embedding an electronic component and a through hole according to the present invention includes (1) a lower printed wiring board having a circuit for the electronic component, and a hole for embedding the electronic component. Bonding the upper printed wiring board provided with a through an adhesive layer to form a multilayer printed wiring board; (2) providing a through hole for a through hole in the multilayer printed wiring board; (3 ) Step of forming electroless plating and electrolytic plating on the electroless plating and etching to form an outermost layer circuit on the multilayer printed wiring board; (4) Group consisting of laser irradiation, chemical treatment and plasma desmear treatment The recess for embedding the electronic component of the multilayer printed wiring board formed by the hole of the upper printed wiring board is at least one method selected from Step to remove some or all of the adhesive layer exposed to the part, characterized in that it consists of.

従来技術において、前記窪みの底部の電子部品用の回路を保護膜により保護しながら、スルーホールめっきおよびエッチングを行なうために、コストが高くなり、絶縁性能が低下し、該回路の幅が細くなるという諸問題点を、本発明により解消することができる。その結果、本発明の製法により、低コストかつ簡易に、また様々な電子部品埋め込み用窪みを備える多層プリント配線板を対象として、高密度配線および高密度実装を実現できる。   In the prior art, since the through-hole plating and etching are performed while protecting the circuit for the electronic component at the bottom of the depression with the protective film, the cost is increased, the insulation performance is lowered, and the width of the circuit is reduced. These problems can be solved by the present invention. As a result, according to the manufacturing method of the present invention, high-density wiring and high-density mounting can be realized for a multilayer printed wiring board provided with various electronic component embedding depressions at low cost and easily.

本発明の電子部品埋込み用の窪みとスルーホールとを備える多層プリント配線板の製造方法においては、まず、該多層プリント配線板の窪みに埋め込まれる電子部品用の回路を有する下側プリント配線板と、前記電子部品が埋め込まれる孔を設けた上側プリント配線板とをそれぞれ作製し、これらのプリント配線板を接着剤層を介して加熱圧着により接合して、多層プリント配線板を形成する。接着剤層としては、無機フィラー、短繊維等の含有率が少なく、レーザー加工性に優れた薄い接着シート、たとえば、日立化成製または巴川製紙所製エポキシ接着フィルムを使用する。なお、接着剤層には、前記上側プリント配線板に設けられた孔に対応する孔を設ける必要はない。本発明の場合、接着剤層は導電性を付与されておらず、また、この接着剤層に前記窪みに対応する孔は設けられていないため、上側と下側のプリント配線板を電気的に完全に遮断している。   In the method of manufacturing a multilayer printed wiring board having a recess for embedding an electronic component and a through hole according to the present invention, first, a lower printed wiring board having a circuit for an electronic component embedded in the recess of the multilayer printed wiring board; Then, an upper printed wiring board provided with a hole in which the electronic component is embedded is prepared, and these printed wiring boards are joined by thermocompression bonding through an adhesive layer to form a multilayer printed wiring board. As the adhesive layer, a thin adhesive sheet having a low content of inorganic fillers, short fibers and the like and excellent in laser processability, for example, an epoxy adhesive film manufactured by Hitachi Chemical or Yodogawa Paper Mill is used. In addition, it is not necessary to provide the hole corresponding to the hole provided in the said upper side printed wiring board in the adhesive bond layer. In the case of the present invention, the adhesive layer is not provided with conductivity, and the adhesive layer is not provided with holes corresponding to the depressions, so that the upper and lower printed wiring boards are electrically connected. It is completely shut off.

次に、形成された該多層プリント配線板に、上側と下側のプリント配線板を電気的に接続するためのスルーホール用の貫通孔を設ける。   Next, a through hole for a through hole for electrically connecting the upper and lower printed wiring boards is provided in the formed multilayer printed wiring board.

その後、たとえば、浸漬などにより無電解めっき触媒としてパラジウムを沈着させた後に、多層プリント配線板の表面全体に無電解銅めっき層を設けて、スルーホール用の貫通孔の内面に導電性を付与する。それから、ソフトエッチングを施して、配線部と前記貫通孔の内面以外の無電解めっき層を除去し、電気銅めっきにより配線部と貫通孔のめっき層を必要な厚みまで成長させて、スルーホールを完成させ、多層プリント配線板に最外層回路を形成する。   Thereafter, for example, after palladium is deposited as an electroless plating catalyst by dipping or the like, an electroless copper plating layer is provided on the entire surface of the multilayer printed wiring board to impart conductivity to the inner surface of the through hole for the through hole. . Then, soft etching is performed to remove the electroless plating layer other than the wiring part and the inner surface of the through hole, and the plating part of the wiring part and the through hole is grown to a required thickness by electrolytic copper plating, so that the through hole is formed. The outermost layer circuit is formed on the multilayer printed wiring board.

本発明では、接着剤層に前記窪みに対応する孔を設けておらず、当該接着剤層によって下側プリント配線基板にある電子部品用の回路が保護されているため、スルーホール形成時に前記保護膜を設ける必要ない。   In the present invention, the hole corresponding to the depression is not provided in the adhesive layer, and the circuit for the electronic component in the lower printed wiring board is protected by the adhesive layer. There is no need to provide a membrane.

次に、多層プリント配線板の電子部品埋込み用の窪みの底部に露出している前記接着シートの一部または全部を、レーザー加工により除去し、下側プリント配線板に設けられた該電子部品用の回路を露出させる。   Next, part or all of the adhesive sheet exposed at the bottom of the recess for embedding the electronic component in the multilayer printed wiring board is removed by laser processing, and the electronic component for the electronic component provided on the lower printed wiring board Expose the circuit.

上記態様では、接着剤層としてレーザー加工性のよい接着シートを用い、その除去に際してレーザー加工を施しているが、前記下側プリント配線板と上側配線板との加熱圧着において、化学的に容易にエッチングされうる薄い接着シート、たとえば、熱融着性ポリイミドフィルムまたは熱可塑性ポリイミドフィルムを使用してもよく、この場合、スルーホールめっきおよび最外層回路のエッチング後に、前記電子部品埋込み用の窪みの底部に露出した接着シートの一部または全部を、薬液処理またはプラズマデスミア処理により除去し、下側プリント配線板に設けられた電子部品用の回路を露出させる。   In the above embodiment, an adhesive sheet having good laser processability is used as the adhesive layer, and laser processing is performed at the time of removal. However, in the thermocompression bonding of the lower printed wiring board and the upper wiring board, it is chemically easy. A thin adhesive sheet that can be etched, such as a heat-sealable polyimide film or a thermoplastic polyimide film, may be used, in which case, after through-hole plating and etching of the outermost layer circuit, the bottom of the recess for embedding the electronic component A part or all of the exposed adhesive sheet is removed by chemical solution processing or plasma desmear processing to expose a circuit for electronic components provided on the lower printed wiring board.

なお、薬液処理は、エッチング液の吹き付け、エッチング液への浸漬等による処理を意味する。また、プラズマデスミア処理としては、酸素プラズマ、四フッ化炭素プラズマ等を用いることができる。   The chemical solution treatment means treatment by spraying an etching solution, immersion in an etching solution, or the like. As the plasma desmear treatment, oxygen plasma, carbon tetrafluoride plasma, or the like can be used.

本発明による工程では、電子部品埋込み用の窪みに位置する下側プリント配線板の該電子部品用の回路は、電気銅めっき工程が終了し、接着剤層を除去するまで、当該接着剤層に保護されており、無電解銅めっき工程でパラジウム触媒を付与する際に、溶液が滲入することがなく、前記回路の絶縁性能が低下する問題はない。また、同様に、前記接着剤層の保護により、下側プリント配線板の電子部品用の回路部分にソフトエッチングによる影響が及ばず、その回路幅が細くなるという問題を有しない。さらに、電子部品埋込み用の窪みの底部に露出する接着剤層を除去するためのレーザー加工、薬液処理またはプラズマデスミア処理は、該窪みの開口部の大きさに制約されないので、広範な多層プリント配線板に適用しうる。   In the process according to the present invention, the circuit for the electronic component of the lower printed wiring board located in the recess for embedding the electronic component is placed on the adhesive layer until the electrolytic copper plating process is completed and the adhesive layer is removed. When the palladium catalyst is applied in the electroless copper plating process, the solution does not penetrate and there is no problem that the insulation performance of the circuit is deteriorated. Similarly, the protection of the adhesive layer does not affect the circuit portion for the electronic component of the lower printed wiring board due to the soft etching, and there is no problem that the circuit width becomes narrow. Furthermore, laser processing, chemical treatment, or plasma desmear treatment for removing the adhesive layer exposed at the bottom of the recess for embedding electronic components is not limited by the size of the opening of the recess, so a wide range of multilayer printed wiring Applicable to plates.

本発明の方法において、加熱圧着工程、ドリリング工程、無電解銅めっき工程、電解銅めっき工程、エッチング工程およびレーザー加工は、公知の技術を採用しうる。   In the method of the present invention, known techniques can be employed for the thermocompression bonding process, drilling process, electroless copper plating process, electrolytic copper plating process, etching process and laser processing.

(実施例1)
図1は、下側プリント配線板の製造工程を示す一連の断面図である。
(Example 1)
FIG. 1 is a series of cross-sectional views showing the manufacturing process of the lower printed wiring board.

まず、(A)絶縁体基板(1)の表裏両面または片面(図示では両面)に、銅箔(2)を設けて積層板を形成し、
(B)該積層板の所望の部位に開口部(3)を設け、
(C)該開口部内面にめっき(4)を施してスルーホールを完成させ、
(D)該積層板の銅箔を選択エッチングすることにより内層配線層(5)とし、内層配線層(5)が表裏両面に形成された第1の内層配線板を形成する。
First, (A) a copper foil (2) is provided on both the front and back sides or one side (both sides in the figure) of the insulator substrate (1) to form a laminate,
(B) An opening (3) is provided in a desired portion of the laminate,
(C) The inner surface of the opening is plated (4) to complete the through hole,
(D) The copper foil of the laminated board is selectively etched to form an inner wiring layer (5), thereby forming a first inner wiring board in which the inner wiring layer (5) is formed on both the front and back surfaces.

次に、(E)第1の内層配線板に、接着シート(6)、プリプレグ(ガラス繊維布に絶縁樹脂を含浸させ、半硬化させたもの)等を介して、銅箔(2)を両面に加熱加圧接着をする。   Next, (E) the first inner layer wiring board is coated with the copper foil (2) on both sides through an adhesive sheet (6), a prepreg (a glass fiber cloth impregnated with an insulating resin and semi-cured), etc. Adhesion with heating and pressure.

そして、(F)該銅箔(2)の所望部位にエッチングを施して、銅箔に形成された開口部に露出する接着シートやプリプレグを除去し、
(G)開口部(7)にめっきを施してマイクロビア接続を形成し、また、該銅箔(2)を選択的にエッチングして、配線層(5)を形成する。
And (F) Etching is performed on a desired portion of the copper foil (2) to remove the adhesive sheet and prepreg exposed in the opening formed in the copper foil,
(G) The opening (7) is plated to form a micro via connection, and the copper foil (2) is selectively etched to form a wiring layer (5).

この配線層(5)を形成する際、電子部品埋込み用の窪みに対応する箇所には、電子部品実装用の電極パターン(9)を備えておく。以上の工程により、下側プリント配線板(14)が形成される。   When this wiring layer (5) is formed, an electrode pattern (9) for mounting an electronic component is provided at a location corresponding to the recess for embedding the electronic component. Through the above steps, the lower printed wiring board (14) is formed.

絶縁体基板(1)としては、ガラスエポキシ積層板以外に、各種機能性繊維をコア剤とした基板や長短の有機分子を組み合わせた有機フィルム基板等も利用できる。たとえば、ガラス基材−エポキシ樹脂積層板(前記ガラスエポキシ積層板)、ガラス基材−ポリイミド樹脂積層板、ガラス基材−テフロン(登録商標)樹脂積層板、アラミド基材-エポキシ樹脂積層板、エチレン・フッ素基材−エポキシ樹脂積層板、ポリフェニレンエーテル樹脂積層板、ポリエステルエステル・ポリエーテルイミド共重合体基板(シート)、アクリル共重合体基板(シート)、ポリイミドシートなどを用いることができる。   As the insulator substrate (1), in addition to the glass epoxy laminate, a substrate using various functional fibers as a core agent, an organic film substrate combining long and short organic molecules, and the like can also be used. For example, glass substrate-epoxy resin laminate (the glass epoxy laminate), glass substrate-polyimide resin laminate, glass substrate-Teflon (registered trademark) resin laminate, aramid substrate-epoxy resin laminate, ethylene A fluorine base material-epoxy resin laminate, a polyphenylene ether resin laminate, a polyester ester / polyetherimide copolymer substrate (sheet), an acrylic copolymer substrate (sheet), a polyimide sheet, or the like can be used.

下側プリント配線板(14)は、単独でも用いることができるが、導体層表面を化学処理した後に、接着シートを介して、複数枚の絶縁体基板と銅箔を組み合せ、前記と同様な手順で、多層化することもできる。   The lower printed wiring board (14) can be used alone, but after chemically treating the surface of the conductor layer, a plurality of insulator substrates and copper foil are combined through an adhesive sheet, and the same procedure as described above is performed. Thus, it can be multi-layered.

図2は、上側プリント配線板の製造工程を示す一連の断面図である。   FIG. 2 is a series of cross-sectional views showing the manufacturing process of the upper printed wiring board.

(A)下側プリント配線板(14)と同様に、上側プリント配線板用積層体を形成する。   (A) Similarly to the lower printed wiring board (14), an upper printed wiring board laminate is formed.

(B)上側プリント配線板用積層体において、電子部品を埋め込む箇所に、パンチング加工、ルーター加工またはドリリング加工などにより、所望の大きさの孔(12)を設けて、上側プリント配線板(16)を形成する。上側プリント配線板(16)にも、接着シートとの密着向上のために、導体層表面の化学処理を行うことが可能である。   (B) In the laminated body for the upper printed wiring board, a hole (12) having a desired size is provided by punching processing, router processing, drilling processing, or the like at the place where the electronic component is embedded, and the upper printed wiring board (16). Form. The upper printed wiring board (16) can also be subjected to chemical treatment on the surface of the conductor layer in order to improve the adhesion with the adhesive sheet.

図3は、上記の下側プリント配線板および上側プリント配線板を用いて、多層プリント配線板を形成する製造工程を示す一連の断面図である。   FIG. 3 is a series of sectional views showing a manufacturing process for forming a multilayer printed wiring board using the lower printed wiring board and the upper printed wiring board.

(A)接着シート(11)を介して、下側プリント配線板(14)と、上側プリント配線板(16)とを、電極の位置や窓の位置などを位置合わせしながら重ね合わせた後、加熱圧着して、電子部品埋込み用の窪みを備える多層プリント配線板(17)を形成する。接着シート(11)として、無機フィラー、短繊維等の含有率が少ないレーザー加工性がよい絶縁体、たとえば、日立化成製または巴川製紙所製エポキシ接着フィルムを選択する。   (A) After overlapping the lower printed wiring board (14) and the upper printed wiring board (16) through the adhesive sheet (11) while aligning the positions of the electrodes and the windows, The multilayer printed wiring board (17) provided with the depression for embedding electronic components is formed by thermocompression bonding. As the adhesive sheet (11), an insulator having a low content of inorganic fillers, short fibers and the like and having good laser processability, for example, an epoxy adhesive film manufactured by Hitachi Chemical or Yodogawa Paper Mill is selected.

このままでは、上側プリント配線板(16)と、下側プリント配線板(14)との電気的接続が取れていないため、
(B)ドリリング加工により、貫通孔(3)を開口し、
(C)下側プリント配線板(14)と上側プリント配線板(16)との電気的接続のために貫通孔(3)の内面を無電解めっきを施し、引き続き電解めっきを施して、スルーホール(4)を形成する。
In this state, the upper printed wiring board (16) and the lower printed wiring board (14) are not electrically connected.
(B) Open the through hole (3) by drilling,
(C) For electrical connection between the lower printed wiring board (14) and the upper printed wiring board (16), the inner surface of the through hole (3) is subjected to electroless plating, followed by electrolytic plating, (4) is formed.

次に、(D)配線板(17)の上面と下面の銅箔を選択的にエッチングして外層配線(8)を形成し、多層プリント配線板(18)を得る。この際、電子部品埋込み用窪み(13)の底部の銅も同時に除去する。   Next, (D) the copper foil on the upper and lower surfaces of the wiring board (17) is selectively etched to form the outer layer wiring (8) to obtain the multilayer printed wiring board (18). At this time, the copper at the bottom of the electronic component embedding recess (13) is also removed at the same time.

さらに、(E)電子部品埋込み用の窪み(13)の底部をレーザー加工によって座ぐり、電子部品実装用の電極パターン(9)を露出させ、多層プリント配線板(19)を得る。   Further, (E) the bottom of the recess (13) for embedding the electronic component is spotted by laser processing to expose the electrode pattern (9) for mounting the electronic component, thereby obtaining the multilayer printed wiring board (19).

以上の工程により、図4に断面図を示すように、電子部品を埋め込む窪み(13)を備える多層プリント配線板(19)を製造する。   The multilayer printed wiring board (19) provided with the hollow (13) which embeds an electronic component is manufactured by the above process, as shown in a sectional view in FIG.

このようにして得られた多層プリント配線板の窪み部に半導体素子を実装し、半導体装置を200個製造し、これら200個につき導通試験を行ったところ、不良品は検出されなかった。   When semiconductor elements were mounted in the depressions of the multilayer printed wiring board thus obtained, 200 semiconductor devices were manufactured, and a continuity test was performed on these 200 devices. As a result, no defective product was detected.

また、多層プリント配線板10個について、85℃、相対湿度85%の環境下で、窪みの底の100μmピッチのパターン間に、直流10Vの電圧を1000時間にわたって印加した結果、1×1011Ω以上の絶縁抵抗が維持された。 Moreover, as a result of applying a voltage of DC 10V over a period of 1000 hours between the patterns of 100 μm pitch at the bottom of the recesses in an environment of 85 ° C. and 85% relative humidity with respect to 10 multilayer printed wiring boards, 1 × 10 11 Ω The above insulation resistance was maintained.

(実施例2)
本発明の他の態様による実施例を説明する。製造工程は実施例1と同様であり、図1〜図4を参照しうる。
(Example 2)
Examples according to other aspects of the invention will now be described. The manufacturing process is the same as that of the first embodiment, and FIGS. 1 to 4 can be referred to.

まず、実施例1と同様に、下側プリント配線板(14)、および上側プリント配線板(16)を製造し、接着シート(11)を介して加熱圧着する。接着シート(11)として、ポリイミド、アルカリ可溶化したエポキシ樹脂等の化学薬品により容易にエッチングされうる絶縁体、たとえば、熱融着性ポリイミドフィルムまたは熱可塑性ポリイミドフィルムを無孔のまま用いる。   First, similarly to Example 1, a lower printed wiring board (14) and an upper printed wiring board (16) are manufactured and heat-pressed through an adhesive sheet (11). As the adhesive sheet (11), an insulator that can be easily etched by chemicals such as polyimide and alkali-solubilized epoxy resin, for example, a heat-fusible polyimide film or a thermoplastic polyimide film is used without any pores.

次に、貫通孔(3)を開口し、下側プリント配線板(14)と上側プリント配線板(16)との電気的接続のために貫通孔(3)の内面にめっきを施して、スルーホール(4)を形成する。   Next, the through hole (3) is opened, and the inner surface of the through hole (3) is plated for electrical connection between the lower printed wiring board (14) and the upper printed wiring board (16). A hole (4) is formed.

さらに、上面と下面の銅箔を選択的にエッチングして外層配線(8)を形成し、多層配線層(18)を得る。この際、電子部品埋込み用窪み(13)の底部の銅も同時に除去する。   Further, the copper foil on the upper surface and the lower surface is selectively etched to form the outer layer wiring (8), thereby obtaining the multilayer wiring layer (18). At this time, the copper at the bottom of the electronic component embedding recess (13) is also removed at the same time.

そして、ヒドラジンのような強アルカリ溶液によりエッチング処理を施して、電子部品埋込み用の窪み(13)の底部の樹脂を除去し、電子部品実装用の電極パターン(9)を露出させる。   Then, an etching process is performed with a strong alkaline solution such as hydrazine to remove the resin at the bottom of the recess (13) for embedding the electronic component, and the electrode pattern (9) for mounting the electronic component is exposed.

なお、この工程では、薬液によるエッチング処理のほか、薄い接着シート(11)を使用し、さらに、電子部品実装用の電極パターン付近の樹脂を加熱圧着時の樹脂フローにより減少させることにより、プラズマデスミア処理による除去も可能である。   In this step, in addition to the etching process using a chemical solution, a thin adhesive sheet (11) is used, and further, the resin near the electrode pattern for mounting the electronic component is reduced by the resin flow at the time of thermocompression bonding. Removal by processing is also possible.

以上により、図4に断面図を示すように、電子部品を埋め込む窪み(13)を備える多層プリント配線板を製造する。   As described above, as shown in the cross-sectional view of FIG. 4, a multilayer printed wiring board having a recess (13) for embedding electronic components is manufactured.

このようにして得られた多層プリント配線板の窪み部に半導体素子を実装し、半導体装置を200個製造し、これら200個につき導通試験を行ったところ、不良品は検出されなかった。   When semiconductor elements were mounted in the depressions of the multilayer printed wiring board thus obtained, 200 semiconductor devices were manufactured, and a continuity test was performed on these 200 devices. As a result, no defective product was detected.

また、多層プリント配線板10個について、85℃、相対湿度85%の環境下で、窪みの底の100μmピッチのパターン間に、直流10Vの電圧を1000時間にわたって印加した結果、1×1011Ω以上の絶縁抵抗が維持された。 Moreover, as a result of applying a voltage of DC 10V over a period of 1000 hours between the patterns of 100 μm pitch at the bottom of the recesses in an environment of 85 ° C. and 85% relative humidity with respect to 10 multilayer printed wiring boards, 1 × 10 11 Ω The above insulation resistance was maintained.

(比較例1)
比較として、従来の製造方法により、下側プリント配線板と上側プリント配線板を製造し、上側プリント配線板に設けられた孔に対応する位置に孔を有する接着シート、たとえば、日立化成製GEA−679Nを介して、上下のプリント配線板を接合し、電子部品埋込み用の窪みを有する多層プリント配線板を形成し、次に、スルーホール用の貫通孔を開口し、その後、前記窪みに保護膜を形成し、表面全面に無電解銅めっき層を設けて、貫通孔の内面に導電性を付与し、その後、前記保護膜を除去してソフトエッチングを施し、配線部とスルーホール内面以外の無電解銅めっき層を除去した後、窪みに保護膜を形成し、電解銅めっきによりスルーホールを完成した。さらに、配線部の厚さの調整と無電解めっき層残存部の完全除去のためのソフトエッチングを行った後、前記保護膜を除去した。
(Comparative Example 1)
For comparison, a lower printed wiring board and an upper printed wiring board are manufactured by a conventional manufacturing method, and an adhesive sheet having holes at positions corresponding to the holes provided in the upper printed wiring board, such as GEA- manufactured by Hitachi Chemical Co., Ltd. The upper and lower printed wiring boards are joined via 679N to form a multilayer printed wiring board having a recess for embedding electronic components, and then a through hole for a through hole is opened, and then a protective film is formed in the recess An electroless copper plating layer is provided on the entire surface to impart conductivity to the inner surface of the through hole, and then the protective film is removed and soft etching is performed, so that there is nothing other than the wiring portion and the inner surface of the through hole. After removing the electrolytic copper plating layer, a protective film was formed in the recess, and a through hole was completed by electrolytic copper plating. Further, after performing soft etching for adjusting the thickness of the wiring portion and completely removing the remaining portion of the electroless plating layer, the protective film was removed.

このようにして得られた多層プリント配線板10個について、85℃、相対湿度85%の環境下で、窪みの底の100μmピッチのパターン間に直流10Vの電圧を1000時間にわたって印加した結果、8/10のサンプルで絶縁抵抗値が1×108 以下に低下した。 With respect to 10 multilayer printed wiring boards obtained in this way, a voltage of 10 V DC was applied over a period of 1000 hours between 100 μm pitch patterns at the bottom of the depressions in an environment of 85 ° C. and 85% relative humidity. The insulation resistance value decreased to 1 × 10 8 or less in the / 10 sample.

本発明における、下側プリント配線板の製造方法を示す一連の断面図である。It is a series of sectional views showing a manufacturing method of a lower side printed wiring board in the present invention. 本発明における、上側プリント配線板の製造方法を示す一連の断面図である。It is a series of sectional views showing the manufacturing method of the upper side printed wiring board in the present invention. 本発明における、多層プリント配線板の製造方法を示す一連の断面図である。It is a series of sectional views showing a manufacturing method of a multilayer printed wiring board in the present invention. 本発明の多層プリント配線板の一実施例を示す断面図である。It is sectional drawing which shows one Example of the multilayer printed wiring board of this invention.

符号の説明Explanation of symbols

1 絶縁体基板
2 銅箔
3 貫通孔
4 スルーホール
5 内層配線
6 接着シート
7 マイクロビア
8 外層配線
9 電子部品実装用の回路
11 接着シート
12 電子部品埋込み用の孔
13 電子部品埋込み用の窪み
14 下側プリント配線板
16 上側プリント配線板
17、18、19 多層プリント配線板
DESCRIPTION OF SYMBOLS 1 Insulator board | substrate 2 Copper foil 3 Through-hole 4 Through hole 5 Inner layer wiring 6 Adhesive sheet 7 Micro via 8 Outer layer wiring 9 Circuit for electronic component mounting 11 Adhesive sheet 12 Hole for embedding electronic component 13 Depression for embedding electronic component 14 Lower printed wiring board 16 Upper printed wiring board 17, 18, 19 Multilayer printed wiring board

Claims (1)

(1)電子部品用の回路を有する下側プリント配線板と、前記電子部品を埋め込むための孔を設けた上側プリント配線板とを、接着剤層を介して接合して、多層プリント配線板を形成するステップ、(2)該多層プリント配線板にスルーホール用の貫通孔を設けるステップ、(3)無電解めっきおよび該無電解めっきの上に電解めっきを施し、エッチングして、前記多層プリント配線板に最外層回路を形成するステップ、(4)レーザー照射、薬液処理およびプラズマデスミア処理からなる群から選ばれる少なくとも一つの方法により、前記上側プリント配線板の孔により形成された前記多層プリント配線板の前記電子部品埋込み用の窪みの底部に露出した前記接着剤層の一部または全部を除去するステップ、からなる電子部品埋込み用の窪みとスルーホールとを備える多層プリント配線板を製造する方法。   (1) A lower side printed wiring board having a circuit for an electronic component and an upper side printed wiring board provided with a hole for embedding the electronic component are joined together via an adhesive layer to obtain a multilayer printed wiring board. (2) providing a through hole for a through hole in the multilayer printed wiring board; (3) performing electroplating on the electroless plating and the electroless plating, etching the multilayer printed wiring; A step of forming an outermost layer circuit on the board; (4) the multilayer printed wiring board formed by the holes of the upper printed wiring board by at least one method selected from the group consisting of laser irradiation, chemical treatment and plasma desmear treatment; Removing a part or all of the adhesive layer exposed at the bottom of the electronic component embedding recess of the electronic component embedding Method of manufacturing a multilayer printed wiring board having a through-hole with.
JP2003329615A 2003-09-22 2003-09-22 Method for manufacturing multilayer printed-wiring board having recess for embedding electronic component and through hole Pending JP2005101043A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI669040B (en) * 2017-09-28 2019-08-11 宏啟勝精密電子(秦皇島)有限公司 Flexible printed circuit board and method for making the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI669040B (en) * 2017-09-28 2019-08-11 宏啟勝精密電子(秦皇島)有限公司 Flexible printed circuit board and method for making the same

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