JP2005086095A - Manufacturing method of thin-film transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a thin-film transistor in which hydrogen is not easily trapped in a silicone oxide film formed by a plasma CVD method. <P>SOLUTION: In the manufacturing method of the thin-film transistor, the silicone oxide film 6 is formed first on a quartz substrate 2 by the plasma CVD method using a process gas in which a gas flow rate of a N<SB>2</SB>O gas is 40 times or more as much as a flow rate of a SiH<SB>4</SB>gas, by which the number of Si-OH bonds in the silicone oxide film 6 is larger. When the silicone oxide film 6 is annealed, a silicone oxide film 8 with less dangling bonds is obtained. Furthermore, the thin-film transistor TF is formed on the silicone oxide film 8, then a silicone oxide film 18 with less dangling bonds as the silicone oxide film 8 is formed on the thin-film transistor TF, by which hydrogen is hardly trapped in the silicone oxide films 8, 18 in hydrogen termination treatment. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a thin film transistor.

  As a switching element of a liquid crystal display (LCD), a thin film transistor (TFT) using polysilicon (p-Si) as an active layer is known. Polysilicon thin film transistors (p-Si TFTs) include so-called high temperature p-Si TFTs and low temperature p-Si TFTs. The high temperature p-Si TFT is formed on a quartz substrate instead of a glass substrate in order to cope with a high temperature process of about 1000 ° C.

  For example, Patent Document 1 describes a liquid crystal display using a high-temperature p-Si TFT. The liquid crystal display includes a quartz substrate having a recess, a light shielding layer provided in the recess, a first interlayer insulating film provided on the light shielding layer, a TFT provided on the first interlayer insulating film, And a second interlayer insulating film. The first interlayer insulating film and the second interlayer insulating film are formed, for example, by annealing a silicon oxide film formed by a thermal CVD method such as normal pressure or low pressure CVD.

  Further, since the p-Si TFT has dangling bonds in the polysilicon film constituting the active layer, it is necessary to reduce the dangling bonds by performing hydrogen termination treatment. This process improves the electrical characteristics of the p-Si TFT.

JP 2001-318625 A

  Incidentally, there is a plasma CVD method as a method for forming a silicon oxide film other than the thermal CVD method. The plasma CVD method can shorten the TAT (Turn Around Time) of the process as compared with the thermal CVD method. A silicon oxide film for the interlayer insulating film is formed by annealing the silicon oxide film formed by the plasma CVD method.

  However, when a silicon oxide film was formed using the plasma CVD method, the electrical characteristics of the obtained p-Si TFT were insufficient. This is presumed to be the reason why the plasma CVD method is not used.

  As a result of intensive studies by the present inventors, it has been found that dangling bonds in the polysilicon film are not sufficiently terminated (terminated) in the hydrogen termination treatment performed after the formation of the interlayer insulating film. Ideally, when hydrogen termination treatment is performed, hydrogen reaches the polysilicon film through the interlayer insulating film by diffusion. The present inventors considered that the cause is a dangling bond of silicon in the interlayer insulating film. That is, it is considered that hydrogen was trapped in the middle by this dangling bond and sufficient hydrogen was not supplied into the polysilicon film.

  Accordingly, an object of the present invention is to provide a method for manufacturing a thin film transistor in which hydrogen is hardly trapped in a silicon oxide film formed by a plasma CVD method.

  In order to solve the above-described problems, a method of manufacturing a thin film transistor according to the present invention includes: (a) a first process gas in which the gas flow rate of the first oxygen-containing gas is 40 times or more the gas flow rate of the first silane-based gas. , A step of forming a first silicon oxide film on a quartz substrate by plasma CVD, (b) a step of annealing the first silicon oxide film, and (c) a first silicon oxide film A step of forming a thin film transistor on the first silicon oxide film after annealing, and (d) the gas flow rate of the second oxygen-containing gas is 40 times the gas flow rate of the second silane-based gas on the thin film transistor. Using the second process gas as described above, forming a second silicon oxide film by plasma CVD, (e) annealing the second silicon oxide film, and (f) second The silicon oxide film of After Le processed, and a step of hydrogen termination process.

  When the first silicon oxide film is formed by the plasma CVD method using the first process gas, the number of Si—H bonds in the film decreases and the number of Si—OH bonds increases. By subsequent annealing treatment, the Si—H bond in the first silicon oxide film forms a dangling bond “Si—”, and the Si—OH bond is converted to Si—O—Si bond by dehydration condensation. Form. Therefore, if the method of the present invention is used, a first silicon oxide film with few dangling bonds in the film can be obtained. Similarly, a second silicon oxide film with few dangling bonds in the film can be obtained. Accordingly, in the hydrogen termination process, hydrogen is hardly trapped in the first and second silicon oxide films.

Specifically, the first oxygen-containing gas includes N ₂ O gas, and the first silane-based gas includes SiH ₄ gas. The second oxygen-containing gas includes N ₂ O gas, and the second silane-based gas includes SiH ₄ gas.

  The step of forming the thin film transistor includes a step of forming an amorphous silicon film on the first silicon oxide film and a step of forming a polysilicon film by heat-treating the amorphous silicon film at 600 ° C. or higher. When the temperature at which the amorphous silicon film is heat-treated is preferably a high temperature such as 600 ° C. or higher, more preferably 800 ° C. or higher, and particularly preferably 900 ° C. or higher, the crystallinity of the polysilicon film is improved.

  Further, in the hydrogen termination process, the second silicon oxide film is heat-treated in a hydrogen atmosphere. Thereby, hydrogen in the atmosphere diffuses into the second silicon oxide film and reaches the thin film transistor. In the hydrogen termination process, the second silicon oxide film is exposed to hydrogen plasma. As a result, hydrogen in the plasma diffuses into the second silicon oxide film and reaches the thin film transistor.

  According to the present invention, it is possible to provide a method for manufacturing a thin film transistor in which hydrogen is not easily trapped in a silicon oxide film formed by a plasma CVD method.

  Hereinafter, a method for manufacturing a thin film transistor according to an embodiment will be described with reference to FIGS. 1 to 4 are process cross-sectional views illustrating a method of manufacturing a thin film transistor according to an embodiment. The steps shown in FIGS. 1 to 4 are sequentially performed. In addition, the same code | symbol is used for the same element and the overlapping description is abbreviate | omitted.

(Preparation process of quartz substrate)
As shown in FIG. 1A, a quartz substrate 2 having a recess is prepared. A light shielding layer 4 is provided in the recess. The concave portion of the quartz substrate 2 is formed by etching, for example. The light shielding layer 4 is made of a metal including, for example, tungsten silicide (W / Si). The light shielding layer 4 is provided so that light does not reach a thin film transistor described later.

(First silicon oxide film forming step)
As shown in FIG. 1B, a silicon oxide film 6 (first silicon oxide film) is formed on the quartz substrate 2 by plasma CVD. First, the quartz substrate 2 is introduced into the chamber C1 of the plasma CVD apparatus CV1. In the chamber C1, a susceptor S1 for installing the quartz substrate 2 and a shower head E1 disposed to face the susceptor S1 are provided. A high frequency power supply R1 is connected to the shower head E1 through an impedance matching circuit. The susceptor S1 is grounded.

Outside the chamber C1, a gas supply source G11 is connected via a mass flow controller M11, and a gas supply source G12 is connected via a mass flow controller M12. The gas supply source G11 is filled with a first oxygen-containing gas including, for example, dinitrogen monoxide gas (N ₂ O gas). The gas supply source G12 is filled with a first silane-based gas including, for example, monosilane gas (SiH ₄ gas). Examples of the first oxygen-containing gas include N ₂ O gas, oxygen gas, carbon dioxide gas, and the like. The first silane-based gas includes at least one of an organic silane-based gas and an inorganic silane-based gas. Examples of the first silane-based gas include SiH ₄ gas, disilane gas, and TEOS (Tetra Ethyl Ortho Silicate) gas. In the following description, the first oxygen-containing gas is N ₂ O gas and the first silane-based gas is SiH ₄ gas, but the present invention is not limited to these.

N ₂ O gas and SiH ₄ gas are included in the first process gas supplied from the gas supply sources G11 and G12 into the chamber C1. In the first process gas, the gas flow rate of the N ₂ O gas is controlled by the mass flow rate controller M11, and the gas flow rate of the SiH ₄ gas is controlled by the mass flow rate controller M12. Here, the first process gas preferably has a N ₂ O gas flow rate of more than 15 times the SiH ₄ gas flow rate, more preferably 30 times or more, and even more preferably 40 times or more. That is, it is preferable to increase the oxygen atom concentration in the first process gas as compared to the silicon atom concentration.

  After supplying the first process gas into the chamber C1, when a high frequency voltage is applied to the shower head E1 by the high frequency power source R1, a plasma P1 is generated in the chamber C1. A silicon oxide film 6 is formed on the quartz substrate 2 by the plasma P1. If the first process gas is used, the silicon oxide film 6 having few Si—H bonds and many Si—OH bonds in the film can be formed. This is because the oxygen atom concentration in the first process gas is increased.

(First silicon oxide film annealing process)
As shown in FIG. 1C, the silicon oxide film 6 is annealed. Thereby, the annealed silicon oxide film 8 is formed. The silicon oxide film 8 can electrically isolate a thin film transistor and a light shielding layer 4 described later. That is, the silicon oxide film 8 functions as an interlayer insulating film.

  The annealing process is performed using, for example, a thermal oxidation furnace. The treatment temperature is preferably 900 to 1050 ° C. The treatment time is preferably 30 to 60 minutes. The annealing treatment is preferably performed for about 20 minutes at a temperature of about 1000 ° C., for example. Nitrogen etc. can be illustrated as processing atmosphere. By the annealing treatment, impurities on the surface of the silicon oxide film 6 can be removed. If such impurities remain, the electrical characteristics of the thin film transistor described later are adversely affected.

  When annealing is performed, the Si—H bond forms a dangling bond “Si—” by desorption of hydrogen atoms, and the Si—OH bond forms a Si—O—Si bond by dehydration condensation. Here, the silicon oxide film 6 before the annealing treatment has few Si—H bonds and many Si—OH bonds in the film. For this reason, when the annealing treatment is performed, the silicon oxide film 8 with few dangling bonds can be obtained.

(Thin film transistor forming step)
As shown in FIGS. 2A to 2C and FIG. 3A, a thin film transistor TF is formed on the silicon oxide film 8. The thin film transistor TF is formed in the same manner as a general high-temperature p-Si TFT. First, as shown in FIG. 2A, an amorphous silicon film 9 is formed on the silicon oxide film 8 by, for example, a low pressure CVD method. Subsequently, as shown in FIG. 2B, the amorphous silicon film 9 is heat-treated at 600 ° C. to 700 ° C. for 1 to 10 hours, preferably 4 to 6 hours, to form a polysilicon film 10. When the temperature at which the amorphous silicon film 9 is heat-treated is preferably a high temperature of 600 ° C. or higher, more preferably 800 ° C. or higher, and particularly preferably 900 ° C. or higher, the crystallinity of the polysilicon film 10 is improved. Further, as shown in FIG. 2C, the polysilicon film 10 is processed by using a photolithography method to obtain a polysilicon film 11. A gate oxide film 12 is formed on the polysilicon film 11. The gate oxide film 12 is formed on the surface of the polysilicon film 11 using, for example, a thermal oxidation furnace. Thereafter, ion doping is performed to form a gate electrode 14 on the gate oxide film 12 as shown in FIG. The electrode 14 is obtained by processing polysilicon.

(Second silicon oxide film formation step)
As shown in FIG. 3B, a silicon oxide film 16 (second silicon oxide film) is formed over the thin film transistor TF by plasma CVD. First, the quartz substrate 2 is introduced into the chamber C2 of the plasma CVD apparatus CV2. In the chamber C2, a susceptor S2 for installing the quartz substrate 2 and a shower head E2 arranged to face the susceptor S2 are provided. A high frequency power supply R2 is connected to the shower head E2 via an impedance matching circuit. The susceptor S2 is grounded.

Outside the chamber C2, a gas supply source G21 is connected via a mass flow controller M21, and a gas supply source G22 is connected via a mass flow controller M22. The gas supply source G21 is filled with a second oxygen-containing gas including, for example, dinitrogen monoxide gas (N ₂ O gas). The gas supply source G22 is filled with a second silane-based gas including, for example, monosilane gas (SiH ₄ gas). Examples of the second oxygen-containing gas include N ₂ O gas, oxygen gas, carbon dioxide gas, and the like. The second silane-based gas includes at least one of an organic silane-based gas and an inorganic silane-based gas. Examples of the second silane-based gas include SiH ₄ gas, disilane gas, TEOS (Tetra Ethyl Ortho Silicate) gas, and the like. In the following description, the second oxygen-containing gas is N ₂ O gas and the second silane-based gas is SiH ₄ gas, but the present invention is not limited to these.

N ₂ O gas and SiH ₄ gas are included in the second process gas supplied from the gas supply sources G21 and G22 into the chamber C2. In the second process gas, the gas flow rate of N ₂ O gas is controlled by the mass flow rate controller M21, and the gas flow rate of SiH ₄ gas is controlled by the mass flow rate controller M22. Here, the second process gas, preferably the gas flow rate of N 2 _O gas is more than 15 times the gas flow rate of SiH ₄ gas, and more preferable to be 30 times or more, further preferably 40 times or more. That is, it is preferable to increase the oxygen atom concentration in the second process gas as compared to the silicon atom concentration.

  After supplying the second process gas into the chamber C2, when a high-frequency voltage is applied to the shower head E2 by the high-frequency power source R2, plasma P2 is generated in the chamber C2. A silicon oxide film 16 is formed on the quartz substrate 2 by the plasma P2. If the second process gas is used, the silicon oxide film 16 having few Si—H bonds and many Si—OH bonds in the film can be formed. This is because the oxygen atom concentration in the second process gas is increased.

  Note that the types and gas flow rates of the second oxygen-containing gas and the first oxygen-containing gas may be the same or different. The types and gas flow rates of the second silane-based gas and the first silane-based gas may be the same or different.

(Second silicon oxide film annealing process)
As shown in FIG. 3C, the silicon oxide film 16 is annealed. Thereby, the annealed silicon oxide film 18 is formed. The silicon oxide film 18 can electrically isolate the thin film transistor TF from elements such as a circuit formed above the thin film transistor TF. That is, the silicon oxide film 18 functions as an interlayer insulating film.

  The annealing process is performed using, for example, a thermal oxidation furnace. The treatment temperature is preferably 900 to 1050 ° C. The treatment time is preferably 30 to 60 minutes. The annealing treatment is preferably performed for about 20 minutes at a temperature of about 1000 ° C., for example. Nitrogen etc. can be illustrated as processing atmosphere. By this annealing treatment, impurities on the surface of the silicon oxide film 16 can be removed, and further, the activation of the polysilicon film 11 which is an active layer of the thin film transistor TF can be performed. If the impurities remain, the electrical characteristics of the thin film transistor TF are adversely affected.

  When annealing is performed, the Si—H bond forms a dangling bond “Si—” by desorption of hydrogen atoms, and the Si—OH bond forms a Si—O—Si bond by dehydration. Here, the silicon oxide film 16 before the annealing treatment has few Si—H bonds and many Si—OH bonds in the film. For this reason, when annealing is performed, the silicon oxide film 18 with few dangling bonds is obtained.

(Hydrogen termination process)
As shown in FIG. 4A, the thin film transistor TF is subjected to hydrogen termination. In the hydrogen termination process, it is preferable to heat-treat the silicon oxide film 18 formed on the quartz substrate 2 in a hydrogen atmosphere. Thereby, hydrogen in the atmosphere diffuses into the silicon oxide film 18 and reaches the thin film transistor TF. In the hydrogen termination process, it is also preferable to expose the silicon oxide film 18 to hydrogen plasma. Thereby, hydrogen in the plasma diffuses into the silicon oxide film 18 and reaches the thin film transistor TF.

  The hydrogen termination process is a process for terminating dangling bonds (crystal defects) of the polysilicon film 11 as an active layer of the thin film transistor TF with hydrogen. The main hydrogen transfer path is considered to be a path that reaches the polysilicon film 11 through the silicon oxide film 18 and the silicon oxide film 8 in this order. In addition, a path reaching the polysilicon film 11 via the silicon oxide film 18 and a path reaching the polysilicon film 11 via the silicon oxide film 18 and the gate oxide film 12 in order are conceivable.

  Here, since generation of dangling bonds in the silicon oxide films 8 and 18 is suppressed as described above, hydrogen is hardly trapped in the silicon oxide films 8 and 18. For this reason, since sufficient hydrogen can reach the polysilicon film 11, the dangling bonds of the polysilicon film 11 can be terminated sufficiently. Therefore, the electrical characteristics of the thin film transistor TF can be improved.

(Wiring formation process)
As shown in FIG. 4B, a wiring 22 connected to the gate electrode 14 is formed over the gate electrode 14. On the gate electrode 14, a recess is formed in the silicon oxide film 18 by photolithography, and a wiring 22 is formed in the recess. The wiring 22 is made of, for example, a metal containing aluminum. A voltage can be applied to the gate electrode 14 through the wiring 22.

  If a liquid crystal display is manufactured using the thin film transistor TF, the display characteristics of the liquid crystal display can be improved. When the plasma CVD method is used, the production cost of the thin film transistor TF can be reduced and the throughput can be improved as compared with the case of using the thermal CVD method.

  EXAMPLES Hereinafter, although an Example demonstrates this invention in detail, this invention is not limited to these Examples.

FIG. 5 is a diagram showing film forming conditions in the plasma CVD method and characteristics of the obtained silicon oxide film. Using the film forming conditions shown in FIG. 5, silicon oxide films of conditions 1 to 4 were formed. The silicon oxide film before annealing corresponds to the silicon oxide films 6 and 16 described above. The annealed silicon oxide film corresponds to the silicon oxide films 8 and 18. The annealing process was performed at 900 ° C. for 30 minutes. In conditions 1 to 4, the gas flow rate ratio of N ₂ O / SiH ₄ and the RF output of the high-frequency power source were changed so that the film thickness was approximately 500 nm. Condition 1 is that the gas flow rate of the N ₂ O gas is 40 times or more the gas flow rate of the SiH ₄ gas. Condition 2 is that the gas flow rate of N ₂ O gas is 30 times the gas flow rate of SiH ₄ gas. Condition 3 is that the gas flow rate of N ₂ O gas is 15 times the gas flow rate of SiH ₄ gas. FIG. 5 also shows the film characteristics such as the film thickness, density, stress and V _fb (flat band voltage) of the silicon oxide film before and after the annealing treatment.

FIG. 6 is a graph showing V _fb at a film thickness of 500 nm. V _b represents the _{V fb} of the silicon oxide film before the annealing process, _{V a} denotes a _{V fb} of the silicon oxide film after annealing. As shown in FIGS. 5 and 6, the absolute value of V _fb is decreased by the annealing process. A small absolute value of V _fb indicates that there are few defects such as Si—OH bonds and “Si—” in the silicon oxide film composed of a network of Si—O—Si bonds. Therefore, it is preferable that the absolute value of V _fb is small. It is considered that the defects before the annealing treatment are mainly due to Si—OH bonds, and the defects after the annealing treatment are mainly due to “Si—”. As shown in FIGS. 5 and 6, in conditions 1 and 2, V _fb is improved as compared with conditions 3 and 4.

  Further, as shown in FIG. 5, in the plasma CVD method, shrinkage due to dehydration condensation can be suppressed to about 2%. On the other hand, the silicon oxide film formed by the thermal CVD method has a larger shrinkage than the silicon oxide film formed by the plasma CVD method. In the thermal CVD method, the shrinkage reaches about 8%. For this reason, in the silicon oxide film formed by the thermal CVD method, cracks may occur, and the manufacturing yield of the thin film transistor decreases. In addition, tensile stress is generated in the silicon oxide film formed by the thermal CVD method, but compressive stress is generated in the silicon oxide film formed by the plasma CVD method. Furthermore, in the silicon oxide film formed by the plasma CVD method, the stress can be suppressed by adjusting the RF output.

FIG. 7 is a graph showing an FT-IR spectrum. With respect to the silicon oxide films of Condition 1 to Condition 4, the absorbance with respect to the wavelength before and after the annealing treatment was measured. Spectra 1b to 4b show the results obtained by measuring the silicon oxide films under conditions 1 to 4 before annealing. Spectra 1a to 4a show the results obtained by measuring silicon oxide films under conditions 1 to 4 after annealing, respectively. The peak at a wave number of 3600 to 3700 cm ⁻¹ corresponds to a Si—OH bond. The Si—OH bond peak was confirmed before annealing (Spectrum 1b to 4b) in any of Conditions 1 to 4, but not after annealing (Spectrum 1a to 4a). This is presumably because the Si—OH bonds are dehydrated and condensed into Si—O—Si bonds by the annealing treatment.

Further, for the silicon oxide film before the annealing treatment, the Si—OH bond was quantified from the area of the Si—OH bond peak with respect to the base line. As a result, it has been found that the number of Si—OH bonds in the silicon oxide film (spectrum 1b) under condition 1 is relatively large relative to conditions 2 and 4. Specifically, it was found that the Si—OH bonds in the film decreased in order from Condition 1 to Condition 4. As in Condition 1, when the gas flow rate ratio of N ₂ O gas in the process gas is large, it is considered that the Si—OH bond in the silicon oxide film increases. The Si—OH bond is preferably 0.5% or more with respect to the Si—O bond (not shown) constituting the main peak.

8A and 8B are graphs showing FT-IR spectra. FIG. 8A shows a silicon oxide film under condition 1 before and after annealing, and FIG. 8B shows a silicon oxide film under condition 4 before and after annealing. The peak at a wave number of 2250 to 2300 cm ⁻¹ corresponds to a Si—H bond. The peak at a wave number of 2300-2400 cm ⁻¹ is due to carbon dioxide in the measurement atmosphere. As shown in FIG. 8A, in Condition 1, no Si—H bond peak was observed before and after annealing. On the other hand, as shown in FIG. 8B, under the condition 4, the Si—H bond peak was confirmed before the annealing treatment (spectrum 4b) and was not confirmed after the annealing treatment (spectrum 4a). As in Condition 1, when the gas flow rate ratio of N ₂ O gas in the process gas is large, the number of Si—H bonds in the silicon oxide film is considered to decrease.

From the above FT-IR measurement results, when the gas flow rate of N ₂ O gas in the process gas is 40 times or more the gas flow rate of SiH ₄ gas, the Si—OH bonds in the silicon oxide film before the annealing process increase. And it can be said that Si-H bond decreases. Further, from the measurement result of V _fb , it was shown that defects such as “Si—” existing in the silicon oxide film under conditions 1 and 2 after the annealing treatment were fewer than those in conditions 3 and 4.

1A to 1C are process cross-sectional views illustrating a method for manufacturing a thin film transistor according to an embodiment. 2A to 2C are process cross-sectional views illustrating a method for manufacturing a thin film transistor according to an embodiment. 3A to 3C are process cross-sectional views illustrating a method for manufacturing a thin film transistor according to an embodiment. 4A and 4B are process cross-sectional views illustrating the method for manufacturing the thin film transistor according to the embodiment. FIG. 5 is a diagram showing film forming conditions in the plasma CVD method and characteristics of the obtained silicon oxide film. FIG. 6 is a graph showing V _fb at a film thickness of 500 nm. FIG. 7 is a graph showing an FT-IR spectrum. 8A and 8B are graphs showing FT-IR spectra.

Explanation of symbols

  TF ... thin film transistor, CV1, CV2 ... CVD apparatus, R1, R2 ... high frequency power source, 1a-4a, 1b-4b ... spectrum, 2 ... quartz substrate, 4 ... light shielding layer, 6, 8 ... silicon oxide film (first silicon (Oxide film), 16, 18 ... silicon oxide film (second silicon oxide film), 9 ... amorphous silicon film, 10, 11 ... polysilicon film, 12 ... gate oxide film, 14 ... gate electrode, 22 ... wiring, C1 , C2 ... chamber, E1, E2 ... shower head, G11, G12, G21, G22 ... gas supply source, M11, M12, M21, M22 ... mass flow controller, P1, P2 ... plasma, S1, S2 ... susceptor.

Claims (6)

A first silicon oxide film is formed on a quartz substrate by a plasma CVD method using a first process gas in which the gas flow rate of the first oxygen-containing gas is 40 times or more the gas flow rate of the first silane-based gas. Forming a film;
Annealing the first silicon oxide film;
Forming a thin film transistor on the first silicon oxide film after annealing the first silicon oxide film;
A second silicon oxide film is formed on the thin film transistor by a plasma CVD method using a second process gas in which the gas flow rate of the second oxygen-containing gas is 40 times or more the gas flow rate of the second silane-based gas. Forming a film;
Annealing the second silicon oxide film;
A step of performing a hydrogen termination after annealing the second silicon oxide film;
A method for manufacturing a thin film transistor. The first oxygen-containing gas includes N ₂ O gas, and the first silane-based gas includes SiH ₄ gas.
The manufacturing method of the thin-film transistor of Claim 1. The second oxygen-containing gas includes N ₂ O gas, and the second silane-based gas includes SiH ₄ gas.
A method for producing the thin film transistor according to claim 1. The step of forming the thin film transistor includes
Forming an amorphous silicon film on the first silicon oxide film;
Heat-treating the amorphous silicon film at 600 ° C. or higher to form a polysilicon film;
The manufacturing method of the thin-film transistor as described in any one of Claims 1-3 provided with these. In the hydrogen termination process, the second silicon oxide film is heat-treated in a hydrogen atmosphere.
The manufacturing method of the thin-film transistor as described in any one of Claims 1-4. In the hydrogen termination process, the second silicon oxide film is exposed to hydrogen plasma.
The manufacturing method of the thin-film transistor as described in any one of Claims 1-4.

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