JP2005079400A - Semiconductor device and imaging apparatus including the same - Google Patents

Semiconductor device and imaging apparatus including the same Download PDF

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JP2005079400A
JP2005079400A JP2003309226A JP2003309226A JP2005079400A JP 2005079400 A JP2005079400 A JP 2005079400A JP 2003309226 A JP2003309226 A JP 2003309226A JP 2003309226 A JP2003309226 A JP 2003309226A JP 2005079400 A JP2005079400 A JP 2005079400A
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substrate
chip
semiconductor device
adhesive
ccd
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Yasuyoshi Hoshino
靖義 星野
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Seiko Precision Inc
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Seiko Precision Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83194Lateral distribution of the layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Die Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device wherein an IC chip is kept in a horizontal state and strongly joined onto a substrate. <P>SOLUTION: The semiconductor device 1 including: the substrate 10; a stand 11 formed on the substrate; and the IC chip 20 located on the stand, can be attained by the semiconductor device formed with a plurality of divided stand blocks 11-1 to 11-4 which are made by dividing the stand 11. Since the stand 11 with the IC chip 20 located thereon is divided into a plurality of the stand blocks 11-1 to 11-4, the substrate is exposed from parts among the stand blocks. Applying an adhesive 5 to the parts among the stand blocks and directly placing the lower side of the IC chip 20 onto the stand blocks 11-1 to 11-4 can join the both in a state that no adhesive 5 overrides the upper face of the stand blocks. Thus, the semiconductor device 1 is obtained, wherein the IC chip is strongly joined with the substrate while keeping the levelness of the IC chip. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明はICチップを実装した基板を含む半導体装置に関する。特に、CCD(Charge Coupled Device)、CMOS(Complementary Metal Oxide Semiconductor)等の撮像素子を所定姿勢で載置するのに適した半導体装置に関する。   The present invention relates to a semiconductor device including a substrate on which an IC chip is mounted. In particular, the present invention relates to a semiconductor device suitable for mounting an image sensor such as a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) in a predetermined posture.

例えば、特許文献1はCCD等の撮像素子を配置した撮像装置について開示している。この特許文献1で開示する装置は、基板と撮像素子との間に距離設定手段を備えている。設定手段は、撮像素子の底部に配置され焦点位置を調整する台座の機能を果たしている。この設定手段は、撮像素子と一体に構成され、また別の基板或いは実装に使用するペースト材が採用される。特許文献1で示すように、CCD等の撮像用のICチップを基板に搭載する場合には、搭載予定位置へ精度良く配置し、さらに光軸方向での位置についても配慮する必要がある。   For example, Patent Document 1 discloses an imaging apparatus in which an imaging element such as a CCD is arranged. The apparatus disclosed in Patent Document 1 includes a distance setting unit between a substrate and an image sensor. The setting means is arranged at the bottom of the image sensor and functions as a pedestal that adjusts the focal position. This setting means is configured integrally with the image sensor, and employs another substrate or a paste material used for mounting. As shown in Patent Document 1, when an IC chip for imaging such as a CCD is mounted on a substrate, it is necessary to accurately place the IC chip at a planned mounting position, and also consider the position in the optical axis direction.

また、基板上に直接或いはダイパッド等の台座部にICチップを実装する際には、接着剤が使用される場合が多い。例えば、特許文献2ではベアチップをそのまま基板に搭載するフリップチップ実装の際の接着剤に関する問題と、その解決手段が示されている。この特許文献2では、ICチップの接続に用いる接着剤の量が多過ぎる場合の問題を解消するため、複数の放射状の溝を基板に形成している。このように構成すると、接着剤を中央から周囲に向けて流動させることができるので、接着剤が偏在するのを抑制できる。また、はみ出した接着剤は先端側に設けた周囲溝に収容される。   Also, an adhesive is often used when mounting an IC chip directly on a substrate or on a pedestal such as a die pad. For example, Patent Document 2 discloses a problem relating to an adhesive in flip chip mounting in which a bare chip is mounted on a substrate as it is, and a solution to the problem. In Patent Document 2, a plurality of radial grooves are formed in the substrate in order to solve the problem in the case where the amount of adhesive used for connecting the IC chip is too large. If comprised in this way, since an adhesive agent can be made to flow toward the periphery from a center, it can suppress that an adhesive agent is unevenly distributed. Further, the protruding adhesive is accommodated in a peripheral groove provided on the tip side.

特開2002−27311号 公報JP 2002-27311 A 特開2001−230274号 公報Japanese Patent Laid-Open No. 2001-230274

特許文献1で示すように、CCD等の撮像用のICチップ(以下、単にCCDという)を基板に搭載する半導体装置では、基板上にCCDを載置するための台座部を設け、接着剤を用いてCCDをこの台座部上に接着するという手法が広く採用されている。図5は、従来において基板上にCCDを載置した半導体装置を製造する様子の概観を示した図である。図5(A)は基板上に接着剤を配した状態での平面図、同(B)はCCDを接着剤上に配置した状態を示した図、同(C)は(B)におけるA−A断面図である。   As shown in Patent Document 1, a semiconductor device in which an IC chip for imaging such as a CCD (hereinafter simply referred to as a CCD) is mounted on a substrate is provided with a pedestal for mounting the CCD on the substrate, and an adhesive is used. The technique of adhering the CCD onto the pedestal is widely used. FIG. 5 is a view showing an overview of a conventional manufacturing process of a semiconductor device in which a CCD is mounted on a substrate. FIG. 5A is a plan view in a state where an adhesive is disposed on a substrate, FIG. 5B is a diagram showing a state where a CCD is disposed on the adhesive, and FIG. 5C is A- in FIG. It is A sectional drawing.

図5(A)に示すように、基板100上の台座部101上に接着剤105が配される。基板100には複数の端子102が形成されている。そして、図5(B)に示すように、接着剤105上からこれを押付けるようにしてCCD110が載置され、CCD側の接続パッド111と端子102とがワイヤボンディングされる。ところが、このときの状態を側面から見ると、図5(C)で示すように接着剤105の厚みが不均一となりCCD110が傾くという場合がある。このように撮像素子としてのCCD110が傾くと、作製された半導体装置の撮像機能が劣化してしまう。   As shown in FIG. 5A, an adhesive 105 is disposed on a pedestal 101 on the substrate 100. A plurality of terminals 102 are formed on the substrate 100. Then, as shown in FIG. 5B, the CCD 110 is placed so as to be pressed from above the adhesive 105, and the connection pads 111 and the terminals 102 on the CCD side are wire-bonded. However, when the state at this time is viewed from the side, as shown in FIG. 5C, the thickness of the adhesive 105 may become uneven and the CCD 110 may be inclined. Thus, when the CCD 110 as the imaging element is tilted, the imaging function of the manufactured semiconductor device is deteriorated.

また、図5で示した製造法では、接着剤105上から単にCCD110を押付けるだけであるので、接着剤中に気泡が混入してボイドが発生し易くなる。このようなボイドは亀裂発生の原因、強度低下の原因となるので半導体装置の信頼性を低下させてしまう。   Further, in the manufacturing method shown in FIG. 5, since the CCD 110 is simply pressed from the adhesive 105, bubbles are easily mixed in the adhesive and voids are easily generated. Since such voids cause cracks and reduce strength, the reliability of the semiconductor device is reduced.

また、特許文献2で開示された手法では、基板上に直接、放射溝を形成している。そして、この基板とICチップとの間に接着剤を配置し、ICチップを基板側に押付けて固定する。このとき接着剤は、基板表面とICチップ実装面との間に介在して両者を接着する。多過ぎた接着剤は上記溝内に入るが、基板表面とICチップ実装面との間の接着剤が接着に寄与している。よって、基板表面上の接着剤が不均一となった場合には、前述したと同様にICチップが傾斜した状態となる。よって、特許文献2で示す技術を用いてCCD等の撮像素子を基板上に載置する場合にも、同様に傾斜の問題が発生する虞がある。さらに、この特許文献2では、特別に溝を形成した基板を準備する必要があるので、コストが上昇してしまう。   In the technique disclosed in Patent Document 2, the radiation groove is formed directly on the substrate. Then, an adhesive is disposed between the substrate and the IC chip, and the IC chip is pressed and fixed to the substrate side. At this time, the adhesive is interposed between the substrate surface and the IC chip mounting surface to bond them together. Too much adhesive enters the groove, but the adhesive between the substrate surface and the IC chip mounting surface contributes to adhesion. Therefore, when the adhesive on the substrate surface becomes non-uniform, the IC chip is inclined as described above. Therefore, even when an image pickup device such as a CCD is placed on the substrate using the technique shown in Patent Document 2, there is a possibility that the problem of tilt similarly occurs. Furthermore, in this patent document 2, since it is necessary to prepare the board | substrate which formed the groove | channel specially, cost will raise.

上記のように、従来の半導体装置では接着剤を用いて基板上にICチップを固定する場合に、傾斜させることなく配置することが困難であった。そこで、本発明は係る課題を解決し、簡単な構成でICチップを水平状態に保持し、基板に強固に接着されている半導体装置を提供することを目的とする。   As described above, in the conventional semiconductor device, when an IC chip is fixed on a substrate using an adhesive, it is difficult to arrange the IC chip without inclining. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device that solves such problems and holds an IC chip in a horizontal state with a simple configuration and is firmly bonded to a substrate.

上記目的は、基板と、前記基板上に形成した台座部と、前記台座部上に載置したICチップとを含む半導体装置であって、前記台座部を複数に分割した台座ブロックにより形成した半導体装置により達成できる。本発明では、ICチップを載置する台座部が複数の台座ブロックに分割されているので、台座ブロック間の部分は基板が露出する。この台座ブロック間の部分に接着剤を配して、ICチップ下面を台座ブロック上に直接に載置すれば、台座ブロック上面に接着剤が乗り上がらない状態で両者を接着できる。よって、ICチップの水平度を保ちながら、基板に強固に接着した半導体装置を提供できる。   The object is a semiconductor device including a substrate, a pedestal portion formed on the substrate, and an IC chip placed on the pedestal portion, and a semiconductor formed by a pedestal block obtained by dividing the pedestal portion into a plurality of parts. This can be achieved with the device. In the present invention, since the pedestal portion on which the IC chip is placed is divided into a plurality of pedestal blocks, the substrate is exposed at the portion between the pedestal blocks. If an adhesive is disposed between the pedestal blocks and the lower surface of the IC chip is placed directly on the pedestal block, the two can be bonded without the adhesive getting on the upper surface of the pedestal block. Therefore, it is possible to provide a semiconductor device that is firmly bonded to the substrate while maintaining the level of the IC chip.

前記台座ブロックは少なくとも前記ICチップの四隅を支持する台座ブロックを含み、前記台座ブロックの間には前記ICチップが載置されたときに外部に連通する空間が形成される状態とするのが好ましい。このような構造であれば、接着剤が空間内に充填されつつ内部エアを外部側へ効率的に排出できる。よって、ボイドの発生を抑制できる。   The pedestal block preferably includes a pedestal block that supports at least four corners of the IC chip, and a space communicating with the outside is formed between the pedestal blocks when the IC chip is placed. . With such a structure, the internal air can be efficiently discharged to the outside side while the adhesive is filled in the space. Therefore, generation | occurrence | production of a void can be suppressed.

また、前記四隅に配置される各台座ブロックは、前記ICチップが載置されたときに該ICチップの外周よりも外側へ突出した外縁部を備えている構造であることが望ましい。このように外部側に突出する外縁部を備えていれば、これを目印にして載置予定位置にICチップを確実に載置できる。そして、前記空間内に接着剤が充填され、該接着剤を介してICチップと前記基板とが接着されている強固な構造を得ることができる。   Further, each of the pedestal blocks arranged at the four corners preferably has a structure including an outer edge portion protruding outward from the outer periphery of the IC chip when the IC chip is placed. Thus, if the outer edge part which protrudes to the exterior side is provided, the IC chip can be reliably placed at the intended placement position using this as a mark. Then, it is possible to obtain a strong structure in which the space is filled with an adhesive, and the IC chip and the substrate are bonded via the adhesive.

なお、前記台座ブロックは、前記基板に形成した金属パターンとして形成することができる。端子パターン等を形成するときに、同時に形成するようにしてもよい。上記半導体装置を含む撮像装置であれば、CCD、SMOS等のIC撮像用のICチップが基板上の所定位置に位置精度良く配されているので、鮮明な撮影画像を得ることができる。   The pedestal block can be formed as a metal pattern formed on the substrate. When the terminal pattern or the like is formed, it may be formed at the same time. In the case of an imaging apparatus including the semiconductor device, since an IC chip for IC imaging such as a CCD or SMOS is arranged at a predetermined position on the substrate with high positional accuracy, a clear captured image can be obtained.

以上説明したように、本発明によれば、CCD等のICチップの水平度を持って安定に支持する半導体装置を提供できる。   As described above, according to the present invention, it is possible to provide a semiconductor device that stably supports an IC chip such as a CCD with a level of horizontality.

以下、図面を参照して本発明の形態に係る半導体装置を説明する。図1は、実施形態に係る半導体装置1の製造過程の概略を示した図であり、(A)は基板に接着剤を配した状態を示す平面図、同(B)はICチップ(以下、CCDを例として説明する)を接着剤上に配置した状態を示した図である。また、図2は、図1(B)のB−B断面図である。   Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. 1A and 1B are diagrams illustrating an outline of a manufacturing process of a semiconductor device 1 according to an embodiment. FIG. 1A is a plan view illustrating a state in which an adhesive is disposed on a substrate, and FIG. It is the figure which showed the state which has arrange | positioned on the adhesive agent which demonstrates CCD as an example. FIG. 2 is a cross-sectional view taken along the line BB in FIG.

本半導体装置1の基板10には、表面上に多数の端子12共に、台座部11が形成されている。この台座部11は、複数(図1では4個)の台座ブロック11−1〜11−4により構成されている。これらの台座ブロック11−1〜11−4は、例えばメッキにより基板上に形成する金属パターンにより構成することができる。金属パターンに用いる金属はAuを採用することが望ましい。この台座ブロック11−1〜11−4は、基板10の表面との段差が5〜6μm程度となるように形成することが望ましい。なお、台座ブロック11−1〜11−4は、端子12をパターン形成するときに同時に基板10上に形成してもよい。これにより、各台座ブロック専用の製造工程が不要となるので、製造工程を簡略化できる。   A pedestal 11 is formed on the surface of the substrate 10 of the semiconductor device 1 together with a number of terminals 12. The pedestal portion 11 is composed of a plurality (four pieces in FIG. 1) of pedestal blocks 11-1 to 11-4. These pedestal blocks 11-1 to 11-4 can be configured by metal patterns formed on the substrate by plating, for example. It is desirable to use Au as the metal used for the metal pattern. The pedestal blocks 11-1 to 11-4 are preferably formed so that the level difference from the surface of the substrate 10 is about 5 to 6 μm. The pedestal blocks 11-1 to 11-4 may be formed on the substrate 10 at the same time when the terminals 12 are pattern-formed. Thereby, since the manufacturing process only for each base block becomes unnecessary, a manufacturing process can be simplified.

図1に示す台座ブロック11−1〜11−4は略L字型であり、CCD20の載置予定位置に対応してCCD20の四隅を下端から支持するように、各々独立に配置される。よって、台座ブロック11−1〜11−4により囲まれる中央部分や台座ブロック間は、基板10がむき出し(露出)の状態である。接着剤5は、図1(A)に示すように、ほぼ中央部に配するのが望ましい。ここで、CCD20の載置予定位置は、CCD20の受光部の光軸(不図示)と後述するレンズ30の光軸とが実質的に一致する位置であることが好ましい。   The pedestal blocks 11-1 to 11-4 shown in FIG. 1 are substantially L-shaped, and are arranged independently so as to support the four corners of the CCD 20 from the lower end corresponding to the planned placement positions of the CCD 20. Therefore, the substrate 10 is exposed (exposed) between the central portion surrounded by the base blocks 11-1 to 11-4 and between the base blocks. As shown in FIG. 1 (A), the adhesive 5 is desirably disposed almost at the center. Here, it is preferable that the planned mounting position of the CCD 20 is a position where an optical axis (not shown) of the light receiving unit of the CCD 20 substantially coincides with an optical axis of a lens 30 described later.

使用する接着剤5は、CCD20と基板10との接続形態に応じて、導電性及び絶縁性の接着剤を選択して使用することができる。導電性の接着剤としては銀ペースト、絶縁性の接着剤としてはエポキシ系樹脂を好適に使用することができる。これらの接着剤は熱硬化性であることが望ましい。また、接着剤5は流動状であっても、シート状であってもよい。なお、接着剤5は上記に限らず、適宜変更可能である。   As the adhesive 5 to be used, a conductive and insulating adhesive can be selected and used according to the connection form between the CCD 20 and the substrate 10. Silver paste can be suitably used as the conductive adhesive, and epoxy resin can be suitably used as the insulating adhesive. These adhesives are desirably thermosetting. The adhesive 5 may be fluid or sheet. The adhesive 5 is not limited to the above, and can be changed as appropriate.

図1(B)は、図1(A)の状態から、CCD20を中央部上に載置して半導体装置1の外観を完成させた状態を示している。CCD20は、その四隅が4個の台座ブロック11−1〜11−4上に位置する様に設定される。よって、台座ブロック間とCCD20の底部とで囲まれた領域は1つの空間SPとなる。そして、隣接する台座ブロックの間には、この空間SPを外部とに連通する通路7が形成される。すなわち、CCD20を上部から閉じることにより、形成される空間SPは図1(B)で上下左右に形成された通路7を介して中央部から外部に通じた状態となる。   FIG. 1B shows a state in which the external appearance of the semiconductor device 1 is completed by mounting the CCD 20 on the central portion from the state of FIG. The CCD 20 is set so that its four corners are positioned on the four pedestal blocks 11-1 to 11-4. Therefore, an area surrounded by the base blocks and the bottom of the CCD 20 becomes one space SP. And between the adjacent base blocks, a passage 7 is formed to communicate this space SP with the outside. That is, by closing the CCD 20 from above, the space SP formed is in a state where it is communicated from the center to the outside via the passages 7 formed vertically and horizontally in FIG.

製造工程では、図1(A)で示すように、上記空間中央に所定量の接着剤5を配置してからCCD20を上方から載置する。その際、必要により加熱ツールを用いて接着剤5の流動性を高めることが望ましい。CCD20の底部により、押し込まれた接着剤5は空間SP内を充満しながら、通路7に向けて流動する。よって、接着剤5自体に気泡が混入していなければ、内部エアを外側に効率的に押出しながら空間内を接着剤5が充満するのでボイドが発生することがない。なお、CCD20は接続パッド21を備えており、基板10側の端子12とワイヤボンディングされる。   In the manufacturing process, as shown in FIG. 1A, a predetermined amount of the adhesive 5 is placed in the center of the space, and then the CCD 20 is placed from above. At that time, it is desirable to increase the fluidity of the adhesive 5 by using a heating tool as necessary. Due to the bottom of the CCD 20, the pushed adhesive 5 flows toward the passage 7 while filling the space SP. Therefore, if air bubbles are not mixed in the adhesive 5 itself, the space is filled with the adhesive 5 while the internal air is efficiently pushed outward, so that no void is generated. The CCD 20 includes a connection pad 21 and is wire-bonded to the terminal 12 on the substrate 10 side.

ここで、使用する接着剤5の量は、上記空間SPと同等の体積或いはこれより僅かに多い程度とする。このように接着剤5の量を規定しておくと、CCD20を押付けたときに接着剤5が台座ブロック11−1〜11−4上まで乗り上ってくることがない。よって、従来の様に台座とCCD間に介在した不均一な接着剤により、載置したCCDが傾くということがない。すなわち、本半導体装置1では、台座ブロック11−1〜11−4の上面に、CCD20の実装面(下面)が直接に接触して載置されるのでCCD20は水平度を保持して、傾くことがない。この様子は1(B)の断面を示した図2により確認できる。Auメッキ等で平滑に形成された台座ブロック11−1〜11−4の上面にCCD20が載置されるので、確実に水平状態を保持できる。   Here, the amount of the adhesive 5 to be used is a volume equivalent to the space SP or slightly larger than this. If the amount of the adhesive 5 is defined in this way, the adhesive 5 does not climb onto the base blocks 11-1 to 11-4 when the CCD 20 is pressed. Therefore, the mounted CCD is not tilted by the non-uniform adhesive interposed between the pedestal and the CCD as in the prior art. That is, in the present semiconductor device 1, the mounting surface (lower surface) of the CCD 20 is placed in direct contact with the upper surface of the pedestal blocks 11-1 to 11-4, so that the CCD 20 tilts while maintaining the level. There is no. This can be confirmed by FIG. 2 showing a cross section of 1 (B). Since the CCD 20 is placed on the upper surface of the pedestal blocks 11-1 to 11-4 formed smoothly by Au plating or the like, the horizontal state can be reliably maintained.

なお、本願発明者は実験により、接着剤を用いて金属製の台座にCCDを接着する場合よりも、接着剤を用いてCCDを基板に直接、接着する場合の方がより強い接着力が得られることを確認している。本半導体装置1は図1(B)に示すように、CCD20下に基板10との間に介在する接着剤5が存在するので、金属製の台座部に接着剤を介在させて接着した構造と比較して、CCD20をより強固に基板10上に固定した構造を実現できる。   In addition, the inventor of the present application obtained a stronger adhesive force when the CCD is directly bonded to the substrate using the adhesive than when the CCD is bonded to the metal base using the adhesive. It is confirmed that As shown in FIG. 1 (B), the semiconductor device 1 has an adhesive 5 interposed between the semiconductor substrate 1 and the substrate 10 below the CCD 20, so that the metal base portion is bonded with an adhesive interposed therebetween. In comparison, a structure in which the CCD 20 is more firmly fixed on the substrate 10 can be realized.

さらに、各台座ブロック11−1〜11−4が果たしている他の機能について説明する。これらの台座ブロック11−1〜11−4は、CCD20を載置する際に載置予定位置を確認できるように平面形状が設計されている。図1(A)と図1(B)とを比較すると確認できるように、CCD20を載置した状態で、CCD20の外周よりもL字型に形成した台座ブロック11−1〜11−4の外縁部11PR分が僅かに突出している。このように、台座ブロック11−1〜11−4の外縁部11PRを僅かに突出する程度に形成することで、載置予定位置を確認しながらCCD20を載置できる。   Further, other functions performed by the pedestal blocks 11-1 to 11-4 will be described. These pedestal blocks 11-1 to 11-4 are designed to have a planar shape so that the expected placement position can be confirmed when the CCD 20 is placed. As can be confirmed by comparing FIG. 1A and FIG. 1B, the outer edges of the pedestal blocks 11-1 to 11-4 formed in an L shape rather than the outer periphery of the CCD 20 with the CCD 20 mounted. The portion 11PR is slightly protruding. Thus, by forming the outer edge portion 11PR of the pedestal blocks 11-1 to 11-4 so as to slightly protrude, the CCD 20 can be placed while checking the expected placement position.

上記のように、本半導体装置1では台座ブロック11−1〜11−4の上面でCCD20の高さ方向での位置決めが行なわれ、面内方向での位置決めは台座ブロック11−1〜11−4の外縁部11PRを利用して行なわれる。よって、CCD20を基板10上での予定位置に確実に配置できる。   As described above, in the present semiconductor device 1, the CCD 20 is positioned in the height direction on the top surfaces of the pedestal blocks 11-1 to 11-4, and the positioning in the in-plane direction is the pedestal blocks 11-1 to 11-4. The outer edge portion 11PR is used. Therefore, the CCD 20 can be reliably arranged at a predetermined position on the substrate 10.

図3は、台座ブロック11−1〜11−4の形状改善例について示している。同(A)は左右の通路部7L,7Rの幅のみを狭めた場合、同(B)は更に上下の通路7U,7Dの幅を広めた場合の例を示している。この改善例に示す台座ブロック11−1〜11−4は、押出された接着剤5が左右に位置する端子12のパターンに接触することがないように工夫されている。即ち、CCD20が上部に配置されたときに、通路7U、7Dとなる部分の内で左右の通路部7L,7Rは幅を絞っている。このように形成すると上下の通路7側へ接着剤5が多く流動するので、接着剤5と端子12との接触を抑制できる。   FIG. 3 shows an example of the shape improvement of the pedestal blocks 11-1 to 11-4. (A) shows an example in which only the widths of the left and right passage portions 7L and 7R are narrowed, and (B) shows an example in which the widths of the upper and lower passages 7U and 7D are further widened. The pedestal blocks 11-1 to 11-4 shown in this improved example are devised so that the extruded adhesive 5 does not come into contact with the pattern of the terminals 12 located on the left and right. That is, when the CCD 20 is disposed at the top, the left and right passage portions 7L and 7R are narrowed in the portion that becomes the passages 7U and 7D. When formed in this way, a large amount of the adhesive 5 flows toward the upper and lower passages 7, so that contact between the adhesive 5 and the terminals 12 can be suppressed.

本半導体装置1は、台座部とCCD20との間に接着剤が介在しないので、従来のようにCCDが傾斜するという問題を生じない。しかも、メッキ等により形成した平坦な台座部上面にCCDが載置されるので水平状態を保持できる。さらに、接着剤5は基板10とCCD20との間に介在するので、両者を強固に接着することができる。   In the present semiconductor device 1, since no adhesive is interposed between the pedestal portion and the CCD 20, there is no problem that the CCD is inclined as in the prior art. Moreover, since the CCD is placed on the upper surface of the flat pedestal formed by plating or the like, the horizontal state can be maintained. Further, since the adhesive 5 is interposed between the substrate 10 and the CCD 20, both can be firmly bonded.

図4は、上記半導体装置1を組込んだ撮像装置30を示した図である。この撮像装置30は基板10に固定した鏡筒31と、この鏡筒31に光軸方向へ摺動自在に接続されたレンズホルダ32を備えている。レンズホルダ32にはレンズ33が固定されている。この撮像装置30は、CCD20が基板10上の所定位置に位置精度良く配されるので、鮮明な撮影画像を得ることができる。   FIG. 4 is a diagram showing an imaging device 30 in which the semiconductor device 1 is incorporated. The imaging device 30 includes a lens barrel 31 fixed to the substrate 10 and a lens holder 32 slidably connected to the lens barrel 31 in the optical axis direction. A lens 33 is fixed to the lens holder 32. Since the CCD 20 is arranged at a predetermined position on the substrate 10 with high positional accuracy, the imaging device 30 can obtain a clear captured image.

以上、本発明の好ましい一実施形態について詳述したが、本発明は係る特定の実施形態に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。例えば、上記実施形態では、ICチップをCCDとして説明したがこれに限るものではない。本発明は、水平度を維持し、精度良く所定位置に載置する必要があるICチップを備える半導体装置に広く適用できる。また、上記実施形態では台座ブロックの形状をL字としたが、これに限るものではない。台座ブロックの形状や個数は必要により適宜変更すればよい。   The preferred embodiment of the present invention has been described in detail above. However, the present invention is not limited to the specific embodiment, and various modifications can be made within the scope of the gist of the present invention described in the claims. Deformation / change is possible. For example, in the above embodiment, the IC chip is described as a CCD, but the present invention is not limited to this. The present invention can be widely applied to a semiconductor device including an IC chip that needs to be placed at a predetermined position with high accuracy while maintaining levelness. Moreover, in the said embodiment, although the shape of the base block was L-shaped, it is not restricted to this. What is necessary is just to change suitably the shape and number of base blocks as needed.

実施形態に係る半導体装置の製造過程の概略を示した図である。(A)は基板に接着剤を配した状態を示す平面図、同(B)はICチップを接着剤上に配置した状態を示した図である。It is the figure which showed the outline of the manufacturing process of the semiconductor device which concerns on embodiment. (A) is the top view which shows the state which has arrange | positioned the adhesive agent to a board | substrate, (B) is the figure which showed the state which has arrange | positioned the IC chip on the adhesive agent. 図1(B)のB−B断面図である。It is BB sectional drawing of FIG.1 (B). 台座ブロックの形状の改善例について示している図である。It is a figure showing about the example of improvement of the shape of a base block. 半導体装置を組込んだ撮像装置を示した図である。It is the figure which showed the imaging device incorporating the semiconductor device. 従来において基板上にCCDを載置した半導体装置を製造する様子の概観を示した図である。It is the figure which showed the general appearance of a mode that the semiconductor device which mounted CCD on the board | substrate conventionally is manufactured.

符号の説明Explanation of symbols

1 半導体装置
5 接着剤
10 基板
11 台座部
11‐1〜11‐4 台座ブロック
20 CCD
SP 空間
PR 外縁部
DESCRIPTION OF SYMBOLS 1 Semiconductor device 5 Adhesive 10 Board | substrate 11 Base part 11-1 to 11-4 Base block 20 CCD
SP space PR outer edge

Claims (6)

基板と、前記基板上に形成した台座部と、前記台座部上に載置したICチップとを含む半導体装置であって、
前記台座部を複数に分割した台座ブロックにより形成したことを特徴とする半導体装置。
A semiconductor device comprising a substrate, a pedestal portion formed on the substrate, and an IC chip placed on the pedestal portion,
A semiconductor device, wherein the pedestal portion is formed by a pedestal block divided into a plurality of parts.
前記台座ブロックは少なくとも前記ICチップの四隅を支持する台座ブロックを含み、前記台座ブロックの間には前記ICチップが載置されたときに外部に連通する空間が形成されることを特徴とする請求項1に記載の半導体装置。 The pedestal block includes a pedestal block that supports at least four corners of the IC chip, and a space that communicates with the outside when the IC chip is placed is formed between the pedestal blocks. Item 14. The semiconductor device according to Item 1. 前記四隅に配置される各台座ブロックは、前記ICチップが載置されたときに該ICチップの外周よりも外側へ突出した外縁部を備えることを特徴とする請求項2に記載の半導体装置。 3. The semiconductor device according to claim 2, wherein each of the pedestal blocks disposed at the four corners includes an outer edge portion protruding outward from an outer periphery of the IC chip when the IC chip is placed. 前記空間内に接着剤が充填され、該接着剤を介してICチップと前記基板とが接着されていることを特徴とする請求項2または3に記載の半導体装置。 4. The semiconductor device according to claim 2, wherein the space is filled with an adhesive, and the IC chip and the substrate are bonded via the adhesive. 前記台座ブロックは、前記基板に形成した金属パターンとして形成されていることを特徴とする請求項1から4のいずれかに記載の半導体装置。 The semiconductor device according to claim 1, wherein the pedestal block is formed as a metal pattern formed on the substrate. 請求項1から5のいずれかに記載の半導体装置を含むことを特徴とする撮像装置。
An imaging apparatus comprising the semiconductor device according to claim 1.
JP2003309226A 2003-09-01 2003-09-01 Semiconductor device and imaging apparatus including the same Pending JP2005079400A (en)

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Cited By (6)

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JP2007059581A (en) * 2005-08-24 2007-03-08 Konica Minolta Opto Inc Solid-state imaging apparatus and camera module
JP2007266380A (en) * 2006-03-29 2007-10-11 Matsushita Electric Ind Co Ltd Semiconductor image pickup device and its manufacturing method
JP2008205057A (en) * 2007-02-19 2008-09-04 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method therefor
JP2014006135A (en) * 2012-06-25 2014-01-16 Hitachi Automotive Systems Ltd Pressure sensor device
JP2016149539A (en) * 2015-02-11 2016-08-18 アナログ・デバイシズ・インコーポレーテッド Packaged microchip with patterned interposer
JP2017011217A (en) * 2015-06-25 2017-01-12 シャープ株式会社 Solid-state imaging device and camera module

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007059581A (en) * 2005-08-24 2007-03-08 Konica Minolta Opto Inc Solid-state imaging apparatus and camera module
KR101216913B1 (en) * 2005-08-24 2012-12-28 코니카 미놀타 어드밴스드 레이어즈 인코포레이티드 Solid image pickup unit and camera module
JP2007266380A (en) * 2006-03-29 2007-10-11 Matsushita Electric Ind Co Ltd Semiconductor image pickup device and its manufacturing method
JP2008205057A (en) * 2007-02-19 2008-09-04 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method therefor
JP2014006135A (en) * 2012-06-25 2014-01-16 Hitachi Automotive Systems Ltd Pressure sensor device
JP2016149539A (en) * 2015-02-11 2016-08-18 アナログ・デバイシズ・インコーポレーテッド Packaged microchip with patterned interposer
JP2017011217A (en) * 2015-06-25 2017-01-12 シャープ株式会社 Solid-state imaging device and camera module

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