JP2005079299A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing semiconductor device, by which an impurity can be introduced into a semiconductor region with a small number of steps and, in addition, a large-sized active matrix substrate can be manufactured with a high yield. <P>SOLUTION: After a solution containing an impurity element is discharged onto the semiconductor region by the droplet discharge method, the semiconductor region is melted by having a laser light irradiated on the region, and at the same time, an impurity region is formed by adding and activating the impurity element. Therefore, the impurity can be introduced into the semiconductor region, while the concentration of the impurity element is controlled even if no vacuum process is performed. Consequently, a thin-film transistor (TFT) can be manufactured on a substrate having a large area and the throughput can be improved. In addition, the large-sized active matrix substrate can be manufactured. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

    The present invention relates to a method for doping impurities into a semiconductor region using a droplet discharge method.

  An active matrix substrate typified by an electro-optical device or a light emitting display device uses a thin film transistor (TFT) as a switching element. In order to give the TFT semiconductor region a desired resistivity, impurities (P (phosphorus), As (arsenic), B (boron), etc.) imparting N-type or P-type are introduced into the semiconductor region by impurity introduction. A source region and / or a drain region having a desired resistivity is formed by being introduced into a part.

  Examples of the impurity introduction method include a non-mass separation type ion doping method and a plasma doping method. There is also a mass separation type ion implantation method. At present, since it is easy to easily control the impurity concentration and the depth distribution, a non-mass-separated ion doping method is widely used in the manufacturing process of an active matrix substrate.

As an impurity introduction method, a laser doping method is also used. The laser doping method is a method in which a semiconductor region is exposed to a gas containing impurities, the surface thereof is irradiated with laser light, the semiconductor region is melted, and impurities are added and activated (see Patent Document 1).
Japanese Patent Laid-Open No. 5-326430

  However, the ion doping method, the plasma doping method, and the ion implantation method are high vacuum processes. For this reason, there are problems that the cost of the apparatus increases and the throughput is low. In addition, since the process is a vacuum process, the size of the apparatus is also limited. As a result, it is difficult to introduce impurities into a semiconductor region formed over a large substrate, and there is a problem that throughput is low.

  In addition, when these methods are performed in a low vacuum or atmospheric pressure, it is difficult to generate abnormal discharge due to high voltage application, collision between source gas and ion flow, and acceleration voltage due to diffusion, and control straightness of ion grains. Is difficult. In addition, since toxic and combustible phosphine, diborane, and other gases are used as the raw material gas, there is a problem that use at atmospheric pressure is dangerous.

  In addition, when an impurity is introduced into a semiconductor region by using the above method, a resist mask manufactured by a photolithography process is necessary to introduce the impurity into a desired region. However, there is a problem in that the number of steps for manufacturing an active matrix substrate increases due to the photolithography process, and the yield decreases.

  Further, in the laser doping method, it is difficult to control the amount of impurities introduced into the semiconductor region, and it is difficult to diffuse the impurities uniformly.

  In view of the above problems, an object of the present invention is to propose a method of introducing impurities into a semiconductor region with a safe, high throughput, and small number of steps. Another object of the present invention is to propose a method for manufacturing a large active matrix substrate with a high yield.

  The present invention discharges a solution containing an impurity element onto a semiconductor region by a droplet discharge method, and then irradiates a laser beam to melt the semiconductor region, and adds and activates the impurity element to form the impurity region. It is characterized by.

  In the present invention, a semiconductor film is formed over a substrate having an insulating surface, a solution containing an impurity element is discharged to a desired region of the semiconductor film, and the semiconductor region is irradiated with laser light to be n-type or A semiconductor element having a p-type region is manufactured. In addition, an active matrix substrate having the semiconductor element as described above is manufactured.

  The impurity element imparting n-type includes phosphorus (P) or arsenic (As), and the impurity element imparting p-type includes boron (B). In the semiconductor region, the n-type or p-type region includes a low concentration impurity region and a high concentration impurity region.

  In the present invention, a solution containing an impurity element imparting n-type or p-type, that is, a supply source of the impurity element is preferably a solution, that is, a low-viscosity one. When a solution is used as the supply source of the impurity element, it is difficult to remain in the discharge region after irradiation with laser light. For this reason, the process of removing this supply source is not required, and the throughput can be increased.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured over a large-area substrate, and throughput can be improved. In addition, a large active matrix substrate can be manufactured. In addition, since a photolithography process is not required to form the source region and the drain region, the number of steps for manufacturing a TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that the yield is improved. Furthermore, since the impurity element supply source is a solution, the concentration can be easily controlled. Therefore, the concentration of the impurity region can be easily controlled, and a TFT having an arbitrary structure such as an offset structure, a self-aligned structure, or an impurity region covered with the gate electrode can be easily manufactured.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention should not be construed as being limited to the description of the embodiment modes. Hereinafter, the embodiments and examples will be described using TFTs as semiconductor elements. However, the present invention is not limited thereto, and the present invention is appropriately applied to apply MOS transistors, bipolar transistors, memory elements, diodes, photoelectric transistors. It can be applied to a manufacturing process of a conversion element, a resistance element, a coil, a capacitive element, an inductor, and the like.

(First embodiment)
In the present embodiment, a method for forming a semiconductor element having a high concentration impurity region in a semiconductor region will be described with reference to FIGS.

  First, as illustrated in FIG. 1A, a base insulating film 102 is formed over a substrate 101 by using a known method such as a plasma CVD method, a sputtering method, an SOG (Spin On Glass) method, or a spin coating method. To do. As the substrate 101, a glass substrate, a quartz substrate, a silicon substrate, a metal substrate, or a stainless substrate on which an insulating film is formed may be used. Alternatively, a plastic substrate having heat resistance that can withstand the processing temperature may be used. The size of the substrate is arbitrary but 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm, 1500 mm × 1800 mm, 1800 mm × 2000 mm, 2000 mm × 2100 mm, 2200 mm × 2600 mm, or 2600 mm × 3100 mm Such a large area substrate can be used.

  As the base insulating film 102, a single-layer film made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film, or a ground film under a structure in which two or more layers are stacked is formed.

  Next, a semiconductor region is formed over the base insulating film. In the semiconductor region, a semiconductor film having an amorphous structure (hereinafter referred to as an amorphous semiconductor film) is formed by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like). Alternatively, it is amorphous by a known crystallization process (laser crystallization method, thermal crystallization method, or thermal crystallization method using a metal such as nickel to promote crystallization of an amorphous semiconductor film). A crystalline semiconductor film obtained by crystallizing the semiconductor film is formed. Next, after a resist mask is formed over the amorphous semiconductor film or the crystalline semiconductor film by a photolithography process, the semiconductor region 103 having a desired shape is formed by etching.

  The semiconductor region is formed with a thickness of 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the material of the crystalline semiconductor film, but the crystalline semiconductor film is preferably formed of silicon or a silicon germanium (SiGe) alloy. In addition to an amorphous semiconductor film or a crystalline semiconductor film, a semiconductor region can be formed using a microcrystalline semiconductor film.

  A microcrystalline semiconductor film is a semiconductor having an intermediate structure between an amorphous structure and a crystalline structure (including single crystal and polycrystal) and having a third state that is stable in terms of free energy, and has a short distance. It contains a crystalline region with order and lattice distortion. At least a part of the region in the film contains crystal grains of 0.5 to 20 nm.

The microcrystalline semiconductor film is formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF ₄ or the like is used. Further, this silicide gas may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution rate is preferably in the range of 2 to 1000 times. At this time, the pressure is in the range of approximately 0.1 Pa to 133 Pa, and the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature may be 300 ° C. or less, preferably 100 to 250 ° C. As an impurity element in the film, impurities of atmospheric components such as oxygen, nitrogen, and carbon are desirably 1 × 10 ²⁰ cm ⁻¹ or less, and in particular, the oxygen concentration is 5 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less

Note that after the semiconductor film is formed, a solution containing an impurity element imparting p-type conductivity may be discharged over the entire surface of the semiconductor film by a droplet discharge method or a coating method. Here, the concentration of the solution is adjusted in a timely manner so that the impurity concentration of a semiconductor film to be formed later is 1 × 10 ^{14 to} 6 × 10 ¹⁶ . Next, an impurity can be added to the semiconductor film by irradiation with laser light. At this time, the concentration of boron in the semiconductor film is set to 1 × 10 ^{14 to} 6 × 10 ¹⁶ atoms / cm ³ . Through this step, the threshold value of the TFT formed later can be controlled. Instead of this step, impurity gases such as B ₂ H ₆ and BF ₃ may be mixed into the silicide gas at a rate of 1 ppm to 1000 ppm when the semiconductor film is formed.

  Next, solutions 105a and 105b containing an impurity element imparting n-type or p-type are discharged from the head 107 to part of the semiconductor region by a droplet discharge method. Examples of the impurity element imparting n-type include phosphorus (P) and arsenic (As), and examples of the impurity element imparting p-type include boron (B). When the solution is an aqueous solution, the wettability between the surface of the semiconductor region and water is not so good. Therefore, in order to improve the wettability, it is preferable to form an extremely thin oxide film on the surface of the semiconductor region in advance. The oxide film can be formed by applying ozone water, oxidizing the surface by plasma treatment, or irradiating ultraviolet rays in an atmosphere containing oxygen to generate ozone to oxidize the surface. Moreover, an organic solvent etc. can also be used as a solvent of a solution. As typical examples of the organic solvent, benzene, toluene, xylene, carbon tetrachloride, chloroform, ether, ethanol and the like can be used. In this case, an oxide film may not be formed on the surface of the semiconductor film. Furthermore, the liquid to be applied is not limited to a solution, and a uniform dispersion, a colloidal solution, or the like can also be used.

  The diameter of the nozzle provided in the head 107 is 0.1 to 50 μm (preferably 0.6 to 26 μm), and the discharge amount of the composition discharged from the nozzle is 0.00001 pl to 50 pl (preferably 0). .0001 to 10 pl). The discharge amount increases in proportion to the size of the nozzle diameter. For example, when a nozzle having a diameter of 0.6 μm is used, the discharge amount is 0.0001 pl, and a pattern having a diameter of 0.7 μm is formed. can do. If a nozzle having a diameter of 1.2 μm is used, the discharge amount is 0.001 pl, and a pattern having a diameter of 1.5 μm can be formed.

  With respect to a method for discharging a solution containing an impurity element imparting n-type or p-type onto a semiconductor region, the head 107 may be moved, or the head 107 may be fixed and a substrate as an object to be processed may be installed. The stage may be moved. However, the head 107 is moved in consideration of the acceleration of the composition, the distance between the nozzle provided in the head 107 and the object to be processed, and the environment.

  There are two types of droplet discharge methods, an on-demand type and a continuous type, and it is preferable to use the on-demand type. The heads used in the droplet discharge method are roughly classified into a piezoelectric method and a bubble jet (registered trademark) method. In the present invention, either method can be used. The piezoelectric method utilizes the property of the piezoelectric body being deformed by voltage application, and the bubble jet (registered trademark) method is to boil the composition with a heater provided in the nozzle and discharge the composition. . When the piezoelectric method is used, the discharge amount can be controlled by controlling the waveform of the voltage applied to the piezoelectric element. Usually, the same amount of the composition is continuously discharged, but since the opening tends to increase in diameter from the bottom to the top, the diameter of the opening is previously measured by a sensor or the like, and the opening When the amount corresponding to the diameter of the part is discharged, the advantage of the piezoelectric method can be utilized well.

Next, as shown in FIG. 1B, laser light 111 is irradiated to the entire semiconductor region, particularly to the semiconductor region to which a solution containing impurities is applied. By this step, as shown in FIG. 1C, the concentration of the impurity element which melts part or all of the semiconductor region coated with the solution containing the impurity, diffuses the impurity, and imparts N-type or P-type. Impurity regions 121a and 121b having a thickness of 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ are formed. In addition, when the crystalline semiconductor film is formed by a thermal crystallization method using a metal such as nickel in order to promote crystallization of the amorphous semiconductor film, the metal element can be segregated in the impurity region. By this step, off current of a TFT to be formed later can be controlled.

  Laser light that can be used at this time is pulsed or continuous wave laser light emitted from a gas laser, a solid laser, or a metal laser, and has a wavelength range of visible to vacuum ultraviolet.

  Typical examples of pulsed laser light or continuous wave laser light that is irradiated from a gas laser and whose wavelength range is visible to vacuum ultraviolet are from excimer lasers such as pulsed XeCl, KrCl, ArF, KrF, and XeF. Examples of the laser light to be irradiated include laser light irradiated from a gas laser such as a continuous wave Ar laser and a Kr laser.

Typical examples of pulsed laser light or continuous wave laser light irradiated from a solid-state laser and having a wavelength range of visible to vacuum ultraviolet include pulsed or continuous wave Cr ³⁺ , Cr ⁴⁺ , Nd ^3+. , Er ³⁺ , Ce ³⁺ , Co ²⁺ , Ti ³⁺ , Yb ³⁺ or V ³⁺ doped YAG laser, YVO ₄ laser, YLF laser, etc. Or the laser beam irradiated from solid lasers, such as a glass laser, a ruby laser, an alexandride laser, Ti: sapphire laser, is mention | raise | lifted.

  Typical examples of pulsed laser light or continuous wave laser light emitted from a metal laser and having a wavelength range of visible to vacuum ultraviolet include continuous wave laser light and copper vapor emitted from a laser such as helium cadmium. Examples thereof include pulsed laser light emitted from a laser, a gold vapor laser, or the like.

  In addition, when laser light using a laser oscillator as a light source is condensed and irradiated in a linear, elliptical, or planar shape with an optical system, it is possible to irradiate a larger area in a short time. Therefore, it is preferable.

The irradiation conditions of the laser beam are set as appropriate. When an excimer laser is used, the pulse oscillation frequency is 300 Hz, and the laser energy density is preferably 100 to 700 mJ / cm ² (preferably 200 to 300 mJ / cm ² ). In the case of using a YAG laser, the second harmonic is used to set the pulse oscillation frequency to 1 to 300 Hz and the laser energy density to 300 to 1000 mJ / cm ² (preferably 350 to 500 mJ / cm ² ). Then, a laser beam condensed in a linear shape with a width of 100 to 1000 μm (preferably a width of 400 μm) is irradiated over the entire surface of the substrate, and the superposition ratio (overlap ratio) of the linear beam at this time is 50 to 98%. You can go. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used.

  Next, as illustrated in FIG. 1C, an insulating film 123 is formed to cover the semiconductor region. The insulating 123 is formed using a known method such as a plasma CVD method, a sputtering method, or a spin coating method, with a thickness of 40 to 150 nm, and a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed. In addition, when a low dielectric constant material (preferably a material having a relative dielectric constant of 4 or less) such as acrylic, benzocyclobutene, parylene, flare, or polyimide is used for the insulating film 123, a semiconductor region and an electrode formed later It is preferable because the parasitic capacitance generated during the period can be reduced. This insulating film 123 becomes a gate insulating film of the TFT.

  Next, a conductive film with a thickness of 100 to 600 nm is formed. Here, a conductive film made of a W film is formed by sputtering. Note that although the conductive film is W, it is not particularly limited, and an element selected from Ta, W, Ti, Mo, Al, Cu, or a single layer of an alloy material or a compound material containing the element as a main component, or These layers can be formed. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus can be used.

  Next, a resist mask (not shown) is formed by a known photolithography process, and the conductive film is etched using a dry etching method or a wet etching method, so that the conductive layer 124 is formed. Note that the conductive layer 124 serves as a gate electrode of the TFT.

  Instead of this step, a solution obtained by dissolving or dispersing a conductor in a solvent is discharged onto the region where the region sandwiched between the impurity regions and the gate insulating film overlap by a droplet discharge method, and the solvent is evaporated. Then, the conductive layer 124 may be formed. Conductors are metals such as silver, gold, copper, nickel, platinum, palladium, iridium, rafnium, tungsten, and aluminum, metal sulfides such as cadmium and zinc, and oxides such as iron, titanium, silicon, germanium, zirconium, and barium Further, fine particles of silver chloride such as silver halide or dispersible nanoparticles can be used.

  As the solvent at this time, it is preferable to use esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, and organic solvents such as methyl ethyl ketone and acetone.

  At this time, as the process of evaporating the solvent, one or both of a drying process and a baking (heat treatment) process are performed. The drying and firing steps are both heat treatment steps, but their purpose, temperature and time are different. For example, drying is performed at 100 ° C. for 3 minutes, and baking is performed at 200 to 350 ° C. for 15 minutes to 30 minutes. The drying process and the firing process are performed under normal pressure or reduced pressure by laser light irradiation, rapid thermal annealing, a heating furnace, or the like.

  In order to satisfactorily perform the drying and baking steps, the substrate may be heated, and the temperature at that time depends on the material of the insulating film, but is generally 200 to 800 degrees (preferably 250 to 450 degrees). By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion.

  In the drying and baking steps, laser light irradiation can be employed. As the laser light that can be used at this time, the same laser light as that in FIG. 1B can be used. Note that in the case where an organic insulating film is used as the interlayer insulating film, heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds so that the interlayer insulating film 126 is not broken. .

  In the drying and firing steps, rapid thermal annealing (RTA) can be employed. This is because the temperature is increased rapidly using an infrared lamp or a halogen lamp that emits ultraviolet light or infrared light in an inert gas atmosphere, and instantaneously occurs within a few minutes to a few microseconds. Perform with heat. Since this treatment is performed instantaneously, only the outermost thin film can be heated substantially without affecting the lower layer film. That is, even when an organic insulating film is used as the interlayer insulating film 126, the organic insulating film is not affected.

  Next, after an insulating film (not shown) containing hydrogen is formed over the gate insulating film 123 and the gate electrode 124, the semiconductor region may be hydrogenated by heating to 400 to 500 degrees.

  Next, an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, etc.) or an organic material (polyimide, acrylic, polyamide, polyimide amide, benzocyclobutene, or siloxane polymer) by a known method such as a CVD method or a coating method. The interlayer insulating film 126 is formed using a material containing as a main component. When the material for the interlayer insulating film is applied on the substrate by the coating method, the material is baked as necessary. Note that when a siloxane polymer is used as a raw material for an interlayer insulating film, an interlayer insulating film having a structure in which silicon and oxygen are included in a skeleton structure and hydrogen or / and an alkyl group is included in a side chain.

  Next, resist masks 127a to 127c are formed over the interlayer insulating film by using a photolithography process. Note that, instead of this step, a resist mask may be formed by discharging a resist to an arbitrary region by a droplet discharge method and performing exposure.

  Next, contact holes are formed in the interlayer insulating film using the resist masks 127a to 127c. The contact hole is formed by a known etching process such as wet etching or dry etching. In place of this step, a photosensitive material can be used for the interlayer insulating film, and a contact hole can be formed by wet etching.

  After that, after forming a conductive film, etching is performed using a photolithography process to form the electrodes 131a and 131b. Note that, instead of this step, an electrode can be formed by discharging a contact hole dissolved or dispersed in a solvent by a droplet discharge method, followed by drying and baking. In addition to this step, the electrodes 131a and 131b can be formed by planarizing the electrode surface by a reflow step.

  Further, when an organic material is used as the interlayer insulating film 126, a silicide film such as Ti (titanium), TiN (titanium nitride), TiSix or MoSix, a polysilicon film, Nb, TiON, W is used to prevent outgassing. The barrier film may be formed using a material such as (tungsten), WN, TiWN, or Ta. The barrier film may be either a single layer or a laminated structure. By forming this barrier film, adhesion between the interlayer insulating film and the electrode can be improved, embedding can be provided, and contact resistance can be reduced and stabilized.

  In this embodiment mode, as shown in FIG. 1D, the gate electrode 124 and the source and drain regions 121a and 121b have a self-aligned structure. As shown in FIG. 2A, the TFT having a structure in which offset regions 202a and 202b are provided between the gate electrode 124 and the source and drain regions 201a and 201b, as shown in FIG. As shown in FIG. 2, a TFT having a structure in which part of the source and drain regions 211a and 211b is covered with the gate electrode 124 (regions 212a and 212b in FIG. 2B) can be manufactured.

  In this embodiment, after forming the impurity region, the gate insulating film and the gate electrode are sequentially formed. However, the present invention is not limited to this step, and after forming the gate insulating film and the gate electrode on the semiconductor region, the semiconductor A part of the gate insulating film covering the region may be etched, and a solution containing an impurity element may be discharged there, and laser light may be irradiated to form the impurity region.

  According to the present invention, it is possible to introduce an impurity element into a semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a photolithography process is not required to form the source region and the drain region, the number of steps for manufacturing a TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that the yield is improved. Furthermore, since the impurity element supply source is a solution, the concentration can be easily controlled. Therefore, the concentration of the impurity region can be easily controlled, and a TFT having an arbitrary structure such as an offset structure, a self-aligned structure, or an impurity region covered with the gate electrode can be easily manufactured.

(Second Embodiment)
In this embodiment mode, a manufacturing process of a TFT having a low concentration impurity region and a high concentration impurity region will be described with reference to FIGS.

  As shown in FIG. 3A, as in the first embodiment, a base insulating film 102 is formed over a substrate 101, and a semiconductor region formed using an amorphous semiconductor film or a crystalline semiconductor film thereon. Form. Here, a semiconductor region 303 formed using an amorphous semiconductor film is formed.

Next, as illustrated in FIG. 3B, as a first discharge step, first solutions 301a and 301b containing an impurity element imparting n-type or p-type are partially discharged from the head 107 to the semiconductor region. To do. Here, the concentration of the first solution is adjusted in a timely manner so that the impurity concentration of a low-concentration impurity region to be formed later is 1 × 10 ¹⁷ / cm ³ to 1 × 10 ¹⁹ / cm ³ . After that, irradiation with the first laser beam 302 is performed, a part of the semiconductor region is melted, an impurity is added to the semiconductor region, and activation is performed. As the first laser beam, the same type as the laser beam 111 described in the first embodiment can be adopted. By this step, the semiconductor regions from which the first solutions 301a and 301b are discharged become low-concentration impurity regions 311a and 311b as shown in FIG. 3C. In the semiconductor regions from which the first solution is not discharged, The conductive semiconductor film 312 is formed. This region becomes a channel formation region of a TFT to be formed later. In other words, the crystallization of the semiconductor region and the impurity region can be simultaneously formed by this process.

Next, as shown in FIG. 3C, as a second discharge step, a second solution 313a containing an impurity element imparting n-type or p-type to a part of the semiconductor region from a head (not shown). 313b is discharged. Here, the second solution is adjusted in a timely manner so that the impurity concentration of a high-concentration impurity region to be formed later is 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ . After that, irradiation with the second laser light 315 is performed, a part of the semiconductor region is melted, an impurity is added to the semiconductor region, and activation is performed. Through this step, the semiconductor regions into which the second solutions 313a and 313b have been discharged become high-concentration impurity regions (source and drain regions) 321a and 321b as shown in FIG.

  Next, as shown in FIG. 3D, the source and drain electrodes 131a in contact with the gate insulating film 123, the gate electrode 124, the interlayer insulating film 126, the source region and the drain region by the same process as in the first embodiment. , 131b.

  In this embodiment, the structure in which the end portion of the gate electrode is formed on the interface between the channel formation region and the low-concentration impurity region is shown, but the present invention is not limited to this. Depending on the formation position of the gate electrode or the formation position of the source region and the drain region, a TFT having a structure in which a part of the gate electrode covers the low-concentration impurity region, or a structure in which the end portion of the gate electrode is formed on the channel formation region TFTs can also be formed.

  In the above step, the first solution is discharged and laser light is irradiated to form a low concentration impurity region, and then the second solution is discharged and laser light is irradiated to form a high concentration impurity region portion. Instead of the forming step, the second solution is ejected and irradiated with laser light to form a high concentration impurity region, and then the first solution is ejected onto the semiconductor region and irradiated with laser light to form a low concentration impurity. A region may be formed.

  Further, after a gate insulating film and a gate electrode are formed over the semiconductor region, a part of the gate insulating film covering the semiconductor region is etched, a solution containing an impurity element is discharged there, and laser light is irradiated. An impurity region may be formed.

  According to the present invention, it is possible to introduce an impurity element into a semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a photolithography process is not required to form the source region and the drain region, the number of steps for manufacturing a TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity element, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that yield is improved. . Further, since the supply source of the impurity element is a solution, the concentration can be easily controlled, and any structure such as a structure having a low concentration impurity region, an offset structure, a self-aligned structure, or an impurity region covered with a gate electrode can be used. A TFT having a structure can be easily manufactured.

(Third embodiment)
In this embodiment, a process of forming a gate electrode together with a source electrode and a drain electrode by a droplet discharge method and a laser irradiation method will be described with reference to FIGS.

As shown in FIG. 4A, as in the first embodiment, a base insulating film 102 is formed on a substrate 101, and a first layer formed of an amorphous semiconductor film or a crystalline semiconductor film thereon is formed. The semiconductor region 103 is formed. In this embodiment, the semiconductor region 103 formed of a crystalline semiconductor film is formed. Next, first solutions 401a and 401b containing an impurity element imparting n-type or p-type are ejected from the head 107 to part of the semiconductor region. The concentration of the first solution is adjusted as appropriate so that the impurity concentration of the high-concentration impurity region to be formed later is 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ .

  Next, as shown in FIG. 4B, irradiation with the first laser light 403 is performed, a part of the semiconductor region is melted, an impurity is added to the semiconductor region, and the impurity is activated. Through this step, impurity regions (source and drain regions) 121a and 121b as shown in FIG. 4C are formed.

Next, as illustrated in FIG. 4C, a gate insulating film 123 is formed, and then an amorphous semiconductor film or a crystalline semiconductor film is formed over part of the gate insulating film, After the photolithography process, part of the semiconductor region 413 is etched to form a second semiconductor region 413 having a desired shape. Instead of this step, a semiconductor region can be formed by dropping and baking a solution containing a silicon compound by a droplet discharge method. Next, a second solution 415 containing an impurity element imparting n-type or p-type is discharged from a head (not shown) onto the second semiconductor region. In this embodiment, a solution containing a phosphorus element imparting n-type is applied. Here, the concentration of the second solution is adjusted as appropriate so that the impurity concentration of the gate electrode to be formed later is 1 × 10 ¹⁹ / cm ³ to 1 × 10 ²¹ / cm ³ . After that, the second laser beam 417 is irradiated to melt a part of the semiconductor region, and an impurity is added to the semiconductor region to be activated. In this manner, a gate electrode (region 421 in FIG. 4D) is formed.

  Next, as shown in FIG. 4D, the source and drain electrodes 131a in contact with the gate insulating film 123, the gate electrode 126, the interlayer insulating film 126, the source region and the drain region by the same process as in the first embodiment. , 131b.

  In the present embodiment, the structure in which the end portion of the gate electrode is formed on the interface between the channel formation region and the low concentration impurity region is shown, but the present invention is not limited thereto. As shown in the first embodiment, depending on the formation position of the gate electrode or the formation position of the source region and the drain region, the TFT having a structure in which a part of the gate electrode covers the low-concentration impurity region, or the end of the gate electrode A TFT having a structure formed on the channel formation region can also be formed. Further, a TFT having a structure having a low concentration impurity region as shown in the second embodiment can also be manufactured.

  In addition, a semiconductor region to be a gate insulating film and a gate electrode is formed over the semiconductor region, and then an exposed portion of the gate electrode is removed. After that, a solution containing an impurity element imparting n-type or p-type is discharged onto the semiconductor region and the semiconductor region to be the gate electrode, and irradiated with laser light, and the impurity regions to be the source region and the drain region; An impurity region to be a gate electrode may be formed at the same time. Through this step, the number of times the solution containing the impurity element is discharged and the number of laser light irradiation steps are reduced, so that throughput is improved.

  According to the present invention, it is possible to introduce an impurity element into a semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a photolithography process is not required to form the source region and the drain region, the number of steps for manufacturing a TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity element, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that yield is improved. . Further, since the supply source of the impurity element is a solution, the concentration can be easily controlled, and any structure such as a structure having a low concentration impurity region, an offset structure, a self-aligned structure, or an impurity region covered with a gate electrode can be used. A TFT having a structure can be easily manufactured.

(Fourth embodiment)
In the present embodiment, a process of forming a TFT by a process different from that of the first embodiment will be described with reference to FIG.

As shown in FIG. 11A, as in the first embodiment, a base insulating film 102 is formed over a substrate 101, and an amorphous semiconductor film or a crystalline semiconductor film 1101 is formed thereover. In this embodiment, an amorphous semiconductor film is formed. Next, solutions 1102a to 1102f containing an impurity element imparting n-type or p-type are ejected from the head 107 to part of the semiconductor region. The concentration of the first solution is adjusted as appropriate so that the impurity concentration of the high-concentration impurity region to be formed later is 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ .

  Next, as shown in FIG. 11B, a laser beam 111 is irradiated, a part of the amorphous silicon film is melted, an impurity is added to the semiconductor region, and the impurity is activated. By this step, impurity regions 1111a to 1111f are formed as shown in FIG. Through this step, part or all of the amorphous silicon film 1101 is crystallized, so that the semiconductor film 1112 having an impurity region is obtained.

  Next, as illustrated in FIG. 11D, the semiconductor film 1112 having an impurity region is etched into a desired shape, so that semiconductor regions 1121 to 1123 having impurity regions are formed.

    Next, as shown in FIG. 11E, the source electrode and the drain in contact with the gate insulating film 123, the gate electrodes 1131 to 1133, the interlayer insulating film 126, the source region and the drain region by the same process as in the first embodiment. Electrodes 1134a to 1136a and 1134b to 1136b are formed.

  In the present embodiment, the structure in which the end portion of the gate electrode is formed on the interface between the channel formation region and the low concentration impurity region is shown, but the present invention is not limited thereto. As shown in the first embodiment, depending on the formation position of the gate electrode or the formation position of the source region and the drain region, the TFT having a structure in which a part of the gate electrode covers the low-concentration impurity region, or the end of the gate electrode A TFT having a structure formed on the channel formation region can also be formed. Further, a TFT having a structure having a low concentration impurity region as shown in the second embodiment can also be manufactured. The impurity region and the impurity region to be the gate electrode may be formed at the same time. Through this step, the number of times the solution containing the impurity element is discharged and the number of laser light irradiation steps are reduced, so that throughput is improved.

  According to the present invention, it is possible to introduce an impurity element into a semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity element, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that yield is improved. . Further, since the supply source of the impurity element is a solution, the concentration can be easily controlled, and any structure such as a structure having a low concentration impurity region, an offset structure, a self-aligned structure, or an impurity region covered with a gate electrode can be used. A TFT having a structure can be easily manufactured.

  In this embodiment, a manufacturing process of a semiconductor device to which the present invention is applied will be described with reference to FIGS. More specifically, a manufacturing process in which an N-channel transistor and a P-channel transistor are formed over the same substrate will be described.

  As shown in FIG. 6A, an insulating film containing silicon such as a silicon nitride oxide film or a silicon oxynitride film is formed as a base film 102 over a substrate 101 having an insulating surface by a known method (plasma CVD method or the like). A film is formed as a single layer or a stacked layer. As the substrate 101, a glass substrate, a quartz substrate, or the like is used.

  Next, an amorphous semiconductor is formed with a thickness of 25 to 100 nm by a known method (sputtering method, LPCVD method, plasma CVD method, or the like). Next, the amorphous semiconductor is crystallized using a known crystallization method (laser crystallization method, thermal crystallization method using an RTA or furnace annealing furnace, thermal crystallization method using a metal element that promotes crystallization). Make it. Then, the obtained crystalline semiconductor is patterned into a desired shape to form semiconductor regions 103 and 104.

  Next, ozone water is applied to the surface of the semiconductor region, an extremely thin oxide film is formed on the surface, and the wettability is improved. Then, the droplets are ejected from the heads 107 and 108 to a part of the semiconductor region. Solutions 501a and 501b containing an impurity element imparting n-type and solutions 502a and 502b containing an impurity element imparting p-type are discharged. Here, an aqueous ammonium phosphate solution is used as a solution having an impurity element imparting n-type, and an aqueous boric acid solution is used as a solution having an impurity element imparting p-type.

Next, as shown in FIG. 5B, laser light 111 is irradiated to the entire semiconductor region, particularly to the semiconductor region to which a solution containing an impurity is applied. By this step, a part or all of the semiconductor region to which the solution containing the impurity is applied is melted to diffuse the impurity and activate the impurity. Through this step, impurity regions 503a, 503b, 504a, and 504b having an impurity concentration of 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ shown in FIG. 5C are formed.

  Next, as illustrated in FIG. 5C, a gate insulating film 123 that covers the semiconductor regions 103 and 104 is formed. The gate insulating film 123 is formed of an insulating film containing silicon or the like using a known method (such as sputtering).

  Next, a solution having a conductor is discharged by a droplet discharge method to evaporate the solvent, so that gate electrodes 511 and 512 with a thickness of 10 to 800 nm are formed over the gate insulating film 123. Here, a solution in which silver nanoparticles are dispersed is discharged in a region where the channel formation regions 505 and 506 formed between the source and drain regions 503a, 503b, 504a, and 504b overlap with the gate insulating film 123, and then heated. Then, the solvent is evaporated to form gate electrodes 511 and 512.

  Next, a photosensitive resin is applied and baked to form an interlayer insulating film 513. Here, a negative photosensitive acrylic resin is applied and baked.

  Next, a light-shielding solution is discharged to a desired region on the interlayer insulating film 513 by a droplet discharge method, and heated as necessary to form masks 514a to 514d. Here, a solution in which chromium is dispersed is applied as a light-shielding solution to form a mask. Further, since a negative photosensitive resin is used for the interlayer insulating film, the mask is applied to a region where a contact hole is to be formed. Thereafter, after the interlayer insulating film 513 is exposed, the non-exposed portion is removed (developed) with an alkaline solution to form a contact hole.

  Note that in the case where the interlayer insulating film 513 is formed using a positive photosensitive resin, a contact hole can be formed by forming a mask except for a region where the contact hole is formed, exposing, and developing.

  Next, as shown in FIG. 5D, a solution having a conductor is discharged into the contact hole by a droplet discharge method. Here, a head (not shown) is scanned, and a solution having a conductor is continuously discharged onto the contact hole to fill the conductor in the contact hole. Next, a wiring pattern is formed using a solution containing a conductor to form source and drain electrodes 521a, 521b, 522a, and 522b. Note that a drying step and a baking (heat treatment) step are performed to evaporate the solvent in the solution having the conductor.

  Through the above steps, an n-channel TFT 523 and a p-channel TFT 524 can be formed.

  The present embodiment can be applied to the first to fourth embodiments.

  According to the present invention, it is possible to introduce an impurity element into a semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a large active matrix substrate can be manufactured and throughput can be improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity element, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that yield is improved. . Further, since the supply source of the impurity element is a solution, the concentration can be easily controlled, and any structure such as a structure having a low concentration impurity region, an offset structure, a self-aligned structure, or an impurity region covered with a gate electrode can be used. A TFT having a structure can be easily manufactured.

  In this embodiment, a manufacturing process of a TFT different from that in Embodiment 1 will be described with reference to FIGS.

  A gate electrode 601 is formed on a substrate 101 having an insulating surface by a droplet discharge method, and then formed by a silicon oxide film or a silicon nitride film by a known method such as a coating method or a CVD method. 123 is formed. Here, the gate electrode 601 is formed by discharging a solution in which silver nanoparticles are dispersed and then heating to evaporate the solvent.

  Next, an amorphous semiconductor film is formed over the gate insulating film 123. Next, a protective film 603 formed of an insulating film such as a silicon oxide film is formed on the semiconductor film from the head 107. Here, a liquid material having a liquid silicate glass is discharged by a droplet discharge method, and dried and baked to form the protective film 603. Next, a solution containing an impurity imparting n-type or p-type over the exposed semiconductor region is discharged from the head 107. Here, the boric acid aqueous solution 604 is discharged. Note that an extremely thin oxide film is formed on the surface of the semiconductor region with ozone water to enhance adhesion with a solution containing impurities.

Next, as shown in FIG. 6B, the semiconductor region is irradiated with a laser beam 111 to melt a part of the semiconductor region to introduce an impurity and to activate the impurity element. Through this step, p-type impurity regions (source region and drain region) 621a and 621b having an impurity concentration of 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ³ shown in FIG. 6C are formed. Is done. Further, a region covered with the word film 603 becomes a semiconductor region (channel formation region) 622 having a crystal structure.

  Next, as illustrated in FIG. 6C, source and drain electrodes 623a and 623b are formed over the source and drain regions 621a and 621b. Here, a solution in which silver nanoparticles are dispersed is discharged by a droplet discharge method, and then heated to evaporate the solvent, whereby a source electrode and a drain electrode are manufactured.

  Next, as illustrated in FIG. 6D, the semiconductor film and the gate insulating film are etched using the source electrode and the drain electrode as a mask to form the source and drain regions 621 a and 621 b and the channel formation region 622. A semiconductor region 631 is formed. Here, since the source electrode and the drain electrode are used as masks, the semiconductor region can be formed without performing a photolithography process, and thus the number of processes can be reduced.

  Next, as illustrated in FIG. 6E, an interlayer insulating film 123 is formed. Here, an acrylic resin having negative photosensitivity is applied and baked to form the interlayer insulating film 123. Next, after forming a contact hole by the same process as that in Example 1, a conductive film 631 is formed by a droplet discharge method. The conductive film 631 is a pixel electrode. Here, after a solution containing tin and indium is discharged from a head into a contact hole and fired, the head is scanned again, and a solution containing tin and indium is discharged and fired to form a conductive film. Here, an active matrix substrate is a substrate in which TFTs are formed on a substrate.

  Through the above steps, a p-channel TFT 632 can be manufactured. In addition, an active matrix substrate having a TFT can be manufactured.

  The present embodiment can be applied to the first to fourth embodiments.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a photolithography process is not required for forming the semiconductor region, the gate electrode, the source and drain regions, the contact hole, and the wiring, the number of steps for manufacturing the TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that the yield is improved. Furthermore, since the supply source is a solution, the concentration can be easily controlled, and an arbitrary structure such as a structure having a low concentration impurity region, an offset structure, a self-alignment structure, or an impurity region covered with a gate electrode is provided. A TFT can be easily manufactured.

  In this embodiment, a manufacturing process of a TFT different from that in Embodiment 2 will be described with reference to FIGS.

  As shown in FIG. 12A, similarly to Example 2, a gate electrode 601 is formed on a substrate 101 having an insulating surface by a droplet discharge method, and then a silicon oxide film or a silicon nitride film is used. A gate insulating film 123 to be formed is formed.

  Next, an amorphous semiconductor film 1201 is formed over the gate insulating film 123. Here, an amorphous semiconductor film 1201 which is thicker than the amorphous semiconductor film 602 described in Embodiment 2 is formed. Next, after an extremely thin oxide film is formed on the surface of the amorphous semiconductor film, a solution containing an impurity imparting n-type or p-type is discharged from the head 107. Here, the boric acid aqueous solution 1202 is discharged.

Next, as shown in FIG. 12B, the semiconductor region is irradiated with a laser beam 111 to melt a part of the semiconductor region to introduce an impurity and to activate the impurity element. By this step, an impurity region (source region and drain region) 1221 having a p-type with an impurity concentration of 1 × 10 ²⁰ / cm ³ to 1 × 10 ²¹ / cm ^{3 as shown} in FIG. It is formed. Part or all of the semiconductor region is a semiconductor film 1222 having a crystal structure. Note that here, since the amorphous semiconductor film is thick, the depth at which the semiconductor region melts can be controlled by the irradiation intensity, irradiation time, and wavelength of the laser beam, so that only the surface of the semiconductor region can be controlled. Impurity regions can be formed. Further, only the upper part of the semiconductor film is crystallized, and the gate insulating film side can be kept amorphous. The transistor formed in this manner has a structure in which a channel formation region is not formed between a source and a drain and between an LDD region, and electric field concentration and current concentration can be reduced.

  Next, as illustrated in FIG. 12C, a first conductive film 1231 is formed over the impurity region 1221. The impurity region and part of the semiconductor film are etched using the first conductive film 1231 as a mask, so that the semiconductor region 1231 and the etched gate insulating film 1232 are formed. Here, since the source electrode and the drain electrode are used as masks, the semiconductor region can be formed without performing a photolithography process, and thus the number of processes can be reduced.

Next, as illustrated in FIG. 12E, second conductive films 1241a and 1241b are formed by a droplet discharge method. Next, the first conductive film 1232 is etched using the second conductive film as a mask. At this time, the upper portion of the semiconductor region 1231 is etched. Through this step, the first conductive film is divided into 1242a and 1242b. One of the first conductive parts 1242a and one of the second conductive films 1241a correspond to the source electrode, and the other part of the first conductive parts 1242b and the other of the second conductive film 1241b correspond to the drain electrode. To do.

    Next, an interlayer insulating film 123 is formed in the same manner as in Example 1, a contact hole is formed in a part thereof, and a conductive film 631 is formed by a droplet discharge method. The conductive film 631 is a pixel electrode.

  Through the above steps, a p-channel TFT 1245 can be manufactured. In addition, an active matrix substrate having a TFT can be manufactured.

  The present embodiment can be applied to the first to fourth embodiments.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a TFT can be manufactured using a large-area substrate, and throughput can be improved. In addition, since a photolithography process is not required for forming the semiconductor region, the gate electrode, the source and drain regions, the contact hole, and the wiring, the number of steps for manufacturing the TFT is reduced, and the yield is improved. In addition, since a solution is used as a supply source for introducing an n-type or p-type impurity, a process for removing the supply source is not necessary, and the number of processes can be reduced, so that the yield is improved. Furthermore, since the supply source is a solution, the concentration can be easily controlled, and an arbitrary structure such as a structure having a low concentration impurity region, an offset structure, a self-alignment structure, or an impurity region covered with a gate electrode is provided. A TFT can be easily manufactured.

  In this embodiment, a top view of a module of a display device using the active matrix substrate formed in Embodiments 1 to 3 is shown with reference to FIG. A pixel portion 903 is formed over the first substrate 901, and a second substrate 902 over which a counter electrode is formed is attached to the pixel portion 903 with a liquid crystal layer or a light emitting layer interposed therebetween. The first substrate 901 is the substrate 101 shown in the first to fifth embodiments, and the second substrate 902 corresponds to a counter substrate 751 in the fifth embodiment or a sealing substrate 802 in the sixth embodiment which will be described later. To do.

  In the pixel portion 903, the scanning line group and the data line group intersect to form a matrix, and a TFT is disposed corresponding to each intersection. As the TFT disposed here, the TFT shown in Embodiment Modes 1 to 4 or Embodiments 1 to 3 can be used.

  ICs 904 and 905 each having a driver circuit are mounted on a region outside the pixel portion 1002. Reference numeral 904 denotes a drive circuit on the data line side, and reference numeral 905 denotes a drive circuit on the scanning line side. Data lines and scanning lines formed in the pixel portion 903 are divided into several blocks at the end portion of the pixel portion 903 to form lead lines 906 and collected according to the pitch of the output terminals of the ICs 904 and 905.

  On the other hand, an external input terminal 907 is formed at an end portion of the first substrate 901, and an FPC connected to an external circuit is bonded to this portion. The external input terminal 907 and the IC are connected by a connection wiring 908 formed on the first substrate 901, and finally collected according to the pitch of the input terminals of the IC.

  This embodiment can be freely combined with the first to fourth embodiments and the first to third embodiments.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a large-sized active matrix substrate can be manufactured, and a module for a large display device can be manufactured.

  In this embodiment, a method for manufacturing a liquid crystal display device using the TFT manufactured in Embodiment 2 will be described with reference to FIGS.

  An active matrix substrate 751 is manufactured by the process of Embodiment 2. Next, an alignment film 723 is formed on the substrate and a rubbing process is performed. In this embodiment, before the alignment film 723 is formed, a columnar spacer 702 for maintaining the distance between the substrates is formed at a desired position by patterning an organic resin film such as an acrylic resin film. Further, instead of the columnar spacers, spherical spacers may be scattered over the entire surface of the substrate.

  Next, a counter substrate 752 is prepared. The counter substrate is provided with a color filter 720 in which a colored layer and a light shielding layer are arranged corresponding to each pixel. Further, a flattening film is provided to cover the color filter and the light shielding layer. Next, a counter electrode 721 made of a transparent conductive film is formed on the planarizing film at a position overlapping with the pixel portion, an alignment film 722 is formed on the entire surface of the counter substrate, and a rubbing process is performed.

  Then, after drawing a sealing material so as to surround the pixel portion of the active matrix substrate, liquid crystal is discharged by a droplet discharge method to a region surrounded by the sealing material under reduced pressure. Next, the active matrix substrate and the counter substrate are attached to each other with a sealant 707 under reduced pressure without being exposed to the air. A filler (not shown) is mixed in the sealing material 707, and two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer 702. By using a method of discharging liquid crystal by a droplet discharge method, the amount of liquid crystal used in a manufacturing process can be reduced. In particular, when a large-area substrate is used, significant cost reduction can be realized.

  In this way, an active matrix liquid crystal display device is completed. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Furthermore, an optical film such as a polarizing plate 703 is appropriately provided using a known technique. Then, the FPC is pasted using a known technique. In addition, a driving circuit for driving the pixel portion is connected to the pixel portion.

  If a backlight 704 and a light guide plate 705 are provided in the liquid crystal module obtained through the above steps and covered with a cover 706, an active matrix liquid crystal display device (transmission type) as shown in a part of the cross-sectional view of FIG. ) Is completed. The cover and the liquid crystal module are fixed using an adhesive or an organic resin. Further, since it is a transmissive type, the polarizing plate 703 is attached to both the active matrix substrate and the counter substrate.

  Although this embodiment shows a transmissive type, it is not particularly limited, and a reflective or semi-transmissive liquid crystal display device can also be manufactured. In the case of obtaining a reflective liquid crystal display device, a metal film with high light reflectivity, typically a material film containing aluminum or silver as a main component, or a laminated film thereof may be used as the pixel electrode.

  Although only the pixel portion of the liquid crystal display device is shown in this embodiment, a driving circuit can be formed on the active matrix substrate by the same process. In this case, since an external circuit (IC chip or the like) for driving the pixel portion is not required, the liquid crystal display device can be reduced in size.

  In addition, this embodiment can be freely combined with the first to fourth embodiments and the first to fourth embodiments.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a large active matrix substrate can be manufactured and a large liquid crystal display device can be manufactured.

  In this example, a method for manufacturing a light-emitting display device using the TFT manufactured in Example 1 will be described with reference to FIGS.

  FIG. 8 is a cross-sectional view of the pixel portion 850 of the light-emitting display device. Reference numeral 801 denotes an active matrix substrate manufactured in Example 1, reference numeral 802 denotes a sealing substrate, and reference numeral 803 denotes a sealing material containing a gap material for maintaining a space between the sealed spaces.

  On the substrate 101, a driving TFT formed by a p-channel TFT 523 of a light-emitting element is provided, and an n-channel TFT 524 is provided as a switching TFT of the light-emitting element.

  In addition, a light emitting element 411 is formed in the pixel portion 850, and a first pixel electrode (anode) 631 made of a switching TFT 524, a driving TFT 523, and a transparent conductive film electrically connected to the drain electrode thereof. Are formed by a plurality of light emitting elements. The light-emitting element includes a first pixel electrode 631, a layer 812 containing a light-emitting substance, and a second pixel electrode 813.

  In addition, as the interlayer insulating film 513 of these TFTs 523 and 524, negative photosensitive acrylic is used, but instead of this, an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, etc.), an organic material (polyimide) , Polyamide, polyimide amide, benzocyclobutene, or siloxane polymer). Further, when a siloxane polymer is used as a raw material for the interlayer insulating film, an insulating film having a structure in which silicon and oxygen are included in the skeleton structure and hydrogen or / and an alkyl group is included in the side chain.

The first pixel electrode 631 has transparency and a large work function (ITO (indium oxide tin oxide alloy), indium oxide zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO)). Etc.) is desirable.

  In addition, insulators (called banks, partition walls, barriers, banks, or the like) 814 are formed at both ends of the first pixel electrode (anode) 631. In order to improve the coverage, a curved surface having a curvature is formed at the upper end portion or the lower end portion of the insulator 814. The insulator can be formed using a material similar to that of the interlayer insulating film 513. Note that as a combination of the interlayer insulating film 513 and the insulator 814, a combination of inorganic material-inorganic material, organic material-inorganic material, inorganic material-organic material, organic material-organic material, or the like can be appropriately applied.

  In the case where the insulator 814 is formed using an organic material, the insulator 814 may be covered with a protective film formed using an aluminum nitride film, an aluminum nitride oxide film, a thin film containing carbon as a main component, or a silicon nitride film. This protective film can prevent moisture or oxygen generated from the active matrix substrate from entering the light emitting element.

  Further, an organic compound material is deposited on the first pixel electrode (anode) 631, and a layer 812 containing a light-emitting substance is selectively formed.

  In addition, before forming a layer containing a light-emitting substance, it is desirable to perform a heat treatment at 200 ° C., preferably 300 ° C. or more in a reduced pressure atmosphere or an inert atmosphere in order to remove a gas contained in the substrate. In the case where a flat insulating film (a flat insulating film in which a skeleton structure is formed by bonding of silicon (Si) and oxygen (O)) using a siloxane-based polymer for 513 and the insulator 814 is heated to about 450 ° C. can do. In this embodiment, the substrate is degassed and dehydrated by heat treatment at 230 ° C. for 1 hour to improve reliability.

In this embodiment, the layer 812 containing a light-emitting substance is formed with a vapor deposition apparatus to obtain a uniform film thickness. The structure of the layer 812 containing a light emitting substance, for example, Alq _3, Alq ₃ partially doped with Nile red that is a red light emitting pigment, Alq _3, p-EtTAZ, successively by vapor deposition of TPD (aromatic diamine) A white color can be obtained by laminating.

  In addition, in the case where the layer 812 containing a light-emitting substance is formed by a coating method using spin coating, it is preferably fired by vacuum heating after coating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) that acts as a hole injection layer is applied and fired on the entire surface, and then a luminescent center dye (1, 1,4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile Red, Coumarin 6 Etc.) A doped polyvinyl carbazole (PVK) solution may be applied to the entire surface and fired. PEDOT / PSS uses water as a solvent and does not dissolve in organic solvents. Therefore, when PVK is applied from above, there is no fear of redissolving. Further, since PEDOT / PSS and PVK have different solvents, it is preferable not to use the same film forming chamber. Alternatively, the layer 812 containing a light-emitting substance can be a single layer, and an electron-transporting 1,3,4-oxadiazole derivative (PBD) can be dispersed in hole-transporting polyvinyl carbazole (PVK). . Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red).

Further, a second pixel electrode (cathode) 813 is formed over the layer 812 containing a light-emitting substance. As the cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof such as MgAg, MgIn, AlLi, CaF ₂ , or CaN) may be used.

  Thus, a light-emitting element 811 including the first pixel electrode (anode) 631, the light-emitting substance layer 812, and the second electrode (cathode) 813 is formed. The light emitting element 811 emits light in the arrow direction (active matrix substrate side) shown in FIG. Such a light emitting element is called a bottom emission type light emitting element.

Note that an element that emits light toward the sealing substrate 802 (upward emitting light-emitting element) can be manufactured depending on a stacked structure of the first pixel electrode, the layer containing a light-emitting substance, and the second pixel electrode. As the first electrode at this time, Ti, TiN, TiSi _x N _y , Ni, W, WSi _x , WN _x , WSi _x N _y , NbN, Mo, Cr, Pt, Zn, Sn, In, or Mo A film mainly composed of an element selected from the above, an alloy material or compound material containing the element as a main component, or a stacked film thereof may be used in a total film thickness range of 100 nm to 800 nm. In the case where a titanium nitride film is used as the first electrode 631, it is preferable to increase the work function by performing plasma treatment using ultraviolet irradiation or chlorine gas on the surface.

As a material of the second pixel electrode 813, a translucent material in which an alloy such as MgAg, MgIn, AlLi, CaF ₂ , or CaN, or an element belonging to Group 1 or 2 of the periodic table and aluminum is formed by a co-evaporation method. A film having the above may be used. Here, since the top emission type emits light through the second electrode, an aluminum film of 1 nm to 10 nm or an aluminum film containing a small amount of Li is used. When an Al film is used for the second pixel electrode 813, the material in contact with the layer 812 containing a light-emitting substance can be formed using a material other than an oxide, and the reliability of the light-emitting device can be improved. Further, a light-transmitting layer (film thickness: 1 nm to 5 nm) made of CaF ₂ , MgF ₂ , or BaF ₂ may be formed as a cathode buffer layer before forming an aluminum film having a thickness of 1 nm to 10 nm.

  In order to reduce the resistance of the cathode, an auxiliary electrode may be provided over the second pixel electrode 813 in a region that does not serve as a light emitting region. Further, when the cathode is formed, a resistance heating method by vapor deposition is used, and the cathode may be selectively formed using a vapor deposition mask.

Further, when the first pixel electrode 812 made of a transparent conductive film is used in place of the first pixel electrode 812 made of the metal layer of the top emission type light emitting element, elements that emit light to both substrates 801 and 802 (both sides) An emission type light emitting element) can be manufactured. As the transparent conductive film, ITO (indium tin oxide alloy), indium oxide zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like may be used.

  Here, the light-emitting element 811 is one of light-emitting elements that can obtain R, G, or B monochromatic light emission, and includes three layers each including an organic compound that selectively emits R, G, and B light-emitting elements. Full color with light emitting elements.

  In addition, a protective stack 815 is formed to seal the light-emitting display device 811. The protective laminate is a laminate of a first inorganic insulating film and a second inorganic insulating film that is a stress relaxation film.

  In addition, in order to seal the light emitting element 811, a sealing substrate 802 is attached with a sealant 1205 in an inert gas atmosphere. A concave portion formed in advance by a sandblast method or the like is formed in the sealing substrate 802, and a desiccant 804 is attached to the concave portion. Note that an epoxy-based resin is preferably used as the sealant 803. In addition, the sealant 803 is desirably a material that does not transmit moisture and oxygen as much as possible.

  In this embodiment, as a material for forming the sealing substrate 802 having the recesses, a metal substrate, a glass substrate, a quartz substrate, FRP (Fiberglass-Reinforced Plastics), PVF (polyvinyl fluoride), Mylar, polyester, acrylic, etc. A plastic substrate made of can be used. It is also possible to seal with a metal can with a desiccant attached inside.

  In this embodiment, the active matrix substrate 801, the sealing substrate 802, and the sealing material 803 are filled with an inert gas, but the active matrix substrate and the sealing substrate are closely adhered with the sealing material. Also good. In this case, moisture or oxygen hardly enters the light emitting element, and reliability is improved.

  In addition, this embodiment can be freely combined with the first to fourth embodiments and the first to fourth embodiments.

  According to the present invention, it is possible to introduce impurities into the semiconductor region while controlling the impurity element concentration without going through a vacuum process. Therefore, a large active matrix substrate can be manufactured, and a large light emitting display device can be manufactured.

  Various electronic devices can be manufactured by incorporating a semiconductor element obtained by implementing the present invention. Electronic devices include television receivers, video cameras, digital cameras, goggle-type displays (head-mounted displays), navigation systems, sound playback devices (car audio, audio components, etc.), notebook personal computers, game machines, and portable information terminals (Mobile computer, mobile phone, portable game machine, electronic book, or the like), an image playback apparatus equipped with a recording medium (specifically, a recording medium such as a digital versatile disc (DVD) can be played back and the image can be displayed. And a device equipped with a display). Here, as a typical example of these electronic devices, an image reproducing device including a television receiver, a notebook personal computer, and a recording medium is shown in FIG.

  FIG. 10A illustrates a television receiver which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The present invention can be applied to the display portion 2003. Note that all information display televisions such as a personal computer, a TV broadcast reception, and an advertisement display are included. By using the present invention, a television receiver having a large display portion with high yield can be manufactured.

  FIG. 10B illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The present invention can be applied to the display portion 2203. By using the present invention, a notebook personal computer can be manufactured with high yield.

  FIG. 10E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. Although the display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information, the present invention can be applied to the display portions A, B 2403, and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. By using the present invention, a portable image reproducing device including a recording medium can be manufactured with high yield.

FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention. Sectional drawing explaining the structure of the semiconductor element which concerns on this invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention. Sectional drawing explaining the manufacturing process of the semiconductor element which concerns on this invention FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention. FIG. 6 is a cross-sectional view illustrating a structure of a liquid crystal display device according to the invention. FIG. 14 is a cross-sectional view illustrating a structure of a light-emitting display device according to the invention. FIG. 6 is a top view illustrating the structure of a module of a display device. FIG. 14 illustrates an example of an electronic device. FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of a semiconductor element according to the present invention.

Claims (8)

  After discharging a solution containing an impurity element imparting n-type or p-type onto the semiconductor region by a droplet discharge method, the semiconductor region is melted by irradiating laser light, and the impurity element is added to the semiconductor region. A method for manufacturing a semiconductor device.   A method for manufacturing a semiconductor device, wherein an impurity region is formed by irradiating a laser beam after discharging a solution containing an impurity over a semiconductor region by a droplet discharge method.   3. The method for manufacturing a semiconductor device according to claim 2, wherein the impurity regions are a source region and a drain region. 3. The method for manufacturing a semiconductor device according to claim 2, wherein the impurity region is a gate electrode.   After discharging a first solution containing an impurity element imparting n-type or p-type over the semiconductor region and irradiating with laser light, the second solution containing an impurity element imparting n-type or p-type over the semiconductor region And a laser beam is emitted to form a low concentration impurity region and a high concentration impurity region.   6. The method for manufacturing a semiconductor device according to claim 5, wherein an insulating film is formed over the semiconductor region, and a conductive layer is formed over the insulating film, wherein the conductive layer covers the low-concentration impurity region. A method for manufacturing a semiconductor device.   7. The method for manufacturing a semiconductor device according to claim 1, wherein the impurity element imparting n-type conductivity is phosphorus or arsenic. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the impurity element imparting p-type conductivity is boron.

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