JP2005073423A - Motor driving device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce unwanted radiation noise produced when output voltage is switched, and, after output voltage is switched, to cause an output-stage switching element to perform low-on resistance operation in a short time. <P>SOLUTION: When output voltage is switched from "H" to "L" only a low-output buffer 11, low in driving force, is driven. After output voltage is switched, the gate voltage of the output-stage switching element 9 is steeply increased by an high-output buffer 12. When output voltage is switched from "L" to "H" the gate voltage of the output-stage switching element 9 is steeply lowered by the low-output buffer 11, low in driving force, and the high-output buffer 12 of high driving force. After output voltage VO is switched, the high-output buffer 12 of high driving force is turned off, and the output-stage switching element 9 is driven only by the low-output buffer 11 of low driving force. Thus, unwanted radiation noise is reduced when output voltage is switched, and the output-stage switching element 9 is driven with high efficiency. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a motor driving device that has a switching element of an upper arm element or a lower arm element in a motor and drives the motor by controlling the switching element.

  Conventionally, there is a PWM (Pulse Width Modulation) method as a control method for realizing power saving of a switching power supply, a motor control inverter, and the like. This method is performed by causing the upper arm element (upper switching element) or the lower arm element (lower switching element) connected to the motor coil to perform a high-speed switching operation.

  In order to realize a low-loss PWM drive IC that suppresses the heat generated when the switching element performs a PWM operation, the input current to the switching element may be increased, but the input current to the switching element is too large. In this case, there may be a problem of unnecessary radiation noise that occurs when the output voltage is switched.

  FIG. 7 shows an example of a partial circuit of a motor driving device that drives the switching element of the lower arm element (see Patent Document 1). In FIG. 7, the first input signal is input to the gate of the P-channel MOS transistor 1, and one end of the P-channel MOS transistor 1 is connected to the resistor 2. A resistor 3 is connected to the other end of the resistor 2, a gate of the output stage switching element 9, which is an N-channel MOS transistor, is connected to a series connection point of the resistors 2 and 3, and the output stage switching element 9 The other end of the coil 10 whose one end is connected to the power source is connected to the drain.

  On the other hand, the second input signal is input to the gate of the P-channel MOS transistor 4, and one end of the resistor 5 is connected to the drain of the P-channel MOS transistor 4. A resistor 6 is connected to the other end of the resistor 5, and a gate of the N-channel MOS transistor 7 is connected to a series connection point of the resistors 5 and 6. One end of a resistor 8 is connected to the drain of the N-channel MOS transistor 7, and the other end of the resistor 8 is connected to a series connection point of the resistors 2 and 3.

  FIG. 8 shows a timing chart when the output voltage VO is switched in the circuit shown in FIG. As shown in FIG. 8, a dead time T is added to the first input signal and the second input signal so that the P-channel MOS transistor 1 and the P-channel MOS transistor 4 do not turn on simultaneously.

  When the first input signal is switched from “H” to “L”, the P-channel MOS transistor 1 is turned on, and the output stage switching element 9 is turned on by the charge current corresponding to the time constant between the resistor 2 and the input capacitance of the output stage switching element 9. Is charged, and the gate voltage VG rises. The output voltage VO is switched from “H” to “L” in the mirror capacitance charging period of the output stage switching element 9. At this time, since the second input signal is “H”, the P-channel MOS transistor 4 is OFF and does not affect the switching of the output voltage VO from “H” to “L”.

  Next, when the first input signal is switched from “L” to “H”, the P-channel MOS transistor 1 is turned OFF, and the gate voltage is generated by the discharge current corresponding to the time constant between the resistor 3 and the input capacitance of the output stage switching element 9. Descends. The output voltage VO is switched from “L” to “H” when the mirror capacitance discharge of the input of the output stage switching element 9 is performed.

After the output voltage VO is switched, the second input signal is switched from “H” to “L”, the P-channel MOS transistor 4 is turned on, and the N-channel MOS transistor 7 to which the resistance divided voltage of the resistors 5 and 6 is input is turned on. To do. When the N-channel MOS transistor 7 is turned on, an ON malfunction of the output stage switching element 9 due to a change in the output voltage VO when the output stage switching element 9 is in the OFF state can be suppressed.
JP-A 61-66588

  In such a circuit of FIG. 7, when the switching time of the output voltage VO from “H” to “L” is short and unnecessary radiation noise is a problem, the resistance value of the resistor 2 is increased. Therefore, measures against unwanted radiation noise are taken. In addition, when the switching time of the output voltage VO from “L” to “H” is short and unnecessary radiation noise is a problem, the resistance value of the resistor 8 is increased to reduce unnecessary radiation noise. Measures are taken. FIG. 9 shows a timing chart when the resistance values of the resistors 2 and 8 are increased and countermeasures against unnecessary radiation noise generated when the output voltage VO is switched are taken.

  When the first input signal is switched from “H” to “L”, the P-channel MOS transistor 1 is turned ON, and the current of the output stage switching element 9 is changed by a current corresponding to the time constant between the resistor 2 and the input capacitance of the output stage switching element 9. The input capacitance is charged, and the gate voltage VG of the output stage switching element 9 rises gradually. Since the resistance value of the resistor 2 is large and the charging current is small, the time for charging the mirror capacitance of the output stage switching element 9 becomes long, and therefore the switching of the output voltage VO from “H” to “L” becomes gradual.

  Even after the output voltage VO is switched from “H” to “L”, an increase in the gate voltage VG of the output stage switching element 9 is suppressed, and the output stage switching element 9 does not operate with a low ON resistance, and the output stage switching element 9 The heat generation becomes a problem.

  Next, when the first input signal is switched from “L” to “H”, the P-channel MOS transistor 1 is turned OFF, and the output stage switching element is driven by a current corresponding to the time constant of the input capacitance of the resistor 3 and the output stage switching element 9. 9 is discharged, and the gate voltage of the output stage switching element 9 drops. Since the resistance value of the resistor 8 is large and the discharge current is small, the gate voltage drop of the output stage switching element 9 is suppressed, and the output stage switching element 9 generated when the output stage switching element 9 switches the output voltage generates heat. There was a problem.

  The present invention is directed to solving the problems of the prior art, and sufficiently reduces unnecessary radiation noise generated when the output voltage is switched, and after the output voltage is switched, the output stage switching element is provided. It is an object of the present invention to provide a motor drive device that operates with a low ON resistance in a short time.

  In order to achieve this object, a motor drive device according to claim 1 of the present invention is a motor drive device that drives a switching element of an upper or lower arm element connected to a motor, and includes an input signal. A low output buffer that charges and discharges the input capacitance of the switching element with low driving force, a delay circuit that receives the input signal and delays the input signal for a preset time, and an input signal and delay circuit The circuit includes a control circuit that receives a signal output and outputs a control signal, and a high output buffer that receives the control signal from the control circuit and charges and discharges the input capacitance of the switching element with a high driving force. After the output voltage is switched without reducing unnecessary radiation noise that occurs when the output voltage is switched without increasing the scale It can be low ON-resistance behavior in a short time switching element of the output stage.

  The motor driving device according to claim 2 is a motor driving device that drives the switching element of the upper or lower arm element connected to the motor, and receives the input signal and has a low driving force. A low output buffer that charges and discharges the input capacitance, an output voltage comparator that compares the external or internal reference voltage with the output voltage of the switching element, and receives a signal output from the input signal and output voltage comparator to generate a logic signal A logic circuit that outputs, a control circuit that outputs a control signal in response to an input signal and a logic signal from the logic circuit, and a charge / discharge to the input capacitor of the switching element with a high driving force in response to the control signal from the control circuit Output voltage regardless of the size of the switching element in the output stage. It is possible to reduce unwanted radiant noise generated upon switching, and after the output voltage is switched can be a low ON-resistance operating the switching element in a short time.

  According to a third aspect of the present invention, there is provided a motor driving device for driving a switching element of an upper or lower arm element connected to a motor, which receives an input signal and has a low driving force. A low output buffer that charges and discharges the input capacitance, an input voltage comparator that compares the external or internal reference voltage with the input voltage of the switching element, and receives the signal output from the input signal and input voltage comparator to generate a logic signal A logic circuit that outputs, a control circuit that outputs a control signal in response to an input signal and a logic signal from the logic circuit, and a charge / discharge to the input capacitor of the switching element with a high driving force in response to the control signal from the control circuit With a high-power buffer that performs full output regardless of the size of the switching element in the output stage. It is possible to reduce unwanted radiant noise generated upon switching of the voltage, and after the output voltage is switched can be a low ON-resistance operating the switching element in a short time.

  As described above, according to the present invention, there is an effect that unnecessary radiation noise generated when the output stage switching element is operated can be suppressed and the switching element can be operated efficiently.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram showing a switching element drive circuit used in the motor drive apparatus according to Embodiment 1 of the present invention. As shown in FIG. 1, the driving circuit according to the first embodiment receives a signal from the low output buffer 11 that receives the input signal and drives the output stage switching element 9 with a low driving force, and outputs the signal output from the delay circuit 15 and the input signal. The high output buffer 12 is configured to drive the output stage switching element 9 with high driving force by the control signal of the received control circuit 16.

  In FIG. 1, a high output buffer 12 is configured such that a P-channel MOS transistor 13 and an N-channel MOS transistor 14 are connected between a high-level power supply and a low-level power supply, and its midpoint is connected to the gate of the output stage switching element 9. Configured to be. The delay circuit 15 has a function of outputting a signal to the control circuit 16 with a delay from the input signal. The delay time of the delay circuit 15 is that the low output buffer 11 outputs to the output stage when the input signal is “L” to “H”. When the switching element 9 is driven, a time longer than the time required for the output voltage VO to switch from “H” to “L” is set. When the input signal is “H” to “L”, the output is low. A time shorter than the time when the output voltage VO starts to switch from “L” to “H” when the output stage switching element 9 is driven by the buffer 11 and the high output buffer 12 is set.

  The control circuit 16 includes NAND gates 17 and 19 which are NAND gates and an inverting gate 18, and the NAND gate 17 controls the P-channel MOS transistor 13 of the high output buffer 12, and the input signal and delay circuit 15 is controlled. The NAND gate 19 to which the inverted signal is input controls the N channel MOS transistor 14 of the high output buffer 12.

  FIG. 2 shows a timing chart when the output voltage VO switches from “H” to “L” and from “L” to “H” in the circuit shown in FIG.

  Now, the switching signal of the input signal from “L” to “H” is input to the low output buffer 11, the delay circuit 15 and the control circuit 16, and the low output buffer 11 drives the output stage switching element 9 with a low driving force. . At this time, the delay circuit 15 does not output an enable signal to the P-channel MOS transistor 13 of the control circuit 16 when the input signal “L” is switched to “H”. The mirror capacity charging time of the output stage switching element 9 is made only by the low output buffer 11 having a low driving force. The mirror capacity charging time to the output stage switching element 9 at that time becomes long, so that the output voltage VO is changed from “H”. Slowly switch to “L”.

  After the output voltage VO is switched from “H” to “L”, the delay circuit 15 outputs an enable signal to the P-channel MOS transistor 13 to the control circuit 16, and the high output buffer 12 outputs the output stage switching element 9 with high driving power. The gate capacitance is charged. As a result, the gate voltage VG of the output stage switching element 9 rises sharply, and the output stage switching element 9 is operated with a low ON resistance in a short time.

  Next, a case where the input signal is switched from “H” to “L” will be described. Immediately after the input signal is switched from “H” to “L”, the delay circuit 15 outputs an enable signal to the N-channel MOS transistor 14 of the high output buffer 12 to the control circuit 16, and the input of the output stage switching element 9. Capacitance discharge is simultaneously performed by the low output buffer 11 and the N channel MOS transistor 14 of the high output buffer 12. As a result, the gate voltage VG of the output stage switching element 9 that has been a high voltage decreases sharply, but the delay circuit 15 increases to the control circuit 16 in a shorter time than the start of the mirror capacitance discharge of the output stage switching element 9. An off signal of the N channel MOS transistor 14 of the output buffer 12 is output. When the mirror capacitance discharge of the output stage switching element 9 is performed, the low output buffer 11 operates, and the output voltage VO is gradually switched from “L” to “H”.

  From the above, according to the first embodiment, the unnecessary radiation noise generated at the time of switching of the output voltage is reduced without increasing the circuit scale, and after the output voltage is switched, the switching element of the output stage Can be operated in a low ON resistance in a short time.

  FIG. 3 is a diagram showing a switching element drive circuit used in the motor drive apparatus according to Embodiment 2 of the present invention. As shown in FIG. 3, the drive circuit of the second embodiment includes a low output buffer 11 that receives an input signal and drives the output stage switching element 9 of the N-channel MOS transistor with a low drive power, and an output voltage of a predetermined value. A comparator 21 that detects that the output level has been reached and outputs a signal, a NOR gate 20 that receives a signal from the input signal and the comparator 21 and outputs a logic signal to the control circuit 16, and the control circuit 16 And a high output buffer 12 that drives the output stage switching element 9 with a high driving force.

  In the high output buffer 12 of FIG. 3, a P channel MOS transistor 13 and an N channel MOS transistor 14 are connected between a high level power supply and a low level power supply, and the midpoint thereof is connected to the gate of the output stage switching element 9. The control circuit 16 includes NAND gates 17 and 19 and an inverting gate 18, and an input signal and a signal output from the comparator 21 are input to the control circuit 16.

  4 shows a timing chart when the output voltage VO switches from “H” to “L” and from “L” to “H” in the circuit shown in FIG.

  The switching signal of the input signal from “L” to “H” is input to the low output buffer 11, the NOR gate 20 and the control circuit 16, and the low output buffer 11 charges the input capacitance of the output stage switching element 9 with a low driving force. To do. Since the output voltage VO immediately after the input signal is switched from “L” to “H” is larger than the threshold voltage (Vth 1) of the comparator 21, the NOR gate 20 receiving the signal from the comparator 21 passes through the control circuit 16. Therefore, a signal to be an enable signal to the high output buffer 12 is not output (see VD in FIG. 4). The mirror capacitance charge of the gate of the output stage switching element 9 is performed only by the low output buffer 11 having a low driving force. When the output stage switching element 9 is driven only by the low output buffer 11, the mirror capacitance charge time becomes long and the output The voltage VO is gradually switched from “H” to “L”.

  Further, when the output voltage VO becomes smaller than the threshold voltage of the comparator 21, the comparator 21 outputs a signal to the NOR gate 20, and the output of the NOR gate 20 causes the P-channel MOS transistor 13 of the high output buffer 12 from the control circuit 16. The enable signal is output. Then, the P channel MOS 13 of the high output buffer 12 sharply increases the gate voltage VG of the output stage switching element 9, and the output stage switching element 9 is operated with a low ON resistance in a short time.

  Next, the time when the input signal is switched from “H” to “L” will be described. The input signal “H” to “L” switching signal is input to the low output buffer 11, the NOR gate 20, and the control circuit 16. The output voltage VO immediately after the input signal is switched from “H” to “L” is smaller than the threshold voltage of the comparator 21, and the NOR gate 20 receiving the output of the comparator 21 sends the output of the high output buffer 12 to the control circuit 16. By outputting an enable signal to the N channel MOS transistor 14, the low output buffer 11 and the high output buffer 12 simultaneously discharge the input capacitance of the output stage switching element 9.

  The gate voltage VG of the output stage switching element 9 is sharply lowered. When the mirror capacitance discharge of the output stage switching element 9 starts and the output voltage VO becomes equal to or lower than the threshold voltage of the comparator 21, the NOR gate 20 receiving the signal passes through the control circuit 16 and the N channel MOS transistor of the high output buffer 12. 14 outputs an off signal. The mirror capacitance discharge of the output stage switching element 9 after the N-channel MOS transistor 14 of the high output buffer 12 is turned off is performed only by the low output buffer 11, and the output voltage VO is gradually switched from “L” to “H”.

  From the above, according to the second embodiment, it is possible to reduce unnecessary radiation noise generated at the time of switching of the output voltage regardless of the size of the switching element of the output stage, and after the output voltage is switched, The switching element can be operated with a low ON resistance in a short time.

  FIG. 5 is a diagram showing a switching element drive circuit used in the motor drive apparatus according to Embodiment 3 of the present invention. As shown in FIG. 5, the drive circuit of the third embodiment includes a low output buffer 11 that receives an input signal and drives the output stage switching element 9 of the N-channel MOS transistor with low driving power, and the output stage switching element 9. The comparator 21 detects that the input voltage of the reference voltage has reached the output value of the reference voltage generation circuit 22, the NOR gate 20 that receives the input signal and the signal of the comparator 21 and outputs a logic signal to the control circuit 16, and the control circuit 16 And a high output buffer 12 that drives the output stage switching element 9 with a high driving force.

  The reference voltage to the comparator 21 is generated by a reference voltage generation circuit 22 constituted by an N channel MOS transistor 24 having a 1 / N size of the current source 23 and the output stage switching element 9. The NOR gate 20 receives a signal output from the comparator 21 and outputs a signal to the control circuit 16.

  FIG. 6 shows a timing chart when the output voltage VO switches from “H” to “L” and from “L” to “H” in the circuit shown in FIG.

  The switching signal of the input signal from “L” to “H” is input to the low output buffer 11, the NOR gate 20, and the control circuit 16, and the low output buffer 11 has a low driving force and the input capacitance of the output stage switching element 9. Is charged. The gate voltage of the output stage switching element 9 immediately after the input signal is switched from “L” to “H” is smaller than the threshold voltage (Vth2) of the comparator 21 generated in the reference voltage generation circuit 22, and the NOR gate 20 is A signal serving as an enable signal to the P channel MOS transistor 13 of the high output buffer 12 is not output via the control circuit 16 (see VE in FIG. 6). As a result, the mirror capacitance of the output stage switching element 9 is charged only by the low output buffer 11 with a low driving force, and the output voltage VO is gradually switched from “H” to “L” as the mirror capacitance charging time becomes longer. .

  When the gate voltage VG of the output stage switching element 9 becomes larger than the threshold voltage generated in the reference voltage generation circuit 22 due to the input capacitance charge of the low output buffer 11, the NOR gate 20 receiving the output from the comparator 21 is controlled. A signal serving as an enable signal for the P channel MOS transistor 13 of the high output buffer 12 is output to the circuit 16, and the high output buffer 12 sharply increases the gate voltage VG of the output stage switching element 9. As a result, after the output voltage VO is switched from “H” to “L”, the output stage switching element 9 is operated with a low ON resistance in a short time.

  Next, a case where the input signal is switched from “H” to “L” will be described. The switching signal of the input signal from “H” to “L” is input to the low output buffer 11, the NOR gate 20, and the control circuit 16. The gate voltage VG of the output stage switching element 9 immediately after the input signal is switched from “H” to “L” is larger than the threshold voltage of the comparator 21 generated in the reference voltage generation circuit 22 and receives the output of the comparator 21. The NOR gate 20 outputs an enable signal to the N channel MOS transistor 14 of the high output buffer 12 to the control circuit 16.

  The high output buffer 12 and the low output buffer 11 simultaneously discharge the input capacitance to the output stage switching element 9, and the gate voltage VG of the output stage switching element 9 drops steeply. Further, when the gate voltage VG of the output stage switching element 9 becomes equal to or lower than the threshold voltage generated by the reference voltage generating circuit 22, the NOR gate 20 receiving the output of the comparator 21 sends the N-channel MOS of the high output buffer 12 to the control circuit 16. An off signal to the transistor 14 is output. As a result, the mirror capacitance discharge of the output stage switching element 9 after the N-channel MOS transistor 14 of the high output buffer 12 is turned off is performed only by the low output buffer 11, so that the output voltage VO gradually changes from “L” to “H”. Switch.

  From the above, according to the third embodiment, it is possible to completely reduce unnecessary radiation noise generated when the output voltage is switched regardless of the size of the switching element in the output stage, and after the output voltage is switched. The switching element can be operated with a low ON resistance in a short time.

  The motor driving apparatus according to the present invention is useful for a motor driving apparatus that suppresses unnecessary radiation noise generated when the output stage switching element is operated, and controls the efficient switching element to drive the motor.

The figure which shows the drive circuit of the switching element used for the motor drive device in Embodiment 1 of this invention. Timing chart for explaining the operation of the switching element drive circuit of the first embodiment The figure which shows the drive circuit of the switching element used for the motor drive device in Embodiment 2 of this invention. Timing chart for explaining the operation of the switching element drive circuit of the second embodiment The figure which shows the drive circuit of the switching element used for the motor drive device in Embodiment 3 of this invention. Timing chart for explaining the operation of the switching element drive circuit of the third embodiment The figure which shows the drive circuit of the conventional switching element Timing chart for explaining the operation of a conventional switching element drive circuit Timing chart explaining the operation of the conventional switching element drive circuit when measures against unwanted radiation noise are implemented

Explanation of symbols

1, 4, 13 P channel MOS transistors 2, 3, 5, 6, 8 Resistors 7, 14, 24 N channel MOS transistor 9 Output stage switching element 10 Coil 11 Low output buffer 12 High output buffer 15 Delay circuit 16 Control circuit 17 , 19 NAND gate 18 Inverting gate 20 NOR gate 21 Comparator 22 Reference voltage generating circuit 23 Current source

Claims (3)

A motor driving device for driving a switching element of an upper or lower arm element connected to a motor,
A low-output buffer that receives an input signal and charges and discharges the input capacitance of the switching element with a low driving force;
A delay circuit for receiving the input signal and delaying the input signal for a preset time;
A control circuit for receiving the input signal and the signal output of the delay circuit and outputting a control signal;
A motor drive device comprising: a high output buffer that receives and controls a control signal from the control circuit and charges and discharges the input capacitance of the switching element with a high driving force. A motor driving device for driving a switching element of an upper or lower arm element connected to a motor,
A low-output buffer that receives an input signal and charges and discharges the input capacitance of the switching element with a low driving force;
An output voltage comparator that compares an external or internal reference voltage with the output voltage of the switching element;
A logic circuit that receives the input signal and the signal output of the output voltage comparator and outputs a logic signal;
A control circuit for receiving a logic signal from the input signal and the logic circuit and outputting a control signal;
A motor drive device comprising: a high output buffer that receives and controls a control signal from the control circuit and charges and discharges the input capacitance of the switching element with a high driving force. A motor driving device for driving a switching element of an upper or lower arm element connected to a motor,
A low-output buffer that receives an input signal and charges and discharges the input capacitance of the switching element with a low driving force;
An input voltage comparator that compares an external or internal reference voltage with the input voltage of the switching element;
A logic circuit that receives the signal output from the input signal and the input voltage comparator and outputs a logic signal;
A control circuit for receiving a logic signal from the input signal and the logic circuit and outputting a control signal;
A motor drive device comprising: a high output buffer that receives and controls a control signal from the control circuit and charges and discharges the input capacitance of the switching element with a high driving force.

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