JP2005072975A - Circuit and method for correcting error - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce power consumption by efficiently performing error correction while minimizing error correction at the time of using both normal correction and erasure correction to perform error correction. <P>SOLUTION: In an error correction circuit 1 having a syndrome operating part 11, an error position/numerical value operating part 12, an error correction control part 13 and an error correcting part 14, a counter 132 is provided in the error correction control part 13, the counter 132 counts the number of code words in which the number of errors which can not be corrected by normal correction exists, and erasure correction is performed from the first part without performing normal correction of the code words concerning succeeding code words at the time when the count value reaches the prescribed value. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to error correction, and in particular, in conjunction with erasure correction that performs error correction using an erasure flag, performs error correction efficiently while minimizing error correction, and reduces power consumption. The present invention relates to an error correction circuit and an error correction method capable of performing the above.

  As an error correction circuit for performing error correction combined with conventional erasure correction, the one described in Patent Document 1 is known. FIG. 8 is a simplified block diagram showing a configuration example of the conventional error correction circuit disclosed in Patent Document 1, and FIG. 9 is a flowchart of the error correction operation.

  In FIG. 8, 501 is an error correction circuit. In the error correction circuit 501, 511 is a syndrome calculation unit, 512 is an error position / numerical calculation unit, 513 is an error correction control unit, and 514 is an error correction unit.

  The error correction circuit 501 inputs a plurality of code words and erasure flags in order, and obtains an error position / numerical value for each code word. The outline of the operation of the conventional error correction circuit will be described below with reference to FIGS.

  First, the syndrome calculation unit 511 calculates a syndrome for the input codeword. Here, when all the syndrome values are “0”, it indicates that there is no error in the code word, and processing for the next code word is started. If there is a value other than “0” in the syndrome, it means that there is an error in the code word, so the syndrome is output to the error position / numerical value calculation unit 512 in the subsequent stage to obtain the error position / number. To go.

  The error position / numerical calculation unit 512 inputs the syndrome output from the syndrome calculation unit 511 and also inputs the erasure flag for the codeword currently being processed. Here, the erasure flag indicates the position of a symbol that is or may be erroneous for each symbol of the code word, and error correction using this erasure flag is called erasure correction. On the other hand, error correction without using the erasure flag is called normal correction. The error correction control unit 513 outputs a control signal to the error position / numerical value calculation unit 512 so that the calculation based on the normal correction algorithm is first performed. The error position / numeric operation unit 512 performs an operation for obtaining an error position and an error value, and if the result is correctable, outputs an error correction result indicating that the error can be corrected to the error correction control unit 513. By outputting the numerical value to the error correction unit 514, the error correction unit 514 corrects the codeword to be correct. Thereafter, the error correction circuit 501 starts error correction for the next codeword. On the other hand, if the correction is impossible, the error position / numerical value calculation unit 512 outputs an error correction result indicating that the correction is impossible, and the error correction control unit 513 recognizes the error, and the next erasure is performed for the same code word. A control signal is output to the error position / numerical value calculation unit 512 so as to perform the calculation based on the erasure correction algorithm using the flag.

  Here, it is assumed that only the most reliable erasure flag is valid and the number of erasure flag validity is “1”. The reliability of the erasure flag is assumed to be low when, for example, the erasure flag stands at the position of the symbol even though the correct probability is high for the symbol with the code word. On the other hand, if the erasure flag is set at the position of a symbol that is highly likely to be wrong, it is assumed that the reliability is high.

  If an erasure flag with low reliability is used, incorrect data may be erroneously corrected with respect to data that is not actually incorrect. For this reason, ranking is performed according to the reliability, the erasure flags are made effective in descending order of reliability, and the erasure correction is performed.

  Initially, the effective number of erasure flags is “1”, and the error position / numerical calculation unit 512 performs an operation based on the erasure correction algorithm using the most reliable erasure flag. If correction is possible as a result, as described above, the error position / numerical value is output and the calculation for the next code word is performed. On the other hand, if the correction is impossible, the error correction control unit enables the next highly reliable erasure flag and sets the erasure flag effective number to “2”. Thus, an operation based on the erasure correction algorithm using the two erasure flags is performed.

  Hereinafter, every time the calculation result based on the erasure correction algorithm is uncorrectable, an effective erasure flag is added in order from the one with higher reliability, and erasure correction is performed again. However, if it is a code word that can only correct up to M erasures, it is repeated until the erasure correction can be corrected until the number of erasure flags becomes M, and when the number of erasure flags exceeds M. Therefore, it is determined that the code word cannot be corrected, and the next code word is processed.

As described above, normal correction is initially performed on a certain code word. If correction is not possible, the number of valid erasure flags is increased, while highly reliable erasure flags are enabled one by one within the correctable range. Repeated erasure correction.
JP-A-7-50594 (pages 10-12, FIGS. 1-7)

  By the way, when error correction is performed in a device that requires real-time performance, the time during which error correction can be performed is determined at the system design stage. Therefore, if it takes more time than the determined spec, the system will fail. In addition, codewords and erasure flags that are subjected to error correction are often stored in a memory, and it is necessary to perform memory access when reading codewords or correcting erroneous data. During this memory access, power is consumed, and the power consumption increases as the number of memory accesses increases.

  In general, erasure correction is performed for a position that may be erroneous in advance.For example, when an erasure flag is set at an incorrect position and an erasure flag is not set at an incorrect position, The probability of erroneous correction that corrects incorrect data to an incorrect value increases. Therefore, it is possible to lower the probability of erroneous correction by performing normal correction first if possible and performing erasure correction only when correction is impossible.

  In the case of the conventional error correction circuit described above, normal correction is initially performed on one codeword, and if correction is not possible, an erasure flag is employed in order of high reliability until an error position and an error numerical value are obtained, or The erasure correction is repeated until the maximum number of erasure flags within the correctable range is used. In other words, if the data quality is good and there is almost no error, it can be corrected by the first normal correction. Conversely, if the data quality is poor and there are many errors, the error for one codeword For example, it is conceivable that the time required for error correction exceeds the time allowed for error correction at the stage where error correction of the latter half codeword is performed. In such a case, processing such as data re-reading is performed, but such processing may be a fatal problem for a device that requires real-time performance.

  The present invention has been made in order to solve the above-described problems of the prior art, and is capable of performing error correction efficiently while minimizing error correction and reducing power consumption. An object of the present invention is to provide a correction circuit and an error correction method.

  In order to solve the above problem, in the present invention, a counter is provided in the error correction control unit. This counter counts, for example, the number of times that the first normal correction cannot be corrected and the erasure correction mode is entered. That is, the number of codewords having a number of errors that cannot be corrected by normal correction is counted, and the larger the number, the worse the data quality. If the data quality is not good, it can be considered that there is a high possibility that the remaining codewords that are not currently subjected to error correction cannot be corrected by normal correction.

  Therefore, when the value of the counter reaches a certain value, erasure correction is performed from the beginning without performing normal correction for error correction for the codewords thereafter.

  Alternatively, a time is provided from the beginning of error correction by providing a timer, and the error correction method is switched to the above when a certain time has passed.

  This eliminates the need to perform normal correction with a low probability of performing error correction to correct the error to a normal value, resulting in erroneous correction of erasure correction that is more likely to be possible than normal correction. By using a difficult method, the time required for error correction is reduced. Accordingly, the operation time of the error correction circuit is shortened, so that power consumption can be reduced.

  That is, the error correction circuit according to claim 1 of the present invention sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword. In the error correction circuit for obtaining a position of a symbol and an error value added to the error position (hereinafter referred to as error position / value) in units of the codeword, and correcting the codeword to a correct codeword, the codeword A syndrome calculating unit for obtaining a syndrome from the error position, an error position / numerical calculating unit for calculating an error position / numerical value of the codeword using the syndrome output by the syndrome calculating unit, and the error position / numerical calculating unit outputting An error correction that controls the error position / numerical calculation unit to perform error correction by either normal correction or erasure correction using an operation result indicating whether correction is possible or not. An error correction control unit that outputs a control signal; and an error correction unit that performs error correction of a codeword based on the error position / numerical value output by the error position / numerical value calculation unit, and the error position / numerical value calculation A erasure flag selector that selects a valid erasure flag from the erasure flag based on the number of erasure flags, and a normal correction algorithm using the syndrome when the error correction control signal indicates normal correction. A normal correction unit that performs a calculation based on the result and outputs a calculation result indicating whether correction is possible or not, and outputs an error position / numerical value if correction is possible, and the error correction control signal indicates erasure correction A calculation based on a erasure correction algorithm using the syndrome and the valid erasure flag, and outputting a calculation result indicating whether correction is possible or uncorrectable. Further, if correction is possible, an erasure correction unit that outputs an error position / numerical value, the normal correction error position / numerical value, and the erasure correction error position / numerical value are input, and the error correction control signal is the normal correction signal. If correction is indicated, the error position / numerical value of the normal correction is output to the error correction unit, and if the error correction control signal indicates erasure correction, the error position / value of the erasure correction is output to the error correction unit. The error position / numerical value selector to be output to and the normal correction calculation result and the erasure correction calculation result are input, and if the error correction control signal indicates the normal correction, the normal correction calculation result is A calculation result selector that outputs to the error correction control unit and outputs the calculation result of the erasure correction to the error correction control unit if the error correction control signal indicates the erasure correction; and the error correction control The unit counts the number of times that the calculation result output by the calculation result selector is uncorrectable when the error correction control signal indicates erasure correction, and outputs the value as the erasure flag effective number. 1 counter, a second counter that counts the number of times that the operation result output from the operation result selector is uncorrectable when the error correction control signal indicates normal correction, and the second counter Until the value reaches the predetermined value, the error correction control signal instructing the error position / numerical value calculation unit to perform normal correction or erasure correction is output, and the value of the second counter is set to the predetermined value. An error correction control signal generation unit that outputs the error correction control signal that instructs the error position / numerical calculation unit to perform only erasure correction when the value is reached. It is an.

  Further, according to the error correction circuit of claim 2 of the present invention, a plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, In the error correction circuit for obtaining an error symbol position and an error numerical value added to the error position (hereinafter referred to as error position / numerical value) for each codeword, and correcting the codeword into a correct codeword, A syndrome calculation unit that obtains a syndrome from a code word, an error position / numerical calculation unit that calculates an error position / numerical value of the code word using a syndrome output by the syndrome calculation unit, and an output from the error position / numerical calculation unit The error position / numerical calculation unit is controlled to perform error correction by either normal correction or erasure correction using the calculation result indicating whether correction is possible or not. An error correction control unit that outputs a correction control signal, and an error correction unit that performs error correction of a codeword based on the error position / numerical value output by the error position / numerical value calculation unit, The numerical calculation unit is configured to perform normal correction using the syndrome when the error correction control signal indicates normal correction, and an erasure flag selector that selects a valid erasure flag from the erasure flag based on the effective number of erasure flags. An arithmetic operation based on an algorithm is performed to output a calculation result indicating whether correction is possible or not, and a normal correction unit that outputs an error position / numerical value if correction is possible, and the error correction control signal indicates erasure correction. If it is, the calculation based on the erasure correction algorithm is performed using the syndrome and the effective erasure flag, and the operation result indicating whether correction is possible or not is output. And an erasure correction unit that outputs an error position / numerical value if correctable, an error position / numerical value of the normal correction, and an error position / numerical value of the erasure correction, and the error correction control signal is If correction is indicated, the error position / numerical value of the normal correction is output to the error correction unit, and if the error correction control signal indicates erasure correction, the error position / value of the erasure correction is output to the error correction unit. The error position / numerical value selector to be output to and the normal correction calculation result and the erasure correction calculation result are input, and if the error correction control signal indicates the normal correction, the normal correction calculation result is A calculation result selector that outputs to the error correction control unit and outputs the calculation result of the erasure correction to the error correction control unit if the error correction control signal indicates the erasure correction; When the error correction control signal indicates erasure correction, the positive control unit counts the number of times that the operation result output by the operation result selector is uncorrectable, and outputs the value as the erasure flag effective number A first counter for measuring, a timer for measuring a predetermined time, and instructing the error position / numerical value calculation unit to perform normal correction or erasure correction until the value of the timer reaches a predetermined time. An error correction control signal is output, and when the value of the timer reaches a predetermined time, the error correction control signal is output to instruct the error position / numerical calculation unit to perform only erasure correction. And a control signal generation unit.

  Further, according to the error correction circuit of claim 3 of the present invention, a plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, In the error correction circuit for obtaining an error symbol position and an error numerical value added to the error position (hereinafter referred to as error position / numerical value) for each codeword, and correcting the codeword into a correct codeword, A syndrome calculation unit that obtains a syndrome from a code word, an error position / numerical calculation unit that calculates an error position / numerical value of the code word using a syndrome output by the syndrome calculation unit, and an output from the error position / numerical calculation unit The error position / numerical calculation unit is controlled to perform error correction by either normal correction or erasure correction using the calculation result indicating whether correction is possible or not. An error correction control unit that outputs a correction control signal, and an error correction unit that performs error correction of a codeword based on the error position / numerical value output by the error position / numerical value calculation unit, The numerical calculation unit is configured to perform normal correction using the syndrome when the error correction control signal indicates normal correction, and an erasure flag selector that selects a valid erasure flag from the erasure flag based on the effective number of erasure flags. An arithmetic operation based on an algorithm is performed to output a calculation result indicating whether correction is possible or not, and a normal correction unit that outputs an error position / numerical value if correction is possible, and the error correction control signal indicates erasure correction. If it is, the calculation based on the erasure correction algorithm is performed using the syndrome and the effective erasure flag, and the operation result indicating whether correction is possible or not is output. And an erasure correction unit that outputs an error position / numerical value if correctable, an error position / numerical value of the normal correction, and an error position / numerical value of the erasure correction, and the error correction control signal is If correction is indicated, the error position / numerical value of the normal correction is output to the error correction unit, and if the error correction control signal indicates erasure correction, the error position / value of the erasure correction is output to the error correction unit. The error position / numerical value selector to be output to and the normal correction calculation result and the erasure correction calculation result are input, and if the error correction control signal indicates the normal correction, the normal correction calculation result is A calculation result selector that outputs to the error correction control unit and outputs the calculation result of the erasure correction to the error correction control unit if the error correction control signal indicates the erasure correction; When the error correction control signal indicates erasure correction, the positive control unit counts the number of times that the operation result output by the operation result selector is uncorrectable, and outputs the value as the erasure flag effective number Until the value of the second counter reaches a predetermined value, a second counter that counts the number of times that the syndrome obtained by the syndrome calculation unit is all “0”, When the error correction control signal for instructing the error position / numerical calculation unit to perform normal correction or erasure correction is output, and the value of the second counter reaches a predetermined value, the syndrome calculation unit And an error correction control signal generation unit that outputs the error correction control signal that instructs the error position / numerical operation unit not to perform error correction on the remaining codewords; Having, it is characterized in.

  According to the error correction circuit of claim 4 of the present invention, a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword are sequentially input, In the error correction circuit for obtaining an error symbol position and an error numerical value added to the error position (hereinafter referred to as error position / numerical value) for each codeword, and correcting the codeword into a correct codeword, A syndrome calculation unit that obtains a syndrome from a code word, an error position / numerical calculation unit that calculates an error position / numerical value of the code word using a syndrome output by the syndrome calculation unit, and an output from the error position / numerical calculation unit The error position / numerical calculation unit is controlled to perform error correction by either normal correction or erasure correction using the calculation result indicating whether correction is possible or not. An error correction control unit that outputs a correction control signal, and an error correction unit that performs error correction of a codeword based on the error position / numerical value output by the error position / numerical value calculation unit, The numerical calculation unit is configured to perform normal correction using the syndrome when the error correction control signal indicates normal correction, and an erasure flag selector that selects a valid erasure flag from the erasure flag based on the effective number of erasure flags. An arithmetic operation based on an algorithm is performed to output a calculation result indicating whether correction is possible or not, and a normal correction unit that outputs an error position / numerical value if correction is possible, and the error correction control signal indicates erasure correction. If it is, the calculation based on the erasure correction algorithm is performed using the syndrome and the effective erasure flag, and the operation result indicating whether correction is possible or not is output. And an erasure correction unit that outputs an error position / numerical value if correctable, an error position / numerical value of the normal correction, and an error position / numerical value of the erasure correction, and the error correction control signal is If correction is indicated, the error position / numerical value of the normal correction is output to the error correction unit, and if the error correction control signal indicates erasure correction, the error position / value of the erasure correction is output to the error correction unit. The error position / numerical value selector to be output to and the normal correction calculation result and the erasure correction calculation result are input, and if the error correction control signal indicates the normal correction, the normal correction calculation result is A calculation result selector that outputs to the error correction control unit and outputs the calculation result of the erasure correction to the error correction control unit if the error correction control signal indicates the erasure correction; When the error correction control signal indicates erasure correction, the positive control unit counts the number of times that the operation result output by the operation result selector is uncorrectable, and outputs the value as the erasure flag effective number And when the error correction control signal indicates erasure correction and the value of the first counter indicates the maximum number of erasure flags that can be erasure corrected, the operation result selector outputs the operation A second counter that counts the number of times the result is uncorrectable, and until the value of the second counter reaches a predetermined value, normal correction or erasure correction is performed on the error position / numerical value calculation unit. When the second counter value reaches a predetermined value, the error correction control signal is output to the syndrome calculation unit and the error position / numerical calculation unit. Having, an error correction control signal generator for outputting the error-correction control signal for instructing not to perform error correction for the code words, it is characterized in.

  An error correction circuit according to claim 5 of the present invention is the error correction circuit according to any one of claims 1 to 4, wherein the reliability of the erasure flag corresponding to a symbol having a high probability that the codeword is erroneous. And the reliability of the erasure flag corresponding to a symbol with a low probability of being erroneous is low.

  An error correction circuit according to a sixth aspect of the present invention is the error correction circuit according to any one of the first to fourth aspects, wherein the erasure flag selector includes the erasure flag valid in descending order of reliability of the erasure flag. The number of erasure flags indicated by the number is used as the effective erasure flag.

  An error correction circuit according to a seventh aspect of the present invention is the error correction circuit according to any one of the first to fourth aspects, wherein the error correction control signal generation unit can correct the erasure flag effective number. The error correction control signal is set so that the erasure correction is repeated until the maximum number of erasure flags is reached.

  The error correction method according to claim 8 of the present invention sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the codeword. In an error correction method for correcting a word to a correct code word, error correction of the code word is performed by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and the number of times the operation result is uncorrectable is counted A first step, and a second step of performing error correction of the codeword only by an operation based on the erasure correction algorithm when the uncorrectable number of times in the first step reaches a predetermined value. It is characterized by that.

  An error correction method according to claim 9 of the present invention sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the codeword. In an error correction method for correcting a word into a correct code word, the code word is corrected by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and an elapsed time from the start of the error correction operation is measured. And a second step of performing error correction of the codeword only by an operation based on the erasure correction algorithm when the elapsed time in the first step has exceeded a predetermined time. It is characterized by.

  The error correction method according to claim 10 of the present invention sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag indicating correct / incorrect information for each symbol of the codeword. In an error correction method for correcting a word into a correct codeword, error correction of the codeword is performed by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and all the syndromes obtained from the codeword are “0”. A first step of counting the number of occurrences, and a second step of interrupting error correction for the remaining codewords when the count value in the first step reaches a predetermined value. It is a feature.

  An error correction method according to an eleventh aspect of the present invention sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag indicating correct / incorrect information for each symbol of the codeword, In an error correction method for correcting a word to a correct code word, the code word is corrected by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and the number of times the error correction is impossible is counted. 1 and a second step of interrupting error correction for the remaining codewords when the count value of the first step reaches a predetermined value.

  According to the present invention, an error correction mode can be appropriately switched by considering an error correction result for each of a plurality of codewords, and an error correction time can be shortened by reducing wasteful processing. It is also possible to reduce the power consumption of the circuit.

  In other words, the error correction circuit according to claims 1, 5 to 7 of the present invention minimizes the error correction probability by changing the error correction mode from a certain point in time for data with overall poor quality. Therefore, the time required for error correction can be shortened while suppressing power consumption, and the power consumption can be reduced accordingly.

  The error correction circuit according to claims 2, 5 to 7 of the present invention measures the time from the start of error correction, and changes the error correction mode when reaching a certain time, It becomes possible to escape from the failure of the system.

  The error correction circuit according to claims 3 to 5 of the present invention can shorten the time required for error correction by interrupting the error correction at a certain point in time for data having good overall quality. In addition, power consumption can be reduced accordingly.

  The error correction circuit according to claims 4, 5 to 7 of the present invention does not perform error correction from a certain point in time for data with overall poor quality, thereby interrupting useless operation and reducing power consumption. Reduction can be achieved.

  In the error correction method according to claim 8 of the present invention, the time required for error correction can be reduced while minimizing the error correction probability by changing the error correction mode from a certain point in time for data with overall poor quality. It can be shortened and the power consumption can be reduced accordingly.

  The error correction method according to claim 9 of the present invention measures the time from the start of error correction, and changes the error correction mode when it reaches a certain time, thereby avoiding the failure of the system. It becomes possible.

  In the error correction method according to claim 10 of the present invention, the time required for error correction can be shortened by interrupting error correction at a certain point in time for data with overall good quality, and the power consumption is reduced accordingly. Can be achieved.

  In the error correction method according to the eleventh aspect of the present invention, it is possible to interrupt useless operations and reduce power consumption by not performing error correction from a certain point in time on data with overall poor quality. .

  Hereinafter, examples specifically showing the best mode for carrying out the present invention will be described with reference to the drawings.

(Embodiment 1)
The error correction circuit (corresponding to claims 1 to 5 of the present invention) and the error correction method (corresponding to claim 8) according to the first embodiment of the present invention are shown in FIGS. Will be described.

  The first embodiment switches to erasure correction at the time when it is determined that the possibility of being able to be corrected by normal correction is low with respect to data with poor overall data quality, while minimizing the error correction probability, The time required for correction can be shortened.

  In FIG. 1, reference numeral 1 denotes an error correction circuit, which sequentially inputs a plurality of codewords to which an error correction code is added and an erasure flag indicating correct / incorrect information for each symbol of the codeword. A position and an error numerical value added to the error position (hereinafter referred to as an error position / numerical value) are obtained for each codeword, and the codeword is corrected to a correct codeword.

  In the error correction circuit 1, reference numeral 11 denotes a syndrome calculation unit that obtains a syndrome from a code word, 12 denotes an error position / numerical calculation unit that calculates an error position / numerical value of the code word using the syndrome output from the syndrome calculation unit 11, 13 Is an error for controlling the error position / numerical calculation unit 12 to perform error correction by either normal correction or erasure correction using the calculation result output from the error position / numerical calculation unit 12 indicating whether correction is possible or not. The correction control unit 14 is an error correction unit that performs error correction of the codeword based on the error position / numerical value output from the error position / numerical value calculation unit 12.

  In the error position / numerical value calculation unit 12, 121 is an erasure flag selector that selects a valid erasure flag from the erasure flags based on the number of erasure flags, and 122 is an error correction control signal indicating normal correction. A normal correction unit that performs an operation based on a normal correction algorithm using the syndrome, outputs an operation result indicating whether correction is possible or not, and outputs an error position / numerical value if correction is possible, 123 is an error correction When the control signal indicates erasure correction, an operation based on the erasure correction algorithm is performed using the syndrome and the effective erasure flag, and an operation result indicating whether correction is possible or not is output and correction is possible. If this is the case, the erasure correction unit for outputting the error position / numerical value, 124 indicates the error position / numerical value for normal correction and the error position / numerical value for erasure correction. If the error correction control signal indicates normal correction, the error position / numerical value of normal correction is output to the error correction unit 14, and if the error correction control signal indicates erasure correction, the error position of erasure correction / Error position / numeric selector for outputting a numerical value to the error correction unit 14, 125 is a normal correction calculation result and an erasure correction calculation result as inputs. If the error correction control signal indicates normal correction, normal correction calculation The calculation result selector outputs the result to the error correction control unit 13 and outputs the calculation result of the erasure correction to the error correction control unit 13 if the error correction control signal indicates erasure correction.

  In the error correction control unit 13, when the error correction control signal indicates erasure correction, 131 counts the number of times that the operation result output from the operation result selector is uncorrectable, and the value is used as the erasure flag valid. A first counter 132 that outputs as a number, a second counter 132 that counts the number of times that the operation result output by the operation result selector cannot be corrected when the error correction control signal indicates normal correction, Until the value of the second counter 132 reaches a predetermined value, an error correction control signal for instructing the error position / numerical value calculation unit to perform normal correction or erasure correction is output, and the value of the second counter 132 is output. Error correction control signal generation that outputs the error correction control signal instructing the error position / numerical operation unit 12 to perform only erasure correction when the error value reaches a predetermined value. It is.

  FIG. 2 is a flowchart of error correction for one codeword. The process shown in FIG. 2 is repeated by the number of code words.

  In FIG. 2, S201 is a step of setting the uncorrectable number j in normal correction to “0”, S202 is a step of determining whether all syndromes are “0”, S203 is a step of determining whether j is a predetermined value, S204 is a step of performing normal correction, S205 is a step of determining whether correction is possible by normal correction, S206 is a step of setting the erasure flag effective number i to “1” and adding “1” to j, and S207. A step of performing erasure correction, S208 is a step of determining whether correction by erasure correction is possible or i is M, S209 is a step of adding “1” to i, S210 is a step of setting i to “1”, S211 is a step for performing a syndrome calculation of the next code word, and S200a is a step S203, S210, S207, S208, A first step consisting the steps other than 209, performs error correction code words by calculation based on the operation or erasure correction algorithm based on the normal correction algorithm counts the number of times calculation result is uncorrectable. S200b is a second step comprising steps S203, S210, S207, S208, and S209. When the uncorrectable number of times in the first step S200a reaches a predetermined value, only an operation based on the erasure correction algorithm is performed. To correct the error of the code word.

FIG. 3 is a diagram illustrating the disappearance flag.
Next, the operation will be described. In FIG. 1, there are a plurality of code words to which error correction codes are added, and the error correction circuit 1 inputs the code words one by one and performs error correction. An erasure flag for each codeword is also input. Here, as shown in FIG. 3, for example, when the code word is 1 byte = 1 symbol and the code length is N, the erasure flag has correct / incorrect information for each position from the 1st symbol to the Nth symbol. An erasure flag is set at the position of a symbol that may have been lost, but an erasure flag is set at a position where there is a high probability that there is no error, and conversely, an erasure flag is set at a position where there is a high probability of being incorrect. May not be standing. In this case, if erasure correction is performed, there is a possibility of causing erroneous correction that corrects correct data to incorrect data. On the other hand, in the case of normal correction in which error correction is performed without using an erasure flag, it is necessary to obtain an error position and an error numerical value, so that error correction is performed compared to a case where an erroneous position is known in advance, such as erasure correction. The number of errors that can be made is reduced. However, since normal correction is less likely to cause erroneous correction than erasure correction, it is ideal to perform normal correction first, and to perform erasure correction when correction is impossible. The error correction in the present invention also employs this method.

  The error correction circuit 1 inputs the first code word among a plurality of code words, first obtains a syndrome by the syndrome calculation unit 11, and transfers the syndrome to the error position / numerical value calculation unit 12. Here, the value j of the second counter 132 in the error correction circuit 13 is initialized to “0” (see step S201 in FIG. 2). The error correction control signal output from the error correction control signal generation unit 133 can be set to two types, that is, normal correction that performs error correction without using the erasure flag and erasure correction that performs error correction using the erasure flag. First, it is assumed that normal correction is set. If all of the syndromes are “0”, that is, there is no error in the code word, the error position / numerical value calculation unit 12 does nothing (see step S202). The syndrome calculation unit 11 inputs the next code word and similarly performs the syndrome calculation. On the other hand, if all of the obtained syndromes are not “0”, there is an error in the code word, and therefore the error position / numerical value calculation unit 12 performs an operation for obtaining the error position / numerical value. Before that, it is determined whether the value j of the second counter 132 is not the same as a predetermined value (see step S203). Although this predetermined value will be described later, if they match, the error correction control signal generation unit 133 sets the error flag effective number i to “1” and sets the error correction control signal to erasure correction to match. If not, set normal correction. Here, it is assumed that they do not match, and normal correction is set for the error correction control signal (see step S204). As a result, the normal correction unit 122 is selected from the two error correction circuits (the normal correction unit 122 and the erasure correction unit 123) in the error position / numerical calculation unit 12, and the syndrome calculation unit 11 is selected by the normal correction unit 122. The calculation based on the normal correction algorithm is performed using the syndrome obtained by the above.

  If the result of the calculation by the normal correction unit 122 can be corrected (see step S205), the obtained error position / number is output to the error position / number selector 124. Since the error correction control signal is set to normal correction, the error position / numeric selector 124 outputs the error position / numeric value output by the normal correction unit 122 to the error correction unit 14 as it is. The error correction unit 14 corrects the code word based on the error (actually, since the code word is stored in a memory or the like, the error correction unit 14 uses the memory address or write address where the code word is stored. Data etc. will be generated and output, but detailed explanation is omitted). On the other hand, if the result of the operation is uncorrectable, an operation result indicating that the operation is uncorrectable is output to the operation result selector 125. Since the error correction control signal is set to normal correction, the calculation result selector 125 outputs the calculation result output from the normal correction unit 122 to the second counter 132 as it is. Based on this, the second counter 132 increments the counter value j by one (see step S206). That is, the second counter 132 counts the number of code words that cannot be corrected as a result of normal correction. If the correction cannot be performed by the normal correction, the error correction control signal generation unit 133 changes the setting of the error correction control signal from the normal correction to the erasure correction, and outputs it. Accordingly, the erasure correction unit 123 performs erasure correction on the code word that cannot be corrected by the normal correction (see step S207). At this time, the value i of the first counter 131 is set to “1” (see step S206).

  The syndrome used in erasure correction is the same as that used in normal correction. As the erasure flag, a valid erasure flag output from the erasure flag selector 121 is used. Here, the value i of the first counter 131 is output to the erasure flag selector 121 as the erasure flag effective number, and the erasure flag selector 121 selects the number indicated by the erasure flag effective number from the erasure flag in descending order of reliability, This is output to the erasure correction unit 123 as an effective erasure flag.

  Here, the reliability of the erasure flag will be described. As described above, the erasure flag has correct / incorrect information for each codeword symbol. If the codeword is N, there are N erasure flags. When the erasure flag is assigned 1 bit per symbol, it can be expressed as “1” if the error probability is high, “0” if it is low, but multiple bits are assigned to each symbol. Thus, it is possible to represent the degree of probability of error other than the above information.

  For example, as shown in FIG. 3, if the erasure flag is 4 bits from bit 3 to bit 0, it is always wrong when bit 3 is “1”, and it is mistaken using 3 bits from bit 2 to bit 0 when it is “0”. It is possible to represent the degree to which there are 8 levels from “000” to “111”. The erasure flag described in the first embodiment of the present invention is assumed to be an erasure flag having such erroneous probability information, and the reliability of the erasure flag is defined by the erroneous probability. That is, the erasure flag (eg, bit3 = “1”) that always indicates an error is considered to have high reliability, and conversely, the erasure flag (eg, bit3 to bit0 = “0001”) indicates that the error probability is low. )) Is not reliable. Also, in the above example, when bit 3 to bit 0 = “0000”, there is a slight error probability, so this case is called “an erasure flag is set”, and conversely, bit 3 to bit 0 = “0000”. Since the time indicates that there is no mistake, it is referred to as “the disappearance flag is not set”. However, it is assumed that the error probability information included in the erasure flag has already been generated by the preceding circuit or the like when it is input to the error correction circuit of the present invention.

  Since the value i of the first counter 131 is initially “1”, the erasure flag selector 121 selects one erasure flag with the highest reliability from the erasure flags (that is, corresponds to the symbol having the highest probability of being erroneous). Only the erasure flag is valid and all erasure flags corresponding to other symbols are invalidated), and this is output to the erasure correction unit 123 as a valid erasure flag. Based on this, the erasure correction unit 123 performs an operation based on the erasure correction algorithm.

  If the calculation result can be corrected, the obtained error position / numerical value is output to the error position / numerical value selector 124 as in the normal correction (see S208). Since the error correction control signal is set to erasure correction, the error position / numeric selector 124 outputs the error position / numeric value output by the erasure correction unit 123 to the error correction unit 14 as it is. The error correction unit 14 corrects the codeword to a correct codeword based on the error correction unit 14. On the other hand, if the correction is impossible, the effective erasure flag is increased by incrementing the value i of the first counter 131 by “1” and the erasure correction is repeated (see S209). Before that, it is first determined whether the value i of the first counter 131, that is, the number of effective erasure flags is not the same as the maximum number of erasures M that can be erasure corrected. If they are not the same, the value i of the first counter 131 is incremented by 1, and the number of valid disappearance flags is also incremented by one. Accordingly, the erasure flag selector 121 activates the next most reliable erasure flag in addition to the effective erasure flag at this time, and erasure correction is performed using the number of erasure flags indicated by the effective number of erasure flags as effective erasure flags. Output to the unit 123. That is, whenever the erasure correction is impossible, the effective number of erasure flags is increased by one, and the effective erasure flag is increased by one until the erasure correction can be corrected. However, if the calculation result of erasure correction is uncorrectable, if i = M, erasure correction cannot be performed any more (it cannot be corrected even if it is performed), so error correction for that codeword is interrupted and the next code The processing shifts to the word (see S209).

  As described above, first normal correction is performed on one code word, and if correction is impossible, erasure correction is performed by enabling only one erasure flag with the highest reliability so that the error correction probability is lowered. If correction is impossible, erasure correction is performed while increasing the erasure flag in order of reliability within the range of correction capability. If correction is possible midway or if correction is impossible even when the limit of correction capability is reached, processing for that codeword is terminated and processing for the next codeword is started.

  However, when shifting to the processing of the next code word, the normal correction cannot be corrected, and the value i of the first counter 131 must be initialized to “1” before performing the erasure correction. The value j of the second counter 132 is not initialized each time, and before the first normal correction is performed, it is checked whether or not the value j of the second counter 132 matches the predetermined value. As described above, this represents the number of codewords that could not be corrected by normal correction. The fact that this number reaches a certain value can be one of the factors that determine that the data quality is poor. It is determined that there is a low possibility that subsequent unprocessed codewords can be corrected by normal correction. Therefore, when the value j of the second counter 132 reaches a predetermined value, the error correction control signal generation unit 133 performs error correction so that erasure correction is performed from the beginning without performing normal correction on the codewords thereafter. Fix control signal to erasure correction. As a result, the error correction time can be shortened and the power consumption can be reduced by reducing the circuit operation time.

  As described above, according to Embodiment 1 of the present invention, the error correction probability is minimized by changing the error correction method from normal correction to erasure correction from a certain point in time for data with overall poor quality. In addition, the time required for error correction can be shortened, and power consumption can be reduced accordingly.

(Embodiment 2)
An error correction circuit (corresponding to claims 2, 5 to 7 of the present invention) and an error correction method (corresponding to claim 9) according to the second embodiment of the present invention will be described with reference to FIGS. explain.

  In the second embodiment, by performing erasure correction from the beginning when a certain time has elapsed since the start of error correction, it is possible to prevent the system from failing by spending more time than the specification of the device for error correction. It is a thing.

  In FIG. 4, 134 is a timer for measuring the elapsed time from the start time of the error correction operation. Instead of the second counter 132 (FIG. 1), a timer 134 is installed, and the error correction control signal generator 133 is Until the value of the timer 134 reaches a predetermined time, the error correction control signal for instructing the error position / numerical value calculation unit 12 to perform normal correction or erasure correction is output, and the value of the timer 134 is set to a predetermined value. When the time is reached, it is the same as in FIG. 1 except that an error correction control signal for instructing the error position / numerical calculation unit 12 to perform only erasure correction is output. FIG. 5 shows a flowchart of error correction for one codeword. The process shown in FIG. 5 is repeated by the number of code words.

  In FIG. 5, S501 is a step for initializing a timer, S502 is a step for determining whether all syndromes are “0”, S503 is a step for determining whether or not a time measurement value by the timer is a predetermined value, and S504 is a normal correction. Performing step, S505 determining whether correction is possible by normal correction, S506 setting the erasure flag effective number i to “1”, S507 performing erasure correction, and S508 correcting by erasure correction Alternatively, a step of determining whether i is M, S509 is a step of adding “1” to i, S510 is a step of setting i to “1”, S511 is a step of performing a syndrome calculation of the next code word, S500a Is a first step composed of steps other than steps S503, S510, S507, S508, and S509. A step, performs error correction code words by calculation based on the operation or erasure correction algorithm based on the normal correction algorithm, measures the elapsed time from the start of the error correction operation. S500b is a second step consisting of steps S503, S510, S507, S508, and S509. When the elapsed time in the first step S500a has passed a predetermined time, the code is calculated only by the calculation based on the erasure correction algorithm. Perform word error correction.

The second embodiment will be described with a focus on differences from the first embodiment.
Similar to the first embodiment described above, the error position / numerical value calculation unit 12 obtains a syndrome for one codeword by the syndrome calculation unit 11, and if all are “0” (see step S502 in FIG. 5), the code Since there is no error in the word, the next code word is input to calculate the syndrome. If all are not “0”, an error exists and normal correction is performed first (see step S504). If correction is impossible, erasure correction is repeated while increasing the number of valid erasure flags. When correction becomes possible halfway or the limit of error correction capability is reached, the error correction processing for that code word is terminated, and the syndrome calculation unit 11 moves to the next code word and performs syndrome calculation.

  The same applies to the following, but if it is found that there is an error as a result of the syndrome calculation, it is checked every time whether the time T measured by the timer 134 is equal to or greater than a predetermined value before calculating the error position / numerical value. .

  If the time T of the timer 134 is less than the predetermined value (see step S503), the error correction processing as before is continued. If the time T of the timer 134 is equal to or greater than a predetermined value, the error correction control signal generator 133 performs erasure correction on the error correction control signal so as to perform erasure correction from the beginning without performing normal correction on the codewords thereafter. Secure to. Generally, the time allotted for error correction is limited, and if the processing is not completed within the predetermined time, the system will fail. Therefore, the timer 134 measures the time T from the start of error correction (see step S501), and when the predetermined time or longer is reached, the error correction for the subsequent codeword is omitted and only the erasure correction process is performed. To.

  As described above, according to the second embodiment of the present invention, the time from the start of error correction is measured, and the error correction method is changed when the fixed time is reached, so that the failure of the system can be avoided. It becomes possible to.

(Embodiment 3)
An error correction circuit (corresponding to claims 3, 5 to 7 of the present invention) and an error correction method (corresponding to claim 10) according to Embodiment 3 of the present invention will be described with reference to FIGS. explain.

  In the third embodiment, the time required for error correction can be shortened by preventing error correction from being performed at a certain point in time for data having a good overall data quality.

  The error correction circuit according to the third embodiment has a block configuration similar to that of the error correction circuit according to the first embodiment (FIG. 1). However, the second counter 132 counts the number of times that the syndromes obtained by the syndrome calculation unit 11 are all “0”, and the error correction control signal generation unit 133 sets the value of the second counter 132 to a predetermined value. Until the error position / numerical value calculation unit 12 is instructed to perform normal correction or erasure correction, and when the value of the second counter 132 reaches a predetermined value, This is different from the first embodiment in that an error correction control signal instructing that error correction for the remaining codewords is not performed to the syndrome calculation unit 11 and the error position / numerical calculation unit 12 is output. .

  FIG. 6 shows a flowchart of error correction for one codeword. The process shown in FIG. 6 is repeated by the number of code words.

  In FIG. 6, S601 is a step of setting “0” to the number j of code words whose syndromes are all “0”, S602 is a step of determining whether or not j is a predetermined value, and S603 is a determination of whether all of the syndromes are “0”. A step of performing normal correction, a step of determining whether or not correction is possible by the normal correction, a step of setting S606 as the erasure flag effective number i, and a step of performing erasure correction. S608 is a step of determining whether correction by erasure correction is possible or i is M, S609 is a step of adding “1” to i, S610 is a step of adding “1” to j, and S611 is a step of adding “0” to j. S612 is a step of performing a syndrome calculation of the next code word, S613 is a step of interrupting error correction processing, Reference numeral 600a denotes a first step including steps other than steps S602 and S613, in which error correction of a code word is performed by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and all the syndromes obtained from the code word are all Count the number of times it was “0”. S600b is a second process including steps S602 and S613. When the count value in the first process S600a reaches a predetermined value, error correction for the remaining codewords is interrupted.

  In the first embodiment described above, error correction is controlled by the number of codewords that cannot be corrected by normal correction. However, in the third embodiment, all the syndromes are “0”, that is, codewords without errors. Error correction is controlled by the number. A description will be given below centering on differences from the first embodiment.

  As in the first embodiment, the error position / numerical value calculation unit 12 obtains a syndrome for one codeword by the syndrome calculation unit 11, and if all are “0” (see step S603 in FIG. 6), the code Since there is no error in the word, the next code word is input to calculate the syndrome. If not all “0”, there is an error and normal correction is performed first (see step S604). If correction is impossible, erasure correction is repeated while increasing the number of valid erasure flags (see steps S605, S611, and S612). When correction becomes possible halfway or the limit of error correction capability is reached, the error correction processing for that code word is terminated, and the syndrome calculation unit 11 moves to the next code word and performs syndrome calculation.

  The same applies to the following, but the value j of the second counter 132 is initialized to “0” before performing the syndrome calculation for the first code word (see step S601). If the syndrome calculation of each code word is performed and the result is all “0”, that is, if there is no error, the value j of the second counter 132 is incremented by one. If there is a code word whose syndrome is not all “0”, the value j of the second counter 132 is initialized to “0” again. The same applies to the following, but after each syndrome calculation, it is checked whether the value j of the second counter 132 matches the predetermined value (see step S602). Continue. If they match, the error correction processing for the subsequent code words is interrupted (see step S613). As described above, this represents how many consecutive codewords without error, and the fact that this number reaches a certain value can be one of the factors for judging that the data quality is good. It is determined that there is a high possibility that the subsequent unprocessed codewords also have no error. Therefore, when the value j of the second counter 132 reaches a predetermined value, error correction is not performed on the subsequent code words. As a result, the error correction time can be shortened and the power consumption can be reduced by reducing the circuit operation time.

  Further, the value j of the second counter 132 is described as being initialized to “0” when there is a code word whose syndrome is not all “0”. Thereafter, the function of the third embodiment is disabled. You can also do that. That is, the condition that all of the codewords must be error-free codewords until the value j of the second counter 132 reaches a predetermined value can be satisfied. This is because if there is even one codeword having an error, it is necessary to check all the remaining codewords.

  As described above, according to the third embodiment of the present invention, it is possible to reduce the time required for error correction by not performing error correction from a certain point in time on data with overall good quality, and power consumption accordingly. Can be reduced.

(Embodiment 4)
An error correction circuit (claims 4, 5 to 7 of the present invention) and an error correction method (corresponding to claim 11) according to Embodiment 4 of the present invention will be described with reference to FIGS. .

  In the fourth embodiment, the time required for error correction can be shortened by not performing error correction from a certain point in time on data with poor overall data quality.

  The error correction circuit according to the fourth embodiment has a block configuration similar to that of the error correction circuit according to the first embodiment (FIG. 1). However, when the second counter 132 indicates that the error correction control signal indicates erasure correction and the value of the first counter 131 indicates the maximum number of erasure flags that can be erasure corrected, the operation output by the operation result selector 125 is output. The number of times the result is uncorrectable is counted, and the error correction control signal generation unit 133 normally corrects or erases the error position / numerical calculation unit 12 until the value of the second counter 132 reaches a predetermined value. When an error correction control signal for instructing correction is output and the value of the second counter 132 reaches a predetermined value, the remaining codewords are output to the syndrome calculation unit 11 and the error position / numerical calculation unit 12. The second embodiment is different from the first embodiment in that an error correction control signal instructing that error correction is not performed is output.

  FIG. 7 shows a flowchart of error correction for one codeword. The process shown in FIG. 7 is repeated by the number of code words.

  7, S701 is a step of setting “0” to the number of uncorrectable codewords j, S702 is a step of determining whether all the syndromes are “0”, S703 is a step of determining whether j is a predetermined value, S704 Is a step of performing normal correction, S705 is a step of determining whether correction is possible by normal correction, S706 is a step of setting the erasure flag effective number i to “1”, S707 is a step of performing erasure correction, and S708 is a erasure correction. Step S709 is a step of determining whether i is M, S609 is a step of adding "1" to i, S710 is a step of adding "1" to i, and S711 is j A step of adding “1”, a step of performing a syndrome calculation of the next code word in S712, and a step of interrupting the error correction processing in S713. S700a is a first step comprising steps other than steps S703 and S713. The error correction of the codeword is not possible while the error correction of the codeword is performed by the operation based on the normal correction algorithm or the operation based on the erasure correction algorithm. Count the number of times. S700b is a second process including steps S703 and S713. When the count value in the first process S700a reaches a predetermined value, error correction for the remaining codewords is interrupted.

  In the first embodiment described above, error correction is controlled by the number of code words that cannot be corrected by normal correction. However, in the fourth embodiment, code words that cannot be corrected by either normal correction or erasure correction are controlled. Error correction is controlled by the number. A description will be given below centering on differences from the first embodiment.

  As in the first embodiment, the error position / numerical value calculation unit 12 obtains a syndrome for one codeword by the syndrome calculation unit 11, and if all are “0” (see step S702 in FIG. 7), the code Since there is no error in the word, the next code word is input and the syndrome is calculated (see step S712). If all the values are not “0”, there is an error, so the normal correction is performed first (see step S704). If correction is impossible, erasure correction is repeated while increasing the number of valid erasure flags (see steps S705, S706, and S707). Whether correction is possible in the middle (see step S708) or when the limit of the error correction capability is reached, the error correction processing for the code word is terminated, and the syndrome calculation unit 11 moves to the next code word and performs the syndrome calculation. Do. Here, when the erasure correction cannot be corrected, the limit of the error correction capability is reached (see step S707), and if further erasure correction cannot be performed, the value j of the second counter 132 is incremented by one. .

  The same applies to the following, but the value j of the second counter 132 is initialized to “0” before performing the syndrome calculation for the first code word (see step S701). If the syndrome calculation of each code word is performed and the result is all “0”, that is, if there is no error, the process moves to the next code word, and if there is an error, the error position / numerical calculation unit 12 causes the error position / Before the numerical value is obtained, it is checked whether or not the value j of the second counter 132 matches the predetermined value every time (see step S703). If they do not match, the error correction processing as before is continued. If they match, the error correction processing for the subsequent code words is interrupted. As described above, this represents the number of code words that could not be corrected by either normal correction or erasure correction, and the fact that this number reaches a certain value is one of the factors that determine that data quality is poor. It is determined that there is a high possibility that there is an error that cannot be corrected even after an unprocessed codeword. Therefore, when the value j of the second counter 132 reaches a predetermined value (see step S703), error correction is not performed on the codewords thereafter (see step S713). As a result, the error correction time can be shortened and the power consumption can be reduced by reducing the circuit operation time.

  As described above, according to Embodiment 4 of the present invention, it is possible to interrupt useless operations and reduce power consumption by not performing error correction from a certain point in time on data with overall poor quality. It becomes.

  In the first to fourth embodiments, the error correction operation of the error correction circuit corresponding to each embodiment is shown as a flowchart. However, this operation may be realized by a computer program or a recording medium on which this is recorded. Good.

  The computer program may be executed by a computer that performs an original operation of a system that requires error correction, or may be executed by a computer dedicated to error correction in the system.

  As described above, since the error correction circuit and the error correction method of the present invention can efficiently perform error correction while suppressing error correction, the error correction circuit and the error correction method of the present invention are used for applications that perform error correction while suppressing power consumption in devices that require real-time performance. And useful.

The block diagram which shows the structure of the error correction circuit of Embodiment 1, 3, 4 of this invention The flowchart figure which shows the error correction operation | movement of Embodiment 1 of this invention. Figure showing an example of erasure flag setting The block diagram which shows the structure of the error correction circuit of Embodiment 2 of this invention The flowchart figure which shows the error correction operation | movement of Embodiment 2 of this invention. The flowchart figure which shows the error correction operation | movement of Embodiment 3 of this invention. The flowchart figure which shows the error correction operation | movement of Embodiment 4 of this invention. A block diagram showing a configuration example of a conventional error correction circuit Flowchart diagram showing error correction operation of a conventional error correction circuit

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Error correction circuit 11 Syndrome calculation part 12 Error position / numerical value calculation part 121 Erasure flag selector 122 Normal correction part 123 Erasure correction part 124 Error position / numerical value selector 125 Operation result selector 13 Error correction control part 131 First counter 132 Second Counter 133 error correction control signal generation unit 134 timer 14 error correction unit 501 error correction circuit 511 syndrome calculation unit 512 error position / numerical calculation unit 513 error correction control unit 514 error correction unit S200a, S500a, S600a, S700a First step S200b, S500b, S600b, S700b Second step

Claims (11)

A plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, and the position of the erroneous symbol and the error numerical value added to the error position ( (Hereinafter referred to as error position / numerical value) in the codeword unit, and in the error correction circuit for correcting the codeword to a correct codeword,
A syndrome calculation unit for obtaining a syndrome from the codeword;
An error position / numerical calculation unit for calculating an error position / numerical value of the codeword using the syndrome output by the syndrome calculation unit;
An error for controlling the error position / numerical calculation unit to perform error correction by either normal correction or erasure correction using the calculation result output from the error position / numerical calculation unit indicating whether correction is possible or not. An error correction control unit for outputting a correction control signal;
An error correction unit that performs error correction of a code word based on the error position / numerical value output by the error position / numerical value calculation unit;
With
The error position / numerical calculation unit is:
An erasure flag selector that selects a valid erasure flag from the erasure flag based on the erasure flag valid number;
When the error correction control signal indicates normal correction, an operation based on the normal correction algorithm is performed using the syndrome, and an operation result indicating whether correction is possible or not is output. A normal correction unit for outputting a position / numerical value;
When the error correction control signal indicates erasure correction, an operation based on an erasure correction algorithm is performed using the syndrome and the valid erasure flag, and an operation result indicating whether correction is possible or not is output. An erasure correction unit that outputs an error position / numerical value if correctable;
If the error correction position / numerical value and the error correction error position / value are input, and the error correction control signal indicates the normal correction, the normal correction error position / number is input to the error correction unit. An error position / numeric selector that outputs the error position / numerical value of the erasure correction to the error correction unit if the error correction control signal indicates the erasure correction;
The calculation result of the normal correction and the calculation result of the erasure correction are input, and if the error correction control signal indicates the normal correction, the calculation result of the normal correction is output to the error correction control unit, and the error A calculation result selector that outputs the calculation result of the erasure correction to the error correction control unit if a correction control signal indicates the erasure correction;
Have
The error correction control unit
When the error correction control signal indicates erasure correction, a first counter that counts the number of times the operation result output by the operation result selector is uncorrectable and outputs the value as the erasure flag effective number When,
A second counter that counts the number of times that the operation result output by the operation result selector is uncorrectable when the error correction control signal indicates normal correction;
Until the value of the second counter reaches a predetermined value, the error correction control signal instructing the error position / numerical value calculation unit to perform normal correction or erasure correction is output, and the second counter An error correction control signal generation unit that outputs the error correction control signal that instructs the error position / numerical calculation unit to perform only erasure correction,
Having
An error correction circuit characterized by the above. A plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, and the position of the erroneous symbol and the error numerical value added to the error position ( (Hereinafter referred to as error position / numerical value) in the codeword unit, and in the error correction circuit for correcting the codeword to a correct codeword,
A syndrome calculation unit for obtaining a syndrome from the codeword;
An error position / numerical calculation unit for calculating an error position / numerical value of the codeword using the syndrome output by the syndrome calculation unit;
An error for controlling the error position / numerical calculation unit to perform error correction by either normal correction or erasure correction using the calculation result output from the error position / numerical calculation unit indicating whether correction is possible or not. An error correction control unit for outputting a correction control signal;
An error correction unit that performs error correction of a code word based on the error position / numerical value output by the error position / numerical value calculation unit;
With
The error position / numerical calculation unit is:
An erasure flag selector that selects a valid erasure flag from the erasure flag based on the erasure flag valid number;
When the error correction control signal indicates normal correction, an operation based on the normal correction algorithm is performed using the syndrome, and an operation result indicating whether correction is possible or not is output. A normal correction unit for outputting a position / numerical value;
When the error correction control signal indicates erasure correction, an operation based on an erasure correction algorithm is performed using the syndrome and the valid erasure flag, and an operation result indicating whether correction is possible or not is output. An erasure correction unit that outputs an error position / numerical value if correctable;
If the error correction position / numerical value and the error correction error position / value are input, and the error correction control signal indicates the normal correction, the normal correction error position / number is input to the error correction unit. An error position / numeric selector that outputs the error position / numerical value of the erasure correction to the error correction unit if the error correction control signal indicates the erasure correction;
The calculation result of the normal correction and the calculation result of the erasure correction are input, and if the error correction control signal indicates the normal correction, the calculation result of the normal correction is output to the error correction control unit, and the error A calculation result selector that outputs the calculation result of the erasure correction to the error correction control unit if a correction control signal indicates the erasure correction;
Have
The error correction control unit
When the error correction control signal indicates erasure correction, a first counter that counts the number of times the operation result output by the operation result selector is uncorrectable and outputs the value as the erasure flag effective number When,
A timer for measuring a predetermined time;
Until the value of the timer reaches a predetermined time, the error correction control signal instructing the error position / numerical calculation unit to perform normal correction or erasure correction is output, and the value of the timer is set to a predetermined time. An error correction control signal generation unit that outputs the error correction control signal that instructs the error position / numerical calculation unit to perform only erasure correction;
Having
An error correction circuit characterized by the above. A plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, and the position of the erroneous symbol and the error numerical value added to the error position ( (Hereinafter referred to as error position / numerical value) in the codeword unit, and in the error correction circuit for correcting the codeword to a correct codeword,
A syndrome calculation unit for obtaining a syndrome from the codeword;
An error position / numerical calculation unit for calculating an error position / numerical value of the codeword using the syndrome output by the syndrome calculation unit;
An error for controlling the error position / numerical calculation unit to perform error correction by either normal correction or erasure correction using the calculation result output from the error position / numerical calculation unit indicating whether correction is possible or not. An error correction control unit for outputting a correction control signal;
An error correction unit that performs error correction of a code word based on the error position / numerical value output by the error position / numerical value calculation unit;
With
The error position / numerical calculation unit is:
An erasure flag selector that selects a valid erasure flag from the erasure flag based on the erasure flag valid number;
When the error correction control signal indicates normal correction, an operation based on the normal correction algorithm is performed using the syndrome, and an operation result indicating whether correction is possible or not is output. A normal correction unit for outputting a position / numerical value;
When the error correction control signal indicates erasure correction, an operation based on an erasure correction algorithm is performed using the syndrome and the valid erasure flag, and an operation result indicating whether correction is possible or not is output. An erasure correction unit that outputs an error position / numerical value if correctable;
If the error correction position / numerical value and the error correction error position / value are input, and the error correction control signal indicates the normal correction, the normal correction error position / number is input to the error correction unit. An error position / numeric selector that outputs the error position / numerical value of the erasure correction to the error correction unit if the error correction control signal indicates the erasure correction;
The calculation result of the normal correction and the calculation result of the erasure correction are input, and if the error correction control signal indicates the normal correction, the calculation result of the normal correction is output to the error correction control unit, and the error A calculation result selector that outputs the calculation result of the erasure correction to the error correction control unit if a correction control signal indicates the erasure correction;
Have
The error correction control unit
When the error correction control signal indicates erasure correction, a first counter that counts the number of times the operation result output by the operation result selector is uncorrectable and outputs the value as the erasure flag effective number When,
A second counter that counts the number of times that all of the syndromes obtained by the syndrome computing unit are “0”;
Until the value of the second counter reaches a predetermined value, the error correction control signal instructing the error position / numerical value calculation unit to perform normal correction or erasure correction is output, and the second counter When the error value reaches a predetermined value, the error correction control unit outputs the error correction control signal instructing the syndrome calculation unit and the error position / numerical calculation unit not to perform error correction for the remaining codewords. A control signal generator;
Having
An error correction circuit characterized by the above. A plurality of code words to which an error correction code is added and an erasure flag representing correct / incorrect information for each symbol of the code word are sequentially input, and the position of the erroneous symbol and the error numerical value added to the error position ( (Hereinafter referred to as error position / numerical value) in the codeword unit, and in the error correction circuit for correcting the codeword to a correct codeword,
A syndrome calculation unit for obtaining a syndrome from the codeword;
An error position / numerical calculation unit for calculating an error position / numerical value of the codeword using the syndrome output by the syndrome calculation unit;
An error for controlling the error position / numerical calculation unit to perform error correction by either normal correction or erasure correction using the calculation result output from the error position / numerical calculation unit indicating whether correction is possible or not. An error correction control unit for outputting a correction control signal;
An error correction unit that performs error correction of a code word based on the error position / numerical value output by the error position / numerical value calculation unit;
With
The error position / numerical calculation unit is:
An erasure flag selector that selects a valid erasure flag from the erasure flag based on the erasure flag valid number;
When the error correction control signal indicates normal correction, an operation based on the normal correction algorithm is performed using the syndrome, and an operation result indicating whether correction is possible or not is output. A normal correction unit for outputting a position / numerical value;
When the error correction control signal indicates erasure correction, an operation based on an erasure correction algorithm is performed using the syndrome and the valid erasure flag, and an operation result indicating whether correction is possible or not is output. An erasure correction unit that outputs an error position / numerical value if correctable;
If the error correction position / numerical value and the error correction error position / value are input, and the error correction control signal indicates the normal correction, the normal correction error position / number is input to the error correction unit. An error position / numeric selector that outputs the error position / numerical value of the erasure correction to the error correction unit if the error correction control signal indicates the erasure correction;
The calculation result of the normal correction and the calculation result of the erasure correction are input, and if the error correction control signal indicates the normal correction, the calculation result of the normal correction is output to the error correction control unit, and the error A calculation result selector that outputs the calculation result of the erasure correction to the error correction control unit if a correction control signal indicates the erasure correction;
Have
The error correction control unit
When the error correction control signal indicates erasure correction, a first counter that counts the number of times the operation result output by the operation result selector is uncorrectable and outputs the value as the erasure flag effective number When,
When the error correction control signal indicates erasure correction and the value of the first counter indicates the maximum number of erasure flags that can be erasure corrected, the operation result output by the operation result selector is uncorrectable. A second counter for counting the number of times;
Until the value of the second counter reaches a predetermined value, the error correction control signal instructing the error position / numerical value calculation unit to perform normal correction or erasure correction is output, and the second counter When the error value reaches a predetermined value, the error correction control unit outputs the error correction control signal instructing the syndrome calculation unit and the error position / numerical calculation unit not to perform error correction for the remaining codewords. A control signal generator;
Having
An error correction circuit characterized by the above. The error correction circuit according to any one of claims 1 to 4,
The reliability of the erasure flag corresponding to a symbol with a high probability of error in the codeword is high, and the reliability of the erasure flag corresponding to a symbol with a low probability of error is low.
An error correction circuit characterized by the above. The error correction circuit according to any one of claims 1 to 4,
The erasure flag selector sets the number of erasure flags indicated by the erasure flag effective number in order of high reliability of the erasure flag as the effective erasure flag.
An error correction circuit characterized by the above. The error correction circuit according to any one of claims 1 to 4,
The error correction control signal generation unit sets the error correction control signal so as to repeatedly perform the erasure correction until the erasure flag effective number reaches the maximum number of erasure flags capable of erasure correction;
An error correction circuit characterized by the above. In an error correction method for sequentially inputting a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword, and correcting the codeword to a correct codeword,
A first step of performing error correction of the codeword by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and counting the number of times the operation result is uncorrectable;
A second step of performing error correction of the code word only by an operation based on the erasure correction algorithm when the uncorrectable number of times in the first step reaches a predetermined value;
including,
An error correction method characterized by the above. In an error correction method for sequentially inputting a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword, and correcting the codeword to a correct codeword,
A first step of performing error correction of the codeword by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and measuring an elapsed time from the start of an error correction operation;
A second step of performing error correction of the codeword only by an operation based on the erasure correction algorithm when the elapsed time in the first step has passed a predetermined time;
including,
An error correction method characterized by the above. In an error correction method for sequentially inputting a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword, and correcting the codeword to a correct codeword,
A first step of performing error correction of the codeword by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and counting the number of times that the syndromes obtained from the codeword are all “0”;
A second step of interrupting error correction for the remaining codewords when the count value in the first step reaches a predetermined value;
including,
An error correction method characterized by the above. In an error correction method for sequentially inputting a plurality of codewords to which an error correction code is added and an erasure flag representing correctness information for each symbol of the codeword, and correcting the codeword to a correct codeword,
A first step of performing error correction of the codeword by an operation based on a normal correction algorithm or an operation based on an erasure correction algorithm, and counting the number of times the error correction was impossible;
A second step of interrupting error correction for the remaining codewords when the count value in the first step reaches a predetermined value;
including,
An error correction method characterized by the above.

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