JP2005071841A - Power supply device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To protect a device to enhance reliability by surely detecting a state wherein there is possibility that excessive stress is generated in the device when a load is abnormal, and to enable wide output control of the load without causing erroneous determination of a detection circuit when the load is normal, in a power supply device capable of controlling power supplied to the load La by varying the operation frequency of an inverter circuit 2. <P>SOLUTION: This power supply device is provided with: an abnormality detection circuit 43 for detecting abnormality of a resonance circuit 3 by polarity of a resonance current detected by a resonance current detection circuit 5 after a predetermined delay time from a point of time a control circuit 4 turns on the switching element of the inverter circuit 2, and for limiting the output of the inverter circuit 2 when the resonance current is abnormal; and an operation frequency determination circuit 46 for stopping the operation of the detection circuit 43 when the operation frequency of the switching element is in a predetermined range. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a power supply device that converts a DC voltage into a high-frequency voltage and supplies it to a load.

  FIG. 13 shows a configuration example of a conventional power supply apparatus. This power supply device is obtained by rectifying and smoothing the commercial power supply AC by the rectifier circuit 1 by switching the switching elements Q1 and Q2 constituting the inverter circuit so as to be alternately turned on and off at a high frequency of about 50 KHz, for example. Converts DC voltage to high frequency voltage. The switching elements Q1 and Q2 are FET elements having parasitic diodes connected in antiparallel, the drain of the high voltage side switching element Q1 is connected to the high voltage side output of the rectifier circuit 1, and the drain of the low voltage side switching element Q2 is the high voltage One end of the current detection resistor R1 is connected to the source of the low voltage side switching element Q2, and the other end is connected to the low voltage side output of the rectifier circuit 1.

  The high-frequency voltage output from the inverter circuit is supplied to the resonance circuit constituted by the choke coil L1 and the capacitor C2 via the DC component cutting capacitor C1, and the resonance voltage obtained at both ends of the capacitor C2 is discharged to the discharge lamp La. To be supplied. Since the capacitance of the capacitor C1 is normally set to be a relatively large value (C2 << C1) with respect to the capacitance of the capacitor C2 of the resonance circuit, a rectangular wave obtained by switching the switching elements Q1 and Q2 is used. A DC component of the voltage is applied to the capacitor C1, and a high-frequency voltage with the DC component cut is applied to the resonance circuit and the discharge lamp La.

  The control circuit 4 controls the operating frequency of the switching elements Q1 and Q2, further detects the switching current of the switching element Q2 from the resistor R1, and stops the operation of the inverter circuit when the load is abnormal.

Here, assuming that the equivalent resistance of the load is R, the inductance of the choke coil L1 is L, and the capacitance of the capacitor C2 is C, the impedance Z of the resonance circuit viewed from the inverter circuit is expressed by the following equation.
Z = R / {1+ (ωCR) ² } + jωL−jωCR ² / {1+ (ωCR) ² } Equation 1

Therefore, when the natural vibration frequency of this circuit is f1, f1 is expressed by the following equation. When the operating frequency of the inverter circuit is smaller than f1, the resonance current input to the resonance circuit is advanced, and the operation of the inverter circuit When the frequency is greater than f1, the resonance current is delayed.
f1 = (1 / 2π) {1 / LC−1 / (CR) ² } ^1/2 Formula 2

  When the resonance current is in the leading phase, the current waveform of the switching element Q2 is as shown in FIG. 16C, and when it is in the slow phase, the waveform is as shown in FIG. In the case of the late phase, since the switching element is turned on while the regenerative current is flowing through the parasitic diode of one switching element, no loss occurs at the time of turn-on. However, in the case of phase advancement, the other switching element is turned on while the current flows through the parasitic diode of one switching element, so that the switching waveform has a steep di / A dt waveform is generated, and an excessive stress is applied to the switching element.

Next, the operation of the inverter circuit when the load is removed will be described. When the load is removed and no load is applied, the equivalent resistance of the load becomes infinite. Therefore, the natural vibration frequency f0 of the resonance circuit is determined only by the inductance L of the choke coil L1 and the capacitance of the resonance capacitor C2. It is expressed as follows.
f0 = 1 / 2π (LC) ^1/2 Formula 3

  When the operating frequency of the inverter circuit coincides with f0 when there is no load, the impedance of the resonance circuit becomes 0 and theoretically infinite resonance current flows.

  FIG. 15 shows the frequency characteristics of the resonance current under normal load and no load. The resonance current becomes maximum when the frequency is f1 and f0 under normal load and no load, respectively, and the relationship of f1 <f0 is established from Equation 2 and Equation 3.

  As is apparent from FIG. 12, if the operating frequency is set higher than f0, the inverter circuit can always be operated at a slow phase regardless of the presence or absence of a load. However, in this case, there is a problem that the difference between the operating frequency of the inverter circuit and the natural vibration frequency f1 at the normal load becomes large, the reactive current increases, and the circuit efficiency deteriorates. Therefore, the operating frequency finv1 at normal load is generally set to a relationship of f1 <finv1 <f0. At this time, if the load is suddenly removed during operation of the inverter circuit with a normal load and the load becomes no load, the operating point of the inverter circuit shifts from point A to point B in FIG. That is, the resonance current that flows in the slow phase at the normal load starts flowing in the fast phase at the same time as the load is removed, thereby applying an excessive stress to the switching element.

  Therefore, conventionally, there has been proposed a means for protecting the power supply apparatus by suppressing or stopping the output of the inverter circuit when the resonance current reaches the leading phase. In Japanese Patent Application No. 2002-018824, there is a method for detecting a phase-advanced current based on the polarity of the switching current during the period from when the regenerative current flowing through the parasitic diode of the switching element is terminated under normal load to when the switching element is turned off. Proposed. The detailed operation of the control circuit of FIG. 14 including the operation of the protection means will be described below. The terminals a to d of the control circuit in FIG. 14 are connected to the terminals a to d of the main circuit in FIG.

  The control circuit 4 includes an oscillation circuit 41 that determines the on-time of the switching elements Q1 and Q2, a drive circuit 42 that drives and controls the switching elements Q1 and Q2 according to the output of the oscillation circuit 41, an unloaded state and an abnormal load. An abnormality detection circuit 43 that determines an abnormality such as an abnormality signal and outputs an abnormality signal, and an oscillation that stops switching of the switching elements Q1 and Q2 by outputting an oscillation stop signal to the drive circuit 42 when the abnormality detection circuit 43 outputs an abnormality signal. And a stop circuit 44.

  These operations will be described in detail with reference to the time chart of FIG. The resonance current flowing through the resonance circuit can be detected by converting the switching current flowing through the switching element Q2 into a voltage by the resistor R1 connected in series with the switching element Q2. In the abnormality detection circuit 43, the voltage across the resistor R1 (the current waveform flowing through the switching element Q2) is compared with a predetermined reference voltage Vref1 by the comparator COMP1, and the output thereof is a data terminal of the flip-flop (eg Toshiba TC4013BP) IC2. D is input. The output of the oscillation circuit 41 is input to the clock terminal CLK of the flip-flop IC2 via the logic inverting element IC1, and the output of the comparator COMP1 when the output of the oscillation circuit 41 is switched from “H” to “L”. Can be retained. A delay circuit 45 is inserted from the output of the oscillation circuit 41 to the input of the drive circuit 42, and the drive signal of the switching element Q2 is output after a predetermined time delay from the output of the oscillation circuit 41. Since this delay time is set to a time sufficiently shorter than the ON time of the switching element Q2, a clock pulse is input to the flip-flop IC2 a predetermined time before the switching element Q2 is turned OFF, and immediately before the switching element Q2 is turned OFF. The output of the comparator COMP1 can be held. As shown in the waveform at the normal load in FIG. 17, when the resonance current is delayed, the output of the comparator COMP1 is “H” at the clock timing, so the output of the flip-flop IC2 is also “H”. If the resonance current is in the leading phase as in the no-load waveform, the output of the comparator COMP1 is “L” at the clock timing, so the output of the flip-flop IC2 is also “L”.

  The output of the flip-flop IC2 is input to the reset terminal R of the counter IC3, and the inverted output of the oscillation circuit 41 is also input to the clock terminal CLK of the counter IC3. In other words, the counter IC3 counts the number of times the output of the flip-flop IC2 becomes “L”, and determines how many switching cycles the phase advance waveform is continued. The example of FIG. 17 shows a case where the output of the counter IC3 is set to output “H” when the phase advance waveform is continued four times. By inserting the counter IC3, the phase advance judgment is performed. I try to increase reliability.

  The output signal of the counter IC3 is input to one end of the AND element IC5 via the logic inversion element IC4 of the oscillation stop circuit 44. The output of the delay circuit 45 is input to the other end of the AND element IC5. Therefore, when the resonance current is operating in the slow phase, the “H” signal is input from the abnormality detection circuit 43 to the oscillation stop circuit 44, so that the output of the delay circuit 45 can be input to the drive circuit 42 as it is. However, when the resonance current advances and the output of the abnormality detection circuit 43 becomes “L”, the output of the oscillation stop circuit 44 always becomes “L”, and the output of the oscillation circuit 41 is transmitted to the drive circuit 42. The oscillation of the inverter circuit can be stopped.

  As described above, the abnormality detection region flows through the switching element Q2 as a period from the time when the regenerative current generated immediately after the switching element Q2 is turned on in a normal state to the time when the driving of the switching element Q2 is turned off. By detecting abnormality by determining whether the current is positive or negative, the phase advance operation at the time of abnormality can be detected, and the operation of the inverter circuit can be stopped according to this detection.

  On the other hand, a power supply device has also been proposed that controls the power supplied to the load by changing the operating frequency of the inverter circuit. For example, in the power supply device shown in FIG. 13, when the operating frequency of the inverter circuit is increased, the impedance supplied to the load is reduced by increasing the impedance of the resonance circuit, and the power consumed by the load can be controlled. it can. In a power supply apparatus using a discharge lamp as a load, the lamp can be dimmed by changing the operating frequency to change the power supplied to the load.

Note that Patent Document 1 proposes a configuration in which a protective operation is performed when the oscillation frequency is lower than the resonance frequency.
JP 2001-244093 A

  As described above, in the power supply device that controls the power consumption of the load by changing the operating frequency, when the abnormality detection circuit 43 that detects the abnormality of the load by the resonance current as shown in FIG. May occur.

  As can be seen from the frequency characteristics of the resonance current shown in FIG. 15, when the operating frequency is increased with the load connected and the difference from the natural vibration frequency f1 at normal load increases, the impedance of the resonance circuit increases. The resonance current is reduced. Therefore, since the peak value of the resonance current is reduced as the power consumption of the load is reduced, the resonance current phase is operated in a slow phase as shown by the voltage waveform across the resistor R1 in FIG. Since the peak value does not reach the threshold value of the abnormality detection circuit 43, it is erroneously determined that the resonance current is in a leading phase, and the oscillation of the inverter circuit is stopped.

  Further, when the load has a negative characteristic impedance in which the lamp voltage increases as the lamp current decreases as in the case of a discharge lamp, the load's impedance increases, so that the natural vibration frequency f1 during the load is also increased. It becomes larger and approaches the natural vibration frequency f0 at no load. However, since f1 does not become larger than f0, when the operating frequency of the inverter circuit is made larger than f0 and the discharge lamp is controlled to a deeper dimming level to reduce power consumption, the above case In the same manner as above, an erroneous determination of the abnormality detection circuit may occur.

  However, if the operating frequency of the inverter circuit is made relatively higher than the natural vibration frequency f0 when there is no load, the impedance of the resonant circuit is increased even when the load is removed, so that electrical stress is also increased. It is greatly reduced. In addition, since the inverter circuit is operated at an operating frequency higher than f0, the resonance current does not advance, and excessive di / dt stress is not applied to the switching element.

  In other words, to summarize the above, when the operating frequency of the inverter circuit is lower than f0, an excessive di / dt stress is applied to the switching element depending on the state of the load, or the electric circuit applied to each element of the resonance circuit Since stress may increase, an abnormality detection circuit using a resonance current as in the conventional example is necessary. However, when the operating frequency is higher than f0, the resonance current does not advance regardless of the state of the load. Therefore, this abnormality detection circuit is not necessary, and when the operating frequency is relatively higher than f0. There is a risk of misjudgment.

  The present invention has been made in view of these points, and an object of the present invention is to provide a power supply apparatus that can control the power supplied to the load by changing the operating frequency of the inverter circuit. Protects the device by reliably detecting conditions that may cause excessive stress to the device in the event of an abnormality, improving reliability, and detecting a misdetection of the detection circuit when the load is normal. An object of the present invention is to provide a power supply device that can be controlled.

  According to the first aspect of the present invention, in order to solve the above-mentioned problem, as shown in FIG. 1, a DC power source (rectifier circuit 1) that outputs a DC voltage and at least one switching unit connected to the DC power source are provided. An inverter circuit 2 for converting a DC voltage output from the DC power source into a high-frequency voltage by being repeatedly turned on and off, and connected to the inverter circuit 2 and supplied from the inverter circuit 2 The high frequency power to be supplied to the load La is supplied to the load La by changing the on / off time of the resonance circuit 3 including at least one inductor L1 and at least one capacitor C2 and the switching element. A control circuit 4 for controlling the power to be generated, a resonance current detection circuit 5 for detecting a resonance current flowing through the resonance circuit 3, and the control circuit An abnormality of the resonance circuit 3 is detected by the polarity of the resonance current detected by the resonance current detection circuit 5 after a predetermined delay time from the time when the circuit 4 turns on the switching element of the inverter circuit 2, and when the resonance current is abnormal An abnormality detection circuit 43 that protects the power supply device by limiting the output of the inverter circuit 2, and the control circuit 4 has an abnormality detection circuit when the operating frequency for turning on / off the switching element is within a predetermined range. The operation of 43 is stopped.

According to the first aspect of the present invention, in the power supply apparatus capable of variably controlling the power consumption of the load, the abnormality detection circuit is erroneously determined by prohibiting the operation of the abnormality detection circuit when the operation frequency of the inverter circuit is within a predetermined range. Can be prevented.
According to the invention of claim 2, since the operation of the abnormality detection circuit is stopped at a frequency higher than the natural vibration frequency at the time of no load of the resonance circuit, the device is protected when the current is advanced. In addition, when the phase is late, it is possible to provide a highly reliable power supply device that is free from errors in abnormality detection.
According to the invention of claim 3, in the power supply apparatus capable of variably controlling the power consumption of the load, the means for determining the current value of the resonance current is provided, and the operation of the abnormality detection circuit is stopped when the current value is less than the predetermined current value. As a result, erroneous determination of the resonance current can be prevented.

According to the fourth aspect of the present invention, the phase of the resonance current can be more reliably determined by setting the operation timing of the resonance current determination means after a predetermined time from when the switching element is turned on.
According to the invention of claim 5, the phase of the resonance current can be more reliably determined by operating the abnormality detection circuit only when the peak value of the resonance current exceeds the reference value of the resonance current determination means. .
According to the invention of claim 6, the circuit configuration can be simplified by making the reference value of the resonance current determination circuit and the reference value of the abnormality detection circuit the same.

  FIG. 1 shows the basic configuration of the present invention. In the present invention, in the conventional example (FIG. 14), the oscillation frequency of the oscillation circuit 41 can be changed according to the output control signal 40, and the operation frequency determination circuit 46 is provided so that the operation frequency is within a predetermined range. Is characterized in that the output of the abnormality detection circuit 43 is prohibited.

  For example, a signal that continuously varies a DC voltage between 1 to 10 V is used as an output control signal, and the control circuit 4 increases the operating frequency of the inverter circuit 2 as the voltage decreases, and the load La The inverter circuit 2 is controlled so as to reduce the supplied power. The operation frequency finv1 when the output control signal is 10V is set so as to satisfy the relationship of f1 <finv1 <f0, and the operation frequency finv2 when the output control signal is 1V can be controlled to the point where finv2> f0. When set, when the control signal voltage is gradually lowered from 10V, there is a voltage at which finv matches f0. The control signal voltage at this time is V1.

  On the other hand, the operating frequency determination circuit 46 receives an output control signal and determines whether or not the control signal voltage is lower than V1. If the control signal voltage is equal to or lower than V1, it is determined that the operating frequency of the inverter circuit 2 is higher than f0. The operating frequency determining circuit 46 outputs an “H” signal, and if the control signal voltage is higher than V1, the operating frequency. The determination circuit 46 is set to output an “L” signal. Also, the abnormality detection circuit 43 is set so as to output an “H” signal when the resonance current is in the leading phase, as in the conventional example. In the oscillation stop circuit 44, first, the output signals of the operating frequency determination circuit 46 and the abnormality detection circuit 43 are input to the NAND element IC6, and the output signal and the output signal of the oscillation circuit 41 are input to the AND element IC5. The output of the AND element IC5 is input to the drive circuit 42 as the output of the oscillation stop circuit 44.

  With such a configuration, when the output control signal voltage is lower than V1, an “L” signal is output from the operating frequency determination circuit 46. Therefore, regardless of the output of the abnormality detection circuit 43, the NAND element IC6 The output becomes “H”, and the output signal from the oscillation circuit 41 is input to the drive circuit 42 as it is. On the other hand, when the output control signal voltage is equal to or higher than V1, the output of the operating frequency determination circuit 46 is “H”, and the output of the NAND element IC6 is switched according to the output of the abnormality detection circuit 43. Therefore, if the resonance current is slow, the output of the abnormality detection circuit 43 is “L” and the output of the NAND element IC 6 is “H”. Therefore, the output of the oscillation circuit 41 is transmitted to the drive circuit 42 as it is, and the resonance current is When the phase advances, the output of the NAND element IC6 becomes “L”, and the drive circuit 42 is stopped.

  Therefore, when the operating frequency of the inverter circuit 2 is higher than the natural vibration frequency f0 when the resonance circuit 3 is not loaded, the operation of the abnormality detecting circuit 43 is prohibited to prevent erroneous detection. When the operating frequency is lower than f0, the abnormality detecting circuit 43 is prevented. Is operated to detect the phase of the resonance current, and when the resonance current is advanced, the inverter circuit 2 is stopped to protect the power supply apparatus.

  FIG. 2 shows a circuit diagram of the control circuit of the first embodiment. The configuration of the main circuit is the same as in FIG. 13, and the terminals a to d in FIG. 2 are connected to the terminals a to d in FIG. In the basic configuration of FIG. 1, the operating range of the abnormality detection circuit 43 is determined by the value of the output control signal. However, in this embodiment, when the ON time of the switching element Q2 exceeds a predetermined value, the abnormality detection circuit 43 is turned on. It is configured to operate.

  The operation of the circuit of FIG. 2 will be described in detail with reference to the time charts of FIGS. Since the configurations of the inverter circuit, the resonance circuit, and the load are the same as those of the conventional example, description thereof is omitted. The oscillation circuit 41 determines the operating frequency of the inverter circuit according to the output control signal. From this signal, the operating frequency determination circuit 46 first generates a triangular wave signal for determining the on-time of the switching element Q2. This circuit includes two current mirror circuits A and B, a capacitor C11, and a comparator COMP2. The current mirror circuit A supplies a current determined by the resistance value of the resistor R11 to the current mirror circuit B and the capacitor C11. The mirror circuit B switches between operation and non-operation according to the output signal from the oscillation circuit 41. When the oscillation signal is “H”, the capacitor C11 is charged with a constant current, and when it is “L”, a triangular wave with a constant slope is generated by discharging with a constant current. The triangular wave voltage is compared with the reference voltage Vref2 by the comparator COMP2, and the comparator COMP2 is set to output “H” when the triangular wave voltage exceeds the reference value Vref2. The output of the comparator COMP2 and the output of the oscillation circuit 41 are input to the NAND element IC8, and the output is used as a clock signal for the abnormality detection circuit 43.

  Since the frequency determination signal (triangular wave voltage) exceeds the reference voltage Vref2 when the ON time of the switching element Q2 is long (the operating frequency is low), the “H” signal is output from the comparator COMP2 before and after the falling of the oscillation circuit 42. As in the case of the conventional example, a clock signal is input to the abnormality detection circuit 43 a predetermined time before the turn-off.

  On the other hand, when the operating frequency is high, the ON time of the switching element Q2 is shortened, and the triangular wave voltage does not exceed the reference voltage Vref2, so that the output of the operating frequency determination circuit 46 is always “L” and The abnormality detection operation is stopped by stopping the clock signal.

  Since the peak voltage of the frequency determination signal decreases as the operating frequency is high and the on-time is shortened, if the reference voltage Vref2 is set to be substantially the same as the peak value of the triangular wave voltage when the operating frequency matches f0, When the operating frequency exceeds f0, the operation of the abnormality detection circuit 43 can be stopped.

  In addition, since the operations of the abnormality detection circuit 43 and the oscillation stop circuit 44 are the same as those in the conventional example, redundant description is omitted.

  FIG. 5 shows a circuit diagram of the control circuit of the second embodiment. The configuration of the main circuit is the same as in FIG. 13, and the terminals a to d in FIG. 5 are connected to the terminals a to d in FIG. In the circuits of FIGS. 1 and 2, the operation of the abnormality detection circuit 43 is stopped when the operating frequency of the inverter circuit 2 is within a predetermined range. In this embodiment, however, the operation is constant after the switching element Q2 is turned on. By adding a comparison between the switching current after the time and a predetermined reference value, the accuracy of the phase determination of the resonance current is improved.

  The operation of the circuit of FIG. 5 will be described in detail with reference to the time charts of FIGS. When the resonance current is flowing at a slow phase, the resonance current immediately after the switching element Q2 is turned on flows through the switching element Q2 via the parasitic diode regardless of the operating frequency, and thus is generated in the resistance R1 for detecting the switching current. The polarity of the voltage is always negative. On the other hand, since the polarity of the voltage generated in the resistor R1 is positive when the resonance current is in phase, the polarity of the voltage generated in the resistor R1 immediately after the switching element Q2 is turned on is determined. Similarly, if the polarity of the resonance current immediately before the turn-off is determined, the phase of the resonance current can be determined more accurately.

  Here, a triangular wave voltage synchronized with the drive signal of the switching element Q2 is generated, and the voltage is compared with the reference voltage Vref2 by the comparator COMP2, thereby generating a timing signal after a predetermined time from the turn-on of the switching element Q2. . This timing signal is input to the clock terminal CLK of the flip-flop IC9 as a clock signal. The method for generating the triangular wave is the same as the method shown in the first embodiment.

  The output of the comparator COMP3 is connected to the data input terminal D of the flip-flop IC9, the voltage of the resistor R1 is input to the non-inverting input terminal of the comparator COMP3, and this voltage is input to the inverting input terminal. This is compared with the voltage Vref3. When the resonance current is delayed, the output of the comparator COMP3 is “L” at the timing when the clock of the flip-flop IC9 is input. Therefore, the output of the flip-flop IC9 is also “L” and the counter IC3 is reset. The When the resonance current is advanced, the output of the flip-flop IC9 becomes “H”. Further, as in the conventional example, when the polarity of the switching current at the timing immediately before the switching element Q2 is turned off is negative, the output of the flip-flop IC9 at this timing is also “H”. When the counter IC 3 counts up and determines that the phase is advanced four times in succession, the output of the abnormality detection circuit 43 becomes “H”, and the input signal to the drive circuit 41 is fixed to “L”. Stop circuit operation.

  With such a circuit configuration, the operating frequency of the inverter circuit 2 is large, and the polarity of the switching current after turn-on is negative even if the voltage across the resistor R1 just before the switching element Q2 is turned off does not reach the reference value Vref1. Therefore, since the counter IC3 is continuously reset by the flip-flop IC9, the erroneous determination of the phase of the resonance current as in the conventional case can be prevented.

  In this embodiment, the reference values Vref1 and Vref3 for determining the polarity of the switching current immediately after the turn-on and immediately before the turn-off are provided separately. However, as shown in FIG. Since it can be expected and the number of comparators COMP3 can be reduced, it can be realized with an easier circuit configuration.

  FIG. 3 shows a circuit diagram of a control circuit according to a third embodiment of the present invention. The configuration of the main circuit is the same as in FIG. 13, and the terminals a to d in FIG. 9 are connected to the terminals a to d in FIG. In the second embodiment, the polarity of the switching current after a certain time from the turn-on is determined. Here, the peak current of the switching current is compared with a predetermined reference value, and the peak value of the resonance current is less than the predetermined value. Sometimes, the operation of the abnormality detection circuit 43 is stopped so that there is no error in the phase determination of the resonance current. In the second embodiment, a circuit for generating a timing signal after turn-on is necessary. However, in this embodiment, it is only necessary to compare the peak values of the currents. I have to.

  The output of the comparator COMP1 is input to the flip-flop IC2, and is also input to the clock terminal CLK of the flip-flop IC11. The reset terminal R of the flip-flop IC11 receives the signal of the delay circuit 45, and the data input terminal D is pulled up to the control power source Vcc via the resistor R12. Therefore, the output of the flip-flop IC11 outputs “H” until the switching element Q2 is turned off after the voltage of the resistor R1 exceeds the reference voltage Vref1, and the voltage of the resistor R1 does not reach the reference voltage Vref1. Always outputs “L”. The output of the flip-flop IC11 is input to the NAND element IC8 together with the output of the oscillation circuit 42, and the output is input to the clock terminal CLK of the flip-flop IC2. Therefore, the clock signal of the flip-flop IC2 is input at the falling timing of the oscillation circuit 41 only when the voltage of the resistor R1 exceeds the reference voltage Vref1, and the flip-flop when the voltage of the resistor R1 does not reach the reference voltage Vref1. Since no clock signal is input to the IC 2, the operation of the abnormality detection circuit 43 is stopped.

  According to this circuit configuration, when the operating frequency of the inverter circuit 2 is large and the resonance current is small, the clock signal of the flip-flop IC2 is stopped and the operation of the abnormality detecting circuit 43 is stopped. The effect can be expected.

  In this embodiment, the peak value detection of the resistor R1 and the reference voltage for polarity determination immediately before turn-off are the same. However, as shown in FIG. 12, a separate comparator COMP3 may be provided to set different reference values. good.

  INDUSTRIAL APPLICABILITY The present invention can be used for a discharge lamp lighting device that converts a DC voltage obtained by rectifying and smoothing a commercial power source into a high-frequency voltage using an inverter circuit and starts and lights the discharge lamp using a resonance circuit.

It is a circuit diagram which shows the basic composition of this invention. It is a circuit diagram of the control circuit of Example 1 of the present invention. It is an operation | movement waveform diagram at the time of normal load and abnormal load of Example 1 of this invention. It is an operation | movement waveform diagram at the time of the output variable of Example 1 of this invention. It is a circuit diagram of the control circuit of Example 2 of the present invention. It is an operation | movement waveform diagram at the time of normal load and abnormal load of Example 2 of this invention. It is an operation | movement waveform diagram at the time of the output variable of Example 2 of this invention. It is a circuit diagram which shows the modification of the control circuit of Example 2 of this invention. It is a circuit diagram of the control circuit of Example 3 of the present invention. It is an operation waveform diagram at the time of normal load and abnormal load of Example 3 of the present invention. It is an operation | movement waveform diagram at the time of the output variable of Example 3 of this invention. It is a circuit diagram which shows the modification of the control circuit of Example 3 of this invention. It is a circuit diagram of the main circuit of a prior art example. It is a circuit diagram of the control circuit of a prior art example. It is a frequency characteristic figure of the resonance circuit of a prior art example. It is an operation | movement waveform diagram of the resonance circuit of a prior art example. It is an operation waveform diagram at the time of normal load and abnormal load of the conventional example. It is an operation | movement waveform diagram at the time of the output variable of a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Rectification circuit 2 Inverter circuit 3 Resonance circuit 4 Control circuit 5 Resonance current detection circuit La Load 43 Abnormality detection circuit 44 Oscillation stop circuit 46 Operating frequency determination circuit

Claims (6)

DC power supply that outputs DC voltage;
An inverter circuit connected to the DC power supply, having at least one switching element, and converting the DC voltage output from the DC power supply into a high-frequency voltage by repeatedly turning on and off the switching element;
A resonance circuit composed of at least one inductor and at least one capacitor connected to the inverter circuit and supplying high frequency power supplied from the inverter circuit to a load;
A control circuit for controlling the power supplied to the load by changing the on / off time of the switching element;
A resonance current detection circuit for detecting a resonance current flowing through the resonance circuit;
An abnormality of the resonance circuit is detected based on the polarity of the resonance current detected by the resonance current detection circuit after a predetermined delay time from the time when the control circuit turns on the switching element of the inverter circuit, and when the resonance current is abnormal, the inverter An abnormality detection circuit that protects the power supply device by limiting the output of the circuit, and the control circuit stops the operation of the abnormality detection circuit when the operating frequency for turning on / off the switching element is within a predetermined range A power supply device characterized by that. 2. The power supply device according to claim 1, wherein an operation frequency at which the control circuit stops the operation of the abnormality detection circuit is a frequency higher than a natural vibration frequency of the resonance circuit when there is no load. DC power supply that outputs DC voltage;
An inverter circuit connected to the DC power supply, having at least one switching element, and converting the DC voltage output from the DC power supply into a high-frequency voltage by repeatedly turning on and off the switching element;
A resonance circuit composed of at least one inductor and at least one capacitor connected to the inverter circuit and supplying high frequency power supplied from the inverter circuit to a load;
A control circuit for controlling the power supplied to the load by changing the on / off time of the switching element;
A resonance current detection circuit for detecting a resonance current flowing through the resonance circuit;
Detecting an abnormality of the resonance circuit by comparing the resonance current detected by the resonance current detection circuit with a predetermined reference value after a predetermined delay time from the time when the control circuit turns on the switching element of the inverter circuit; When the resonance current is abnormal, it has an abnormality detection circuit that protects the power supply device by limiting the output of the inverter circuit. The resonance current detection circuit stops the operation of the abnormality detection circuit when the resonance current is below a predetermined value. A power supply device characterized by that. The resonance current detection circuit includes a resonance current determination circuit that compares a resonance current after a predetermined time after the switching element is turned on with a predetermined reference value, and the abnormality is detected when the resonance current is equal to or lower than the predetermined reference value. The power supply apparatus according to claim 3, wherein the operation of the detection circuit is stopped. The resonance current detection circuit has a resonance current determination circuit that compares the peak value of the resonance current with a predetermined reference value, and stops the operation of the abnormality detection circuit when the peak value of the resonance current is equal to or less than the predetermined reference value. The power supply device according to claim 3. The power supply apparatus according to claim 5, wherein a reference value of the resonance current determination circuit is the same as a reference value of the abnormality detection circuit.

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