JP2005050845A - High temperature superconducting joint having shunt resistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high temperature superconducting joint having a shunt resistor in which stabilized operation of a superconducting circuit employing a ramp edge joint can be realized. <P>SOLUTION: A conductive intermediate layer 3 is provided between the ramp ride-over part 5 of an upper electrode 4 and a lower electrode 2 constituting a ramp edge joint employing an oxide superconductor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-temperature superconducting junction device having a shunt resistance. For example, a high-temperature superconducting single flux quantum (communication router, server, AD converter, sampler, etc.) used in the fields of communication, computer, and measurement ( The present invention relates to a high-temperature superconducting junction device having a shunt resistance characteristic of a configuration for driving a ramp edge type superconducting junction constituting an SFQ (Single Flux Quantum) circuit at an optimum critical current density.
[0002]
[Prior art]
In recent years, high-temperature oxide superconductors typified by yttrium-based superconductors exhibit a superconducting state at a temperature higher than the liquid nitrogen temperature, and therefore have a cooling mechanism compared to conventional metal-based superconductors that require cooling with liquid He. Therefore, various applications to sensors, logic circuits, and the like are expected (see, for example, Patent Document 1).
[0003]
Since such an oxide high-temperature superconductor has a property that a superconducting current easily flows along a Cu-O plane composed of Cu and O in a crystal, it is parallel to the Cu-O plane. A structure in which the junction crosses in the direction is desirable. For this reason, a lamp edge junction has been proposed as a superconducting junction used in a high-temperature superconducting device.
[0004]
As such a ramp edge junction, there are known a type in which a barrier layer is formed of a deposited film and a type in which the surface is modified by ion implantation to form a barrier layer (for example, Patent Document 2). The surface-modified lamp edge bonding will be described with reference to FIG.
[0005]
Refer to FIG.
FIG. 13A is a schematic perspective view of a conventional surface-modified lamp edge junction. First, a La-doped YBCO (YBa) is formed on a MgO substrate 51 by using a pulse laser deposition method.₂Cu₃O_7-x) And SrSnO serving as an interlayer insulating film₃After sequentially depositing the insulating layer 53, a resist is applied, patterned by exposure and development to form a resist pattern (not shown), and then irradiated with Ar ions using the resist pattern as a mask. A lamp edge structure is formed by performing ion milling.
[0006]
Next, Ar ions are irradiated again to form a damage layer 54 at the lamp edge portion to form a barrier layer. Then, an upper electrode 55 made of YBCO is deposited again using a pulse laser deposition method, and then ion milling is performed. By forming the ramp overpass portion 56, the basic configuration of the ramp edge joining is completed.
[0007]
Refer to FIG.
FIG. 13B is a current-voltage characteristic diagram of the lamp edge junction, and shows a characteristic called an overdump type as shown in the figure. Unlike the Nb superconducting junction operated at a low temperature, the hysteresis in the current-voltage characteristic is shown in FIG. Is sufficiently small.
[0008]
Among the superconducting circuits configured using such a ramp edge junction, the single flux quantum (SFQ) circuit has a feature that it operates at an ultra-high speed and low energy, and is a high-temperature superconductor and an SFQ circuit. In a superconducting loop including a ramp edge junction existing in a circuit, that is, a Josephson junction, the inductance L of the loop and the critical current value I of the Josephson junction are designed._cProduct (L × I_cProduct) is 1 quantum flux Φ₀Or Φ₀It is necessary to design to satisfy the condition of / 2.
[0009]
In this case, the critical current density J of the junction used in the SFQ circuit_cIncreases the critical current I_cAnd normal resistance R_nProduct of I and I_c・ R_nProduct increases, τ = Φ₀/ I_c・ R_n(Φ₀= 2.07 × 10^-15It is said that the width of the SFQ pulse given by wb) becomes smaller, and higher speed operation becomes possible.
[0010]
In this case, as described above, since the hysteresis in the current-voltage characteristics of the ramp edge junction is sufficiently small, the ramp edge junction is used as it is for fabricating the SFQ circuit, and the structure shunted by the resistor at the ramp edge junction is completely studied. It wasn't.
[0011]
[Patent Document 1]
JP 2000-353831 A
[Patent Document 2]
JP 2001-244511 A
[0012]
[Problems to be solved by the invention]
However, as a result of diligent research by the inventor, the critical current density J_cAs the hysteresis increases, the phenomenon that the hysteresis also increases becomes prominent. This increase in hysteresis tends to reduce the bias margin of the SFQ circuit. If the hysteresis exceeds 10%, the circuit operation becomes difficult and the circuit becomes complicated. It became clear that it became impossible to operate.
[0013]
See FIG.
FIG. 14 shows the I of a conventional high-temperature superconducting lamp edge junction._c・ R_nCritical current density J of product and hysteresis_cIt is explanatory drawing of dependence, I_c・ R_nThe product is the critical current density J_cIs proportional to the power of 0.3 (I_c・ R_n∝J_c ^0.3).
[0014]
In addition, the McCamber parameter β, which is one of the indexes representing hysteresis_cIs
β_c∝J_c ^0.3/ [Ln (a) -ln (J_c)]
Where hysteresis is the critical current density J_cAs it increases, it increases rapidly.
Here, ln means logarithm, a is a physical quantity including the barrier height of the junction,
a = (4πε₀ε_r/ H) x (2mφ)^1/2
It is represented by
Where ε_rIs the barrier dielectric constant, m is the electron mass, and φ is the barrier height.
[0015]
Therefore, an object of the present invention is to enable a stable operation of a superconducting circuit using a lamp edge junction.
[0016]
[Means for Solving the Problems]
FIG. 1 is a block diagram showing the principle of the present invention, and FIGS. 2 and 3 show critical current densities J of SFQ pulse widths._cFIG. 4 is a diagram illustrating the dependency, and FIG. 4 illustrates the critical current density J of the shunt resistance value that makes the hysteresis zero._cIt is explanatory drawing of dependence, The means for solving the subject in this invention is demonstrated with reference to this FIG. 1 thru | or FIG.
In addition, the code | symbol 6 in a figure is a barrier layer.
See Figure 1
In order to achieve the above object, the present invention provides a high temperature superconducting junction device having a shunt resistance, wherein the lamp overpass portion 5 and the lower electrode 2 of the upper electrode 4 constituting the lamp edge junction using the oxide superconductor. A conductive intermediate layer 3 is provided between the two.
[0017]
In this way, by providing the conductive intermediate layer 3 between the lamp crossing portion 5 of the upper electrode 4 and the lower electrode 2 and shunting the lamp edge junction, the hysteresis is reduced and ideally zero. Thus, a stable operation of a superconducting junction circuit such as an SFQ circuit becomes possible.
[0018]
Also, the hysteresis is zero with the shunt resistance, that is, the McCamber parameter β_cIs maintained at 1, the critical current density J_cSince there is an optimum value that makes the circuit operation the fastest, the critical current density J_cBy optimizing, higher speed operation becomes possible.
[0019]
See Figure 2
FIG. 2 shows the critical current density J of SFQ pulse width at 4.2K._cIt is explanatory drawing of dependence and shunt resistance R_sIs not provided, the SFQ pulse width is the critical current density J_cDecreases with increasing, but β_c= 1, the critical current density J at which the SFQ pulse width is minimized_cIs understood to exist.
That is, the optimum critical current density J for high-speed operation_cWill exist.
[0020]
See Figure 3
FIG. 3 shows the critical current density J of SFQ pulse width at 30K._cIt is explanatory drawing of dependence and shunt resistance R_sIs not provided, the SFQ pulse width is the critical current density J_cDecreases with increasing, but β_c= 1, the critical current density J at which the SFQ pulse width is minimized_cAnd the critical current density J_cIt is understood that the SFQ pulse width increases rapidly as the value increases.
[0021]
See Figure 4
Figure 4 shows zero hysteresis (β_c= 1) Critical current density J of shunt resistance value_cIt is explanatory drawing of dependence, and the shunt resistance value which makes a hysteresis zero is critical current density J_cAs the temperature increases, the reduction rate increases.
[0022]
As described above, when the conductive intermediate layer 3 is provided between the lamp overpassing portion 5 of the upper electrode 4 and the lower electrode 2, the conductive intermediate layer 3 is projected onto the lamp overpassing portion 5 of the upper electrode 4. By using the same shape, the shunt resistance value can be set with high accuracy.
[0023]
Further, as a configuration for shunting the lamp edge junction, the ramp edge junction is provided between the ramp-over portion 5 of the upper electrode 4 and the lower electrode 2 along a slope opposite to the junction surface of the interlayer insulating layer and the upper electrode 4. It is possible to connect with a resistance layer, and various materials can be selected as the shunt resistance.
[0024]
Alternatively, a flat structure in which the lamp crossing portion 5 of the upper electrode 4 and the interlayer insulating layer are removed is formed, and the planarized upper electrode 4 and lower electrode 2 are connected by a resistance layer and shunted. In addition, the resistance value can be controlled by the thickness of the resistance layer, and the contact area can be increased to reduce the contact resistance.
[0025]
The resistance layer in the above case is preferably composed of Pd having a resistivity suitable as a shunt resistor.
Pd is a noble metal and has excellent oxidation resistance.
[0026]
Alternatively, the resistance layer may be made of a conductive material whose oxide is an insulator, for example, Ti which is used as a resistance in a conventional superconducting circuit, thereby improving controllability.
In order to reduce the contact resistance, it is necessary to provide a buffer layer between the resistance layer and the upper electrode 4 and the lower electrode 2.
[0027]
Furthermore, the lamp edge junction may be shunted by using a conductive material as a base for forming the lamp edge junction using the oxide superconductor. This is an advantageous structure when forming a wiring layer.
[0028]
In this case, it is desirable that the conductive base is shaped to match the lamp edge joint portion and provided on the insulating substrate 1, and is particularly necessary when various circuits are manufactured.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Here, with reference to FIG. 5, the surface-modified lamp edge bonding according to the first embodiment of the present invention will be described.
See Figure 5
FIG. 5 is a schematic perspective view of the lamp edge bonding according to the first embodiment of the present invention. First, the thickness is formed on the MgO substrate 11 using a laser deposition method (PLD: Pulse Laser Deposition). For example, 200 nm La-doped YBCO (YBa₂Cu₃O_7-x) And a Nb-doped SrTiO having a thickness of, for example, 300 nm₃A conductive intermediate layer 13 is sequentially deposited.
This Nb-doped SrTiO₃The Nb doping amount in is set to 0.001 wt%.
[0030]
Next, Ar ions are irradiated using the resist pattern (not shown) as a mask to pattern the lower electrode 12 and the conductive intermediate layer 13 into a predetermined shape, and Ar ions are then used as a new resist pattern (not shown) as a mask. The conductive intermediate layer 13 is further patterned into a predetermined shape by irradiation.
[0031]
Next, using a new resist pattern (not shown) as a mask, Ar ions are irradiated from an oblique direction, thereby etching the exposed portions of the conductive intermediate layer 13 and the lower electrode 12 to form the ramp inclined surface 14. .
[0032]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0033]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. By using the upper electrode 16 having the lamp crossing portion 17, the basic structure of the lamp edge bonding is completed.
[0034]
At this time, the size of the ramp overpass 17 is, for example, 5 μm wide and 3 μm long.
Further, since the deposition temperature of YBCO is lower than that of La-doped YBCO, the influence of the deposition process of the upper electrode 16 on the already formed configuration of the lower electrode 12 and the like can be reduced.
[0035]
As described above, in the first embodiment of the present invention, the shunt resistor is configured only by changing the interlayer insulating film in the conventional lamp edge structure to the conductive intermediate layer. Without changing to, the hysteresis becomes zero and stable circuit operation becomes possible.
[0036]
Also, the critical current density J at which the SFQ pulse width is minimized_cThe superconducting circuit can be operated at high speed by applying.
[0037]
Note that the magnitude of the shunt resistance in the first embodiment of the present invention is controlled by the conductivity of the conductive intermediate layer 13, the layer thickness, the size of the lamp overpass 17 and the like.
However, the resistance material selection range is narrow and suitable for high-resistance shunts.
[0038]
Next, with reference to FIG. 6, a surface-modified lamp edge junction according to a second embodiment of the present invention will be described.
See FIG.
FIG. 6 is a schematic perspective view of a lamp edge junction according to the second embodiment of the present invention. First, a La-doped YBCO having a thickness of, for example, 200 nm is formed on the MgO substrate 11 by using the PLD method. (YBa₂Cu₃O_7-x) And a conductive intermediate layer 18 made of ITO having a thickness of 300 nm, for example, are sequentially deposited.
The amount of Sn doping in this ITO is 0.001 wt%.
[0039]
Next, Ar ions are irradiated using the resist pattern (not shown) as a mask to pattern the lower electrode 12 and the conductive intermediate layer 18 into a predetermined shape, and Ar ions are then used as a new resist pattern (not shown) as a mask. By irradiating from an oblique direction, the exposed portions of the conductive intermediate layer 18 and the lower electrode 12 are etched to form the ramp inclined surface 14.
[0040]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0041]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. By using the upper electrode 16 having the lamp crossing portion 17, the basic structure of the lamp edge bonding is completed.
At this time, the size of the ramp overpass 17 is, for example, 5 μm wide and 3 μm long.
[0042]
Subsequently, the exposed portion of the conductive intermediate layer 18 made of ITO is etched away by irradiation with Ar ions.
At this time, since the milling rate of ITO is very large, patterning can be performed without damaging the lower electrode 12 and the like.
[0043]
In this way, in the second embodiment of the present invention, the shape of the conductive intermediate layer 18 is projected in the same manner as the shape of the lamp crossing portion 17 in a projective manner. The resistance value of the shunt resistor consisting of 18 can be set more accurately.
[0044]
Next, with reference to FIG. 7, a surface-modified lamp edge junction according to a third embodiment of the present invention will be described.
See FIG.
FIG. 7 is a schematic perspective view of a lamp edge junction according to the third embodiment of the present invention. First, a La-doped YBCO having a thickness of, for example, 200 nm is formed on the MgO substrate 11 by using the PLD method. (YBa₂Cu₃O_7-x) And a SrSnO having a thickness of, for example, 300 nm₃An interlayer insulating film 19 made of is sequentially deposited.
This SrSnO₃Has good crystal matching with YBCO, and cracks are less likely to occur compared to other interlayer insulating films, resulting in excellent insulation and flatness.
[0045]
Next, Ar ions are irradiated using a resist pattern (not shown) as a mask to pattern the lower electrode 12 and the interlayer insulating film 19 into a predetermined shape, and then Ar ions are obliquely used using a new resist pattern (not shown) as a mask. By irradiating from the direction, the exposed portion of the interlayer insulating layer 19 and the lower electrode 12 is etched to form the ramp inclined surface 14.
[0046]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0047]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. By using the upper electrode 16 having the lamp crossing portion 17, the basic structure of the lamp edge bonding is completed.
[0048]
Subsequently, SrSnO is irradiated by irradiating Ar ions.₃The exposed portion of the interlayer insulating film 19 made of is removed by etching.
At this time, on the side opposite to the ramp inclined surface 14, the inclined surface 20 is formed by irradiating Ar ions from an oblique direction.
[0049]
Next, by using a mask vapor deposition method using a metal mask, the thickness of the resistor layer 21 made of Pd having a thickness of, for example, 100 nm is extended along the inclined surface 20 so that the lamp crossing portion 17 and the lower electrode 12 become contact portions. As a result, a lamp edge junction having a shunt resistor is completed.
[0050]
As described above, in the third embodiment of the present invention, the shunt resistor is formed by the resistor layer pattern. Therefore, various materials can be selected as the resistor material, which is particularly suitable when it is desired to combine with a small resistance. It becomes.
In this case, since Pd is a noble metal, it is excellent in oxidation resistance and has a resistivity that is about an order of magnitude higher than that of Au, which is the same noble metal, and thus is suitable as a resistance material.
[0051]
Next, a surface-modified lamp edge junction according to a fourth embodiment of the present invention will be described with reference to FIG. 8, except that the configuration of the shunt resistor is different from that of the third embodiment. Since they are similar, only the differences will be described.
See FIG.
FIG. 8 is a schematic perspective view of a lamp edge junction according to the fourth embodiment of the present invention.₃The exposed portion of the interlayer insulating film 19 is etched away, and the inclined surface 20 is formed on the opposite side of the ramp inclined surface 14, and then the thickness is, for example, 50 nm using a mask vapor deposition method using a metal mask. The contact layers 22 and 23 made of Au are formed.
[0052]
Next, by using a mask vapor deposition method using a new metal mask, a resistance layer 24 made of Ti having a thickness of, for example, 100 nm is in contact with the contact layers 22 and 23 and is provided along the inclined surface 20 to provide a shunt. A lamp edge junction with resistance is completed.
[0053]
Thus, in the fourth embodiment of the present invention, Ti, which is widely used as a resistance material in the conventional superconducting circuit field, is used, so that controllability is improved and a shunt resistance of several Ω is achieved. It is suitable as.
However, since Ti is easily oxidized, it is necessary to provide contact layers 22 and 23 made of a noble metal such as Au as described above to suppress an increase in contact resistance.
[0054]
Next, with reference to FIG. 9, a surface-modified lamp edge junction according to a fifth embodiment of the present invention will be described.
See FIG.
FIG. 9 is a schematic perspective view of the lamp edge junction according to the fifth embodiment of the present invention. First, a La-doped YBCO having a thickness of, for example, 200 nm is formed on the MgO substrate 11 by using the PLD method. (YBa₂Cu₃O_7-xThe lower electrode 12 is deposited.
[0055]
Next, using the resist pattern (not shown) as a mask, Ar ions are irradiated to pattern the lower electrode 12 into a predetermined shape, and at one end, Ar ions are irradiated from an oblique direction to form the ramp inclined surface 14. .
[0056]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0057]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. An upper electrode 16 having a lamp overpass (not shown) is formed.
[0058]
Then Al₂O₃The surface is flattened by polishing until the ramp overpass formed on the lower electrode 12 is completely removed by a mechanical polishing method using particles.
[0059]
Next, a lamp edge having a shunt resistance is provided by providing a resistance layer 21 made of Pd having a thickness of, for example, 100 nm so as to straddle the lower electrode 12 and the upper electrode 16 using a mask vapor deposition method using a metal mask. Joining is complete.
[0060]
Thus, in the fifth embodiment of the present invention, the resistance value can be controlled by the thickness of the resistance layer 21 and the contact area can be increased to reduce the contact resistance.
[0061]
Next, a surface-modified lamp edge junction according to a sixth embodiment of the present invention will be described with reference to FIG. 10, except that the configuration of the shunt resistor is different from that of the fifth embodiment. Since they are similar, only the differences will be described.
See FIG.
FIG. 10 is a schematic perspective view of a lamp edge joint according to the sixth embodiment of the present invention.₂O₃By polishing until the ramp overpass formed on the lower electrode 12 is completely removed by mechanical polishing using particles, the surface is flattened, and then using a mask vapor deposition method using a metal mask, For example, contact layers 25 and 26 made of Ag having a thickness of 50 nm are formed.
[0062]
Next, by using a mask vapor deposition method using a new metal mask, a resistance layer 24 made of Ti having a thickness of, for example, 100 nm is brought into contact with the contact layers 25 and 26 and extends over the lower electrode 12 and the upper electrode 16. As a result, a lamp edge junction having a shunt resistor is completed.
[0063]
Thus, in the sixth embodiment of the present invention, Ti, which is widely used as a resistance material in the conventional superconducting circuit field, is used, as in the fourth embodiment. It is suitable as a shunt resistance of several ohms.
[0064]
Next, with reference to FIG. 11, a surface-modified lamp edge bonding according to a seventh embodiment of the present invention will be described.
See FIG.
FIG. 11 is a schematic perspective view of a lamp edge junction according to a seventh embodiment of the present invention. First, Nb-doped SrTiO doped with 0.001 wt% Nb is shown.₃For example, a La-doped YBCO (YBa) having a thickness of 200 nm is formed on the conductive substrate 27 made of₂Cu₃O_7-x) And a SrSnO having a thickness of, for example, 300 nm₃An interlayer insulating film 19 made of is sequentially deposited.
[0065]
Next, Ar ions are irradiated using the resist pattern (not shown) as a mask to pattern the lower electrode 12 and the interlayer insulating film 19 into a predetermined shape, and then Ar ions are irradiated using a new resist pattern (not shown) as a mask. Then, the interlayer insulating film 19 is further patterned into a predetermined shape.
[0066]
Next, by using a new resist pattern (not shown) as a mask, Ar ions are irradiated from an oblique direction, thereby etching the exposed portions of the interlayer insulating film 19 and the lower electrode 12 to form the ramp inclined surface 14.
[0067]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0068]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. By using the upper electrode 16 having the lamp overpass 17, a lamp edge junction having a shunt resistance is completed.
At this time, the size of the ramp overpass 17 is, for example, 5 μm wide and 3 μm long.
[0069]
In the seventh embodiment, only the substrate is changed, and other configurations are the same as the conventional one. Therefore, a lamp edge junction having a shunt resistor is manufactured without changing the entire configuration and the manufacturing process. Therefore, the configuration is suitable when a ground plane or a wiring layer is formed on the upper part of the junction.
[0070]
Note that the shunt resistance value in this case needs to be determined by the thickness of the conductive substrate 27 and the doping amount, and the range of material selection becomes narrow as in the first embodiment.
In the case of a high-frequency signal, the current path is interrupted by the impedance, so that the current flows only in the adjacent region and does not spread and spread.
[0071]
Next, with reference to FIG. 12, the surface-modified lamp edge bonding according to the eighth embodiment of the present invention will be described. The basic concept is the same as that of the seventh embodiment. In the seventh embodiment, since the substrate is conductive and the circuit configuration is limited, a conductive layer constituting a shunt resistor is provided as an island region on the insulating substrate.
[0072]
See FIG.
FIG. 12 is a schematic perspective view of a lamp edge junction according to an eighth embodiment of the present invention. First, Sn having a thickness of, for example, 100 nm is 1 wt% on the MgO substrate 11 using the PLD method. After the conductive layer 28 made of doped ITO is deposited, the island pattern is patterned by irradiating Ar ions using a resist pattern (not shown) as a mask.
[0073]
Next, again using the PLD method, a La-doped YBCO (YBa with a thickness of, for example, 200 nm is used.₂Cu₃O_7-x) And a SrSnO having a thickness of, for example, 300 nm₃An interlayer insulating film 19 made of is sequentially deposited.
[0074]
Next, Ar ions are irradiated using a resist pattern (not shown) as a mask to pattern the lower electrode 12 and the interlayer insulating film 19 into a predetermined shape so that a part of the conductive layer 28 is exposed at least on one end side. The interlayer insulating film 19 is further patterned into a predetermined shape by irradiating Ar ions with a resist pattern (not shown) as a mask.
[0075]
Next, using the new resist pattern (not shown) exposing one end side as a mask, Ar ions are irradiated from an oblique direction, thereby etching the exposed portions of the interlayer insulating film 19 and the lower electrode 12 and ramp inclination. Surface 14 is formed.
[0076]
Next, after removing the resist pattern, the damage layer 15 is formed on the ramp inclined surface 14 by irradiating Ar ions from the direction perpendicular to the substrate surface.
[0077]
Next, the upper electrode 16 made of YBCO having a thickness of, for example, 200 nm is deposited on the entire surface using the PLD method, and then irradiated with Ar ions using a resist pattern (not shown) as a mask. By using the upper electrode 16 having the lamp overpass 17, a lamp edge junction having a shunt resistance is completed.
At this time, the size of the ramp overpass 17 is, for example, 5 μm wide and 3 μm long.
[0078]
In the eighth embodiment, since the shunt resistor is constituted by the conductive layer 28 made of an island-like region, various arbitrary circuits are constituted even when a ground plane or a wiring layer is formed on the upper part of the junction. It becomes possible to do.
[0079]
Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made.
For example, in each of the above-described embodiments, the lamp edge bonding is described as the surface-modified bonding, but the present invention is not limited to the surface-modified bonding, and a lamp edge of a type in which the barrier layer is configured by deposition. Needless to say, this also applies to bonding.
The barrier layer in this case is PBCO, that is, PrBa.₂Cu₃O_7-XAnd CeBa₂Cu₃O_7-XOr the like.
[0080]
In each of the above-described embodiments, the lower electrode is made of La-doped YBCO, that is, La-doped YBa, because of the film formation temperature.₂Cu₃O_7-XThe upper electrode is YBCO, but both may be composed of the same La-doped YBCO or YBCO.
[0081]
Furthermore, the lower electrode and the upper electrode are not limited to La-doped YBCO or YBCO.₂Cu₃O_7-XMay be used.
REBa₂Cu₃O_7-XRE is a lanthanoid element other than Pr and Ce, and these are included in a ratio of RE: Ba: Cu = 1: 2: 3 alone or in combination.
[0082]
In each of the above embodiments, SrSnO having excellent insulating properties and flatness as an interlayer insulating film.₃SrSnO₃Is not limited to LSAT, ie, [LaAlO₃]_0.3[Sr (Al, Ta) O₃]_0.7, MgO, CeO₂Or SrTiO₃Etc. may be used.
[0083]
In the first and seventh embodiments, the Nb-doped SrTiO is used as the conductive intermediate layer or the conductive substrate.₃Nb-doped SrTiO₃The material is not limited to ITO, and ITO may be used.
[0084]
In the second and eighth embodiments, ITO having a high ion milling rate is used as the conductive intermediate layer or conductive layer. However, the present invention is not limited to ITO, and Nb-doped SrTiO.₃May be used.
[0085]
In the fourth embodiment, Au is used as the contact layer, and in the sixth embodiment, Ag is used as the contact layer. However, whether Au or Ag is used is arbitrary. .
[0086]
In each of the above embodiments, MgO is used as the insulating substrate. However, the present invention is not limited to MgO. LSAT, that is, [LaAlO₃]_0.3[Sr (Al, Ta) O₃]_0.7Or SrTiO₃Etc. may be used.
[0087]
In each of the above embodiments, the YBCO film and SrSnO₃Although the laser vapor deposition method is used for the deposition, the method is not limited to the laser vapor deposition method, and a sputtering method may be used.
[0088]
In each of the above embodiments, Ar ions are irradiated to form a damage layer. However, the present invention is not limited to Ar ions, and other rare gas ions such as Ne, Kr, and Xe are irradiated. You can do it.
[0089]
In each of the above embodiments, the application of a superconducting junction circuit using a lamp edge junction having a shunt resistor is not mentioned, but a communication router, server, AD converter, flux meter (SQUID), sampler, etc. It is used in each field of communication, computer, and measurement.
[0090]
Here, the detailed features of the present invention will be described again with reference to FIG.
Again see Figure 1
(Additional remark 1) The shunt characterized by providing the electroconductive intermediate | middle layer 3 between the lamp | ramp crossing part 5 and the lower electrode 2 of the upper electrode 4 which comprises the lamp edge junction using an oxide superconductor. A high-temperature superconducting bonding apparatus having resistance
(Supplementary note 2) The high-temperature superconductivity having a shunt resistance according to Supplementary note 1, wherein the conductive intermediate layer 3 is processed into the same shape as the projection 5 of the upper electrode 4 over the lamp. Joining device.
(Supplementary Note 3) Between the lamp crossing portion 5 and the lower electrode 2 of the upper electrode 4 constituting the lamp edge junction using the oxide superconductor, the side opposite to the junction surface of the interlayer insulating layer and the upper electrode 4 A high-temperature superconducting bonding apparatus having a shunt resistance, characterized in that it is connected by a resistance layer provided along the slope.
(Supplementary Note 4) The lamp edge junction using the oxide superconductor is constituted by a flat structure in which the lamp crossing portion 5 and the interlayer insulating layer of the upper electrode 4 are removed, and the flattened upper electrode 4 and lower electrode A high-temperature superconducting bonding apparatus having a shunt resistance, wherein a resistance layer is connected between the two.
(Additional remark 5) The said resistance layer is comprised from Pd, The high temperature superconducting joining apparatus which has the shunt resistance of Additional remark 3 or 4 characterized by the above-mentioned.
(Additional remark 6) While the said resistance layer is comprised from the electrically-conductive material from which the oxide becomes an insulator, the buffer layer for reducing contact resistance between the said resistance layer, the upper electrode 4, and the lower electrode 2 is provided. 5. A high-temperature superconducting bonding apparatus having a shunt resistance according to appendix 3 or 4, characterized by being provided.
(Appendix 7) A high-temperature superconducting bonding apparatus having a shunt resistance, characterized in that a conductive material is used as a base for forming a lamp edge junction using an oxide superconductor.
(Supplementary note 8) The high-temperature superconductivity having a shunt resistance according to Supplementary note 7, wherein the conductive base is shaped to match the lamp edge joint portion and provided on the insulating substrate 1 Joining device.
[0091]
【The invention's effect】
According to the present invention, since the lamp edge junction made of an oxide superconductor is shunted using a shunt resistor, the superconducting junction capable of high-speed operation of 20 GHz or more, which is useful in each field of communication, computer, and measurement. It is possible to provide a high-temperature superconducting circuit device.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is an explanatory diagram of dependency of SFQ pulse width on critical current density at 4.2K.
FIG. 3 is an explanatory view of the critical current density dependence of SFQ pulse width at 30K.
FIG. 4 is an explanatory diagram of the critical current density dependence of the shunt resistance value for making hysteresis zero.
FIG. 5 is a schematic perspective view of lamp edge bonding according to the first embodiment of the present invention.
FIG. 6 is a schematic perspective view of lamp edge bonding according to a second embodiment of the present invention.
FIG. 7 is a schematic perspective view of lamp edge bonding according to a third embodiment of the present invention.
FIG. 8 is a schematic perspective view of lamp edge bonding according to a fourth embodiment of the present invention.
FIG. 9 is a schematic perspective view of lamp edge bonding according to a fifth embodiment of the present invention.
FIG. 10 is a schematic perspective view of lamp edge bonding according to a sixth embodiment of the present invention.
FIG. 11 is a schematic perspective view of lamp edge bonding according to a seventh embodiment of the present invention.
FIG. 12 is a schematic perspective view of lamp edge bonding according to an eighth embodiment of the present invention.
FIG. 13 is an explanatory view of a conventional surface-modified lamp edge bonding.
FIG. 14 shows I of a conventional high-temperature superconducting lamp edge junction._c・ R_nCritical current density J of product and hysteresis_cIt is explanatory drawing of dependency.
[Explanation of symbols]
1 Substrate
2 Lower electrode
3 Conductive intermediate layer
4 Upper electrode
5 Over the ramp
6 Barrier layer
11 MgO substrate
12 Lower electrode layer
13 Conductive intermediate layer
14 ramp ramp
15 Damage layer
16 Upper electrode layer
17 Ramp crossing
18 Conductive intermediate layer
19 Interlayer insulation film
20 Inclined surface
21 Resistance layer
22 Contact layer
23 Contact layer
24 resistance layer
25 Contact layer
26 Contact layer
27 Conductive substrate
28 Conductive layer
51 MgO substrate
52 Lower electrode
53 Insulation layer
54 Damage Layer
55 Upper electrode
56 Ramp crossing

Claims (5)

A high-temperature superconducting junction device having a shunt resistance, characterized in that a conductive intermediate layer is provided between a lamp crossing portion of an upper electrode constituting a lamp edge junction using an oxide superconductor and a lower electrode. . 2. A high-temperature superconducting bonding apparatus having a shunt resistor according to claim 1, wherein the conductive intermediate layer is processed into the same shape as the projected portion of the upper electrode over the lamp. Provided between the lamp overhanging portion of the upper electrode constituting the lamp edge junction using the oxide superconductor and the lower electrode along the slope opposite to the interlayer insulating layer and the upper electrode junction surface. A high-temperature superconducting junction device having a shunt resistance, characterized by being connected by a resistance layer. The lamp edge junction using the oxide superconductor is configured with a flat structure in which the lamp overhanging portion of the upper electrode and the interlayer insulating layer are removed, and a resistance layer is provided between the flattened upper electrode and lower electrode. A high-temperature superconducting bonding apparatus having a shunt resistance characterized by being connected. A high-temperature superconducting junction device having a shunt resistance, wherein a conductive material is used as a base for forming a lamp edge junction using an oxide superconductor.

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