JP2005045075A - Method for substrate treatment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for substrate treatment where variation between a depositing speed in the case of performing plasma nitriding continually and that in the case of performing plasma nitriding after plasma oxidation is suppressed when performing two treatments of plasm nitriding and plasm oxidation in one treatment room. <P>SOLUTION: Plasma oxidation treatment of a first substrate is performed in the treatment room 202 (step 20). Thereafter, the first substrate is taken out from the treatment room 202 (step 21). Thereafter, plasma nitriding treatment of inside of the treatment room 202 is performed without providing a substrate in the treatment room 202. Thereafter, a second substrate is introduced to the inside of the treatment room 202 to perform the plasma nitriding treatment of the second substrate. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a substrate processing method, and more particularly to a substrate processing method for enabling a plurality of processes to be performed while ensuring the processing performance in one processing chamber of a semiconductor manufacturing apparatus.

  FIG. 6 shows a conventional sequence when a plurality of processes are performed in one process chamber. Taking as an example a case where three processes of pre-processing, dielectric film formation and post-processing for forming a dielectric film of a capacitor used in a memory cell of a semiconductor memory are continuously performed by one cluster device. I will give you.

  First, nitriding as pre-processing is performed in the processing furnace (process module PM1) 202, then a capacitor dielectric film is formed in the processing furnace (process module PM2) 137, and then oxidation processing as post-processing. Is a sequence in the case of performing again in the processing furnace (process module PM1) 202.

  That is, first, with respect to the first semiconductor wafer, the substrate stage in the preliminary chamber 122 is moved up and down to position the first semiconductor wafer at a predetermined position (step 11), and then from the preliminary chamber 122 to the transfer chamber. 103, the first semiconductor wafer is transferred to the wafer transfer device 112 (step 12), and then the first semiconductor wafer is transferred from the wafer transfer device 112 in the transfer chamber 103 to the processing furnace (process module PM1) 202. The wafer is transferred (step 13), and then plasma nitridation is performed as a pretreatment in the processing furnace (process module PM1) 202 (step 14). Next, the transfer chamber is transferred from the processing furnace (process module PM1) 202. 103, the first semiconductor wafer is transferred to the wafer transfer machine 112 (Step 15), and then the processing furnace (process module) is transferred from the wafer transfer machine 112 in the transfer chamber 103. The first semiconductor wafer is transferred onto the process PM2) 137 (step 16), and then a capacitor dielectric film is formed in the processing furnace (process module PM2) 137 (step 17). The first semiconductor wafer is transferred from the furnace (process module PM2) 137 to the wafer transfer device 112 in the transfer chamber 103 (step 18), and then the processing furnace (process) is transferred from the wafer transfer device 112 in the transfer chamber 103. The first semiconductor wafer is transferred to the module PM1) 202 (step 19), and then plasma oxidation treatment as post-processing is performed in the processing furnace (process module PM1) 202 (step 20). The first semiconductor wafer is transferred from the furnace (process module PM1) 202 to the wafer transfer device 112 in the transfer chamber 103 (step 21). 3, the first semiconductor wafer is transferred from the wafer transfer device 112 to the cooling unit (CS1) 138 (step 22), and then the temperature of the first semiconductor wafer is set to a predetermined temperature by the cooling unit (CS1) 138. (Step 23), and then the first semiconductor wafer is transferred from the cooling unit (CS1) 138 to the substrate stage in the preliminary chamber 123 (step 24).

  The same processing is performed on the second and subsequent semiconductor wafers. For the second and subsequent semiconductor wafers, the capacitor dielectric film is formed on the previous semiconductor wafer by the processing furnace (process module PM2) 137 (step 17), while the above steps 11 to 11 are performed. Steps up to step 15 are performed. After step 15 is performed on the second and subsequent semiconductor wafers, that is, the second and subsequent semiconductor wafers are transferred from the processing furnace (process module PM1) 202 to the wafer transfer device 112 in the transfer chamber 103. After (Step 15), the previous semiconductor wafer is transferred from the processing furnace (process module PM2) 137 to the wafer transfer machine 112 in the transfer chamber 103 (Step 18), and then the second and subsequent semiconductors are transferred. The wafer is transferred from the wafer transfer device 112 in the transfer chamber 103 to the processing furnace (process module PM2) 137 (step 16), and then the previous semiconductor wafer is processed from the wafer transfer device 112 in the transfer chamber 103. It is transferred to the furnace (process module PM1) 137 (step 19), and then the capacitor dielectric is applied to the second and subsequent semiconductor wafers. The film of the processing furnace while deposited by (process module PM2) 137 (step 17), the one before the semiconductor wafer that is performed up to the step 19 to step 24.

  In this case, two processes of plasma nitridation and plasma oxidation are performed in one processing chamber. In the processing furnace (process module PM1) 202, plasma nitridation (step 14 of the first wafer) → plasma nitridation (second sheet) Step 14) of the first wafer → plasma oxidation (step 20 of the first wafer) → plasma nitridation (step 14 of the third wafer) → plasma oxidation (step 20 of the second wafer) → plasma nitridation (fourth) The process of step 14) of the first wafer → plasma oxidation (step 20 of the third wafer) →... Continues. In this case, there is a problem that the film forming speed varies between the case where the plasma nitriding treatment is performed after the plasma oxidation treatment and the case where the plasma nitriding treatment is performed after the plasma nitriding treatment.

  A main object of the present invention is to provide a substrate processing method capable of solving the problem that the film forming speed varies when two processes of plasma nitriding and plasma oxidation are performed in one processing chamber, and suppressing the variation in the film forming speed. It is to provide.

  According to the present invention, the first substrate is plasma-oxidized in the processing chamber, and then the first substrate is removed from the processing chamber, and then the plasma nitridation processing is performed in the processing chamber, and then the second substrate is processed in the processing chamber. A substrate processing method is provided, which is introduced into a room and plasma nitriding the second substrate.

  According to the present invention, when two treatments of plasma nitridation and plasma oxidation are performed in one processing chamber, the film formation rate when plasma nitridation is continuously performed and the case where plasma nitridation is performed after plasma oxidation It is possible to suppress the variation between the film forming speeds.

Next, a substrate processing method according to an embodiment of the present invention will be described with reference to the drawings.
First, with reference to FIG. 1 and FIG. 2, the outline | summary of the substrate processing apparatus with which the substrate processing method of a present Example is implemented suitably is demonstrated.
In this substrate processing apparatus, a FOUP (front opening unified pod) is used as a carrier for transporting a substrate such as a wafer. In the following description, front, rear, left and right are based on FIG. That is, with respect to the paper surface shown in FIG. 1, the front is below the paper surface, the back is above the paper surface, and the left and right are the left and right sides of the paper surface.

  As shown in FIGS. 1 and 2, the substrate processing apparatus includes a first transfer chamber 103 configured in a load lock chamber structure that can withstand a pressure (negative pressure) less than atmospheric pressure such as a vacuum state. The casing 101 of the first transfer chamber 103 is formed in a box shape having a hexagonal plan view and closed at both upper and lower ends. In the first transfer chamber 103, a first wafer transfer machine 112 for transferring the wafer 200 under a negative pressure is installed. The first wafer transfer device 112 is configured to be moved up and down by an elevator 115 while maintaining the airtightness of the first transfer chamber 103.

  The two side walls located on the front side of the six side walls of the housing 101 are connected to the carry-in spare chamber 122 and the carry-out spare chamber 123 via gate valves 244 and 127, respectively. Each has a load lock chamber structure that can withstand negative pressure. Further, a substrate placing table 140 for loading / unloading chamber is installed in the spare chamber 122, and a substrate placing table 141 for unloading chamber is installed in the spare chamber 123.

  A second transfer chamber 121 used at substantially atmospheric pressure is connected to the front side of the preliminary chamber 122 and the preliminary chamber 123 via gate valves 128 and 129. A second wafer transfer machine 124 for transferring the wafer 200 is installed in the second transfer chamber 121. The second wafer transfer device 124 is configured to be moved up and down by an elevator 126 installed in the second transfer chamber 121, and is configured to be reciprocated in the left-right direction by a linear aqua tutor 132. Yes.

  As shown in FIG. 1, an orientation flat aligning device 106 is installed on the left side of the second transfer chamber 121. Further, as shown in FIG. 2, a clean unit 118 for supplying clean air is installed in the upper part of the second transfer chamber 121.

  As shown in FIG. 1 and FIG. 2, a wafer loading / unloading port 134 for loading / unloading the wafer 200 into / from the second transfer chamber 121 and the wafer in the housing 125 of the second transfer chamber 121. A lid 142 for closing the loading / unloading port and a pod opener 108 are installed. The pod opener 108 includes a cap of the pod 100 placed on the IO stage 105 and a cap opening / closing mechanism 136 that opens and closes a lid 142 that closes the wafer loading / unloading port 134, and the pod placed on the IO stage 105. The cap 142 opens and closes the lid 142 that closes the cap 100 and the wafer loading / unloading port 134 by the cap opening / closing mechanism 136, thereby enabling the wafer to be taken in and out of the pod 100. Further, the pod 100 is supplied and carried out to the IO stage 105 by an in-process transfer device (RGV) (not shown).

  As shown in FIG. 1, two side walls located on the back side among the six side walls of the housing 101 are provided with a first processing furnace 202 for performing a desired process on the wafer, and a second processing furnace. A processing furnace 137 is connected adjacently. The first processing furnace 202 is constituted by a cold wall type processing furnace, and the second processing furnace 137 is constituted by a hot wall type processing furnace. The remaining two side walls of the casing 101 that are opposite to each other are provided with a first cooling unit 138 as a third processing furnace and a second processing furnace as a fourth processing furnace. A cooling unit 139 is connected to each other, and both the first cooling unit 138 and the second cooling unit 139 are configured to cool the processed wafer 200.

  Next, a processing furnace 202 of a substrate processing apparatus in which the substrate processing method of the present embodiment is preferably implemented will be described with reference to FIG. The plasma processing furnace 202 is a modified magnetron plasma substrate processing apparatus (hereinafter referred to as a plasma magnet processing apparatus) that performs plasma processing on a substrate such as a wafer using a modified magnetron type plasma source that can generate high-density plasma by an electric field and a magnetic field. Called MMT device). In this MMT apparatus, a substrate is installed in a processing chamber that ensures confidentiality, a reaction gas is introduced into the processing chamber via a shower plate, the processing chamber is maintained at a certain pressure, and high-frequency power is supplied to the discharge electrode. As a result, an electric field is formed and a magnetic field is applied to cause a magnetron discharge. Since the electrons emitted from the discharge electrode continue to circulate while continuing the cycloid motion while drifting, the lifetime becomes longer and the ionization rate is increased, so that high-density plasma can be generated. In this way, the substrate can be subjected to various plasma treatments such as diffusion treatment such as oxidation or nitridation by exciting and decomposing the reaction gas, or forming a thin film on the substrate surface, or etching the substrate surface.

  FIG. 3 shows a schematic configuration diagram of such an MMT apparatus. In the MMT apparatus, a processing chamber 201 is formed from a lower container 211 that is a second container and an upper container 210 that is a first container placed on the lower container 211. The upper container 210 is made of dome-shaped aluminum oxide or quartz, and the lower container 211 is made of aluminum. Further, by forming a susceptor 217 as a heater-integrated substrate holding unit, which will be described later, from aluminum nitride, ceramics, or quartz, metal contamination taken into the film during processing is reduced.

  A shower head 236 that forms a buffer chamber 237, which is a gas dispersion space, is provided at the upper part of the upper container 210, an introduction port 234 for introducing gas is provided on the upper wall of the shower head, and the lower wall is an ejection hole for ejecting gas. The gas inlet port 234 is a supply pipe 232 which is a supply pipe for supplying gas, and a valve 243a which is an on-off valve is a mass flow controller 241 which is a flow control means. To the gas cylinder of the reaction gas 230 not shown in the figure. The reaction gas 230 is supplied from the shower head 236 to the processing chamber 201, and the exhaust for exhausting the gas to the side wall of the lower container 211 so that the gas after substrate processing flows from the periphery of the susceptor 217 toward the bottom of the processing chamber 201. A gas exhaust port 235 which is a port is provided. The gas exhaust port 235 is connected to an automatic pressure control device (APC) 242 which is a pressure regulator by a gas exhaust pipe 231 which is an exhaust pipe for exhausting gas, and thereafter is an exhaust device via a valve 243b which is an on-off valve. A vacuum pump 246 is connected.

  The discharge means for exciting the supplied reaction gas 230 has a cylindrical cross section, and a cylindrical electrode 215 that is preferably a cylindrical first electrode is provided. The cylindrical electrode 215 is installed on the outer periphery of the processing chamber 201 and surrounds the plasma generation region 224 in the processing chamber 201. A high frequency power source 273 that applies high frequency power is connected to the cylindrical electrode 215 via a matching unit 272 that performs impedance matching.

  Moreover, the cross section is cylindrical, and the cylindrical magnet 216, which is preferably a cylindrical magnetic field forming means, is a cylindrical permanent magnet. The cylindrical magnet 216 is disposed near the upper and lower ends of the outer surface of the cylindrical electrode 215. The upper and lower cylindrical magnets 216 and 216 have magnetic poles at both ends (inner and outer peripheral ends) along the radial direction of the processing chamber 201, and the magnetic poles of the upper and lower cylindrical magnets 216 and 216 are set in opposite directions. Has been. Therefore, the magnetic poles in the inner peripheral portion are different from each other, and thereby magnetic pole lines are formed in the cylindrical axis direction along the inner peripheral surface of the cylindrical electrode 215.

  A susceptor 217 is disposed at the center on the bottom side of the processing chamber 201 as a substrate holding means for holding the wafer 200 as a substrate. The susceptor 217 can heat the wafer 200. The susceptor 217 is made of, for example, aluminum nitride, and a heater (not shown) as a heating unit is integrally embedded therein. The heater can heat the wafer 200 to about 500 ° C. by applying high-frequency power.

  The susceptor 217 is also equipped with a second electrode that is an electrode for varying the impedance, and the second electrode is grounded via the impedance varying mechanism 274. The impedance variable mechanism 274 is composed of a coil and a variable capacitor, and the potential of the wafer 200 can be controlled via the electrode and the susceptor 217 by controlling the number of coil patterns and the capacitance value of the variable capacitor. .

  A processing furnace 202 for processing the wafer 200 by magnetron discharge using a magnetron type plasma source includes at least the processing chamber 201, a susceptor 217, a cylindrical electrode 215, a cylindrical magnet 216, a shower head 236, and an exhaust port 235. Thus, it is possible to perform plasma processing on the wafer 200 in the processing chamber 201.

  Around the cylindrical electrode 215 and the cylindrical magnet 216, an electric field and magnetic field formed by the cylindrical electrode 215 and the cylindrical magnet 216 are arranged so as not to adversely affect the external environment and other processing furnaces. And a shielding board 223 that effectively shields the magnetic field.

  The susceptor 217 is insulated from the lower container 211 and is provided with a susceptor elevating mechanism 268 that is an elevating means for elevating and lowering the susceptor 217. Further, the susceptor 217 has through holes 217a, and at the bottom of the lower container 211, wafer push-up pins 266 that are substrate push-up means for pushing up the wafer 200 are provided in at least three places. Then, when the susceptor 217 is lowered by the susceptor raising / lowering mechanism 268, the through hole 217a and the wafer up pin are arranged so that the wafer push-up pin 266 penetrates the through-hole 217a in a non-contact state with the susceptor 217. 266 is provided.

  Further, a gate valve 244 serving as a gate valve is provided on the side wall of the lower container 211. When the gate valve 244 is open, the wafer 200 is loaded into or unloaded from the processing chamber 201 by a transfer means (not shown), and when it is closed, the processing is performed. The chamber 201 can be closed airtight.

  The controller 121 as a control means includes a high frequency power supply 273, a matching unit 272, a valve 243a, a mass flow controller 241, an APC 242, a valve 243b, a vacuum pump 246, a susceptor lifting mechanism 268, a gate valve 244, and a heater embedded in the susceptor. It is connected to a high-frequency power source that applies electric power, and each is controlled.

  A method for performing a predetermined plasma treatment on the surface of the wafer 200 or the surface of the base film formed on the wafer 200 in the above configuration will be described.

  The wafer 200 is loaded into the processing chamber 201 by a transfer means (not shown) that transfers the wafer from the outside of the processing chamber 201 that constitutes the processing furnace 202, and is transferred onto the susceptor 217. The details of this transfer operation are as follows. First, the susceptor 217 is lowered, and the tip of the wafer push-up pin 266 passes through the through-hole 217a of the susceptor 217 and protrudes by a predetermined height from the surface of the susceptor 217. In this state, the gate valve 244 provided in the lower container 211 is opened, and the wafer 200 is placed on the tip of the wafer push-up pin by the transfer means (not shown). When the gate valve 244 is closed and the susceptor 217 is raised by the susceptor elevating mechanism 268, the wafer 200 can be placed on the upper surface of the susceptor 217 and further raised to a position where the wafer 200 is processed.

  The heater embedded in the susceptor 217 is preheated, and heats the loaded wafer 200 to a wafer processing temperature within a range of room temperature to 500 ° C. The pressure of the processing chamber 201 is maintained within a range of 0.1 to 100 Pa using the vacuum pump 246 and the APC 242.

  When the wafer 200 is heated to the processing temperature, the reaction gas is directed from the gas inlet 234 to the upper surface (processing surface) of the wafer 200 disposed in the processing chamber 201 via the gas ejection holes 234a of the shower plate 240. To introduce. At the same time, high frequency power is applied to the cylindrical electrode 215 from the high frequency power supply 273 via the matching unit 272. As the power to be applied, an output value in the range of 150 to 200 W is input. At this time, the impedance variable mechanism 274 is controlled in advance to a desired impedance value.

  Magnetron discharge is generated under the influence of the magnetic field of the cylindrical magnets 216 and 216, charges are trapped in the upper space of the wafer 200, and high-density plasma is generated in the plasma generation region 224. Then, the surface of the wafer 200 on the susceptor 217 is subjected to plasma processing by the generated high density plasma. The wafer 200 that has been subjected to the surface treatment is transferred to the outside of the processing chamber 201 by means opposite to that for loading the substrate using a transfer means (not shown).

  The controller 121 turns on / off the power of the high-frequency power supply 273, adjusts the matching unit 272, opens / closes the valve 243a, the flow rate of the mass flow controller 241, the valve opening of the APC 242, opens / closes the valve 243b, starts / stops the vacuum pump 246, The lifting / lowering operation of the susceptor lifting / lowering mechanism 268, the opening / closing of the gate valve 244, and the power ON / OFF to the high-frequency power source for applying the high-frequency power to the heater embedded in the susceptor are controlled.

  Next, using the processing furnace 202 of the MMT apparatus of the substrate processing apparatus having the above-described configuration, the influence of the case where the plasma oxidation process is included in the continuous plasma nitriding process was examined.

  FIG. 7 shows the thickness of the nitride film formed by performing plasma nitriding after plasma nitriding, and the thickness of the nitride formed by performing plasma nitriding after performing plasma oxidation. When the plasma oxidation process (processes A1, A2, A3, and A4) is performed after the plasma nitridation process, and then the plasma nitridation process is performed, one batch after the plasma oxidation process is 0 when the film thickness target is 20 mm. An increase in film thickness of 0.5 mm is observed (see points a1, a2, a3, a4). If the plasma nitridation process is continuously performed twice or more after the plasma oxidation process, the film thickness returns to the target thickness (see points b and c). Therefore, after the plasma oxidation process, the plasma nitridation without the wafer in the processing furnace 202 is performed. When the processing (empty deposition processing) was performed once, the film thickness variation could be suppressed in the subsequent plasma nitriding processing of the wafer. Since oxygen remains in the processing chamber 201 after the plasma oxidation process, it is considered that the plasma nitridation process after the plasma oxidation process is affected. By performing the empty deposition process after the plasma oxidation process, residual oxygen components It is thought that the effect of residual oxygen disappears after the empty deposition process. As shown in FIG. 8, when only the plasma nitriding process is performed in the same processing furnace (process module), there is no variation in film thickness.

  Next, a substrate processing method according to an embodiment of the present invention using the substrate processing apparatus having the above configuration will be described.

In this embodiment, a Ta ₂ O ₅ film is formed as a dielectric film of a capacitor used in a DRAM memory cell which is a kind of semiconductor memory. As shown in FIG. 5, the capacitor 46 includes a capacitor lower electrode 42 embedded in a trench 45 formed in the silicon substrate 41, a Ta ₂ O ₅ film 43 as a dielectric film, and a capacitor upper electrode 44. I have. The capacitor 46 is connected to a MOS field effect transistor to constitute a DRAM memory cell. As the capacitor lower electrode 42, an HSG (Hemispherical Grain) silicon electrode doped with phosphorus using PH ₃ is used, and TiN is used as the capacitor upper electrode 44.

In this embodiment, a Ta ₂ O ₅ film 43 as a dielectric film is formed on the capacitor lower electrode 42 embedded in the trench 45 formed in the silicon substrate 41 using the substrate processing apparatus having the above configuration. Form a film. In this embodiment, first, plasma nitridation as pretreatment is performed in the processing furnace 202 of the MMT apparatus, and then the tantalum oxide (Ta ₂ O ₅ ) film 43 as the capacitor dielectric film is a thermal CVD apparatus. A film was formed in the processing furnace 137, and then plasma oxidation processing as post-processing was performed again in the processing furnace 202 of the MMT apparatus. Thus, _Ta 2 _{O 5} film before forming the by forming a nitride film on the capacitor lower electrode 42 by the plasma nitriding treatment, oxygen _{the Ta} 2 _{O 5} film in at _Ta 2 _{O 5} deposition (O) Can be prevented from diffusing into the capacitor lower electrode 42. This is because when oxygen diffuses into the capacitor lower electrode 42, the capacitor lower electrode 42 is oxidized and can no longer function as an electrode. Further, after the _Ta 2 _{O 5} film formation as a capacitor dielectric film, by performing plasma oxidation, _Ta 2 _{O 5} impurity components in the film (C: carbon) is removed by a plasma oxidation process _Ta 2 O _The film quality of the _five films can be improved.

  Next, the substrate processing method of the present embodiment using the substrate processing apparatus having the above configuration will be described more specifically with reference to FIGS.

  In a state where 25 unprocessed wafers 200 are accommodated in the pod 100, they are transferred to the substrate processing apparatus for performing the processing process by the in-process transfer apparatus. As shown in FIGS. 1 and 2, the pod 100 that has been transported is delivered and placed on the IO stage 105 from the in-process transport device. The cap 142 for opening and closing the cap of the pod 100 and the wafer loading / unloading port 134 is removed by the cap opening / closing mechanism 136, and the wafer loading / unloading port of the pod 100 is opened.

  When the pod 100 is opened by the pod opener 108, the second wafer transfer machine 124 installed in the second transfer chamber 121 picks up the wafer 200 from the pod 100, loads it into the preliminary chamber 122, and loads the wafer 200. Transfer to the substrate table 140.

Next, with respect to the first semiconductor wafer, the substrate stage 140 in the preliminary chamber 122 is moved up and down to position the first semiconductor wafer 200 at a predetermined position (see step 11 and FIG. 4). Next, the first semiconductor wafer 200 is transferred from the preliminary chamber 122 to the first wafer transfer device 112 in the first transfer chamber 103 (see step 12 and FIG. 4). Next, the first semiconductor wafer 200 is transferred from the first wafer transfer device 112 in the transfer chamber 103 to the first processing furnace (process module PM1) 202 (step 13, see FIG. 4). Next, a plasma nitridation process as a pre-process is performed in the first processing furnace (process module PM1) 202 (step 14, see FIG. 4). At this time, N ₂ gas as a processing gas is supplied into the first processing furnace 202, and the lower portion of the capacitor made of HSG silicon electrode doped with phosphorus at a high frequency power (RF power) of 250 W, a pressure of 30 Pa, and a temperature of 630 ° C. Plasma nitriding is performed on the silicon substrate 41 (semiconductor substrate 200) on which the electrodes 42 are formed.

When the plasma nitriding process is completed in the first processing furnace 202, the first semiconductor wafer 200 is transferred from the first processing furnace (process module PM1) 202 to the first wafer transfer machine 112 in the first transfer chamber 103. Transfer (see step 15, FIG. 4). Next, the first semiconductor wafer 200 is transferred from the first wafer transfer device 112 in the first transfer chamber 103 to the second processing furnace (process module PM2) 137 (see step 16 and FIG. 4). . Next, a Ta ₂ O ₅ film as the capacitor dielectric film 43 (see FIG. 5) is formed in the second processing furnace (process module PM2) 137 (step 17, see FIG. 4). At this time, in the second processing furnace 137 (process module PM2), the liquid raw material pentaethoxytantalum (PeTa: Ta (OC ₂ H ₅ ) ₅ ) 0.1 cc / min, oxygen gas 0.5 L / min, carrier A Ta ₂ O ₅ film as a capacitor dielectric film 43 is heated on the capacitor lower electrode 42 made of an HSG silicon electrode doped with phosphorus at a pressure of 30 Pa and a film formation temperature of 430 ° C. with an N 2 gas supply of 0.5 L / min. A film was formed by a CVD method (see FIG. 5).

When the formation of the Ta 2 O 5 film as the capacitor dielectric film 43 is completed in the second processing furnace 137, the first wafer transfer device 112 in the first transfer chamber 103 is transferred from the second processing furnace (process module PM 2) 137. The first semiconductor wafer 200 is transferred to (step 18, see FIG. 4). Next, the first semiconductor wafer is transferred from the first wafer transfer device 112 in the first transfer chamber 103 to the first processing furnace (process module PM1) 202 (step 19, see FIG. 4). Next, a plasma oxidation process as a post-process is performed in the first processing furnace (process module PM1) 202 (see step 20, FIG. 4).
At this time, O 2 gas as a processing gas was supplied into the first processing furnace 202, and a Ta 2 O 5 film as a capacitor dielectric film 43 was formed at a high frequency power (RF power) of 300 W, a pressure of 10 Pa, and a temperature of 630 ° C. The first semiconductor wafer 200 is subjected to plasma oxidation.

When the plasma oxidation process is completed in the first processing furnace 202, the first semiconductor wafer 200 is transferred from the first processing furnace (process module PM1) 202 to the first wafer transfer device 112 in the first transfer chamber 103. Transfer (see step 21, FIG. 4). Next, the first semiconductor wafer is transferred from the first wafer transfer device 112 in the transfer chamber 103 to the cooling unit (CS1) 138 (step 22, see FIG. 4). Simultaneously with this step 22, in the first processing furnace (process module PM1) 202, a plasma nitriding process (empty deposition process) is performed without providing the semiconductor wafer 200 in the processing furnace 202 (process module PM1) (step 30). FIG. 4). By this empty deposition process, it is possible to suppress variations in film thickness in the subsequent plasma nitridation process of the semiconductor wafer 200. At this time, N ₂ gas as a processing gas was supplied into the first processing furnace 202, and plasma nitriding was performed at a high frequency power (RF power) of 250 W, a pressure of 30 Pa, and a temperature of 630 ° C. This condition is the same as the plasma nitriding process of the silicon substrate 41 (semiconductor substrate 200) on which the capacitor lower electrode 42 is formed.

  The temperature of the first semiconductor wafer is lowered to a predetermined temperature by the cooling unit (CS1) 138 (step 23, see FIG. 4), and then the cooling unit (CS1) 138 is moved to the substrate table 141 in the preliminary chamber 123. The first semiconductor wafer 200 is transferred (step 24, see FIG. 4). The same processing is performed on the second and subsequent semiconductor wafers 200. For the second and subsequent semiconductor wafers 200, a capacitor dielectric film is formed on the previous semiconductor wafer 200 by the second processing furnace (process module PM2) 137 (step 17). Steps 11 to 15 (see FIG. 4) are performed. Then, after performing step 15 on the second and subsequent semiconductor wafers 200, that is, from the first processing furnace (process module PM1) 202 to the first wafer transfer machine 112 in the first transfer chamber 103, the second processing is performed. After transferring the first and subsequent semiconductor wafers 200 (see step 15, FIG. 4), the previous semiconductor wafer 200 is transferred from the first processing furnace (process module PM 1) 202 to the first transfer chamber 103. Then, the second and subsequent semiconductor wafers 200 are transferred from the first wafer transfer device 112 in the first transfer chamber 103 to the second wafer transfer device 112 (see step 18, FIG. 4). Is transferred to the processing furnace (process module PM2) 137 (see step 16, FIG. 4), and then the previous semiconductor wafer 200 is transferred to the first wafer transfer machine 1 in the first transfer chamber 103. 2 is transferred to the processing furnace (process module PM1) 137 (step 19, see FIG. 4), and then a capacitor dielectric film is formed on the second and subsequent semiconductor wafers 200 in the processing furnace (process module PM2) 137. While the film is formed (see step 17 and FIG. 4), the previous step 19 to step 21, step 30, and steps 22 to 24 (see FIG. 4) are performed on the previous semiconductor wafer 200.

  After the semiconductor wafer 200 processed in this way is placed on the substrate table 141 in the preliminary chamber 123, a lid 142 that closes the wafer loading / unloading port 134 corresponding to the preliminary chamber 123 in the second transfer chamber 121; The cap of the empty pod 100 placed on the IO stage 105 is opened by the pod opener 108. Subsequently, the second wafer transfer device 124 in the second transfer chamber 121 picks up the semiconductor wafer 200 from the substrate table 141 and carries it out to the second transfer chamber 121, and then loads the wafer into the second transfer chamber 121. It is stored in the pod 100 through the carry-out port 134. When the storage of the 25 processed wafers 200 in the pod 100 is completed, the pod opener 108 closes the lid 142 that closes the cap of the pod 100 and the wafer loading / unloading port 134. The closed pod 100 is transferred from the top of the IO stage 105 to the next process by the in-process transfer apparatus.

  In this embodiment, two processes of plasma nitriding and plasma oxidation are performed in one processing chamber (first processing furnace (process module PM1) 202). In this processing furnace (process module PM1) 202, plasma nitriding ( Step 14 of the first wafer) → Plasma nitridation (Step 14 of the second wafer) → Plasma oxidation (Step 20 of the first wafer) → Plasma nitridation (empty deposition without a wafer) ( Step 30 of the first wafer) → plasma nitridation (step 14 of the third wafer) → plasma oxidation (step 20 of the second wafer) → plasma nitridation (empty depot without a wafer) ( Step 30 of the second wafer) → Plasma nitriding (Step 14 of the fourth wafer) → Plasma oxidation (Step 20 of the third wafer) → Plasma nitride (empty in the state of not providing the wafer depot) (step 30 of the wafer of comedian) → ... that process is to continue. In this way, empty deposition (plasma nitridation) without a wafer is performed before the plasma nitridation process. Therefore, by performing the apparatus operation according to the present embodiment, the nitride film thickness can be increased. It became possible to keep the variation within 20% ± 3% of the target.

It is a schematic cross-sectional view for demonstrating an example of the substrate processing apparatus for enforcing one Example of the substrate processing method of this invention. It is a schematic longitudinal cross-sectional view for demonstrating an example of the substrate processing apparatus for enforcing one Example of the substrate processing method of this invention. It is a schematic longitudinal cross-sectional view for demonstrating the processing furnace 202 shown in FIG. 1, FIG. It is a film-forming process sequence diagram for demonstrating one Example of the substrate processing method of this invention. It is a schematic longitudinal cross-sectional view for demonstrating the semiconductor device manufactured in one Example of the substrate processing method of this invention. It is a film-forming process sequence diagram for demonstrating an example of the conventional substrate processing method. It is a figure which shows the dispersion | variation in the nitride film thickness at the time of inserting an oxidation process in a nitriding process. It is a figure which shows the film thickness and the data of uniformity at the time of performing nitriding processing continuously.

Explanation of symbols

DESCRIPTION OF SYMBOLS 103 ... Transfer chamber 122, 124 ... Preliminary chamber 137, 202 ... Processing furnace 138 ... Cooling unit 200 ... Wafer 201 ... Processing chamber

Claims (1)

Plasma oxidizing the first substrate in the processing chamber, then removing the first substrate from the processing chamber, then plasma nitriding in the processing chamber, and then introducing the second substrate into the processing chamber; A substrate processing method comprising plasma nitriding the second substrate.

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