JP2005041177A - Process for producing heating resistor, process for manufacturing ink jet recording head - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for producing a heating resistor in which resistance distribution can be improved while suppressing increase in resistance of a heating resistor layer, and to provide a process for manufacturing an ink jet recording head. <P>SOLUTION: An Si oxide film 75 (first insulation layer), a polycrystal Si film 74 (etching stopper layer), and an Si oxide film 73 (first insulation layer) are formed sequentially on a heating resistor layer (N), and then the Si oxide film 73, the polycrystal Si film 74 and the Si oxide film 75 are removed sequentially by plasma etching under respective etching conditions to form an opening in a partial region of the heating resistor layer 6 ((O)-(Q)). <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method of manufacturing a heating resistor used in a thermal type ink jet recording head that applies thermal energy to ink held in a nozzle and ejects the ink, and a method of manufacturing the ink jet recording head.

  In recent years, inkjet recording apparatuses have attracted attention as low-cost, high-quality color recording apparatuses. As an inkjet recording head of an inkjet recording apparatus, for example, a piezoelectric inkjet recording head that ejects ink from a nozzle by pressure generated by mechanically deforming a pressure chamber with a piezoelectric material, or an individual flow path is provided. 2. Description of the Related Art Thermal type ink jet recording heads that energize heating elements and eject ink from nozzles at a pressure that vaporizes the ink are known.

  As current thermal ink jet recording heads, for example, ink jet recording heads described in Patent Documents 1 to 3 are known.

  Here, FIGS. 12A to 12E show an ink droplet generation process in a thermal type ink jet recording head. In the figure, 100 is a flow path substrate, 102 is a liquid flow path, 103 is a heater substrate, 104 is an independent electrode, 105 is a common electrode, 106 is a heating resistor layer, 107 is an insulating film, 108 is a pit, 109 is a nozzle, Reference numeral 110 denotes ink, 111 denotes bubbles, and 112 denotes generated ink droplets.

In the thermal type ink jet recording head, the heating resistor layer 106 is temporarily energized and heated, whereby the ink 110 suddenly boils, bubbles 111 are generated, and the liquid channel 102 grows rapidly. Then, the ink droplet 112 is ejected from the nozzle 109 by the pressure at the time of the growth of the bubbles 111 and landed on a recording material such as paper to form a recording pixel.
JP-A-9-226102 JP 2000-158655 A JP 2000-158656 A

  However, in such an ink jet recording head, an insulating film 107 is formed on the heating resistor layer 106, and then an opening called a pit 108 is formed by a dry etching method (“Reactive Ion Etching (RIE)). Therefore, there is a problem in that polycrystalline Si, which is a constituent material of the heating resistor layer 106, is exposed to plasma during RIE over-etching, and the resistance value of the heating resistor layer 106 increases due to the damage.

  For example, FIGS. 13 and 14 show the rate of increase in resistance and the dependence of uniformity on overetching time, respectively. It can be seen that the longer the over-etching time, the higher the resistance value and the worse the wafer in-plane uniformity. The former is because damage increases as the overetching time increases. Moreover, the latter reason is because there is a difference in the effective over-etching time within the wafer because the etching rate of the insulating film has a distribution in the wafer surface. Such an intra-wafer resistance value distribution affects the resistance value distribution inside the print head, which in turn causes non-uniform ejection characteristics.

  Here, as shown in FIG. 15, RIE is performed on the Si oxide film formed by the plasma CVD method, which is the insulating film 107 formed on the polycrystalline Si film, which is the heating resistor layer 106, and an opening is formed. Shows the parameters for calculating the over-etching time. In FIG. 15, reference numeral 113 denotes a photoresist as an etching mask, and dx denotes the thickness of the insulating film 107.

Usually, the etching amount is set to increase by several tens of percent of the film thickness. The overetching rate is Ax%, and the etching rate of the insulating film 107 is Ex. From these parameters, the over-etching time To is expressed by the following formula (A).
Formula (A): To = dx / Ex × Ax / 100

  In this formula (A), when a representative number (dx = 3 μm, Ex = 0.2 μm / min, Ax = 30%) is substituted and calculated, the overetching time is 4.5 min. At this time, the resistance increase rate and the resistance value uniformity within the wafer are 22.4% and 7.0% from FIGS. 13 and 14, respectively, and the resistance value increase and resistance value uniformity of the heating resistor layer 6 are deteriorated. I understand that.

  Accordingly, an object of the present invention is to solve the conventional problems and achieve the following object. That is, an object of the present invention is to provide a method of manufacturing a heating resistor and a method of manufacturing an ink jet recording head capable of suppressing an increase in resistance value of the heating resistor layer and improving a resistance value distribution.

The above problem is solved by the following means. That is, the present invention
The method for manufacturing a heating resistor of the present invention includes a step of sequentially forming a first insulating layer, an etching stopper layer, and a second insulating layer on the heating resistor layer;
Removing the second insulating layer, the etching stopper layer, and the first insulating layer sequentially by etching under respective etching conditions to form an opening on a partial region of the heating resistor layer;
It is characterized by having.

  In the heating resistor manufacturing method of the present invention, the insulating films (first and second insulating layers) formed on the heating resistor layer are formed via the etching stopper layer, and these are formed under individual etching conditions. By removing the plasma etching, the excessive amount of overetching (damage) is absorbed by the etching stopper layer, the time that the heating resistor layer is exposed to the plasma is shortened, and the increase in resistance value of the heating resistor layer and the resistance are reduced. Improve value distribution.

  In the method for manufacturing a heating resistor according to the present invention, it is preferable that the first and second insulating layers are made of a silicon oxide film.

  In the heating resistor manufacturing method of the present invention, it is preferable that the etching stopper layer is made of a silicon film.

  In the heating resistor manufacturing method of the present invention, it is preferable that the etching stopper layer is a silicon film formed by a chemical vapor deposition method.

  In the heating resistor manufacturing method of the present invention, it is preferable that the etching stopper layer is a polycrystalline silicon film.

In the heating resistor manufacturing method of the present invention, the first insulating layer, the etching stopper layer, and the second insulating layer have a film thickness: d1, d2, d3, a selection ratio: S1, S2, S3, and overetching, respectively. When the ratios are A1, A2, and A3, it is preferable that the relational expressions represented by the following formulas (1) and (2) are simultaneously satisfied.
Formula (1): d2> d1 × A1 / 100 / S1
Formula (2): d3> A2 / 100 / S2 × (d2−d1 × A1 / 100 / S1)

  On the other hand, the method for manufacturing an ink jet recording head of the present invention for applying thermal energy to ink and ejecting it applies the method for manufacturing a heating resistor of the present invention.

  As described above, according to the present invention, it is possible to suppress the increase in the resistance value of the heating resistor layer and improve the resistance value distribution.

  Hereinafter, the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is provided and demonstrated to the member which has the substantially same function through all the drawings.

  FIG. 1 is a plan configuration diagram of a heater substrate in the ink jet recording head according to the first embodiment of the present invention, and reference numeral 21 denotes a drive element. Each heating resistor layer 6 is connected to an independent electrode 4 for individually transmitting drive energy to these and a common electrode 5 functioning as a normal power supply electrode wiring. The common electrode 22 wiring is also connected to the end of the driving element 21 and functions as a normal power supply electrode wiring. In accordance with the image information, the drive element 21 is turned on and the heating resistor layer 6 is heated by energization to generate heat. Although various studies have been made on the material of the heating resistor layer 6, since the polycrystalline Si material is used as a gate electrode material for a normal MOSLSI process in an inkjet head equipped with an LSI logic circuit, these can be shared. Can be simplified.

  FIG. 2 is a cross-sectional view of the ink jet recording head according to the first embodiment of the present invention, and a heating resistor portion 31 composed of a heating resistor layer 6 made of polycrystalline Si on the heater substrate 3 and its current. The drive circuit 21 that supplies the image signal and the logic circuit 45 that performs image information signal processing are formed using an LSI process. The heater substrate 3 and the flow path substrate 1 on which the flow path is formed are joined so that the nozzles 9 are formed to constitute the ink jet recording head.

  The heating resistor portion 31 includes a heating resistor layer 6 composed of a high resistance polycrystalline Si film 32 and a low resistance polycrystalline Si film 33. The high resistance polycrystalline Si film 32 region mainly defines a heat generating region. On the other hand, the regions of the low-resistance polycrystalline Si film 33 on both sides of the high-resistance polycrystalline Si film 32 have the first insulating film 36a and the second insulating film 36b above them even if there is a sufficient amount of heat generation. Therefore, the heat energy transmitted to the ink is reduced. For this reason, in the region of the low-resistance polycrystalline Si film 33, high-concentration impurity ions are implanted in the polycrystalline Si in advance from the viewpoint of reducing excessive energy loss, thereby sufficiently reducing the resistance. Further, the end of the insulating film pit 8 (opening) is disposed so as to be above the low resistance polycrystalline Si film 33, and the end of the pit of the polyimide resin layer 42 is outside the insulating film pit 8. It arranges so that it may come.

  3 to 7 are flowcharts showing the manufacturing process of the heater substrate in the ink jet recording head according to the first embodiment of the present invention.

  First, the Si substrate 3 is prepared (FIG. 3A), and a transistor region is defined on the surface of the Si substrate 3 by using a normal LOCOS (Local Oxidation of Si) method (FIG. 3B). This will later correspond to a region of the heating resistor portion 31, a region of the logic circuit portion 45, a region of the driving element 21, or the like. The field oxide film 44 is grown to about 1.5 μm by hydrogen combustion oxidation at 1000 ° C. This oxide film is desirably as thick as possible because it functions not only as an element isolation region but also as a heat storage layer under polycrystalline Si as a heating resistor layer later.

  Subsequently, a gate oxide film 51 of the transistor is grown by about 100 nm by hydrogen combustion oxidation at 1000 ° C. (FIG. 3C).

  Subsequently, a polycrystalline Si thin film 52 which is a material for the gate electrode 34 of the MOS transistor and the heating resistor layer 6 is deposited by a CVD (chemical vapor deposition) method with a thickness of about 0.4 μm (FIG. 3D).

  Subsequently, phosphorus, which is an n-type impurity, is introduced into the entire surface of the polycrystalline Si film 52 by ion implantation (FIG. 3E). At this stage, the conductive polycrystalline Si film 53 is obtained. This polycrystalline Si film 53 will later become the high resistance polycrystalline Si film 32.

  Subsequently, a region that will later become a high-resistance polycrystalline Si film 32 is covered with a resist formed by photolithography, and phosphorus, which is an n-type impurity, is ion-implanted to make this region a polycrystalline Si film 33 having a lower resistance (FIG. 3 (F)). The polycrystalline Si in this region will later become the low-resistance polycrystalline Si film 33 of the heating resistor layer 6 or the gate electrode 34 of the MOS transistor.

  Subsequently, the heating resistor layer 6 and the gate electrode 34 of the MOS transistor are patterned (processed) by using a photolithography method and a dry etching method using a fluorine-based gas (FIG. 4G).

  Thereafter, a source / drain diffusion layer 35 of the MOS transistor is formed by arsenic ion implantation and subsequent heat treatment (FIG. 4H).

  Subsequently, a first insulating film 36a (first insulating layer) is formed (FIG. 4I). Here, an NSG (Non Doped Silicate Glass) film deposited by CVD about 100 nm is used as the film.

  Subsequently, an etching stopper layer 7 is formed on the first insulating film 36a formed on the heating resistor layer 6 so as to cover the high-resistance polycrystalline Si film 32 (FIG. 4J). Here, a polycrystalline Si thin film is deposited as a film by about 0.1 μm by CVD (chemical vapor deposition).

Subsequently, a BPSG (borophosphosilicate glass: Si oxide film) film is formed as the second insulating film 36b (second insulating layer) (FIG. 5K). This film is formed by depositing a Si oxide film of about 700 nm by plasma CVD using SiH ₄ -based gas.

  Subsequently, a contact hole 37 serving as an electrical connection port of each element is opened by a photolithography method and a dry etching method using a fluorine-based gas (FIG. 5L).

  Subsequently, a first metal wiring layer 38 is formed (FIG. 5M). Here, an Al-1% Si film having a thickness of about 1 μm deposited by sputtering was used as a material for the metal wiring, and patterning was performed by a photolithography method and a dry etching method using a chlorine-based gas.

Subsequently, a Si oxide film having a thickness of about 500 nm is deposited as the surface protective layer 41 by plasma CVD using SiH ₄ gas (FIG. 6N).

  Subsequently, in order to form the insulating film pits 8, first, the surface protection layer 41 (Si oxide film) on the periphery of the high resistance polycrystalline Si film 32 in the heating resistor layer 6 and the second insulating film 36b (by the dry etching method). The Si oxide film is removed by etching (FIG. 6O). Here, the Bonding Pad 39 is also formed at the same time.

  Subsequently, the etching stopper layer 7 around the high resistance polycrystalline Si film 32 in the heating resistor layer 6 is removed by dry etching (FIG. 6P).

  Subsequently, the first insulating film 36a (Si oxide film) on the periphery of the high resistance polycrystalline Si film 32 in the heating resistor layer 6 is removed by dry etching (FIG. 7Q).

  In this manner, an opening as the insulating film pit 8 is provided on the heating resistor layer 6. This insulating film pit 8 includes a film having a different three-layer structure (first insulating film 36a (Si oxide film made of NSG film), etching stopper layer 7 (polycrystalline Si film), second insulating film 36b, In order to remove the three-layer structure (Si oxide film formed by plasma CVD composed of the surface protective layer 41), the wet etching method used in the processing of the conventional example causes so-called undercut, so that both etching is performed. It is difficult to control the shape unless the rate is adjusted with high accuracy. In this respect, the dry etching method has an advantage that a film having a three-layer structure can be processed with good shape controllability because it can be processed substantially vertically regardless of the film type.

  Finally, a Si nitride film and a Ta film are formed as the ink resistant layer 40 (FIG. 7R). Here, the Si nitride film was deposited by a plasma CVD method using ammonia-based gas, and a Ta film was deposited thereon by a sputtering method. These two-layer films are patterned by a photolithography method and a plasma etching method using a fluorine-based gas.

  Finally, a polyimide resin layer 42 for forming a flow path is formed to complete the manufacture of the heater substrate (FIG. 7 (S)).

  Here, FIG. 8 shows a partially enlarged view of the heating resistor layer 6 of the heater substrate 3 in FIGS. 6 (N) to 7 (Q). In the figure, 75 is a Si oxide film (first insulating layer) which is the first insulating film 36a, 74 is a polycrystalline Si film as the etching stopper layer 7, and 73 is the second insulating film 36b. A Si oxide film (second insulating layer) in which the surface protective layer 41 is grouped together, and 72 is an etching mask (photoresist) for opening the pits 8 of the insulating film. The film thicknesses of the Si oxide film 73, the polycrystalline Si film 74, and the Si oxide film 75 are d1, d2, and d3, respectively.

Specifically, in FIGS. 6N to 7Q, first, the Si oxide film 73 is etched by, for example, the RIE method using CHF ₃ / CF ₄ gas (FIG. 8O). At this time, the etching rate of the Si oxide film 73 is E1, the etching selection ratio with the underlying polycrystalline Si film 74 is S1, and the overetching rate is A1%. At this time, the polycrystalline Si film 74 in the etching region is slightly etched during overetching. The remaining film thickness d2 ′ at this time can be described by the following equation (3).
Formula (3): d2 ′ = d2−d1 × A1 / 100 / S1

Next, the polycrystalline Si film 74 is etched by RIE using CF ₄ gas (FIG. 8P). At this time, the etching rate of the polycrystalline Si film 74 is E2, the etching selectivity with the underlying Si oxide film 75 is S2, and the overetching rate is A2. At this time, the Si oxide film 73 in the etching region is slightly etched during overetching. The remaining film thickness d3 ′ at this time can be described by the following equation (4).
Formula (4): d3 ′ = d3−d2 ′ × A2 / 100 / S2

Next, the Si oxide film 75 is etched by the RIE method using CHF ₃ / CF ₄ gas (FIG. 8 (Q)).

  Here, in each of the steps shown in FIGS. 8Q and 8P, a film immediately under the material to be etched (polycrystalline Si film 74 in the former and Si oxide film 75 in the latter) remains at the time of completion of etching. It becomes important. If the film directly under the material to be etched is removed by etching at this stage, the film underneath is exposed and the etching of the film proceeds rapidly (because the etching rate is high). Then, the polycrystalline Si film 32 as the heating resistor layer 6 is exposed during the process, and the polycrystalline Si film 32 as the heating resistor layer 6 is exposed in the etching process of the polycrystalline Si film 74 (FIG. 8Q). It will be etched.

This leads to fluctuations in the resistance value when the polycrystalline Si film is thinned. In order to avoid this, it is preferable that the conditions shown by the following formulas (5) to (6) are satisfied in the etching process.
Formula (5): d2 ′> 0
Formula (6): d3 ′> 0

The following formulas (1) and (2) are obtained by substituting the formulas (3) and (4) into the formulas (5) and (6), respectively.
Formula (1): d2> d1 × A1 / 100 / S1
Formula (2): d3> A2 / 100 / S2 × (d2−d1 × A1 / 100 / S1)

Further, the overetching time, that is, the time T during which the polycrystalline Si film 32 as the heating resistor layer 6 is exposed to plasma is expressed by the following equation (7).
Formula (7): T = d3 ′ / E3 × A1 / 100

  Here, using the typical parameters shown in Table 1 below, the overetching time, that is, the time during which the polycrystalline Si film 32 as the heating resistor layer 6 is exposed to plasma is calculated. Although the margin) is set to 30%, which is the same as the conventional example, the overetching time T is 0.15 min, which is shortened to about 1/30 compared to the conventional example (4.5 min). The rate of increase in resistance and the uniformity within the wafer at this time are 0.9% and 1.7% from FIGS. 13 and 14, respectively, and satisfying the above formulas (1) and (2), the heating resistor The suppression of the increase in the resistance value of the layer 6 and the resistance value distribution are sufficiently improved.

  On the other hand, the flow path substrate 1 is the same as the conventional one. For example, in the Si substrate, a groove that becomes the liquid flow path 2 corresponding to the heating resistor portion 31 and the bypass flow path portion 43 that extends to the rear of the nozzle 9 are provided. And a through hole to be a reservoir 47 and a liquid supply port 46.

  And after aligning with the heater substrate 3 produced as mentioned above, it joins. Thereby, the ink jet recording head is manufactured.

  As described above, in this embodiment, the Si oxide film 73, the polycrystalline Si film 74 as the etching stopper layer 7, and the Si oxide film 75 are sequentially formed on the heating resistor layer 6, and these are formed according to individual etching conditions. When the plasma etching is removed, the over-etched portion (damage) is absorbed by the polycrystalline Si film 74 as the etching stopper layer 7 to shorten the time for the heating resistor layer 6 to be exposed to plasma, thereby reducing the heating resistor. The suppression of the increase in resistance value of the layer 6 and the resistance value distribution are improved.

  In particular, satisfying the above formulas (1) and (2) effectively shortens the time during which the heating resistor layer is exposed to plasma, and suppresses the increase in resistance value of the heating resistor layer 6 and the resistance value distribution. Improved.

  In this embodiment, the pits of the polyimide resin layer are formed outside the pits 8 of the insulating film, and the ink-resistant layer 40 is disposed so as to cover the first metal wiring layer 38 (FIG. 3). This can be realized because the surface protective layer 41 inserted between the first metal wiring layer 38 and the ink-resistant layer 40 can ensure insulation between these layers. In this embodiment, even if the polyimide resin layer 42 is peeled off during repeated printing operations and ink enters from the interface, the surface protective layer 41 and the first metal wiring layer 38 are ink resistant layers (Ta and It is protected by the two-layered Si nitride film) and does not cause melting and disconnection failure.

  In the present embodiment, the ink-resistant layer 40 extends to the rear of the nozzle 9 and constitutes a part (bottom) of the bypass flow path portion 43 (see FIG. 2).

(Second Embodiment)
The first embodiment has been described with respect to an example in which a single-layer metal wiring process is used. However, depending on the specifications of the head, there may be a case where a large amount of current needs to flow. In order to suppress the voltage drop problem and the like, a method of forming the power supply wiring and the GND wiring with a second-layer metal wiring is used (for example, see Japanese Patent Laid-Open No. 2000-108355). The present invention can also be applied to a metal wiring process having two or more layers.

  Therefore, in the present embodiment, a mode in which the second-layer metal wiring is formed will be described.

  FIG. 9 is a cross-sectional view of an ink jet recording head according to the second embodiment of the present invention. In the present embodiment, the first metal wiring layer 62 (first metal wiring layer 38) and the surface protective layer 41 are provided. A second-layer interlayer insulating film 63 is added between them, and a second-layer metal wiring layer 65 is provided on the second-layer interlayer insulating film 63.

  10 to 11 are flowcharts showing the manufacturing process of the heater substrate in the ink jet recording head according to the second embodiment of the present invention. Here, since the process up to the first-layer metal wiring formation is the same as that in FIGS. 3A to 5M in the first embodiment, the description thereof will be omitted, and the process will be described from FIG.

  First, the first metal wiring layer 62 and the second metal wiring layer 65 formed on the first interlayer insulating film 61 made of the first insulating film 36a and the second insulating film 36b. A second interlayer insulating film 63 is formed to electrically insulate them from each other (FIG. 10N). Here, a Si oxide film of about 700 nm formed by plasma CVD using silane-based gas is used.

  Subsequently, a so-called VIA opening 64 serving as a connection port between the first metal wiring layer 62 and the second metal wiring layer 65 is opened by a photolithography method and a dry etching method using a fluorine-based gas (see FIG. 10 (O)).

  Next, a second metal wiring layer 65 is formed (FIG. 10P). Here, an Al-1% Si film having a thickness of about 1 μm deposited by sputtering was used as a material for the metal wiring, and patterning was performed by a photolithography method and a dry etching method using a chlorine-based gas. Here, in the figure, 66 indicates a power supply wiring layer, and 67 indicates a ground wiring layer.

  Subsequently, a surface protective layer 41 of the device is formed (FIG. 11 (Q)). Here, an Si oxide film having a thickness of about 500 nm formed by a plasma CVD method using a silane-based gas is used.

  Subsequently, a film above the heating resistor layer 6 (first insulating film 36a (Si oxide film made of NSG: first insulating layer) as the first interlayer insulating film 61) and etching stopper layer 7 (polycrystalline Si), a second insulating film 36b as the first interlayer insulating film 61, a second interlayer insulating film 63, and a surface protection layer 41, and a Si oxide film (second insulating layer) formed by plasma CVD. And the three-layer film structure) are sequentially removed by a photolithography method and a dry etching method using a fluorine-based gas as in the first embodiment to form the insulating film pits 8 (FIG. 11 (R )). At the same time, the Bonding Pad 39 is opened.

  Subsequently, a laminated film of a Si nitride film and a Ta film is formed as the ink resistant layer 40 (FIG. 11S). Here, the Si nitride film was deposited by a plasma CVD method using ammonia-based gas, and a Ta film was deposited thereon by a sputtering method. These two-layer films are patterned by a photolithography method and a plasma etching method using a fluorine-based gas.

  Finally, a polyimide resin layer 42 for forming a flow path is formed to complete the production of the heater substrate (FIG. 11 (T)). Here, photosensitive polyimide was used, and pits of the polyimide resin layer were opened by exposure and development. The end of the pit is arranged so as to be located outside the insulating film pit 8.

  In this way, the heater substrate 3 is manufactured.

  In the present embodiment, the power supply wiring and the ground electrode wiring constituted by the two-layer metal wiring are formed without degrading the LSI device characteristics even when the polycrystalline Si used as the gate electrode material of the LSI is used as the heating resistor layer 6. This makes it possible to suppress uneven printing due to a voltage drop in the power supply wiring (higher image quality).

  In addition, this embodiment can be realized at low cost because the LSI gate electrode material is used as a heating resistor (common). Further, since the folded electrode wiring and the heater pit are processed by the RIE method, the structure is advantageous for miniaturization.

  In the present embodiment, (1) the length of the polycrystalline Si portion serving as the parasitic resistance can be shortened. As a result, the parasitic resistance can be reduced, and improvement in energy efficiency (and improvement in printing speed associated therewith) can be achieved. (2) Since the metal wiring layer is protected by the ink-resistant layer, it is possible to achieve a long life (improvement of reliability). (3) Since the polyimide resin layer can be made into one layer, the cost can be reduced.

  In addition, although this embodiment demonstrated the manufacturing method of the inkjet recording head, it can be applied also to the manufacturing method of the heating resistor utilized for a biochemical chip etc., for example.

  In any of the above-described embodiments, it is needless to say that the present invention is not construed in a limited manner and can be realized within the range satisfying the requirements of the present invention.

FIG. 2 is a plan configuration diagram of a heater substrate in the ink jet recording head according to the first embodiment of the present invention. 1 is a cross-sectional view of an ink jet recording head according to a first embodiment of the present invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 1st Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 1st Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 1st Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 1st Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 1st Embodiment of this invention. It is the elements on larger scale which show the heating resistor layer of the heater substrate in Drawing 6 (N)-Drawing 7 (Q). It is sectional drawing of the inkjet recording head which concerns on the 2nd Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 2nd Embodiment of this invention. It is a flowchart which shows the manufacturing process of the heater board | substrate in the inkjet recording head which concerns on the 2nd Embodiment of this invention. It is a figure which shows the ink drop production | generation process in a thermal type inkjet recording head. It is a figure which shows the overetching dependency of the resistance value in a heating resistor layer. It is a figure which shows the over-etching dependence of the resistance value uniformity in a heating resistor layer. It is sectional drawing which shows the layer structure on the heating resistor layer at the time of calculating the conventional overetching time.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Channel substrate 2 Liquid channel 3 Heater substrate 4 Independent electrode 5 Common electrode 6 Heating resistor layer 7 Etching stopper layer 8 Insulating film pit 9 Nozzle 31 Heating resistor part 36a First insulating film 36b Second insulating film 37 Contact hole 38 First metal wiring layer 40 Ink-resistant layer 41 Surface protective layer 42 Polyimide resin layer 43 Bypass channel portion 44 Field oxide film 45 Logic circuit portion 46 Liquid supply port 47 Reservoir 61 First layer interlayer insulating film ( (First insulating film, second insulating film)
62 First layer metal wiring layer 63 Interlayer insulating film 64 Opening 65 Second layer metal wiring layer 73 Si oxide film 74 Polycrystalline Si film 75 Si oxide film

Claims (12)

Sequentially forming a first insulating layer, an etching stopper layer, and a second insulating layer on the heating resistor layer;
Removing the second insulating layer, the etching stopper layer, and the first insulating layer sequentially by etching under respective etching conditions to form an opening on a partial region of the heating resistor layer;
A method for producing a heating resistor, comprising:   2. The method of manufacturing a heating resistor according to claim 1, wherein the first and second insulating layers are made of a silicon oxide film.   The method for manufacturing a heating resistor according to claim 1, wherein the etching stopper layer is made of a silicon film.   2. The method of manufacturing a heating resistor according to claim 1, wherein the etching stopper layer is a silicon film formed by a chemical vapor deposition method.   The method of manufacturing a heating resistor according to claim 1, wherein the etching stopper layer is a polycrystalline silicon film. When the first insulating layer, the etching stopper layer, and the second insulating layer have film thicknesses d1, d2, and d3, selection ratios S1, S2, and S3, and overetch rates A1, A2, and A3, respectively. The manufacturing method of the heating resistor according to claim 1, wherein the relational expressions represented by the following formulas (1) and (2) are satisfied.
Formula (1): d2> d1 × A1 / 100 / S1
Formula (2): d3> A2 / 100 / S2 × (d2−d1 × A1 / 100 / S1) A method of manufacturing an ink jet recording head having a heating resistor layer for applying thermal energy to ink and ejecting the ink,
Sequentially forming a first insulating layer, an etching stopper layer, and a second insulating layer on the heating resistor layer;
Removing the second insulating layer, the etching stopper layer, and the first insulating layer sequentially by etching under respective etching conditions to form an opening on a partial region of the heating resistor layer;
An ink jet recording head manufacturing method comprising:   8. The method of manufacturing an ink jet recording head according to claim 7, wherein the first and second insulating layers are made of a silicon oxide film.   The method of manufacturing an ink jet recording head according to claim 7, wherein the etching stopper layer is made of a silicon film.   8. The method of manufacturing an ink jet recording head according to claim 7, wherein the etching stopper layer is a silicon film formed by chemical vapor deposition.   8. The method of manufacturing an ink jet recording head according to claim 7, wherein the etching stopper layer is a polycrystalline silicon film. When the first insulating layer, the etching stopper layer, and the second insulating layer have film thicknesses d1, d2, and d3, selection ratios S1, S2, and S3, and overetch rates A1, A2, and A3, respectively. The method of manufacturing an ink jet recording head according to claim 7, wherein the relational expressions represented by the following formulas (1) and (2) are satisfied.
Formula (1): d2> d1 × A1 / 100 / S1
Formula (2): d3> A2 / 100 / S2 × (d2−d1 × A1 / 100 / S1)

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