JP2005038461A - Mute circuit and mute method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mute method which always gives a small offset amount of DC offset and has a short detection wait time Td. <P>SOLUTION: A circuit between a point A terminal to which an AC input signal Sin to be muted by an execution trigger of a mute control signal D1 and a point B terminal is opened. By the execution trigger, a potential of an AC ground AC GND is selected and is outputted as a reference potential. A potential at the point B terminal is made equal to the reference potential, and a cross timing D8 at which the potential at the point B terminal is equal to the reference potential is detected. A circuit between the AC ground ACGND and the point B terminal is short-circuited by the cross timing D8. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a mute circuit for muting an AC signal and a mute method.
[0002]
[Prior art]
A device that outputs sound, such as a stereo, CD recorder, or MD recorder, has a mute device. The mute device can instantaneously reduce the sound output to zero. The mute device inputs and outputs an AC signal as a sound source, but when an execution trigger for prompting mute is input from the mute control signal, the output of the AC signal is set to zero.
[0003]
As shown in FIG. 4, an AC signal input Sin is input to the mute device, and an AC signal output Sout is output. Since the AC signal input Sin serving as the sound source is considered to be a synthesized wave obtained by synthesizing a sine wave, an AC grounding AC GND can be set for the sine wave. As a mute execution trigger, the level of the mute control signal changes from mute off MUTEOFF to mute on MUTEON. The AC signal output Sout is instantaneously held at the level of the AC ground AC GND by the mute execution trigger. A DC offset occurs as a potential difference between the AC signal outputs Sout before and after the execution trigger. Since the input timing of the mute execution trigger is asynchronous with the AC signal output, the offset amount of the DC offset is randomly generated. When the offset amount is large, abnormal noise may occur.
[0004]
Therefore, as shown in FIG. 5, after the zero cross detection is performed and the mute execution trigger is input, the zero cross signal output is output when the AC signal output Sout coincides with the AC grounding AC GND. The output Sout is instantaneously held at the level of AC grounding AC GND (see, for example, Patent Document 1). The offset amount of the DC offset was always small.
[0005]
However, as shown in FIG. 6, when zero cross detection is used, a detection waiting time Td from when the mute execution trigger is input until the zero cross signal output is output occurs. When the frequency of the AC signal input Sin is low, the detection standby time Td may become long. When the detection waiting time Td becomes long, the operator may mistakenly recognize that the mute device does not function.
[0006]
Then, as shown in FIG. 7, a forced mute time Tf is set, and when the detection standby time Td becomes longer than the forced mute time Tf, the mute is forcibly applied to the AC signal output Sout. In this case, there is no operator misidentification, but there is no effect of zero cross detection, and the offset amount of the DC offset may increase.
[0007]
[Patent Document 1]
JP 2001-313963 A (Claim 1)
[0008]
[Problems to be solved by the invention]
The present invention has been made in view of the above circumstances, and an object thereof is to provide a mute device in which the offset amount of the DC offset is always small and the detection standby time Td is short.
[0009]
Another object of the present invention is to provide a mute method in which the offset amount of the DC offset is always small and the detection waiting time Td is short.
[0010]
[Means for Solving the Problems]
A first feature of the present invention for solving the above-described problem is that a mute circuit for muting an AC input signal Sin by an execution trigger of a mute control signal is a point A terminal and a point B terminal to which an AC input signal is input. A switch for holding that opens and closes, a mute switch that opens and closes between the AC ground and the B point terminal, a capacitor having one end connected to the B point terminal and the other end grounded, and the potential of the AC ground by the execution trigger A reference potential selection unit that selects and outputs as a reference potential, a charge / discharge unit that charges and discharges the capacitor until the potential at the B point terminal becomes equal to the reference potential, and a cross timing at which the potential at the B point terminal equals the reference potential There is a cross detection section to detect, and a control section that turns off the hold switch by the execution trigger and turns on the mute switch by the cross timing. There in that mute circuit.
[0011]
According to a second aspect of the present invention, in a mute method for muting an AC input signal by an execution trigger of a mute control signal, the point A terminal and the B point terminal to which the AC input signal is input by the execution trigger are opened. Then, the AC ground potential is selected by the execution trigger and output as a reference potential, the potential at the B point terminal is made equal to the reference potential, and the cross timing at which the potential at the B point terminal becomes equal to the reference potential is detected. And a mute method having a short circuit between the AC ground and the B point terminal by cross timing.
[0012]
A third feature of the present invention is a mute method in which an AC input signal is muted by an execution trigger of a mute control signal. A constant from an AC input signal potential to an AC ground potential when the execution trigger is input by the execution trigger. The mute method includes changing the output potential at a rate and maintaining the output potential at the AC ground potential after the output potential reaches the AC ground potential.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. It should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones.
[0014]
(Comparative example)
As shown in FIG. 8, the mute device of the comparative example receives an AC signal input Sin and a mute control signal D1, and outputs an AC signal output Sout. The mute device of the comparative example includes a control unit 11, a zero cross detection unit 12, analog switches ASW1, ASW2, a buffer BUF, and a resistor R.
[0015]
The zero cross detector 12 detects the timing of the intersection of the AC signal input Sin and the AC ground AC GND, and outputs a zero cross signal output.
[0016]
When the zero cross signal output is input after the input of the mute execution trigger of the mute control signal D1, the control unit 11 instantaneously opens the analog switch ASW1 and shorts the analog switch ASW2. As a result, the connection of the AC signal output Sout is switched from the AC signal input Sin to the AC ground AC GND. The detection waiting time Td is from the input of the mute execution trigger of the mute control signal D1 to the output of the zero cross signal.
[0017]
The timing charts of FIGS. 5 and 6 can be implemented by the mute device of the comparative example (mute device).
The mute circuit according to the embodiment of the present invention uses both signal waveform holding and a charge pump in addition to zero cross detection. As a result, the DC offset can be reduced and the waiting time until the zero cross detection can be improved.
[0018]
As shown in FIG. 1, the mute circuit according to the embodiment of the present invention includes a sample hold capacitor CH and a sample hold capacitor charge / discharge comparator output as compared with the comparative example of FIG. The detection unit is changed to the reference potential selection unit 4 and the cross detection unit 2, and the analog switch is divided into a mute analog switch M-ASW and a hold analog switch H-ASW depending on the application.
[0019]
More specifically, the mute circuit according to the embodiment of the present invention includes a hold switch H-ASW, a mute switch M-ASW, a capacitor CH, a reference potential selection unit, a charge / discharge unit, and a cross detection unit. And a control unit, a resistor R, and a buffer BUF. The mute circuit mutes the AC input signal Sin by the execution trigger of the mute control signal D1, and further cancels the mute of the AC input signal Sin by the release trigger of the mute control signal D1. The mute circuit outputs an AC output signal Sout obtained by muting and releasing the AC input signal Sin.
[0020]
The hold switch H-ASW opens and closes between the point A terminal and the point B terminal to which the AC input signal Sin is input by the output signal D3 from the control unit 1.
[0021]
The mute switch M-ASW opens and closes between the AC ground AC GND and the point B terminal by the output signal D2 from the control unit 1.
[0022]
The capacitor CH has one end connected to the B point terminal and the other end grounded.
[0023]
Based on the output signal D4 from the control unit 1, the reference potential selection unit 4 selects the potential of the AC ground AC GND by the execution trigger and outputs it as a reference potential to the E point terminal. Based on the output signal D4 from the control unit 1, the reference potential selection unit 4 selects the potential at the point A terminal by the release trigger, and outputs it as the reference potential to the point E terminal. The reference potential selection unit 4 includes a point A selection switch A-ASW and an AC ground selection switch GND-ASW. The A point selection switch A-ASW is turned off by the execution trigger and turned on by the release trigger. The AC grounding selection switch GND-ASW is turned on by the execution trigger and turned off by the release trigger.
[0024]
Based on the output signal D5 from the control unit 1, the charging / discharging unit 3 charges and discharges the capacitor CH with a constant current until the potential at the B point terminal becomes equal to the reference potential at the E point terminal. The charging / discharging unit 3 includes a comparator Comp and charge pumps I1 and I2. The comparator Comp determines whether the potential at the point B terminal is higher or lower than the reference potential based on the output signal D5 from the control unit 1. The charge pumps I1 and I2 discharge the capacitor CH when the determination is high and charge the capacitor CH when the determination is low. The charge pumps I1 and I2 include a charging constant current source I1 and a discharging constant current source I2. Based on the output signal D7 from the comparator Comp, the charging constant current source I1 supplies a current to the B point terminal in the case of a low determination. The constant current source for discharge I2 allows a current to flow from the B point terminal in the case of high determination based on the output signal D6 from the comparator Comp.
[0025]
The cross detection unit 2 detects a cross timing D8 at which the potential at the terminal B is equal to the reference potential.
[0026]
The control unit 1 turns off the hold switch H-ASW by the execution trigger, and turns on the mute switch M-ASW at the cross timing D8 immediately after the execution trigger. The control unit 1 turns off the mute switch M-ASW by the release trigger, and turns on the hold switch H-ASW at the cross timing D8 immediately after the release trigger.
[0027]
The resistor R is connected between the point A terminal and the AC ground AC GND.
[0028]
The buffer BUF is connected between the B point terminal and the C point terminal. An AC output signal Sout obtained by muting and releasing the AC input signal Sin is output from the point C terminal.
[0029]
(Mute method)
The mute method according to the embodiment of the present invention will be described separately for a mute method and a mute release method.
[0030]
(Mute method)
In the mute method of the mute method according to the embodiment of the present invention, the AC input signal Sin is muted by the execution trigger of the mute control signal D1.
[0031]
As shown in FIG. 2, an AC signal input Sin is input from a point A terminal. An AC signal output Sout is output from the point C terminal. The voltage waveform at the point B terminal is equal to the voltage waveform at the point C terminal.
[0032]
As initial conditions, the cross detection is turned off, the operation of the CH charge / discharge comparator Comp is turned off, the hold switch H-ASW is opened, and the mute switch M-ASW is closed.
[0033]
The mute (MUTE) control signal D1 is switched from mute off (MUTEOFF) to mute on (MUTEON) as an execution trigger by an operator or the like. The output signal D4 from the control unit 1 is also switched from off to on. The output signal D3 from the control unit 1 is also switched.
[0034]
The control unit 1 switches the hold switch H-ASW from on to off by the execution trigger, and opens between the point A terminal and the point B terminal to which the AC input signal Sin is input. The potential at the B point terminal is so-called sample-held by holding the potential at the A point terminal when the execution trigger is input.
[0035]
Based on the output signal D4 by the execution trigger, the reference potential selection unit 4 selects the potential of the AC ground AC GND and outputs it as the reference potential.
[0036]
The charging / discharging unit 3 makes the potential at the point B terminal equal to the reference potential. The operation of the CH charge / discharge comparator Comp is turned on. The comparator Comp determines whether the potential at the B point terminal is higher or lower than the reference potential. The comparator Comp controls the CH charge / discharge currents I1 and I2 so that the potential difference between the potential at the B point terminal and the AC ground AC GND is eliminated. The comparator Comp discharges the capacitor CH with the CH discharging current I2 when the determination is high, and with the CH charging current I1 when the determination is low. The CH charge / discharge currents I1 and I2 are set to constant currents. As a result, the slope of the AC signal output Sout can be made constant.
[0037]
The cross detection unit 2 enters a cross detection standby state between the potential of the point B terminal and the potential of the AC ground AC GND at the timing immediately after the sample hold. The cross detection unit 2 detects a cross timing D8 at which the potential of the B point terminal is equal to the potential of the AC ground AC GND that is the reference potential. At the cross timing D8, the control unit 1 outputs the output signal D2.
[0038]
The control unit 1 switches the mute switch M-ASW from OFF to ON by the output signal D2 by the cross timing D8, and shorts between the AC ground AC GND and the point B terminal. Since the potential difference between the AC ground AC GND and the point B terminal at the time of this short circuit is very small, the occurrence of DC offset is also small.
[0039]
Finally, the control unit 1 turns off the operation of the CH charging comparator Comp, and turns off the charging / discharging currents I1 and I2 to the capacitor CH.
[0040]
As described above, the execution trigger can change the potential of the AC signal output Sout at a constant rate from the potential of the AC input signal Sin when the execution trigger is entered to the potential of the AC ground AC GND. After the potential of Sout reaches the potential of AC grounding AC GND, the potential of AC signal output Sout can be maintained at the potential of AC grounding AC GND. And detection waiting time Td can be made small. The detection standby time Td is determined by the capacitance of the capacitor CH, the potential at the terminal A when the execution trigger is input, and the current values of the charge / discharge currents I1 and I2.
[0041]
(How to unmute)
The mute release method of the mute method according to the embodiment of the present invention is the mute method according to the embodiment of the present invention, in which the AC input signal Sin is unmuted by the release trigger of the mute control signal D1.
[0042]
As shown in FIG. 3, an AC signal input Sin is input from a point A terminal. An AC signal output Sout is output from the point C terminal. The voltage waveform at the point B terminal is equal to the voltage waveform at the point C terminal.
[0043]
As initial conditions, cross detection is turned off, the operation of the CH charge / discharge comparator Comp is turned off, the hold switch H-ASW is closed, and the mute switch M-ASW is opened.
[0044]
The mute control signal D1 is switched from mute on to mute off as a release trigger by an operator or the like. The output signal D4 from the control unit 1 is also switched from on to off. The output signal D2 from the control unit 1 is also switched.
[0045]
The control unit 1 switches the mute switch M-ASW from on to off by the output signal D2 from the release trigger, and opens between the AC ground AC GND and the point B terminal. As a result, the potential at the B point terminal is so-called sampled and held by holding the potential of the AC ground AC GND when the release trigger is input.
[0046]
The reference potential selection unit 4 selects the potential at the A point terminal based on the output signal D4 by the release trigger, and outputs it as the reference potential.
[0047]
The charging / discharging unit 3 makes the potential at the point B terminal equal to the reference potential. The operation of the CH charge / discharge comparator Comp is turned on. The comparator Comp determines whether the potential at the B point terminal is higher or lower than the reference potential. The comparator Comp controls the CH charging / discharging currents I1 and I2 so that the potential difference between the potential at the B point terminal and the potential at the A point terminal is eliminated. The CH charge / discharge currents I1 and I2 are set to constant currents. As a result, the slope of the AC signal output Sout can be made constant.
[0048]
The cross detection unit 2 enters a standby state for cross detection between the potential at the B point terminal and the potential at the A point terminal at the timing immediately after the sample hold. The cross detection unit 2 detects a cross timing D8 at which the potential at the point B terminal is equal to the potential at the point A which is the reference potential. At the cross timing D8, the control unit 1 outputs an output signal D3.
[0049]
The control unit 1 switches the hold switch H-ASW from off to on by the output signal D3 at the cross timing D8, and shorts between the point A terminal and the point B terminal. Since the difference potential between the point A terminal and the point B terminal at the time of this short circuit is minute, the occurrence of DC offset is also minute.
[0050]
Finally, the control unit 1 turns off the operation of the CH charging comparator Comp, and turns off the charging / discharging currents I1 and I2 to the capacitor CH.
[0051]
As described above, the release trigger can change the potential of the AC output signal Sout at a constant rate from the potential of the AC ground AC GND to the potential of the AC input signal Sin, and the potential of the AC output signal Sout becomes the AC input signal. After reaching the potential of Sin, the potential of the AC output signal Sout can be made to follow the potential of the AC input signal Sin. And detection waiting time Td can be made small.
[0052]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a mute device in which the offset amount of the DC offset is always small and the detection standby time Td is short.
[0053]
Furthermore, according to the present invention, it is possible to provide a mute method in which the offset amount of the DC offset is always small and the detection waiting time Td is short.
[Brief description of the drawings]
FIG. 1 is a block diagram of a mute device according to an embodiment.
FIG. 2 is a timing chart when the mute apparatus according to the embodiment performs mute.
FIG. 3 is a timing chart when the mute device according to the embodiment performs mute release.
FIG. 4 is a timing chart when muting is performed without conventional zero-cross detection.
FIG. 5 is a timing chart (No. 1) when muting is performed by conventional zero cross detection;
FIG. 6 is a timing chart (part 2) when muting is performed by conventional zero-cross detection.
FIG. 7 is a timing chart when muting is performed by detecting a zero cross having a conventional forced mute time.
FIG. 8 is a block diagram of a mute device that performs muting by detecting zero-crossing in a comparative example.
[Explanation of symbols]
1 Control Unit 2 Cross Detection Unit 3 Charge / Discharge Unit 4 Reference Potential Selection Unit

Claims (12)

In the mute circuit for muting the AC input signal by the execution trigger of the mute control signal,
A holding switch that opens and closes between the point A terminal and the point B terminal to which the AC input signal is input;
A mute switch for opening and closing between the AC ground and the point B terminal;
A capacitor having one end connected to the point B terminal and the other end grounded;
A reference potential selection unit that selects an AC ground potential according to the execution trigger and outputs the selected potential as a reference potential;
A charging / discharging unit for charging / discharging the capacitor until the potential at the point B terminal is equal to the reference potential;
A cross detection unit for detecting a cross timing at which the potential of the point B terminal and the reference potential are equal;
A mute circuit comprising a control unit for turning off the hold switch by the execution trigger and turning on the mute switch by the cross timing. When the mute circuit further cancels the mute of the AC input signal by a cancel trigger of the mute control signal,
The reference potential selection unit selects the potential of the point A terminal by the release trigger, and outputs the selected potential as the reference potential.
2. The mute circuit according to claim 1, wherein the control unit turns off the mute switch by the release trigger and turns on the hold switch by the cross timing. The mute circuit according to claim 1, wherein the charging / discharging unit charges and discharges the capacitor with a constant current. The charging / discharging unit is
A comparator for determining whether the potential at the point B terminal is higher or lower than the reference potential;
4. The mute circuit according to claim 1, further comprising a charge pump that discharges the capacitor when the voltage is high and charges the capacitor when the voltage is low. The charge pump is
A constant current source for charging that causes a current to flow to the B point terminal in the low case;
5. The mute circuit according to claim 4, further comprising a discharge constant current source for supplying a current from the point B terminal when the height is high. The reference potential selection unit is
A point selection switch that is turned off by the execution trigger and turned on by the release trigger;
6. The mute circuit according to claim 2, further comprising an AC grounding selection switch that is turned on by the execution trigger and turned off by the release trigger. In a mute method for muting an AC input signal by an execution trigger of a mute control signal,
Opening between the point A terminal and the point B terminal to which the AC input signal is input by the execution trigger;
By selecting the AC ground potential by the execution trigger and outputting as a reference potential;
Making the potential at the point B terminal equal to the reference potential;
Detecting a cross timing at which the potential at the terminal B is equal to the reference potential;
A mute method comprising: short-circuiting between the AC ground and the point B terminal by the cross timing. When the mute method further performs mute release of the AC input signal by a release trigger of the mute control signal,
Opening between the AC ground and the point B terminal by the release trigger;
Selecting the potential of the point A terminal by the release trigger and outputting as the reference potential;
8. The mute method according to claim 7, further comprising short-circuiting between the point A terminal and the point B terminal by the cross timing. 9. The method according to claim 7, wherein making the potential of the point B terminal equal to the reference potential includes charging and discharging a capacitor connected to the point B terminal with a constant current. Mute method. Making the potential at the point B terminal equal to the reference potential,
Determining whether the potential at the point B terminal is higher or lower than the reference potential;
10. The mute method according to claim 9, comprising discharging the capacitor when the voltage is high and charging the capacitor when the voltage is low. In a mute method for muting an AC input signal by an execution trigger of a mute control signal,
Changing the potential of the output at a constant rate from the potential of the AC input signal when the execution trigger is entered to the potential of the AC ground by the execution trigger;
A mute method comprising: maintaining the output potential at the AC ground potential after the output potential reaches the AC ground potential. When the mute method further performs mute release of the AC input signal by a release trigger of the mute control signal,
Changing the output potential at a constant rate from the AC ground potential to the AC input signal potential by the release trigger;
12. The mute method according to claim 11, further comprising: causing the output potential to follow the potential of the AC input signal after the potential of the output reaches the potential of the AC input signal.

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