JP2005033689A - Surface acoustic wave device and manufacturing method thereof - Google Patents

Surface acoustic wave device and manufacturing method thereof Download PDF

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JP2005033689A
JP2005033689A JP2003273167A JP2003273167A JP2005033689A JP 2005033689 A JP2005033689 A JP 2005033689A JP 2003273167 A JP2003273167 A JP 2003273167A JP 2003273167 A JP2003273167 A JP 2003273167A JP 2005033689 A JP2005033689 A JP 2005033689A
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electrode
acoustic wave
surface acoustic
insulating layer
wave device
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Ryota Nagashima
了太 長島
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Toyo Communication Equipment Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface acoustic wave device and manufacturing method thereof which secure leading flexibility in re-wiring without providing a printed board and which can easily structure a vibration space in a surface acoustic wave device of a wafer level CSP (Chip Size Package) structure where a hollow close space is provided around an excitation function portion. <P>SOLUTION: A surface acoustic wave filter having an excitation function portion 22 and a pad electrode 23 is formed on one of the main surface of a piezoelectric substrate 21. A surface acoustic wave device is provided with a first insulation layer 24 formed on a region except a pad electrode portion 23, a wiring pattern 25 with electronic continuity which includes the pad electrode 23 and which is formed on the first insulation layer 24, a second insulation layer 26 formed on the wiring pattern 25, an external electrode 27 formed on the second insulation layer 26, and a column electrode 28 connecting the wiring pattern 25 buried in the second insulation layer 26 and the external electrode 27 so as to have an electronic continuity. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、圧電基板の表面に電極を形成してなる弾性表面波装置に関し、特に、励振機能部周りに中空の閉空間を設けたウェハレベルCSP(Chip Size Package)構造の弾性表面波装置及びその製造方法に関するものである。   The present invention relates to a surface acoustic wave device in which electrodes are formed on the surface of a piezoelectric substrate, and more particularly, to a surface acoustic wave device having a wafer level CSP (Chip Size Package) structure in which a hollow closed space is provided around an excitation function portion, and It relates to the manufacturing method.

弾性表面波装置として代表される弾性表面波フィルタは、通信分野で広く利用され、高性能、小型、量産性等の優れた特徴を有することから、特に携帯電話機等の移動体通信機器に多く用いられている。例えば、携帯電話機のRF部に用いられるフィルタの1つとして、1次と3次の縦モードを利用した広帯域の縦結合ダブルモード弾性表面波フィルタ(以下、縦結合DMSフィルタと称す)がある。中でも、急峻な減衰傾度及び大きな保証減衰量を必要とする場面では、圧電基板上に縦結合DMSフィルタを2個併置する縦続接続型縦結合DMSフィルタ(以下、縦続縦結合DMSフィルタと称す)が用いられている。   A surface acoustic wave filter typified by a surface acoustic wave device is widely used in the communication field, and has excellent features such as high performance, small size, and mass productivity. Therefore, it is often used for mobile communication devices such as mobile phones. It has been. For example, as one of the filters used in the RF unit of a cellular phone, there is a broadband longitudinally coupled double mode surface acoustic wave filter (hereinafter referred to as a longitudinally coupled DMS filter) using primary and tertiary longitudinal modes. In particular, in a scene that requires a steep attenuation gradient and a large guaranteed attenuation amount, a cascade connection type longitudinally coupled DMS filter (hereinafter referred to as a cascaded longitudinally coupled DMS filter) in which two longitudinally coupled DMS filters are juxtaposed on a piezoelectric substrate is used. It is used.

図13は、縦続縦結合DMSフィルタ素子の電極構造の一例を示す図であり、図14は、縦続縦結合DMSフィルタ素子を構成する個々の縦結合DMSフィルタの詳細説明図である。
図13に示す縦続縦結合DMSフィルタ素子11は、図14(a)に示した圧電基板の一方の主面に表面波の伝搬方向(図中矢印)に沿って、それぞれ互いに間挿し合う複数の電極指を有する一対の櫛形電極から成るIDT(Interdigital Transducer)電極1〜3を近接配置し、その両側にグレーティング反射器(以下、反射器と称す)4a、4bを配設してなる振動伝搬部、即ち縦結合DMSフィルタ5と、図14(b)に示した圧電基板の一方の主面に表面波の伝搬方向(図中矢印)に沿って、それぞれ互いに間挿し合う複数の電極指を有する一対の櫛形電極から成るIDT電極6〜8を近接配置し、その両側に反射器9a、9bを配設してなる振動伝搬部、即ち縦結合DMSフィルタ10とを備えている。
FIG. 13 is a diagram illustrating an example of an electrode structure of a cascaded vertically coupled DMS filter element, and FIG. 14 is a detailed explanatory diagram of individual vertically coupled DMS filters constituting the cascaded vertically coupled DMS filter element.
The cascaded longitudinally coupled DMS filter element 11 shown in FIG. 13 includes a plurality of pieces that are inserted into one main surface of the piezoelectric substrate shown in FIG. 14A along the direction of propagation of surface waves (arrows in the figure). Vibration propagating section in which IDT (Interdigital Transducer) electrodes 1 to 3 composed of a pair of comb electrodes having electrode fingers are arranged close to each other and grating reflectors (hereinafter referred to as reflectors) 4a and 4b are arranged on both sides thereof. That is, it has a longitudinally coupled DMS filter 5 and a plurality of electrode fingers that are inserted into each other along the surface wave propagation direction (arrow in the figure) on one main surface of the piezoelectric substrate shown in FIG. A pair of comb-shaped IDT electrodes 6 to 8 are arranged close to each other, and provided with a vibration propagation part, that is, a longitudinally coupled DMS filter 10 having reflectors 9a and 9b disposed on both sides thereof.

そして、縦結合DMSフィルタ5、10からは、信号入力用パッド電極INと、信号出力用パッド電極OUTと、アース電位用のパッド電極E1〜E4とが引き出し配線されている。
前記パッド電極INは縦結合DMSフィルタ5の中央近傍の基板端縁側に、パッド電極OUTは縦結合DMSフィルタ10の中央近傍の基板端縁側に、パッド電極E1〜E4は縦結合DMSフィルタ5と縦結合DMSフィルタ10との間隙に配設されると共に、当該パッド電極E1〜E4はパッド電極INとパッド電極OUTとを結ぶ線と直交するように一列に配設されている。また、縦結合DMSフィルタ5と縦結合DMSフィルタ10とが図中上下方向に線対称に配置されており、縦結合DMSフィルタ5と縦結合DMSフィルタ10とにパッド電極E1〜E4、パッド電極IN、パッド電極OUT夫々を電気的に接続するリードラインは圧電基板の中央を基準として点対称になるように引き回されている。
From the vertically coupled DMS filters 5 and 10, a signal input pad electrode IN, a signal output pad electrode OUT, and pad electrodes E1 to E4 for ground potential are led out.
The pad electrode IN is on the substrate edge side near the center of the longitudinally coupled DMS filter 5, the pad electrode OUT is on the substrate edge side near the center of the longitudinally coupled DMS filter 10, and the pad electrodes E1 to E4 are longitudinally connected to the longitudinally coupled DMS filter 5. The pad electrodes E1 to E4 are arranged in a row so as to be orthogonal to a line connecting the pad electrode IN and the pad electrode OUT. Further, the longitudinally coupled DMS filter 5 and the longitudinally coupled DMS filter 10 are arranged in line symmetry in the vertical direction in the figure, and the pad electrodes E1 to E4 and the pad electrode IN are disposed on the longitudinally coupled DMS filter 5 and the longitudinally coupled DMS filter 10. The lead lines electrically connecting the pad electrodes OUT are routed so as to be point-symmetric with respect to the center of the piezoelectric substrate.

更に、リードラインの引き回しを詳細に説明すると、IDT電極1が備える櫛形電極1a(図中上側)の略中央からリードラインを上側方向に延ばし、パッド電極INに接続する。また、IDT電極6が備える櫛形電極6a(図中下側)の略中央からリードラインを下側方向に延ばし、パッド電極OUTに接続する。
IDT電極1が備える櫛形電極1b(図中下側)の略中央からリードラインを下側方向に延ばし、パッド電極E3に接続する。また、IDT電極6が備える櫛形電極6b(図中上側)の略中央からリードラインを上側方向に延ばし、パッド電極E2にそれぞれ接続する。
Further, the lead line routing will be described in detail. The lead line extends upward from the approximate center of the comb-shaped electrode 1a (upper side in the figure) included in the IDT electrode 1 and is connected to the pad electrode IN. Further, the lead line is extended downward from the approximate center of the comb-shaped electrode 6a (lower side in the figure) included in the IDT electrode 6 and connected to the pad electrode OUT.
A lead line is extended downward from substantially the center of the comb-shaped electrode 1b (lower side in the figure) included in the IDT electrode 1 and connected to the pad electrode E3. Further, the lead line is extended upward from the approximate center of the comb-shaped electrode 6b (upper side in the figure) provided in the IDT electrode 6 and connected to the pad electrode E2.

IDT電極2が備える櫛形電極2b(図中下側)の最下端辺の一部からリードラインを下側方向に延ばすと共にIDT電極8が備える櫛形電極8b(図中上側)の最上端辺の一部からリードラインを上側方向に延ばし、パッド電極E2の外側を経由して接続する。
また、IDT電極3が備える櫛形電極3b(図中下側)の最下端辺の一部からリードラインを下側方向に延ばすと共にIDT電極7が備える櫛形電極7b(図中上側)の最上端辺の一部からリードラインを上側方向に延ばし、パッド電極E3の外側を経由して接続する。
IDT電極2が備える櫛形電極2a(図中上側)の最上端辺の一部からリードラインを上側方向に延ばすと共にIDT電極8が備える櫛形電極8a(図中下側)の最下端辺の一部からリードラインを下側方向に延ばし、前記反射器4aと前記反射器9aとの左外側を経由してパッド電極E1にそれぞれ接続する。
また、IDT電極3が備える櫛形電極3a(図中上側)の最上端辺の一部からリードラインを上側方向に延ばすと共にIDT電極7が備える櫛形電極7a(図中下側)の最下端辺の一部からリードラインを下側方向に延ばし、前記反射器4bと前記反射器9bとの右外側を経由してパッド電極E4にそれぞれ接続する。
A lead line extends downward from a part of the lowermost side of the comb-shaped electrode 2b (lower side in the figure) provided in the IDT electrode 2 and one of the uppermost sides of the comb-shaped electrode 8b (upper side in the figure) provided in the IDT electrode 8 The lead line is extended upward from the portion and connected via the outside of the pad electrode E2.
Further, the lead line extends downward from a part of the lowest end side of the comb-shaped electrode 3b (lower side in the figure) provided in the IDT electrode 3, and the uppermost end side of the comb-shaped electrode 7b (upper side in the figure) provided in the IDT electrode 7 A lead line is extended upward from a part of the electrode and connected via the outside of the pad electrode E3.
A lead line extends upward from a part of the uppermost side of the comb-shaped electrode 2a (upper side in the figure) provided in the IDT electrode 2 and a part of the lowermost side of the comb-shaped electrode 8a (lower side in the figure) provided in the IDT electrode 8 A lead line is extended in the downward direction and connected to the pad electrode E1 via the left outer side of the reflector 4a and the reflector 9a.
Further, the lead line is extended upward from a part of the uppermost side of the comb-shaped electrode 3a (upper side in the figure) provided in the IDT electrode 3 and the lowermost side of the comb-shaped electrode 7a (lower side in the figure) provided in the IDT electrode 7 A lead line is extended downward from a part and connected to the pad electrode E4 via the right outside of the reflector 4b and the reflector 9b.

近年、移動体通信機器の普及に伴う低価格化および小型化の急激な進展により、上述の縦続縦結合DMSフィルタ素子に対して更なる低価格化、小型化(低背化)の要求が高まっており、この要求を満足するには半導体の分野で一般化しつつあるチップサイズパッケージ(以下、「CSP」と記す)のパッケージ技術が不可欠となる。CSPとは、表面実装型パッケージの一種でシリコンチップサイズと同等か、あるいは、わずかに大きい小型パッケージの総称であって、その構造は、パッケージ基台となるプリント基板の一方の主面に、フリップチップボンディングによりシリコンチップを接続し、当該シリコンチップを封止用樹脂で覆ったものである。
また、プリント基板の他方の主面に備える外部電極端子の位置は、一般的にプリント基板の四隅に配置されるが、その配置位置は、シリコンチップが有するボンディング用のパッド電極の位置とは異なる位置である場合が多く、パッド電極と外部電極端子との接続は、プリント基板の内部配線による自由な引き回しにて対応することが可能となっている。
In recent years, due to rapid progress in price reduction and downsizing due to the spread of mobile communication devices, there is an increasing demand for further price reduction and downsizing (low profile) for the cascaded vertically coupled DMS filter element described above. In order to satisfy this requirement, a package technology of a chip size package (hereinafter referred to as “CSP”) that is becoming common in the semiconductor field is indispensable. CSP is a kind of surface mount package and is a general term for small packages that are the same as or slightly larger than the size of a silicon chip. The structure is flipped on one main surface of a printed circuit board that serves as a package base. A silicon chip is connected by chip bonding, and the silicon chip is covered with a sealing resin.
The positions of the external electrode terminals provided on the other main surface of the printed circuit board are generally arranged at the four corners of the printed circuit board, but the arrangement positions are different from the positions of the bonding pad electrodes of the silicon chip. In many cases, the position is a position, and the connection between the pad electrode and the external electrode terminal can be handled by free routing by the internal wiring of the printed circuit board.

このようなCSPにおいても、更なる小型化、薄型化の要求に応えるため、例えば特開2000−261284号公報で開示されたようなウェハレベルCSP構造を弾性表面波装置に適用することも提案されている。
図15は、そのパッケージの構成を示す縦断面図である。
同図から明らかなように、圧電基板101の一方主面に形成された櫛歯状を成す励振電極102と、励振電極102に電気的に接続された入出力パッド及び接地パッドを含む配線電極103と、配線電極103(少なくとも入出力パッド)上に立設した複数の柱状電極105と、励振電極102の上方を励振電極102の振動空間108を確保すべく覆う金属等から成る保護カバー104とを備え、柱状電極105の外周部及び保護カバー104を覆った樹脂等の絶縁体から成る外部カバー106から露出した柱状電極105の上端部にはんだバンプ107を配設することで、外部回路基板(不図示)へ実装することを可能としている。これによれば、プリント基板を省くことができるので、小型化を図ることができる。
特開2000−261284号公報
In such a CSP, in order to meet the demand for further downsizing and thinning, it is also proposed to apply a wafer level CSP structure as disclosed in, for example, Japanese Patent Laid-Open No. 2000-261284 to a surface acoustic wave device. ing.
FIG. 15 is a longitudinal sectional view showing the configuration of the package.
As can be seen from the figure, a comb-tooth shaped excitation electrode 102 formed on one main surface of the piezoelectric substrate 101, and a wiring electrode 103 including an input / output pad and a ground pad electrically connected to the excitation electrode 102. A plurality of columnar electrodes 105 erected on the wiring electrode 103 (at least the input / output pad), and a protective cover 104 made of metal or the like that covers the excitation electrode 102 so as to secure the vibration space 108 of the excitation electrode 102. The solder bump 107 is disposed on the upper end portion of the columnar electrode 105 exposed from the outer cover 106 made of an insulating material such as a resin covering the outer peripheral portion of the columnar electrode 105 and the protective cover 104, thereby providing an external circuit board (not shown). It is possible to mount to (shown). According to this, since the printed circuit board can be omitted, the size can be reduced.
JP 2000-261284 A

しかしながら、上述した従来の弾性表面波装置においては、以下に示すような問題点があった。つまり、圧電基板上に形成した配線電極103(パッド電極)に柱状電極105を配設し、その柱状電極105を介してはんだバンプ107等の外部電極端子を設けていたため、配線電極103間の結合などの再配線における引き回し自由度が乏しかった。
また、フィルタを形成する励振電極102の周りに中空の閉空間、即ち、振動空間108を確保するための保護カバー104を搭載し気密化を行っていたが、正確な位置固定に高度な技術を要するものであった。
However, the conventional surface acoustic wave device described above has the following problems. That is, since the columnar electrode 105 is disposed on the wiring electrode 103 (pad electrode) formed on the piezoelectric substrate and the external electrode terminal such as the solder bump 107 is provided via the columnar electrode 105, the coupling between the wiring electrodes 103 is performed. The degree of routing freedom in rewiring was poor.
In addition, the protective cover 104 for securing the hollow closed space, that is, the vibration space 108 is mounted around the excitation electrode 102 forming the filter, and airtightness is performed. However, advanced technology is used for accurate position fixing. It was necessary.

そこで、本発明はこのような問題点を解決するためになされたものであり、プリント基板を設けることなく再配線における引き回し自由度を確保し、且つ、振動空間を容易に構築可能な弾性表面波装置及びその製造方法を提供することを目的とする。   Accordingly, the present invention has been made to solve such problems, and it is possible to secure a surface acoustic wave that can secure a freedom of routing in rewiring and can easily construct a vibration space without providing a printed circuit board. An object is to provide an apparatus and a method for manufacturing the same.

上記課題を解決するために本発明に係る弾性表面波装置の請求項1の発明は、圧電基板の一方の主面に振動伝搬電極を含む励振機能部と該励振機能部からリードラインにより引き出されたパッド電極部とを形成した弾性表面波素子と、前記弾性表面波素子の主面上の前記励振機能部周りを中空とすると共に前記パッド電極部上を除く領域を覆うように形成した第1の絶縁層と、前記第1の絶縁層上および前記パッド電極部上を領域として信号別に区分しつつ前記弾性表面波素子平面の縁周近傍に導出するよう形成された配線パターンと、前記区分した信号別の配線パターン毎に配置された柱状電極と、前記柱状電極の先端を露出させて充填した第2の絶縁層と前記第2の絶縁層上にて前記柱状電極に接続させて形成した外部電極とを備えたことを特徴とする。   In order to solve the above problems, the surface acoustic wave device according to the first aspect of the present invention is an excitation function unit including a vibration propagation electrode on one main surface of a piezoelectric substrate, and is drawn out from the excitation function unit by a lead line. A surface acoustic wave element having a pad electrode portion formed thereon, and a first surface formed so as to be hollow around the excitation function portion on the main surface of the surface acoustic wave element and to cover a region excluding the pad electrode portion. And a wiring pattern formed so as to be led out in the vicinity of an edge of the surface acoustic wave element plane while dividing the first insulating layer and the pad electrode portion as a region for each signal. Columnar electrodes arranged for each signal wiring pattern, a second insulating layer filled with the tip of the columnar electrode exposed, and an external formed by connecting to the columnar electrode on the second insulating layer With electrodes The features.

また、本発明に係る弾性表面波装置の請求項2の発明は、前記請求項1記載の弾性表面波装置において、前記励振機能部の中空は、前記第1の絶縁層と前記配線パターンとの二重層によりほぼ覆われて形成したことを特徴とする。   According to a second aspect of the surface acoustic wave device of the present invention, in the surface acoustic wave device according to the first aspect, the hollow of the excitation function portion is formed between the first insulating layer and the wiring pattern. It is characterized by being substantially covered with a double layer.

また、本発明に係る弾性表面波装置の請求項3の発明は、前記請求項1または2に記載の弾性表面波装置において、前記第1の絶縁層がSiOを成分に含み常温領域にてガラス化された金属酸化物ガラスであることを特徴とする。 According to a third aspect of the surface acoustic wave device of the present invention, in the surface acoustic wave device according to the first or second aspect, the first insulating layer contains SiO 2 as a component in a room temperature region. It is a vitrified metal oxide glass.

また、本発明に係る弾性表面波装置の製造方法の請求項4の発明は、圧電基板の一方の主面に振動伝搬電極を含む励振機能部と該励振機能部からリードラインにより引き出されたパッド電極部とを形成する工程と、前記励振機能部を覆うようにレジスト膜を形成する工程と、当該圧電基板の一方の主面全体に第1の絶縁層を形成する工程と、前記レジスト膜の少なくとも一端と前記パッド電極上を除く領域をマスクして前記第1の絶縁層を除去する工程と、前記マスクおよび前記レジスト膜を剥離する工程と、当該圧電基板の一方の主面全体に金属層を形成する工程と、前記レジスト膜の少なくとも一端と前記パッド電極上を含む領域を信号別に区分しつつ当該圧電基板の一方の主面の縁周近傍に導出するようマスクして前記金属層を除去することで配線パターンを形成する工程と、前記区分した信号別の配線パターン毎に柱状電極を配設する工程と、封止部材を充填し前記柱状電極の先端を露出するよう第2の絶縁層を形成する工程と、前記第2の絶縁層上にて前記柱状電極に接続させた外部電極を形成する工程とを備えることを特徴とする。   The invention according to claim 4 of the method for manufacturing a surface acoustic wave device according to the present invention includes an excitation function part including a vibration propagation electrode on one main surface of a piezoelectric substrate, and a pad drawn from the excitation function part by a lead line. A step of forming an electrode portion, a step of forming a resist film so as to cover the excitation function portion, a step of forming a first insulating layer on one whole main surface of the piezoelectric substrate, A step of removing the first insulating layer by masking at least one end and a region excluding the pad electrode, a step of removing the mask and the resist film, and a metal layer over the entire one main surface of the piezoelectric substrate And removing the metal layer by masking the region including at least one end of the resist film and the pad electrode on the periphery of one of the main surfaces of the piezoelectric substrate while dividing the region including the signal on the signal. You A step of forming a wiring pattern, a step of disposing a columnar electrode for each of the divided signal-specific wiring patterns, and a second insulating layer to fill the sealing member and expose the tip of the columnar electrode. And a step of forming an external electrode connected to the columnar electrode on the second insulating layer.

また、本発明に係る弾性表面波装置の製造方法の請求項5の発明は、前記請求項4記載の弾性表面波装置の製造方法において、一つのウェハ上にて各工程を行った後に個片に分割することを特徴とする。   According to a fifth aspect of the method for manufacturing a surface acoustic wave device according to the present invention, in the method for manufacturing the surface acoustic wave device according to the fourth aspect, the individual pieces are obtained after each step is performed on one wafer. It is characterized by dividing into two.

本発明に係る弾性表面波装置及びその製造方法は、励振機能部を覆うようにレジスト膜を形成する工程と、圧電基板の一方の主面全体に第1の絶縁層を形成する工程と、前記レジスト膜の少なくとも一端とパッド電極上とを除く領域をマスクして前記第1の絶縁層を除去する工程と、前記マスクおよび前記レジスト膜を剥離する工程とを経ることによって、
弾性表面波素子の主面上の励振機能部周りに中空の閉空間を形成することができるので、保護カバー等の部材を被覆配置する手間がなくなる。
また、圧電基板の一方の主面全体に金属層を形成する工程と、前記レジスト膜の少なくとも一端と前記パッド電極上を含む領域を信号別に区分しつつ当該圧電基板の一方の主面の縁周近傍に導出するようマスクして前記金属層を除去することで配線パターンを形成する工程とを経ることによって、再配線における自由な引き回しを行うことが可能となる。
The surface acoustic wave device and the method for manufacturing the same according to the present invention include a step of forming a resist film so as to cover the excitation function unit, a step of forming a first insulating layer on one entire main surface of the piezoelectric substrate, By passing through a step of removing the first insulating layer by masking a region excluding at least one end of the resist film and the pad electrode, and a step of peeling the mask and the resist film,
Since a hollow closed space can be formed around the excitation function portion on the main surface of the surface acoustic wave element, there is no need to cover and arrange a member such as a protective cover.
A step of forming a metal layer over one main surface of the piezoelectric substrate; and a region including at least one end of the resist film and the pad electrode according to the signal, and dividing the peripheral region of the one main surface of the piezoelectric substrate. By passing through a step of forming a wiring pattern by removing the metal layer by masking so as to lead to the vicinity, it is possible to perform free routing in rewiring.

プリント基板を設けることなく再配線における引き回し自由度を確保し、且つ、振動空間を容易に構築可能な弾性表面波装置及びその製造方法を提供するという目的を、フォトリソグラフィを活用した製造技術により、最小の部品点数で、小型化に適した弾性表面波装置を実現した。   The purpose of providing a surface acoustic wave device and a manufacturing method thereof that can secure a degree of freedom in rewiring without providing a printed circuit board and can easily construct a vibration space, by a manufacturing technique utilizing photolithography, A surface acoustic wave device suitable for miniaturization was realized with the minimum number of parts.

以下、図示した実施の形態例に基づいて本発明を詳細に説明する。
図1は、本発明に係わる弾性表面波装置の実施例を示す断面図である。なお、ここでは上述した従来例と同様に弾性表面波装置として、CSP構造の縦続縦結合DMSフィルタ装置を例に説明する。
この例に示す縦続縦結合DMSフィルタ装置20は、圧電基板21の一方の主面上に励振機能部22a、22bとパッド電極部23a、23b、23cとを有する縦続縦結合DMSフィルタが形成されており、パッド電極部23a、23b、23cを除く領域上に形成される第1の絶縁層24と、パッド電極部23a、23b、23cを含み前記第1の絶縁層24の上に形成される電気的導通可能な配線パターン25と、前記配線パターン25の上に形成される第2の絶縁層26と、前記第2の絶縁層26の上に形成される外部電極27と、前記第2の絶縁層26に埋設され前記配線パターン25と前記外部電極27とを電気的導通可能に接続する柱状電極28とを備えて構成する。
なお、励振機能部22a、22bの周囲には、それぞれ第1の絶縁層24にて囲まれた振動空間29a、29bが設けられている。
Hereinafter, the present invention will be described in detail based on the illustrated embodiment.
FIG. 1 is a sectional view showing an embodiment of a surface acoustic wave device according to the present invention. Here, as in the case of the conventional example described above, a CSP-structured cascaded DMS filter device will be described as an example of a surface acoustic wave device.
In the cascaded vertically coupled DMS filter device 20 shown in this example, a cascaded vertically coupled DMS filter having excitation function portions 22a, 22b and pad electrode portions 23a, 23b, 23c is formed on one main surface of a piezoelectric substrate 21. A first insulating layer 24 formed on a region excluding the pad electrode portions 23a, 23b, and 23c, and an electricity formed on the first insulating layer 24 including the pad electrode portions 23a, 23b, and 23c. Wiring pattern 25 capable of electrical conduction, a second insulating layer 26 formed on the wiring pattern 25, an external electrode 27 formed on the second insulating layer 26, and the second insulating layer. A columnar electrode 28 is provided which is embedded in the layer 26 and connects the wiring pattern 25 and the external electrode 27 so as to be electrically conductive.
In addition, vibration spaces 29a and 29b surrounded by the first insulating layer 24 are provided around the excitation function units 22a and 22b, respectively.

この図に示す縦続縦結合DMSフィルタ装置20の各構成について、以下、製造手順ごとに詳細に説明する。
(STEP1)図2は、本発明の製造方法における弾性表面波素子の形成例についての工程を示す図であり、同図(a)は平面図、(b)は平面図中にAとして示す部位の断面図(以下、A断面図と記す)、(c)は平面図中にBとして示す部位の断面図(以下、B断面図と記す)である。
この図に示す弾性表面波素子30は、方形平板状の圧電基板21の片面に励振電極からなる励振機能部22、および配線用電極からなるパッド電極部23を有するフィルタが形成されている。なお、このフィルタ自体は、上述の図13に示したものと同様であるので、ここでの説明は省略する。
Each configuration of the cascaded vertically coupled DMS filter device 20 shown in this figure will be described in detail below for each manufacturing procedure.
(STEP 1) FIG. 2 is a diagram showing a process for an example of forming a surface acoustic wave element in the manufacturing method of the present invention, where FIG. 2 (a) is a plan view, and FIG. 2 (b) is a portion indicated by A in the plan view. (C) is sectional drawing of a site | part shown as B in a top view (henceforth B sectional drawing).
In the surface acoustic wave element 30 shown in this figure, a filter having an excitation function part 22 made of an excitation electrode and a pad electrode part 23 made of a wiring electrode is formed on one surface of a rectangular flat plate-like piezoelectric substrate 21. Since this filter itself is the same as that shown in FIG. 13 described above, the description thereof is omitted here.

(STEP2)図3は、本発明の製造方法におけるレジスト膜の形成例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図(a)に示すように、この工程におけるレジスト膜31は、励振機能部22を覆い隠すように形成する。後述する工程にて、このレジスト膜31を剥離することにより振動空間を確保することになるため、振動空間の高さや幅などを考慮してレジスト膜を形成する。
ここで形成するレジスト膜31は、例えば、感光性樹脂であり、塗布する膜厚は、励振機能部22の振動を阻害しない程度に薄くすることが望ましく、具体的には2〜5μmである。この例では、励振機能部22に沿って延長形成されるレジスト膜31の両端における膜幅を絞り込むよう形成している。これは後述する工程にて、レジスト剥離液の浸入排出口をレジスト膜の両端部に設けるが、浸入排出口は最終的に塞がれるものであるから開口面積はレジスト剥離液の浸入排出に支障がない程度に小さくしておくことで、浸入排出口の封止を確実にせしめるための配慮である。このように塗布した感光性樹脂を乾燥し硬化させてレジスト膜31を形成する。
(STEP2) FIG. 3 is a diagram showing a process for forming a resist film in the manufacturing method of the present invention, where FIG. 3 (a) is a plan view, FIG. 3 (b) is an A sectional view, and FIG. FIG.
As shown in FIG. 4A, the resist film 31 in this step is formed so as to cover the excitation function unit 22. Since the vibration space is secured by peeling the resist film 31 in a process described later, the resist film is formed in consideration of the height and width of the vibration space.
The resist film 31 formed here is, for example, a photosensitive resin, and it is desirable that the applied film thickness be thin enough not to inhibit the vibration of the excitation function unit 22, and specifically, 2 to 5 μm. In this example, the film width is narrowed at both ends of the resist film 31 extended along the excitation function part 22. This is a process that will be described later, and a resist stripping solution inlet / outlet port is provided at both ends of the resist film. However, since the inlet / outlet port is finally closed, the opening area has an effect on the resist stripping solution inlet / outlet. It is a consideration to ensure the sealing of the intrusion / discharge port by keeping it as small as possible. The photosensitive resin applied in this way is dried and cured to form a resist film 31.

(STEP3)図4は、本発明の製造方法における第1の絶縁層の形成例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図(a)に示すように、この工程における第1の絶縁層24は、圧電基板21の一方の主面全体にわたって形成する。これによりパッド電極部23とレジスト膜31の領域も第1の絶縁層24に覆われることになる。
ここで形成する第1の絶縁層24は、例えば、取り扱いの容易性からSiOを成分に含み常温領域にてガラス化可能な金属酸化物ガラス(ヒートレスグラスとも呼ばれる)で構成する。このガラスを用いることで高温状態におくことなく硬化することができる。第1の絶縁層24の膜厚は、レジスト膜31よりも厚くする必要がある。
(STEP 3) FIG. 4 is a diagram showing a process for forming a first insulating layer in the manufacturing method of the present invention, where FIG. 4 (a) is a plan view, FIG. 4 (b) is a cross-sectional view of FIG. Is a B cross-sectional view.
As shown in FIG. 1A, the first insulating layer 24 in this step is formed over the entire one main surface of the piezoelectric substrate 21. As a result, the region of the pad electrode portion 23 and the resist film 31 is also covered with the first insulating layer 24.
The first insulating layer 24 formed here is made of, for example, metal oxide glass (also referred to as heatless glass) that contains SiO 2 as a component and can be vitrified in a normal temperature region for ease of handling. By using this glass, it can be cured without being in a high temperature state. The film thickness of the first insulating layer 24 needs to be thicker than that of the resist film 31.

(STEP4)図5は、本発明の製造方法におけるマスク(フォトレジスト膜)の形成例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図(a)に示すように、この工程におけるマスク32は、パッド電極部23とレジスト膜31の両端部上の領域を除いて、圧電基板21の一方の主面全体に形成する。
ここで形成するマスク32は、一般的なリソグラフィ・プロセスにて形成すれば良く、全面にフォトレジストを塗布し、軽くベーキングをかけた後、パッド電極部23とレジスト膜31の両端部上の領域に対応させた光遮蔽部材を介して露光し、現像することにより、形成した薄膜である。開口部分には第1の絶縁層24が露出することになる。
(STEP 4) FIGS. 5A and 5B are diagrams showing a process for forming a mask (photoresist film) in the manufacturing method of the present invention, where FIG. 5A is a plan view, FIG. 5B is a cross-sectional view of FIG. ) Is a B cross-sectional view.
As shown in FIG. 2A, the mask 32 in this step is formed on one main surface of the piezoelectric substrate 21 except for the regions on both ends of the pad electrode portion 23 and the resist film 31.
The mask 32 formed here may be formed by a general lithography process. After applying a photoresist on the entire surface and lightly baking it, regions on both ends of the pad electrode portion 23 and the resist film 31 are formed. It is the thin film formed by exposing and developing through the light-shielding member made to respond | correspond to. The first insulating layer 24 is exposed at the opening.

(STEP5)図6は、本発明の製造方法における第1の絶縁膜の除去例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
つまり、マスク32を形成した後に、エッチング処理を行うことで、パッド電極部23とレジスト膜31の両端部上の領域についてのみ第1の絶縁膜が除去される。これにより、パッド電極部23とレジスト膜31の両端部が露出する。なお、ここで露出させたレジスト膜31の両端部がレジスト剥離液の浸入排出口となる。
(STEP 5) FIGS. 6A and 6B are diagrams showing steps of an example of removing the first insulating film in the manufacturing method of the present invention. FIG. 6A is a plan view, FIG. 6B is a sectional view of FIG. Is a B cross-sectional view.
In other words, after the mask 32 is formed, the first insulating film is removed only in the regions on both ends of the pad electrode portion 23 and the resist film 31 by performing an etching process. Thereby, both end portions of the pad electrode portion 23 and the resist film 31 are exposed. Note that both end portions of the resist film 31 exposed here serve as an entrance / exit for the resist stripping solution.

(STEP6)図7は、本発明の製造方法におけるマスクおよびレジスト膜の剥離例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
レジスト剥離液に浸漬することにより、マスク32とレジスト膜31の除去を行う。これにより、レジスト膜31が存在していた部分が中空となり、この中空の空間が振動空間29となる。
(STEP 6) FIGS. 7A and 7B are diagrams showing the steps of a mask and resist film peeling example in the manufacturing method of the present invention. FIG. 7A is a plan view, FIG. 7B is a cross-sectional view of FIG. It is B sectional drawing.
The mask 32 and the resist film 31 are removed by dipping in a resist stripping solution. As a result, the portion where the resist film 31 was present becomes hollow, and this hollow space becomes the vibration space 29.

(STEP7)図8は、本発明の製造方法における金属膜の形成例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図(a)に示すように、この工程における金属膜33は、圧電基板21の一方の主面全体にわたって形成する。これによりパッド電極部23とレジスト膜31の両端部も金属膜33に覆われることになる。
ここで形成する金属膜33は、例えば、銅(Cu)を材料として、蒸着あるいはスパッタ等の成膜する。この金属膜33の膜厚は、レジスト剥離液の浸入排出口を塞ぐのに必要な膜厚であって、仮に、振動空間29の高さが5μmであるとすれば、金属膜33の膜厚は5μmより厚くする必要がある。即ち、振動空間29を密閉する手段として、金属膜33の膜厚を利用し、レジスト剥離液の浸入排出口を塞ぐのである。
なお、金属膜33は、後述の工程によりパターン形成されることで配線パターン25になるものであり、材料とする金属はCuに限らず、Au、Al、Sn、Ag、Ni、ハンダなどの一般的な金属を用いることができる。
(STEP 7) FIGS. 8A and 8B are diagrams showing a process for forming a metal film in the manufacturing method of the present invention, where FIG. 8A is a plan view, FIG. 8B is an A sectional view, and FIG. FIG.
As shown in FIG. 1A, the metal film 33 in this step is formed over the entire one main surface of the piezoelectric substrate 21. As a result, both end portions of the pad electrode portion 23 and the resist film 31 are also covered with the metal film 33.
The metal film 33 formed here is formed by, for example, vapor deposition or sputtering using copper (Cu) as a material. The film thickness of the metal film 33 is a film thickness necessary for closing the entrance and exit of the resist stripping solution. If the height of the vibration space 29 is 5 μm, the film thickness of the metal film 33 is as follows. Needs to be thicker than 5 μm. That is, as a means for sealing the vibration space 29, the film thickness of the metal film 33 is used to block the entrance and exit of the resist stripping solution.
Note that the metal film 33 is formed into a wiring pattern 25 by patterning in a process described later, and the metal used as a material is not limited to Cu, but is general such as Au, Al, Sn, Ag, Ni, and solder. A typical metal can be used.

(STEP8)図9は、本発明の製造方法における配線パターンの形成例についての工程を示す平面図である。
金属膜33に対し、リソグラフィ・プロセスにより、フォトレジストコーティング、ベーキング、露光・現像、エッチング、レジスト剥離を行ってパターン形成する。
この例に示す配線パターン25は、当該弾性表面波装置の外部インタフェースに要する信号毎(外部電極の役割毎)に4つに分割したパターン構成にした場面を示しており、配線パターン25aは、パッド電極23のうち3つのアース電位用電極を結合して主面角部に引き出すよう再配線した第1の“G”パターンであり、配線パターン25bは、パッド電極23のうち入力信号用電極と接続して、別の主面角部に引き出すよう再配線した“I”パターンであり、配線パターン25cは、パッド電極23のうち出力信号用電極と接続して、別の主面角部に引き出すよう再配線した“O”パターンであり、配線パターン25dは、パッド電極23のうち残る3つのアース電位用電極を結合して別の主面角部に引き出すよう再配線した第2の“G”パターンとして形成している。
(STEP 8) FIG. 9 is a plan view showing a process for an example of forming a wiring pattern in the manufacturing method of the present invention.
A pattern is formed on the metal film 33 by performing photoresist coating, baking, exposure / development, etching, and resist peeling by a lithography process.
The wiring pattern 25 shown in this example shows a scene in which the pattern configuration is divided into four for each signal (for each role of the external electrode) required for the external interface of the surface acoustic wave device. This is a first “G” pattern in which three ground potential electrodes of the electrode 23 are combined and rewired so as to be drawn out to the corner of the main surface. The wiring pattern 25 b is connected to the input signal electrode of the pad electrode 23. Then, the “I” pattern is re-wired so as to be drawn out to another main surface corner, and the wiring pattern 25 c is connected to the output signal electrode of the pad electrode 23 and drawn out to another main surface corner. The wiring pattern 25d is a re-wired “O” pattern, and the wiring pattern 25d is a second “G” that is re-wired so that the remaining three ground potential electrodes of the pad electrode 23 are combined and pulled out to another main surface corner. It is formed as a pattern.

なお、ここで特徴的な点として、前記配線パターン25は、励振機能部22に対する電磁シールド効果を奏するよう“G”パターンである配線パターン25aと25dの両方または一方の領域を、振動空間29を覆うように拡張して形成する。このようにすれば、振動空間29は、ガラス質の第1の絶縁層24の外側に金属膜の配線パターン25が積層された強固な壁構造に囲まれたものとなり、シールド効果のみならず耐湿性をも向上することができる。   Here, as a characteristic point, the wiring pattern 25 has a vibration space 29 in which both or one region of the wiring patterns 25a and 25d, which are “G” patterns, exhibits an electromagnetic shielding effect on the excitation function unit 22. Expand to cover. In this way, the vibration space 29 is surrounded by a strong wall structure in which the metal film wiring pattern 25 is laminated on the outside of the vitreous first insulating layer 24, and not only a shielding effect but also moisture resistance. Can also be improved.

(STEP9)図10は、本発明の製造方法における柱状電極の配設例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図に示すように、この例にあっては、Cuからなる四角柱の柱状電極28を用い、信号別に区分した配線パターン25a〜25dのそれぞれに接続して設ける。このとき、柱状電極28の位置は、それぞれの配線パターン25a〜25dにおいて角部に引き出された部分とする。なお、柱状電極28に用いる材質はCuでなくとも良く、Au、Al、Sn、Ag、Ni、ハンダなどの一般的な他の金属に変えても良い。また、形状については、四角柱でなくとも良く、他の多角柱や円柱、或いは、球状のものに変えても良い。
(STEP 9) FIGS. 10A and 10B are diagrams showing a process for an arrangement example of columnar electrodes in the manufacturing method of the present invention, where FIG. 10A is a plan view, FIG. 10B is an A sectional view, and FIG. FIG.
As shown in this figure, in this example, a square columnar electrode 28 made of Cu is used and connected to each of the wiring patterns 25a to 25d divided for each signal. At this time, the position of the columnar electrode 28 is assumed to be a portion drawn to the corner in each of the wiring patterns 25a to 25d. The material used for the columnar electrode 28 may not be Cu, but may be changed to other general metals such as Au, Al, Sn, Ag, Ni, and solder. Further, the shape may not be a quadrangular prism, but may be changed to another polygonal cylinder, a cylinder, or a spherical one.

(STEP10)図11は、本発明の製造方法における封止部材の充填例についての工程を示す図であり、同図(a)は平面図、(b)は柱状電極の高さを越えて充填した場合のA断面図、(c)は柱状電極の高さを越えて充填した場合のB断面図、(d)は柱状電極の端面を露出させた状態に充填した場合のA断面図、(e)は柱状電極の端面を露出させた状態に充填した場合のB断面図である。
この図に示すように封止部材としての第2の絶縁層26を主面の全面にわたって形成する。具体的には、封止部材(アンダーフィルとも呼ばれる)に低温速硬化型のエポキシ系樹脂を流入し硬化させている。このとき、一旦、柱状電極28の高さを越えて第2の絶縁層26を充填し、第2の絶縁層26を硬化させた後に、表面を研磨して削り柱状電極28の端面を露出させるようにしても良いし、柱状電極28の高さを越えないように第2の絶縁層26を充填することで柱状電極28の端面を露出させるようにしても良い。
(STEP 10) FIGS. 11A and 11B are diagrams showing the steps of the sealing member filling example in the manufacturing method of the present invention, where FIG. 11A is a plan view and FIG. 11B is filled beyond the height of the columnar electrode. (C) is a cross-sectional view of B when filled beyond the height of the columnar electrode, (d) is a cross-sectional view of A when filled with the end face of the columnar electrode exposed, ( e) is a B cross-sectional view when the end face of the columnar electrode is filled in an exposed state.
As shown in this figure, a second insulating layer 26 as a sealing member is formed over the entire main surface. Specifically, a low-temperature fast-curing epoxy resin is allowed to flow into the sealing member (also referred to as underfill) and cured. At this time, after filling the second insulating layer 26 beyond the height of the columnar electrode 28 and curing the second insulating layer 26, the surface is polished to expose the end surface of the columnar electrode 28. Alternatively, the end surface of the columnar electrode 28 may be exposed by filling the second insulating layer 26 so as not to exceed the height of the columnar electrode 28.

(STEP11)図12は、本発明の製造方法における外部電極の形成例についての工程を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。
この図に示すように、外部電極27a〜27dは、それぞれ端面を露出した柱状電極28a〜28dに接続させながら第2の絶縁層26の表面に形成する。
(STEP 11) FIGS. 12A and 12B are diagrams showing steps for forming an external electrode in the manufacturing method of the present invention. FIG. 12A is a plan view, FIG. 12B is an A sectional view, and FIG. FIG.
As shown in this figure, the external electrodes 27a to 27d are formed on the surface of the second insulating layer 26 while being connected to the columnar electrodes 28a to 28d having exposed end faces, respectively.

以上のような工程手順にて、図1に示した縦続縦結合DMSフィルタ装置20を製造することができる。
また、上記の工程手順にを大型圧電基板母材(以下、圧電ウェハと記す)上にて行い、複数の縦続縦結合DMSフィルタ装置20を一括して生成した後、各個片に切断して分割するように製造すれば、効率よく量産することができる。
The cascaded vertically coupled DMS filter device 20 shown in FIG. 1 can be manufactured by the process procedure as described above.
In addition, the above process steps are performed on a large-sized piezoelectric substrate base material (hereinafter referred to as a piezoelectric wafer), and a plurality of cascaded and vertically coupled DMS filter devices 20 are collectively generated, and then cut and divided into individual pieces. If manufactured in such a way, it can be mass-produced efficiently.

ここでいう圧電基板あるいは圧電ウェハとは、水晶、四方酸リチウム、タンタル酸リチウム、ニオブ酸リチウム、ランガサイト等の弾性表面波の励振が可能な圧電材料を示しており、その励振を行う励振機能部が要する機械的な物理振動に与える影響の度合いに応じて、当該振動空間の大小或いは形状を適宜に選択することで本発明の実施の変形が可能なことは言うまでもない。また、上述した実施の形態例においては、弾性表面波装置として完結させた場合を示し再外面に外部電極を設けるという例を示したが、本発明における再配線自由度が確保されていれば足りるため、外部電極は必ずしも必要な物ではない。また、第2の絶縁層から露出する柱状電極の断面が十分に広い場合にも外部電極は不要となるであろう。   Piezoelectric substrate or piezoelectric wafer as used herein refers to a piezoelectric material capable of exciting surface acoustic waves such as quartz, lithium tetragonal acid, lithium tantalate, lithium niobate, or langasite, and an excitation function for performing the excitation. It goes without saying that the embodiment of the present invention can be modified by appropriately selecting the size or shape of the vibration space in accordance with the degree of influence of the part on the mechanical physical vibration required. In the above-described embodiment, an example in which the surface acoustic wave device is completed and an external electrode is provided on the outer surface is shown. However, it is sufficient if the degree of freedom of rewiring in the present invention is ensured. Therefore, the external electrode is not always necessary. Also, the external electrode will not be required if the cross section of the columnar electrode exposed from the second insulating layer is sufficiently wide.

本発明に係る弾性表面波装置の実施の形態例を示す断面図である。1 is a cross-sectional view showing an embodiment of a surface acoustic wave device according to the present invention. 本発明に係る弾性表面波装置の製造方法における弾性表面波素子の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the surface acoustic wave element in the manufacturing method of the surface acoustic wave apparatus concerning this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. is there. 本発明に係る弾性表面波装置の製造方法におけるレジスト膜の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the resist film in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. 本発明に係る弾性表面波装置の製造方法における第1の絶縁層の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the 1st insulating layer in the manufacturing method of the surface acoustic wave apparatus concerning this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. It is. 本発明に係る弾性表面波装置の製造方法におけるマスク(フォトレジスト膜)の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the mask (photoresist film) in the manufacturing method of the surface acoustic wave apparatus concerning this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B section. FIG. 本発明に係る弾性表面波装置の製造方法における第1の絶縁膜の一部除去例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of partial removal of the 1st insulating film in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, (a) is a top view, (b) is A sectional drawing, (c) is B It is sectional drawing. 本発明に係る弾性表面波装置の製造方法におけるマスクおよびレジスト膜の剥離例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of peeling of the mask and resist film in the manufacturing method of the surface acoustic wave apparatus concerning this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. is there. 本発明に係る弾性表面波装置の製造方法における金属膜の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the metal film in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. 本発明に係る弾性表面波装置の製造方法における配線パターンの形成例を示す平面図である。It is a top view which shows the example of formation of the wiring pattern in the manufacturing method of the surface acoustic wave apparatus concerning this invention. 本発明に係る弾性表面波装置の製造方法における柱状電極の配設例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of arrangement | positioning of the columnar electrode in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, The figure (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. 本発明に係る弾性表面波装置の製造方法における第2の絶縁層(封止部材)の充填例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図、(d)はA断面図、(e)はB断面図である。It is a figure which shows the example of filling of the 2nd insulating layer (sealing member) in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, the figure (a) is a top view, (b) is A sectional drawing, (c) ) Is a B sectional view, (d) is an A sectional view, and (e) is a B sectional view. 本発明に係る弾性表面波装置の製造方法における外部電極の形成例を示す図であり、同図(a)は平面図、(b)はA断面図、(c)はB断面図である。It is a figure which shows the example of formation of the external electrode in the manufacturing method of the surface acoustic wave apparatus which concerns on this invention, (a) is a top view, (b) is A sectional drawing, (c) is B sectional drawing. 縦続縦結合DMSフィルタ素子の電極構造を説明するための図である。It is a figure for demonstrating the electrode structure of a cascaded longitudinally-coupled DMS filter element. 個々の縦結合DMSフィルタの詳細説明図である。It is detailed explanatory drawing of each vertical coupling | bonding DMS filter. 従来の弾性表面波装置のパッケージ構成例を示す縦断面図である。It is a longitudinal cross-sectional view which shows the package structural example of the conventional surface acoustic wave apparatus.

符号の説明Explanation of symbols

1〜3…IDT電極
1a、1b…櫛形電極
2a、2b…櫛形電極
3a、3b…櫛形電極
4a、4b…グレーティング反射器
5…縦結合DMSフィルタ
6〜8…IDT電極
6a、6b…櫛形電極
7a、7b…櫛形電極
8a、8b…櫛形電極
9a、9b…グレーティング反射器
10…縦結合DMSフィルタ
11…縦続縦結合DMSフィルタ素子
IN…パッド電極
OUT…パッド電極
E1〜E4…パッド電極
20…縦続縦結合DMSフィルタ装置
21…圧電基板
22…励振機能部
22a、22b…励振機能部
23…パッド電極部
23a〜23c…パッド電極部
24…第1の絶縁層
25…配線パターン
26…第2の絶縁層
27…外部電極
28…柱状電極
29…振動空間
30…弾性表面波素子
31…レジスト膜
32…マスク(フォトレジスト膜)
33…金属膜
101…圧電基板
102…励振電極
103…配線電極
104…保護カバー
105…柱状電極
106…封止部材
107…はんだバンプ
108…振動空間
DESCRIPTION OF SYMBOLS 1-3 ... IDT electrode 1a, 1b ... Comb electrode 2a, 2b ... Comb electrode 3a, 3b ... Comb electrode 4a, 4b ... Grating reflector 5 ... Vertical coupling DMS filter 6-8 ... IDT electrode 6a, 6b ... Comb electrode 7a , 7b ... Comb electrode 8a, 8b ... Comb electrode 9a, 9b ... Grating reflector 10 ... Vertical coupled DMS filter 11 ... Cascaded vertical coupled DMS filter element IN ... Pad electrode OUT ... Pad electrode E1-E4 ... Pad electrode 20 ... Cascaded vertical Coupled DMS filter device 21 ... Piezoelectric substrate 22 ... Excitation function part 22a, 22b ... Excitation function part 23 ... Pad electrode part 23a-23c ... Pad electrode part 24 ... First insulation layer 25 ... Wiring pattern 26 ... Second insulation layer DESCRIPTION OF SYMBOLS 27 ... External electrode 28 ... Columnar electrode 29 ... Vibration space 30 ... Surface acoustic wave element 31 ... Resist film 32 ... Mask (photograph) The resist film)
33 ... Metal film 101 ... Piezoelectric substrate 102 ... Excitation electrode 103 ... Wiring electrode 104 ... Protective cover 105 ... Columnar electrode 106 ... Sealing member 107 ... Solder bump 108 ... Vibration space

Claims (5)

圧電基板の一方の主面に振動伝搬電極を含む励振機能部と該励振機能部からリードラインにより引き出されたパッド電極部とを形成した弾性表面波素子と、
前記弾性表面波素子の主面上の前記励振機能部周りを中空とすると共に前記パッド電極部上を除く領域を覆うように形成した第1の絶縁層と、
前記第1の絶縁層上および前記パッド電極部上を領域として信号別に区分しつつ前記弾性表面波素子平面の縁周近傍に導出するよう形成された配線パターンと、
前記区分した信号別の配線パターン毎に配置された柱状電極と、
前記柱状電極の先端を露出させて充填した第2の絶縁層と
前記第2の絶縁層上にて前記柱状電極に接続させて形成した外部電極とを備えたことを特徴とする弾性表面波装置。
A surface acoustic wave device in which an excitation function part including a vibration propagation electrode on one main surface of the piezoelectric substrate and a pad electrode part drawn out from the excitation function part by a lead line are formed;
A first insulating layer formed so as to be hollow around the excitation function part on the main surface of the surface acoustic wave element and to cover a region excluding the pad electrode part;
A wiring pattern formed so as to be led out in the vicinity of an edge of the surface acoustic wave element plane while dividing the signal on the first insulating layer and the pad electrode portion as a region;
Columnar electrodes arranged for each of the divided signal-specific wiring patterns,
A surface acoustic wave device comprising: a second insulating layer filled with an exposed end of the columnar electrode; and an external electrode formed on the second insulating layer and connected to the columnar electrode. .
前記励振機能部の中空は、前記第1の絶縁層と前記配線パターンとの二重層によりほぼ覆われて形成したことを特徴とする前記請求項1に記載の弾性表面波装置。   2. The surface acoustic wave device according to claim 1, wherein the hollow of the excitation function unit is formed to be substantially covered with a double layer of the first insulating layer and the wiring pattern. 前記第1の絶縁層がSiOを成分に含み常温領域にてガラス化された金属酸化物ガラスであることを特徴とする前記請求項1または2に記載の弾性表面波装置。 The first insulating layer is a surface acoustic wave device according to claim 1 or 2, characterized in that a vitrified metal oxide glass at ambient temperature region comprises SiO 2 in component. 圧電基板の一方の主面に振動伝搬電極を含む励振機能部と該励振機能部からリードラインにより引き出されたパッド電極部とを形成する工程と、
前記励振機能部を覆うようにレジスト膜を形成する工程と、
当該圧電基板の一方の主面全体に第1の絶縁層を形成する工程と、
前記レジスト膜の少なくとも一端と前記パッド電極上を除く領域をマスクして前記第1の絶縁層を除去する工程と、
前記マスクおよび前記レジスト膜を剥離する工程と、
当該圧電基板の一方の主面全体に金属層を形成する工程と、
前記レジスト膜の少なくとも一端と前記パッド電極上を含む領域を信号別に区分しつつ当該圧電基板の一方の主面の縁周近傍に導出するようマスクして前記金属層を除去することで配線パターンを形成する工程と、
前記区分した信号別の配線パターン毎に柱状電極を配設する工程と、
封止部材を充填し前記柱状電極の先端を露出するよう第2の絶縁層を形成する工程と、
前記第2の絶縁層上にて前記柱状電極に接続させた外部電極を形成する工程とを備えることを特徴とする弾性表面波装置の製造方法。
Forming an excitation function part including a vibration propagation electrode on one main surface of the piezoelectric substrate and a pad electrode part drawn out from the excitation function part by a lead line;
Forming a resist film so as to cover the excitation function unit;
Forming a first insulating layer on the entire principal surface of the piezoelectric substrate;
Masking a region excluding at least one end of the resist film and the pad electrode, and removing the first insulating layer;
Peeling the mask and the resist film;
Forming a metal layer on one entire main surface of the piezoelectric substrate;
A wiring pattern is formed by removing the metal layer by masking the region including at least one end of the resist film and the pad electrode according to the signal while leading to the vicinity of the edge of one main surface of the piezoelectric substrate. Forming, and
Providing a columnar electrode for each of the divided wiring patterns for each signal;
Forming a second insulating layer to fill the sealing member and expose the tip of the columnar electrode;
Forming an external electrode connected to the columnar electrode on the second insulating layer. A method for manufacturing a surface acoustic wave device.
前記請求項4に記載の弾性表面波装置の製造方法において、
一つのウェハ上にて各工程を行った後に個片に分割することを特徴とする弾性表面波装置の製造方法。
In the manufacturing method of the surface acoustic wave device according to claim 4,
A method of manufacturing a surface acoustic wave device, wherein each process is performed on one wafer and then divided into individual pieces.
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