JP2005030989A - Rotation detecting device and electronic device of rotary encoder - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a rotation detecting device of a rotary encoder capable of correctly detecting rotation information, and with small load on a microcomputer. <P>SOLUTION: The rotation detecting device comprises edge detection circuits 2a and 2b for outputting edge detection signals by detecting the edge of each pulse of 2 phase output pulses of phase A, and phase B of the rotary encoder; and a pulse generation circuit 20 for exclusive logical summation of the pulses of the phase A, and the phase B, and at the same time generating right rotation detecting pulse and left rotation detecting pulse, by gating the edge detection signals of the phase A and the phase B with the output of exclusive logic sum; and an RS flip flop 5 for receiving the right and left rotation detection signals with input terminals S, and R respectively and outputting the right rotation detection signal as an output Q, and the left rotation detection signal as an output QB. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a rotation detection device of a rotary encoder used in an input device of an electronic device such as an AV (Audio-Visual) device, a personal computer or a portable terminal, for example, a jog shuttle, and an electronic device using the same.

  One of the output formats of the rotary encoder is a format called an incremental type. This incremental type is generally used widely because it detects the direction of rotation by the output of a two-phase pulse, has a simple structure, and is inexpensive.

In the rotation detection system of an incremental type rotary encoder, conventionally, the output of a rotary encoder (two-phase pulse) is input to a microcomputer mounted on an electronic device, and the microcomputer inputs a two-phase pulse from the rotary encoder. The phase state of the signal was constantly monitored to detect right rotation or left rotation (Patent Document 1).
JP 2000-213960 A

  However, in the rotation detection system of the conventional rotary encoder described above, the microcomputer needs to constantly monitor the phase state of the two-phase pulse signal from the rotary encoder. is there.

  In addition, when the microcomputer is performing processing other than the rotation detection of the rotary encoder and reading the phase state of the rotary encoder output by interrupt control, the response speed of the reading process is inevitably slow. In particular, when the rotational speed of the rotary encoder is high, there arises a problem that the output of the rotary encoder is missed.

  An object of the present invention is to provide a rotation detection device for a rotary encoder that can solve the above-described problems and can accurately detect the output of the rotary encoder and has a low burden on a microcomputer, and an electronic device using the same. is there.

  In order to achieve the above object, the rotation detection device for a rotary encoder according to the present invention detects the edges of the respective pulses of the A phase and B phase, which are two-phase pulse outputs of the rotary encoder, and outputs an edge detection signal. An exclusive OR of the A-phase and B-phase pulses is taken with the edge detection means, and the A-phase and B-phase edge detection signals output from the edge detection unit are respectively gated by the exclusive-OR output and right A rotation detection pulse generating means for generating a rotation detection pulse and a left rotation detection pulse; and a rotation direction detection holding means for outputting a right rotation detection signal indicating the right rotation and a left rotation detection signal indicating the left rotation. The rotation direction detection / holding means is in an active state from the first level in which the level of the right rotation detection pulse is in the initial state during the right rotation period. After the transition, the level of the right rotation detection signal is held at the second level, and during the period of the left rotation, the level of the left rotation detection pulse is changed to the second level. When a transition is made from the level of 1 to the second level, the level of the left rotation detection signal is held at the second level after the transition.

  According to the above configuration, during the right rotation period, the state of the right rotation detection signal is maintained when the active state is activated, and during the left rotation period, the left rotation detection signal is activated when the active state is reached. That state is maintained. If the state is maintained in this way, the external control unit can read out the phase relationship (rotation information) between the A phase and the B phase, which is the two-phase pulse output of the rotary encoder, at any timing. The phase relationship between the B phase and the B phase is not constantly monitored, and the rotation information is not missed during the interrupt control.

  According to another aspect of the present invention, there is further provided a rotation detecting means for detecting any rotation of the right rotation and the left rotation based on the right rotation detection pulse and the left rotation detection pulse and outputting a rotation detection signal. When one of the right rotation detection pulse and the left rotation detection pulse makes a transition from the first level to the second level, the rotation detection means transmits the rotation detection signal to the second level after the transition. You may comprise so that it may hold | maintain at a level. According to this configuration, when one of the right rotation detection signal and the left rotation detection signal becomes active, the rotation detection signal also becomes active. Thus, it can be determined from the rotation detection signal whether or not rotation has occurred, and the active state of the right rotation detection signal or the left rotation detection signal can be detected. Therefore, it is possible to check the levels of the right rotation detection signal and the left rotation detection signal by using the rotation detection signal as an interrupt signal.

  As another form of the present invention, the rotation detection means and the rotation detection signal and the rotation detection signal or rotation detection signal held at the second level according to a reset signal supplied from the outside. The level may be forcibly shifted to the first level. According to this configuration, after the transition to the first level (initial state) by the reset signal is performed, the level of the right rotation detection signal is set to the left rotation period during the right rotation period as the latest rotation detection state. The level of the left rotation detection signal is held inside. Therefore, if the rotation detection signal is used as an interrupt signal, the latest holding level of the right rotation detection signal or the left rotation detection signal can always be confirmed, and the latest rotation information can always be captured. Also in this case, the right rotation detection signal or left rotation detection signal holding level is maintained until the rotation information is completely read by the external control unit. However, there is no loss of rotation information.

  As another embodiment of the present invention, the rotation direction detection holding means is configured such that the right rotation detection pulse is supplied to a set input, the left rotation detection pulse is supplied to a reset input, and the right rotation detection signal is output as a first output. However, you may comprise from the 1st RS flip-flop from which the said left rotation detection signal is each output as a 2nd output which is an inversion output of a said 1st output. In addition, the rotation detecting means supplies a first AND circuit that takes a logical product of the right rotation detection pulse and the left rotation detection pulse, and an output of the first AND circuit is supplied to a set input, and the reset signal is reset. A second RS flip-flop supplied to the input and outputting the rotation detection signal as a first output; a first output of the first RS flip-flop; and a first output of the second RS flip-flop And a third AND circuit that takes the logical product of the second output of the first RS flip-flop and the first output of the second RS flip-flop. May be. With this configuration, the rotation detection device can be realized more easily and at a lower cost.

  The electronic device according to the present invention includes a rotation detection device for any one of the rotary encoders described above, and a rotation detection signal of the rotary encoder based on a right rotation detection signal or a left rotation detection signal output while maintaining a level from the rotation detection device. Control means for acquiring the phase relationship between the A phase and the B phase, which are phase pulse outputs. According to this configuration, it is possible to provide an electronic device that exhibits the action of the rotation detection device of the rotary encoder described above.

  Another electronic device according to the present invention includes a rotation signal supplied from the outside of the rotation detection device of the rotary encoder described above, a right rotation detection signal output from the rotation detection device while maintaining a level, or a left rotation signal. A register for storing the state of the rotation detection signal and the rotation detection signal output from the rotation detection device are supplied as an interrupt signal. When the interrupt signal becomes active, the right rotation detection signal stored in the register or the left Control means for reading the state of the rotation detection signal, and a reset for returning the state of the right rotation detection signal or the left rotation detection signal and the rotation detection signal in which the level is held in response to a reset request to the initial level. Reset signal generating means for supplying a signal to the rotation detecting device, and necessary for reading the state by the control means Simultaneously supplying dresses in the register, and having an address decoding for sending the reset request to the reset signal generating means.

  According to the above configuration, in addition to the operation of the rotation detection device of the rotary encoder described above, when the control means reads information from the register in accordance with the rotation detection signal supplied from the rotation detection device, The reset signal is supplied from the reset signal generating means to the rotation detecting device. Thus, the control means does not need to perform operation control related to reset.

  As described above, according to the present invention, the phase relationship (rotation information) between the A phase and the B phase, which are the two-phase pulse outputs of the rotary encoder, is maintained in accordance with the right rotation and the left rotation. The microcomputer can read the held rotation information at an arbitrary timing. In this case, since the microcomputer does not need to constantly monitor the phase relationship between the A phase and the B phase, the burden on the microcomputer is reduced accordingly.

  In addition, since the information is not missed when the rotation information is read out by the microcomputer, the rotation information can be obtained accurately and a highly reliable rotation detection device can be provided.

  Further, since the rotation direction detection holding means and the rotation detection means can be easily configured by a logic circuit using an RS flip-flop, an AND circuit, etc., the rotation detection device can be configured by simple hardware.

  Next, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a rotation detection circuit of a rotary encoder according to an embodiment of the present invention. This rotation detection circuit has an input terminal 1a to which a pulse A phase as one output of the rotary encoder is supplied, and an input terminal 1b to which a pulse B phase as the other output is supplied. The pulse A phase supplied from the input terminal 1a is supplied to one input of the edge detection circuit 2a and the EXOR (exclusive OR) circuit 3, and the pulse B phase supplied from the input terminal 1b is supplied to the edge detection circuit 2b and EXOR ( Is supplied to the other input of the circuit 3.

  The edge detection circuit 2a detects the rising edge and falling edge of the input pulse A phase, and generates a pulse at the detection timing. The output (pulse) of the edge detection circuit 2a is supplied to one input of the NAND circuit 4a. The edge detection circuit 2b detects a rising edge and a falling edge of the input pulse B phase, and generates a pulse at the detection timing. The output (pulse) of the edge detection circuit 2b is supplied to one input of the NAND circuit 4b.

  The EXOR circuit 3 outputs a high level when both inputs are different, that is, when the pulse A phase is high level and the pulse B phase is low level, or the pulse A phase is low level and the pulse B phase is high level. The output of the EXOR circuit 3 is supplied to the other input of the NAND circuit 4a and the other input of the NAND circuit 4b. The NAND circuit 4a takes the logical product of the output of the edge detection circuit 2a and the output of the EXOR circuit 3, and the output is the input S (set) of the RS flip-flop 5 and one input of the AND circuit 6. Has been supplied to. The NAND circuit 4b is the negation of the logical product of the output of the edge detection circuit 2b and the output of the EXOR circuit 3, and its output is the input R (reset) of the RS flip-flop 5 and the other input of the AND circuit 6. Has been supplied to.

  An output Q of the RS flip-flop 5 is supplied to one input of the AND circuit 9, and an inverted output QB of the output Q is supplied to one input of the AND circuit 10. The AND circuit 6 takes a logical product of the output of the NAND circuit 4 a and the output of the NAND circuit 4 b, and the output is supplied to the input S (set) of the RS flip-flop 7. The RS flip-flop 7 is supplied with a reset signal supplied from the outside via an external reset terminal 8 to an input R (reset), and its output Q is a rotation detection signal output terminal 13 and the other input of the AND circuit 9. And is supplied to the other input of the AND circuit 10, respectively.

  The AND circuit 9 takes the logical product of the output Q of the RS flip-flop 5 and the output Q of the RS flip-flop 7, and its output is supplied to the right rotation detection signal output terminal 11. The AND circuit 10 takes the logical product of the output QB of the RS flip-flop 5 and the output Q of the RS flip-flop 7, and its output is supplied to the left rotation detection signal output terminal 12.

  In the rotation detection circuit described above, the rotation detection pulse generation circuit 20 is configured by the EXOR circuit 3, the NAND circuit 4a, and the NAND circuit 4b. The rotation detection pulse generation circuit 20 performs exclusive OR of the A-phase and B-phase pulses in the EXOR circuit 3, and gates the outputs of the edge detection circuits 2a and 2b with the outputs of the EXOR circuit 3 to rotate right. A detection pulse (output of the NAND circuit 4a) and a left rotation detection pulse (output of the NAND circuit 4b) are generated. Specifically, during the right rotation period, the right rotation detection pulse corresponds to the inverted output of the edge detection circuit 2a, and the left rotation detection pulse maintains a high level. On the other hand, during the left rotation period, the left rotation detection pulse corresponds to the inverted output of the edge detection circuit 2b, and the right rotation detection pulse maintains a high level. During the stop period, both the right rotation detection pulse and the left rotation detection pulse are maintained at a high level.

  The RS flip-flop 5 is a rotation direction detection and holding unit, and has an output Q according to a change in level between a right rotation detection pulse supplied to the input S and a left rotation detection pulse supplied to the input R. The level of the right rotation detection signal or the level of the left rotation detection signal that is the output QB is held. For example, when the inputs S and R are both in the high level state, the output Q is at the low level, and the output QB is at the high level, when the input S changes to the low level, the output Q becomes the high level. Even if the S level changes, the output Q level does not change. Similarly, when both the inputs S and R are in a high level state, the output Q is at a high level, and the output QB is at a low level, when the input R changes to a low level, the output QB becomes a high level. Even if the level of the input S changes, the level of the output Q does not change. In this way, the level of the right rotation detection signal that is the output Q or the level of the left rotation detection signal that is the output QB is held.

  The AND circuit 6, the RS flip-flop 7, and the AND circuits 9 and 10 constitute a rotation detection / reset circuit 30. The main operation of the rotation detection / reset circuit 30 is any one of a right rotation detection signal and a left rotation detection signal supplied from the RS flip-flop 5 to the right rotation detection signal output terminal 11 and the left rotation detection signal output terminal 12, respectively. Is supplied from the rotation control signal output terminal 13 to the external control unit via the reset signal input terminal 8 from the rotation control signal output terminal 13 to the external control unit. This is a second operation for setting the state of the signals respectively supplied to the right rotation detection signal output terminal 11 and the left rotation detection signal output terminal 12 in accordance with the reset signal to an initial state (non-rotation state).

  In the first operation, the input S of the RS flip-flop 7 has outputs of the right rotation detection pulse (output of the NAND circuit 4a) and the left rotation detection pulse (NAND) from the rotation detection pulse generation circuit 20, which are outputs of the AND circuit 6. AND of the output of the circuit 4b is supplied to the input R of the RS flip-flop 7, which is supplied with a reset signal from the external control unit (in this case, active "Low"). In the RS flip-flop 7, for example, when the inputs S and R are both in the high level state and the output Q is at the low level, when the input S changes to the low level, the output Q becomes the high level. Even if the S level changes, the output Q level does not change. As a result, the rotation detection signal which is the output Q of the RS flip-flop 7 is maintained in a high level state, and the output Q (right rotation detection signal) and the output QB ( The left rotation detection signal) is supplied to the right rotation detection signal output terminal 11 and the left rotation detection signal output terminal 12 as it is.

  In the second operation, when the level of the reset signal supplied to the input R of the RS flip-flop 7 changes from the high level to the low level, the output Q (rotation detection signal) maintained at the high level in the first operation. ) Level changes to a low level. As a result, the respective outputs of the AND circuits 9 and 10 are fixed at the low level and become the initial state. Since the output level of the RS flip-flop is indefinite when the power is turned on, the output Q is set to the low level by resetting the power when the power is turned on.

  Next, the operation of the rotation detection circuit of the rotary encoder of this embodiment will be specifically described. FIG. 2 is a time chart for explaining the operation of the detection circuit shown in FIG. The operation will be described below with reference to FIG.

  When the A phase and B phase, which are the outputs of the rotary encoder, are supplied to the input terminals 1a and 1b, respectively, the rising edges and falling edges of the A phase and B phase are detected by the edge detection circuits 2a and 2b, respectively. At the same time, the EXOR circuit 3 performs an exclusive logical product of the A phase and the B phase. As shown in FIG. 3, the phase relationship between the A phase and the B phase is a state in which the phase of the A phase is advanced by 90 ° with respect to the B phase during the right rotation period, and the phase of the A phase during the left rotation period. The phase is advanced by 90 ° with respect to the B phase. Therefore, the output of the EXOR circuit 3 is high during the clockwise rotation from the rising edge of the A phase to the rising edge of the B phase and from the falling edge of the A phase to the falling edge of the B phase. It becomes a level, otherwise it becomes a low level. On the other hand, during the left rotation period, the period from the rising edge of the B phase to the rising edge of the A phase and the period from the falling edge of the B phase to the falling edge of the A phase are high. Become. In FIG. 3, the arrow shown at the bottom of the drawing is the click position.

  In the NAND circuit 4a, the logical product of the output of the edge detection circuit 2a and the output of the EXOR circuit 3 is negated, and the result is output as a right rotation detection pulse. This right rotation detection pulse is in a state in which the output of the edge detection circuit 2a is inverted during the right rotation period, and is maintained at a high level during the left rotation period and the stop period. On the other hand, the NAND circuit 4b negates the logical product of the output of the edge detection circuit 2b and the output of the EXOR circuit 3, and outputs the result as a left rotation detection pulse. The left rotation detection pulse is in a state where the output of the edge detection circuit 2b is inverted during the left rotation period, and is maintained at the high level during the right rotation period and the stop period.

  The right rotation detection pulse and the left rotation detection pulse are supplied to the RS flip-flop 5 and the rotation detection / reset circuit 30 which are rotation detection signal holding means.

  In the RS flip-flop 5, the right rotation detection pulse is supplied to the input S, and the left rotation detection pulse is supplied to the input R. The right rotation detection signal is supplied during the right rotation period, and the left rotation detection signal is supplied during the left rotation period. Each level is output as shown below.

  First, the level holding operation in the right rotation period will be described. In the initial state, the right rotation detection pulse as the input S and the left rotation detection pulse as the input R are both at the high level, and the right rotation detection signal as the output Q is at the low level. In this state, when the level of the right rotation detection pulse changes from the high level to the low level, the right rotation detection signal changes from the low level to the high level. Thereafter, even if the level of the right rotation detection pulse changes, the level of the right rotation detection signal is held at a high level.

  Next, the level holding operation in the left rotation period will be described. Also in this case, in the initial state, the right rotation detection pulse as the input S and the left rotation detection pulse as the input R are both at the high level, and the left rotation detection signal as the output QB is at the low level. In this state, when the level of the left rotation detection pulse changes from the high level to the low level, the left rotation detection signal changes from the low level to the high level. Thereafter, even if the level of the left rotation detection pulse changes, the level of the left rotation detection signal is held at a high level.

  During the right rotation period, the level of the output Q of the RS flip-flop 5 is held at a high level, and the level of the rotation detection signal that is the output Q of the RS flip-flop 7 is also held at a high level. The level holding operation of the RS flip-flop 7 is performed in the following procedure.

  In the initial state, the right rotation detection pulse as one input of the AND circuit 6 and the left rotation detection pulse as the other input are both at a high level. Therefore, the output of the AND circuit 6 becomes a high level, and the high level is supplied to the input S of the RS flip-flop 7. On the other hand, the level of the reset signal which is the input R of the RS flip-flop 7 is high. In this state, when the level of the right rotation detection pulse changes from the high level to the low level and the level of the output Q of the RS flip-flop 5 is held at the high level, the output Q (rotation detection signal) of the RS flip-flop 7 is The level also changes to a high level. Thereafter, even if the level of the right rotation detection pulse changes, the output Q of the RS flip-flop 7 is maintained at the high level.

  Even during the left rotation period, the level of the output QB of the RS flip-flop 5 is held at a high level, and at the same time, the level of the rotation detection signal that is the output Q of the RS flip-flop 7 is held at a high level. This level holding operation is also performed in the same procedure as described above.

  After the level of the output Q (rotation detection signal) of the RS flip-flop 7 is held in a high level state, when the level of the reset signal supplied to the input R of the RS flip-flop 7 changes from a high level to a low level, RS The level of the output Q (rotation detection signal) of the flip-flop 7 changes from the high level to the low level. At the same time, if it is during the right rotation period, the level of the right rotation detection signal supplied to the right rotation detection signal output terminal 11 becomes a low level, and if it is during the left rotation period, it is supplied to the left rotation detection signal output terminal 12. The left rotation detection signal level becomes low level. As described above, when the reset signal is supplied, the levels of the rotation detection signal and the right rotation detection signal or the left rotation detection signal held at the high level become the low level to be in the initial state.

  According to the above operation, during the right rotation period, the output Q (right rotation detection signal) of the RS flip-flop 5 is maintained at the timing of transition from the initial state to the active state, and during the left rotation period, The output QB (counterclockwise rotation detection signal) of the RS flip-flop 5 is held in a state where the initial state is changed to the active state. Therefore, the external control unit accurately determines the phase relationship (rotation information) between the A phase and the B phase, which is the two-phase pulse output of the rotary encoder, from the right rotation detection signal or the left rotation detection signal in which the state is maintained. Can be read. In other words, the state of the right rotation detection signal or the left rotation detection signal is maintained until the rotation information is completely read by the external control unit, so interrupt control (polling processing for periodically reading rotation information, etc. ), The rotation information is not missed even when the rotation information is read.

  When the state of either the right rotation detection signal or the left rotation detection signal is held (one of them becomes active), the level of the output Q (rotation detection signal) of the RS flip-flop 7 is simultaneously held at a high level. Therefore, by checking the level of the output Q (rotation detection signal), it can be determined whether rotation has occurred, and the active state of the right rotation detection signal or the left rotation detection signal is detected. be able to. After the transition to the initial state by the reset signal, the latest rotation detection state is maintained, the level of the right rotation detection signal during the right rotation period and the level of the left rotation detection signal during the left rotation period. Therefore, by using the rotation detection signal as an interrupt signal and checking the levels of the right rotation detection signal and the left rotation detection signal, the latest rotation information can always be captured.

  FIG. 4 shows an example of the configuration of an electronic device that includes the above-described rotation detection circuit and is configured to use the rotation detection signal as an interrupt signal.

  Referring to FIG. 4, the electronic device includes a rotation detection circuit 101, a register 102, an address decoding unit 103, a reset generation unit 104, and a microcomputer 105 having the configuration shown in FIG. The register 102, the address decoding unit 103, and the microcomputer 105 are connected via a data address bus (which may be serial or parallel).

  The register 102 stores the state (rotation information) of the right rotation detection signal or the left rotation detection signal output with the level held from the rotation detection circuit 101. The microcomputer 105 is supplied with the rotation detection signal output from the rotation detection circuit 101 as an interrupt signal, and reads the rotation information stored in the register 102 when the interrupt signal becomes active. The address decoding unit 103 supplies an address required when the microcomputer 105 reads the rotation information to the register 102 and also supplies the state-maintained right rotation detection signal or left signal supplied from the rotation detection circuit 101 to the register 102. It requests generation of a rotation detection signal and a reset signal for returning the rotation detection signal to the initial state. In response to a reset request from the address decoding unit 103, the reset generation unit 104 generates the reset signal and supplies it to the reset terminal (reset terminal 8 in FIG. 1) of the rotation detection circuit 101.

  In the above electronic device, for example, when the level of the right rotation detection signal output from the rotation detection circuit 101 is maintained in an active state during the right rotation period, the state is stored in the register 102 as rotation information at the same time. The state of the rotation detection signal (rotation detection flag) output from the rotation detection circuit 101 becomes the active state. When the state of the rotation detection signal (rotation detection flag) becomes active, the microcomputer 105 executes processing necessary for reading the rotation information stored in the register 102, and in response to this, the address decoding unit 103 A dress necessary for reading the rotation information is supplied to the register 102 and a reset request is sent to the reset generation unit 104. In response to the reset request from the address decoding unit 103, the reset generation unit 104 sets the reset signal supplied to the reset input terminal (the input terminal 8 in FIG. 1) of the rotation detection circuit 101 to the active low level.

  In the rotation detection circuit 101, when the reset signal changes from the high level to the low level, the above-described reset operation is performed by the rotation detection / reset circuit 30 shown in FIG. 1, and the right rotation detection signal and the rotation detection held in the active state are performed. The signal level is forcibly shifted to the initial level. Thus, the rotation detection circuit 101 returns to the initial state, and shifts to an operation in the next rotation period (right rotation period or left rotation period).

  In the rotation detection circuit 101, when the power is turned on, the Q output of the RS flip-flop 5 is in an indefinite state (high level or low level). Therefore, when the power is turned on, the output Q of the RS flip-flop 7 is set to the low-level initial state. There is a need to. For example, in the circuit configuration shown in FIG. 1, an AND circuit is provided in the preceding stage of the external reset terminal 8, and a reset signal is input to one input of the AND circuit after reading the rotation direction. This is realized by inputting a power-on reset signal (a signal that is at a low level for a predetermined period when the power is turned on and then is at a high level at a normal time) to the other input. it can. As another method, by inputting the power-on reset signal to the reset generation unit 104 shown in FIG. 4, the reset generation unit 104 outputs the reset signal, and the output of the RS flip-flop 7 when the power is turned on. A configuration in which Q is set to an initial state at a low level is also possible.

  The above is the description of the operation of the electronic device in the right rotation period. However, the rotation information is read and reset in the same procedure in the left rotation period.

  The above-described rotation encoder of the rotary encoder of the present invention and the electronic apparatus using the same are not limited to the illustrated configuration, and the configuration can be changed as appropriate without departing from the spirit of the present invention. Is possible. For example, in the configuration shown in FIG. 1, the rotation detection pulse generation circuit, the rotation direction detection holding means, and the rotation detection / reset circuit can be configured by other logic circuits. For example, if the rotation direction detection holding means can hold and output the right rotation detection signal and the left rotation detection signal, the rotation direction detection holding means rotates using a plurality of D-type flip-flops instead of the RS flip-flop 5. It is also possible to configure direction detection holding means.

It is a block diagram which shows the structure of the rotation detection circuit of the rotary encoder which is one Embodiment of this invention. 2 is a time chart for explaining the operation of the detection circuit shown in FIG. 1. It is a schematic diagram which shows the phase relationship of the two-phase pulse output of a rotary encoder. It is a block diagram which shows the example of 1 structure of the electronic device provided with the rotation detection circuit shown in FIG.

Explanation of symbols

1a, 1b Input terminals 2a, 2b Edge detection circuit 3 EXOR circuit 4a, 4b NAND circuit 5, 7 RS flip-flop 6, 9, 10 AND circuit 20 Rotation detection pulse generation circuit 30 Rotation detection / reset circuit 101 Rotation detection circuit 102 Register 103 Address decoding unit 104 Reset generation unit 105 Microcomputer

Claims (7)

The edge detection signal is detected by detecting the edges of the A-phase and B-phase pulses, which are the two-phase pulse outputs of the rotary encoder, which produce a predetermined phase difference between the phases according to the right rotation and left rotation. Edge detection means for outputting;
The exclusive OR of the A-phase and B-phase pulses is taken, and the A-phase and B-phase edge detection signals output from the edge detector are gated by the exclusive-OR output to detect the right rotation detection pulse, A rotation detection pulse generating means for generating a rotation detection pulse;
Rotation direction detection holding means for outputting a right rotation detection signal indicating the right rotation and a left rotation detection signal indicating the left rotation, respectively.
When the level of the right rotation detection pulse transits from the first level, which is the initial state, to the second level, which is the active state, during the period of the right rotation, The level of the right rotation detection signal is held at the second level, and when the level of the left rotation detection pulse transits from the first level to the second level during the left rotation period, the transition Thereafter, the rotation detection device of the rotary encoder is configured to hold the level of the left rotation detection signal at the second level. Rotation detection means for detecting a rotation of either the right rotation or the left rotation based on the right rotation detection pulse and the left rotation detection pulse and outputting a rotation detection signal;
When one of the right rotation detection pulse and the left rotation detection pulse transits from the first level to the second level, the rotation detection means sends the rotation detection signal to the second detection signal after the transition. The rotation detection device of the rotary encoder according to claim 1, wherein the rotation detection device is configured to be held at a level. The rotation detection means sets the level of the rotation detection signal and the right rotation detection signal or the left rotation detection signal held at the second level in accordance with a reset signal supplied from the outside. The rotation detection device for a rotary encoder according to claim 2, wherein the rotation detection device is configured to forcibly shift to a level. The rotation direction detection holding means is configured such that the right rotation detection pulse is supplied to a set input, the left rotation detection pulse is supplied to a reset input, and the right rotation detection signal is a first output of the first output. The rotation detection device for a rotary encoder according to claim 3, comprising a first RS flip-flop from which the left rotation detection signal is output as a second output which is an inverted output. The rotation detecting means includes
A first AND circuit that takes a logical product of the right rotation detection pulse and the left rotation detection pulse;
A second RS flip-flop in which an output of the first AND circuit is supplied to a set input, the reset signal is supplied to a reset input, and the rotation detection signal is output as a first output;
A second AND circuit that performs a logical product of the first output of the first RS flip-flop and the first output of the second RS flip-flop;
The rotation detection device for a rotary encoder according to claim 3, further comprising a third AND circuit that takes a logical product of the second output of the first RS flip-flop and the first output of the second RS flip-flop. . A rotation detection device for a rotary encoder according to any one of claims 1 to 5,
Control means for acquiring a phase relationship between the A phase and the B phase, which is a two-phase pulse output of the rotary encoder, based on a right rotation detection signal or a left rotation detection signal output while holding the level from the rotation detection device; An electronic device including the electronic device. A rotation detection device for a rotary encoder according to any one of claims 3 to 5,
A register that stores a state of a right rotation detection signal or a left rotation detection signal that is output while the level is held from the rotation detection device;
The rotation detection signal output from the rotation detection device is supplied as an interrupt signal, and when the interrupt signal becomes active, control means for reading the state of the right rotation detection signal or the left rotation detection signal stored in the register;
In response to a reset request, a reset signal that supplies the rotation detection device with a reset signal for returning the state of the right rotation detection signal or the left rotation detection signal and the rotation detection signal to the initial level when the level is maintained. Generating means;
An electronic apparatus comprising: an address decode for sending the reset request to the reset signal generation means at the same time as supplying an address necessary for reading the state by the control means to the register.

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