JP2005024342A - Thermal infrared imaging element and manufacturing method thereof - Google Patents

Thermal infrared imaging element and manufacturing method thereof Download PDF

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Publication number
JP2005024342A
JP2005024342A JP2003188441A JP2003188441A JP2005024342A JP 2005024342 A JP2005024342 A JP 2005024342A JP 2003188441 A JP2003188441 A JP 2003188441A JP 2003188441 A JP2003188441 A JP 2003188441A JP 2005024342 A JP2005024342 A JP 2005024342A
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Prior art keywords
substrate
heat
infrared imaging
groove
thermal infrared
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JP2003188441A
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JP3961457B2 (en
Inventor
Keitaro Shigenaka
中 圭太郎 重
Ikuo Fujiwara
原 郁 夫 藤
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Toshiba Corp
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Toshiba Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thermal infrared photographing element having improved detection sensitivity of infrared rays, and to provide a method for manufacturing the thermal infrared imaging element. <P>SOLUTION: The thermal infrared imaging element comprises a first substrate 2, where an address line 1 for selecting a pixel is formed; a heat-sensitive section 3 that is formed separately on the first substrate 2 and converts incident infrared rays to heat; at least a pair of support legs 4 for separating the heat-sensitive section 3 from the substrate 2 for support; and a microprism array (second substrate) 6, where a plurality of V-shaped grooves 5 for guiding infrared rays to the heat-sensitive section 3 while being arranged opposite to the first substrate 2 are formed with a pixel pitch. A microprism made of a V-shaped groove is formed on the second substrate 6, the projecting section of the first substrate 2 mates with the V-shaped groove in a self-alignment manner, so that the alignment between the heat-sensitive section 3 and the microprism can be made precisely, infrared rays entering the microprism can be guided to the heat-sensitive section 3 without any leakage, and sensitivity for detecting infrared rays can be improved. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、赤外線を熱に変換する感熱部を備えた熱型赤外線撮像素子に関する。
【0002】
【従来の技術】
近年、冷却装置を必要としない熱型赤外線イメージセンサとして、マイクロマシニング技術を用いた酸化バナジウムのボロメータ型や、BST(Barium−Strontium−Titanium)の焦電型のセンサが製品化されている。これらの製品は、赤外線を吸収して温度を上昇させる感熱部と、この感熱部をシリコン基板と熱的に分離するための支持脚と、画素を選択するための水平アドレス線と、垂直信号線とで構成されている。
【0003】
この種の熱型赤外線イメージセンサは、原理的に、被写体から放射される赤外線を感熱部で吸収し、その際、感熱部の温度上昇を抵抗変化や容量変化等で検知する。このため、感熱部を支持する支持脚は、断熱効果を高めるために断面積を小さくして長さを長くする構造になっている。支持脚は、主にシリコン酸化膜やシリコン窒化膜と電気信号を伝える配線で構成されているが、その熱抵抗値は空気の熱抵抗より約1桁大きい。したがって、空気による熱伝導を減少するため、撮像素子は真空パッケージに実装されている。
【0004】
外部から入射する赤外線を熱に変換するには、できるだけ受光面積を大きくする必要がある。このため、支持脚やアドレス線上を覆うように傘のような構造体を作り受光面積を増やし、実質的な開口率を増やし入射赤外線による温度上昇を大きくする技術が提案されている(特許文献1参照)。
【0005】
しかしながら、支持脚の熱抵抗が同じ場合、傘のような構造体を追加することにより、熱容量も増加するため、熱容量と熱抵抗の積で規定される熱時定数が増加し、高速応答性が悪化して残像が残ることが問題になっている。
【0006】
このような問題を解決するために、可視光のイメージセンサでも採用されているようなマイクロレンズを配置して、熱時定数を増加させることなく、実質的な開口率を向上させて感度を良くする技術が開示されている(特許文献2,3,4参照)。
【0007】
特に、特許文献2は、マイクロレンズを真空のためのシールとして使用することにより、撮像素子を真空パッケージ中に実装する必要がなくなることを開示している。
【0008】
【特許文献1】
特開平10−209418号公報
【特許文献2】
特開平7−318416号公報
【特許文献3】
特開平9−113352号公報
【特許文献4】
特開平2002−280532号公報
【0009】
【発明が解決しようとする課題】
特許文献2等に記載の赤外線イメージセンサでは、僅かの光も有効に感熱部に吸収させる必要性から、マイクロレンズと感熱部の光軸整合とマイクロレンズの薄層化が有効と考えられている。
【0010】
ところが、貼り合わせの際、特殊なパターン合わせが必要なため、合わせ精度を1μm以下にすることは困難である。また、薄層化後に真空中で接合することが困難なため、薄層化せずに接合しなければならなく、感熱部での赤外線の収率は十分向上せず、十分な感度が得られなかった。
【0011】
一方、特許文献4には、可視光イメージセンサを用いて、V溝加工したマイクロレンズで集光する技術が開示されている。この文献には、遮光板となる下部電極の形状が長方形に形成されているため、マイクロレンズも円形より長方形の方が集光効率が良い旨が記載されている。
【0012】
特許文献4の可視光イメージセンサは、マイクロレンズとして使用する材料を素子チップに直接積層しているため、V溝の最深部と下地のシリコン酸化膜層あるいはシリコン窒化膜層までの最も薄い部分の厚さをほぼ0にすることができ、マイクロレンズの透過率を上げることができる。
【0013】
しかしながら、特許文献4に開示された技術を熱型赤外線イメージセンサに適応しようとすると、特許文献4は、マイクロレンズと感熱部間の熱分離を十分に考慮していない。
【0014】
本発明は、このような点に鑑みてなされたものであり、その目的は、赤外線の検出感度を向上できる熱型赤外線撮像素子及びその製造方法を提供することにある。
【0015】
【課題を解決するための手段】
上述した課題を解決するために、本発明は、画素を選択するためのアドレス線と、画素ピッチで形成された凸部とを有する第1の基板と、前記第1の基板上に離間して配置され、入射赤外線を熱に変換する感熱部と、前記感熱部を前記第1の基板から離間して支持する少なくとも1本の支持脚と、前記第1の基板に対向配置され、入射赤外線を屈折させて前記感熱部に集光させる傾斜面を有する溝からなるマイクロプリズムが画素ピッチで複数形成されたマイクロプリズムアレイを有する第2の基板と、を備え、前記凹部が前記溝に噛み合わされて接合される。
【0016】
前記第2の基板は、ゲルマニウム、シリコン、硫化亜鉛及びカルコゲナイドガラスの少なくとも一つの材料で形成される。
【0017】
また、本発明は、画素を選択するためのアドレス線と、画素ピッチで複数形成された凸部と、前記凸部間に配置され入射赤外線を熱に変換する感熱部と、この感熱部を離間して支持する少なくとも1本の支持脚と、を有する第1の基板と、入射赤外線を屈折させて前記感熱部に集光させる傾斜面を有する溝が前記感熱部と同じ間隔で複数形成されたマイクロプリズムアレイを有する第2の基板と、を備えた熱型赤外線撮像素子の製造方法であって、前記第2の基板の前記溝を前記第1の基板の前記凸部に噛み合わせた状態で、前記溝と前記凸部とを真空中で接合し、前記第2の基板の前記第1の基板と対向する面とは逆側の面を研磨する。
【0018】
前記凸部と前記溝とは、陽極接合法または表面活性化接合法で接合される。
【0019】
【発明の実施の形態】
以下、本発明に係る熱型赤外線撮像素子及びその製造方法について、図面を参照しながら具体的に説明する。
【0020】
図1は本発明に係る熱型赤外線撮像素子の断面構造の一例を示す断面図であり、1つの撮像素子分の断面構造を示している。1素子のサイズは約40μm四方であり、図1の撮像素子が二次元に配列されて熱型赤外線撮像素子を構成している。
【0021】
図1の撮像素子は、画素を選択するためのアドレス線1が形成された第1の基板2と、この第1の基板2上に離間して形成されて入射赤外線を熱に変換する感熱部3と、感熱部3を第1の基板2から離間して支持する少なくとも1本の支持脚4と、第1の基板2に対向配置されて赤外線を感熱部3に導くV字溝5が画素ピッチで複数形成されたマイクロプリズムアレイ(第2の基板)6とを備えている。
【0022】
第1の基板2は、シリコン基板7をエッチング加工することにより形成され、画素ピッチで凸部8が形成され、凸部8の内部にアドレス線1が形成されている。第1の基板2の凸部8は、第2の基板6のV字溝に噛み合わされて接合される。
【0023】
感熱部3と第1の基板2との間には中空部9が設けられ、感熱部3と第2の基板6との間にも中空部10が設けられている。支持脚4と感熱部3との間の溝部11、支持脚4と第1の基板2との間の溝部12、及び中空部9,10は、1Pa以下の真空状態に維持される。
【0024】
感熱部3は、入射した赤外線を吸収する不図示の赤外線吸収層と、吸収した赤外線による温度上昇を電気信号に変換する不図示のセンサとを有する。支持脚4は、感熱部3からの熱の逃げを最小限に抑えるために、断面積を小さくして長さを長くしている。
【0025】
第2の基板6は、ゲルマニウム、シリコン、硫化亜鉛、カルコゲナイドガラスなどの8〜12μmの赤外線を透過する材料で形成され、画素ピッチで二次元方向に複数形成されたV字溝を有する。これらV字溝は、入射赤外線を屈折させて感熱部3に集光させるマイクロプリズム6として機能し、各V字溝には第1の基板2の凸部8が接合される。
【0026】
このように、本実施形態では、第1の基板2の凸部8が自己整合的に第2の基板6のV字溝に噛み合うようにしており、第1及び第2の基板2,6の位置合わせを精度よく行うことができる。
【0027】
第1及び第2の基板2,6を接合する手法は、真空中での陽極接合法や、表面をイオン照射により活性化した後に接合する表面活性化接合法などのように、接合後に脱ガスが少なく、処理温度も400℃以下の手法が望ましい。
【0028】
以上の手法により、第2の基板6と感熱部3との間の中空部の真空度が1Pa以下になり、実効的な開口率も90%になる。これにより、本発明者の実験によると、感熱部3の熱容量と支持脚4の熱抵抗の積で決まる熱時定数を従来と同じにして、60フレーム/秒の撮影で残像が観測されないようにした状態で、従来は50%しかなかった開口率が8割程度向上し、感度も8割程度向上した。
【0029】
図2〜図16は第1の基板2の製造工程を説明する工程図である。まず、図2に示すように、SOI(Silicon On Insulator)基板21を用意する。このSOI基板21は、厚さ0.7mmの単結晶シリコン基板22上に、厚さ0.2μmの埋め込み酸化膜層と呼ばれるシリコン酸化膜23を配置し、その上面に厚さ0.2μmの単結晶p型シリコン薄膜層24を順次積層したものである。
【0030】
次に、図3に示すように、SOI基板21に、シリコン酸化膜23を埋め込んで素子分離領域25を形成する。次に、図4に示すように、NMOSトランジスタの形成箇所26をレジストマスク27で覆った状態で、PMOSトランジスタの形成箇所28にリンイオンを注入してn型領域を形成する。
【0031】
次に、図5に示すように、NMOS及びPMOSトランジスタの形成箇所26,28と支持脚4の形成箇所に、熱酸化によりゲート酸化膜29を形成し、このゲート酸化膜の上面に、多結晶シリコンによりゲート電極30を形成する。
【0032】
次に、図6に示すように、NMOSトランジスタの形成箇所26以外をレジストマスク31で覆って、リンイオンを注入して、NMOSトランジスタのソース及びドレイン領域32,33を形成し、図7に示すように、PMOSトランジスタの形成箇所28以外をレジストマスク34で覆って、ホウ素イオンを注入して、PMOSトランジスタのソース及びドレイン領域35,36を形成する。
【0033】
次に、図8に示すように、感熱部3の一部を構成するpn接合ダイオードのn領域37を砒素イオンの注入により形成し、図9に示すように、p領域38をホウ素イオンの注入により形成する。
【0034】
次に、図10に示すように、基板上面に層間膜39を形成した後、トランジスタやダイオードの電極配線のために、タングステンなどでコンタクト40を形成する。
【0035】
次に、図11に示すように、コンタクトの上面にアルミニウムの配線層41を形成した後、基板上面に層間膜42を形成する。次に、図12に示すように、層間膜42に、配線層41につながるコンタクト43を形成し、図13に示すように、コンタクト43の上面に2層目のアルミニウムの配線層44を形成し、その上面に層間膜45を形成する。
【0036】
これにより、NMOS及びPMOSトランジスタを組み合わせて、二次元方向の選択回路とそれによってアドレスされたダイオードに一定電流を流し、ダイオードの温度に伴って生じる信号を増幅する信号増幅回路と出力回路を形成する。
【0037】
次に、図14に示すように、二次元状に配置されているセンサを周囲の基板と熱的に分離するために、RIE(Reactive Ion Etching)等により、単結晶シリコン基板22に到達するまで、垂直なエッチングホール46を形成する。
【0038】
次に、図15に示すように、感熱部3と支持脚4の形成箇所を、表面から均一に約1μmだけエッチングして凹部47を形成する。
【0039】
次に、図16に示すように、エッチングホール46を介して、TMAH(Tetramethyl ammonium hydroxide:水酸化テトラメチルアンモニウム)等で単結晶シリコン基板22に空洞部分48を形成する。
【0040】
以上の工程により、図1の第1の基板2が形成される。なお、図16のNMOSトランジスタ49とPMOSトランジスタ50は、図17に示すように、第1の基板2の端部に形成されるCMOSからなる周辺回路51を示しており、アドレス線の制御や感熱部から出力される電気信号の増幅などを行う。
【0041】
図18は感熱部3に対向配置される第2の基板6の一部を拡大して示した図である。図示のように、V字溝5の端部が感熱部3の端部と上下方向に面になるように配置される。これにより、V字溝5で屈折した赤外線が感熱部3に入射されるようになる。
【0042】
図19〜図23は第2の基板6の製造工程を示す工程図である。まず、図19に示すように、厚さ200μmのゲルマニウムの基板61を用意する。次に、図20に示すように、V字溝加工用のブレード62を回転させながら、深さ2μm、幅10μm、ピッチ40μmのV字溝5のマイクロプリズムを二次元方向に順次形成する。すなわち、切削加工によりV字溝5を形成して第2の基板6(マイクロプリズム)を形成する。
【0043】
次に、図21に示すように、完成した第2の基板6を上下反転させて、V溝斜面に真空中でアルゴンイオンを照射して活性化する。
【0044】
同様に、図2〜図16の製法で製造した第1の基板2の表面にも、真空中でアルゴンイオンを照射し、図22に示すように、室温でマイクロプリズムアレイ6を自己整合的に接合させて、約2時間真空中で放置する。
【0045】
次に、図23に示すように、真空容器から取り出した熱型赤外線撮像素子の第2の基板6をCMP(化学機械研磨)により約20μmまで薄膜化して、熱型赤外線撮像素子が完成する。
【0046】
このように、本実施形態では、第2の基板6にV字溝からなるマイクロプリズムを形成し、このV字溝に第1の基板2の凹部が自己整合的に噛み合うようにしたため、感熱部3とマイクロプリズムとの位置合わせを精度よく行うことができ、マイクロプリズムに入射した赤外線を漏れなく感熱部3に導くことができ、赤外線検出の感度が向上する。
【0047】
上述した実施形態では、V字溝4からなるマイクロプリズムを第1の基板2上に形成する例を説明したが、溝の形状は必ずしもV字状でなくてもよい。第1の基板2の凸部8が溝に噛み合わされて自己整合的に位置合わせを行え、かつ入射赤外線を屈折させて感熱部3に導くための傾斜面を備えていればよく、例えば台形でもよい。
【0048】
【発明の効果】
以上詳細に説明したように、本発明によれば、第1の基板の凸部が第2の基板の溝に噛み合わされて接合されるため、感熱部とマイクロプリズムとの位置合わせを精度よく行うことができ、感熱部の赤外線検出感度が向上する。
【図面の簡単な説明】
【図1】本発明に係る熱型赤外線撮像素子の断面構造の一例を示す断面図。
【図2】第1の基板2の製造工程を説明する工程図。
【図3】図2に続く工程図。
【図4】図3に続く工程図。
【図5】図4に続く工程図。
【図6】図5に続く工程図。
【図7】図6に続く工程図。
【図8】図7に続く工程図。
【図9】図8に続く工程図。
【図10】図9に続く工程図。
【図11】図10に続く工程図。
【図12】図11に続く工程図。
【図13】図12に続く工程図。
【図14】図13に続く工程図。
【図15】図14に続く工程図。
【図16】図15に続く工程図。
【図17】第1の基板の端部に形成される周辺回路を示す図。
【図18】感熱部に対向配置される第2の基板の一部を拡大して示した図。
【図19】第2の基板の製造工程を示す工程図。
【図20】図19に続く工程図。
【図21】図20に続く工程図。
【図22】図21に続く工程図。
【図23】図22に続く工程図。
【符号の説明】
1 アドレス線
2 第1の基板
3 感熱部
4 支持脚
5 V字溝
6 マイクロプリズムアレイ(第2の基板)
7 シリコン基板
8 凸部
9,10 中空部
11,12 溝部
21 SOI基板
22 単結晶シリコン基板
23 シリコン酸化膜
24 単結晶p型シリコン薄膜層
25 素子分離領域
29 ゲート酸化膜
30 ゲート電極
39,42 層間膜
41,44 配線層
43 コンタクト
47 凹部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a thermal infrared imaging device including a heat sensitive part that converts infrared rays into heat.
[0002]
[Prior art]
In recent years, a vanadium oxide bolometer type using a micromachining technology and a BST (Barium-Strontium-Titanium) pyroelectric sensor have been commercialized as thermal infrared image sensors that do not require a cooling device. These products have a heat sensitive part that absorbs infrared rays and raises the temperature, support legs for thermally separating the heat sensitive part from the silicon substrate, horizontal address lines for selecting pixels, and vertical signal lines. It consists of and.
[0003]
In principle, this type of thermal infrared image sensor absorbs infrared rays radiated from a subject with a heat-sensitive portion, and at that time, detects a temperature rise of the heat-sensitive portion by a resistance change, a capacitance change, or the like. For this reason, the support leg that supports the heat-sensitive portion has a structure in which the cross-sectional area is reduced and the length is increased in order to enhance the heat insulating effect. The support leg is mainly composed of a silicon oxide film or a silicon nitride film and a wiring for transmitting an electric signal, but its thermal resistance value is about one digit larger than the thermal resistance of air. Therefore, in order to reduce heat conduction by air, the image sensor is mounted in a vacuum package.
[0004]
In order to convert infrared rays incident from the outside into heat, it is necessary to increase the light receiving area as much as possible. For this reason, a technique has been proposed in which a structure such as an umbrella is formed so as to cover the support legs and address lines, the light receiving area is increased, the substantial aperture ratio is increased, and the temperature rise due to incident infrared rays is increased (Patent Document 1). reference).
[0005]
However, when the thermal resistance of the support legs is the same, adding a structure such as an umbrella increases the heat capacity, so the thermal time constant defined by the product of the heat capacity and the heat resistance increases, and high-speed response is achieved. It has become a problem that afterimages are deteriorated.
[0006]
In order to solve such problems, a microlens that is also used in a visible light image sensor is arranged to improve the substantial aperture ratio and increase the sensitivity without increasing the thermal time constant. (See Patent Documents 2, 3, and 4).
[0007]
In particular, Patent Document 2 discloses that by using a microlens as a seal for vacuum, it is not necessary to mount an image sensor in a vacuum package.
[0008]
[Patent Document 1]
JP-A-10-209418 [Patent Document 2]
JP 7-318416 A [Patent Document 3]
JP-A-9-113352 [Patent Document 4]
Japanese Patent Laid-Open No. 2002-280532
[Problems to be solved by the invention]
In the infrared image sensor described in Patent Document 2 and the like, it is considered effective to align the optical axis of the microlens and the heat sensitive portion and to make the microlens thin because the heat sensitive portion needs to effectively absorb a small amount of light. .
[0010]
However, since special pattern alignment is required at the time of bonding, it is difficult to reduce the alignment accuracy to 1 μm or less. Also, since it is difficult to bond in vacuum after thinning, it must be bonded without thinning, and the yield of infrared rays in the heat sensitive part does not improve sufficiently, and sufficient sensitivity is obtained. There wasn't.
[0011]
On the other hand, Patent Document 4 discloses a technique for condensing light with a V-grooved microlens using a visible light image sensor. In this document, since the shape of the lower electrode serving as the light shielding plate is formed in a rectangular shape, it is described that the condensing efficiency is better when the microlens is rectangular rather than circular.
[0012]
In the visible light image sensor of Patent Document 4, since the material used as the microlens is directly laminated on the element chip, the deepest part of the V groove and the thinnest part from the underlying silicon oxide film layer or silicon nitride film layer are formed. The thickness can be almost zero, and the transmittance of the microlens can be increased.
[0013]
However, when the technique disclosed in Patent Document 4 is applied to a thermal infrared image sensor, Patent Document 4 does not sufficiently consider thermal separation between the microlens and the heat-sensitive part.
[0014]
The present invention has been made in view of these points, and an object of the present invention is to provide a thermal infrared imaging device capable of improving infrared detection sensitivity and a method for manufacturing the same.
[0015]
[Means for Solving the Problems]
In order to solve the above-described problem, the present invention provides a first substrate having an address line for selecting a pixel and a convex portion formed at a pixel pitch, and spaced apart on the first substrate. A heat-sensitive part arranged to convert incident infrared light into heat, at least one support leg for supporting the heat-sensitive part spaced apart from the first substrate, and disposed opposite to the first substrate, And a second substrate having a microprism array in which a plurality of microprisms each having an inclined surface that is refracted and condensed on the heat-sensitive portion is formed at a pixel pitch, and the concave portion is engaged with the groove. Be joined.
[0016]
The second substrate is formed of at least one material of germanium, silicon, zinc sulfide, and chalcogenide glass.
[0017]
Further, the present invention provides an address line for selecting a pixel, a plurality of convex portions formed at a pixel pitch, a thermal portion that is disposed between the convex portions and converts incident infrared rays into heat, and the thermal portion is spaced apart from each other. A plurality of grooves having an inclined surface for refracting incident infrared rays and condensing the incident infrared rays to the heat-sensitive part, at the same interval as the heat-sensitive part. A thermal infrared imaging device comprising a second substrate having a microprism array, wherein the groove of the second substrate is engaged with the convex portion of the first substrate. The groove and the convex portion are bonded in a vacuum, and the surface of the second substrate opposite to the surface facing the first substrate is polished.
[0018]
The convex portion and the groove are bonded by an anodic bonding method or a surface activated bonding method.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a thermal infrared imaging device and a manufacturing method thereof according to the present invention will be specifically described with reference to the drawings.
[0020]
FIG. 1 is a sectional view showing an example of a sectional structure of a thermal infrared imaging device according to the present invention, and shows a sectional structure of one imaging device. The size of one element is about 40 μm square, and the image sensor shown in FIG. 1 is two-dimensionally arranged to constitute a thermal infrared image sensor.
[0021]
1 includes a first substrate 2 on which an address line 1 for selecting a pixel is formed, and a thermosensitive portion that is formed on the first substrate 2 so as to be separated and converts incident infrared rays into heat. 3, at least one support leg 4 that supports the heat-sensitive part 3 at a distance from the first substrate 2, and a V-shaped groove 5 that is disposed opposite to the first substrate 2 and guides infrared rays to the heat-sensitive part 3. And a plurality of microprism arrays (second substrates) 6 formed at a pitch.
[0022]
The first substrate 2 is formed by etching the silicon substrate 7. Protrusions 8 are formed at a pixel pitch, and address lines 1 are formed inside the protrusions 8. The convex portion 8 of the first substrate 2 is engaged with and joined to the V-shaped groove of the second substrate 6.
[0023]
A hollow portion 9 is provided between the heat sensitive portion 3 and the first substrate 2, and a hollow portion 10 is also provided between the heat sensitive portion 3 and the second substrate 6. The groove 11 between the support leg 4 and the heat sensitive part 3, the groove 12 between the support leg 4 and the first substrate 2, and the hollow parts 9 and 10 are maintained in a vacuum state of 1 Pa or less.
[0024]
The heat sensitive unit 3 includes an infrared absorption layer (not shown) that absorbs incident infrared rays, and a sensor (not shown) that converts a temperature increase due to the absorbed infrared rays into an electrical signal. The support leg 4 has a small cross-sectional area and a long length in order to minimize the escape of heat from the heat-sensitive part 3.
[0025]
The second substrate 6 is formed of a material that transmits infrared rays of 8 to 12 μm, such as germanium, silicon, zinc sulfide, and chalcogenide glass, and has a plurality of V-shaped grooves formed in a two-dimensional direction at a pixel pitch. These V-shaped grooves function as microprisms 6 that refract incident infrared rays and collect them on the heat-sensitive portion 3, and the convex portions 8 of the first substrate 2 are joined to the V-shaped grooves.
[0026]
Thus, in this embodiment, the convex part 8 of the 1st board | substrate 2 is made to mesh with the V-shaped groove | channel of the 2nd board | substrate 6 in the self-alignment, and the 1st and 2nd board | substrates 2 and 6 of FIG. Positioning can be performed with high accuracy.
[0027]
The first and second substrates 2 and 6 are bonded by degassing after bonding, such as an anodic bonding method in a vacuum or a surface activated bonding method in which surfaces are activated by ion irradiation. Therefore, it is desirable that the processing temperature is 400 ° C. or less.
[0028]
By the above method, the vacuum degree of the hollow part between the 2nd board | substrate 6 and the heat sensitive part 3 will be 1 Pa or less, and an effective aperture ratio will also be 90%. As a result, according to the experiment by the present inventor, the thermal time constant determined by the product of the heat capacity of the heat sensitive part 3 and the thermal resistance of the support leg 4 is made the same as in the past, so that no afterimage is observed when shooting at 60 frames / second. In this state, the aperture ratio, which was only 50% in the past, improved by about 80%, and the sensitivity improved by about 80%.
[0029]
2 to 16 are process diagrams illustrating the manufacturing process of the first substrate 2. First, as shown in FIG. 2, an SOI (Silicon On Insulator) substrate 21 is prepared. In the SOI substrate 21, a silicon oxide film 23 called a buried oxide film layer having a thickness of 0.2 μm is disposed on a single crystal silicon substrate 22 having a thickness of 0.7 mm, and a single-layer film having a thickness of 0.2 μm is disposed on the upper surface thereof. A crystalline p-type silicon thin film layer 24 is sequentially laminated.
[0030]
Next, as shown in FIG. 3, a silicon oxide film 23 is embedded in the SOI substrate 21 to form an element isolation region 25. Next, as shown in FIG. 4, with the NMOS transistor formation portion 26 covered with a resist mask 27, phosphorus ions are implanted into the PMOS transistor formation portion 28 to form an n-type region.
[0031]
Next, as shown in FIG. 5, a gate oxide film 29 is formed by thermal oxidation at the formation locations 26 and 28 of the NMOS and PMOS transistors and the formation location of the support legs 4, and a polycrystal is formed on the upper surface of the gate oxide film. A gate electrode 30 is formed of silicon.
[0032]
Next, as shown in FIG. 6, the portions other than the formation portion 26 of the NMOS transistor are covered with a resist mask 31, and phosphorus ions are implanted to form source and drain regions 32 and 33 of the NMOS transistor, as shown in FIG. Then, the portions other than the PMOS transistor formation portion 28 are covered with a resist mask 34, and boron ions are implanted to form the source and drain regions 35 and 36 of the PMOS transistor.
[0033]
Next, as shown in FIG. 8, an n + region 37 of a pn junction diode constituting a part of the heat sensitive portion 3 is formed by implanting arsenic ions, and as shown in FIG. 9, the p + region 38 is formed by boron ions. It is formed by injecting.
[0034]
Next, as shown in FIG. 10, after an interlayer film 39 is formed on the upper surface of the substrate, a contact 40 is formed of tungsten or the like for electrode wiring of transistors and diodes.
[0035]
Next, as shown in FIG. 11, after an aluminum wiring layer 41 is formed on the upper surface of the contact, an interlayer film 42 is formed on the upper surface of the substrate. Next, as shown in FIG. 12, a contact 43 connected to the wiring layer 41 is formed in the interlayer film 42, and a second aluminum wiring layer 44 is formed on the upper surface of the contact 43 as shown in FIG. An interlayer film 45 is formed on the upper surface.
[0036]
Thus, the NMOS and PMOS transistors are combined to form a signal amplification circuit and an output circuit that amplifies a signal generated according to the temperature of the diode by causing a constant current to flow in the two-dimensional selection circuit and the diode addressed thereby. .
[0037]
Next, as shown in FIG. 14, in order to thermally separate the two-dimensionally arranged sensor from the surrounding substrate, the single crystal silicon substrate 22 is reached by RIE (Reactive Ion Etching) or the like. A vertical etching hole 46 is formed.
[0038]
Next, as shown in FIG. 15, the recesses 47 are formed by uniformly etching the portions where the heat sensitive portion 3 and the support legs 4 are formed from the surface by about 1 μm.
[0039]
Next, as shown in FIG. 16, a cavity 48 is formed in the single crystal silicon substrate 22 with TMAH (Tetramethyl ammonium hydroxide) or the like through the etching hole 46.
[0040]
Through the above steps, the first substrate 2 of FIG. 1 is formed. Note that the NMOS transistor 49 and the PMOS transistor 50 in FIG. 16 show the peripheral circuit 51 made of CMOS formed at the end of the first substrate 2 as shown in FIG. Amplification of the electrical signal output from the unit is performed.
[0041]
FIG. 18 is an enlarged view of a part of the second substrate 6 disposed to face the heat sensitive part 3. As shown in the drawing, the end of the V-shaped groove 5 is arranged so as to face the end of the heat-sensitive part 3 in the vertical direction. As a result, the infrared light refracted by the V-shaped groove 5 enters the heat-sensitive portion 3.
[0042]
19 to 23 are process diagrams showing the manufacturing process of the second substrate 6. First, as shown in FIG. 19, a germanium substrate 61 having a thickness of 200 μm is prepared. Next, as shown in FIG. 20, while rotating the V-groove blade 62, micro prisms of the V-groove 5 having a depth of 2 μm, a width of 10 μm, and a pitch of 40 μm are sequentially formed in a two-dimensional direction. That is, the V-shaped groove 5 is formed by cutting to form the second substrate 6 (microprism).
[0043]
Next, as shown in FIG. 21, the completed second substrate 6 is turned upside down and activated by irradiating the V-groove slope with argon ions in a vacuum.
[0044]
Similarly, the surface of the first substrate 2 manufactured by the manufacturing method of FIGS. 2 to 16 is also irradiated with argon ions in a vacuum, and the microprism array 6 is self-aligned at room temperature as shown in FIG. Let them join and leave in vacuum for about 2 hours.
[0045]
Next, as shown in FIG. 23, the second substrate 6 of the thermal infrared imaging device taken out from the vacuum vessel is thinned to about 20 μm by CMP (chemical mechanical polishing), and the thermal infrared imaging device is completed.
[0046]
As described above, in the present embodiment, the microprism formed of the V-shaped groove is formed on the second substrate 6, and the concave portion of the first substrate 2 is engaged with the V-shaped groove in a self-aligning manner. 3 and the microprism can be accurately aligned, and the infrared light incident on the microprism can be guided to the heat sensitive part 3 without omission and the sensitivity of infrared detection is improved.
[0047]
In the above-described embodiment, the example in which the microprism including the V-shaped groove 4 is formed on the first substrate 2 has been described. However, the shape of the groove is not necessarily V-shaped. The convex portion 8 of the first substrate 2 is meshed with the groove so as to perform alignment in a self-aligning manner, and has an inclined surface for refracting incident infrared rays and guiding it to the heat-sensitive portion 3. Good.
[0048]
【The invention's effect】
As described above in detail, according to the present invention, since the convex portion of the first substrate is engaged with and joined to the groove of the second substrate, the thermal sensitive portion and the micro prism are accurately aligned. And the infrared detection sensitivity of the heat sensitive part is improved.
[Brief description of the drawings]
FIG. 1 is a sectional view showing an example of a sectional structure of a thermal infrared imaging device according to the present invention.
FIG. 2 is a process diagram illustrating a manufacturing process of the first substrate 2;
FIG. 3 is a process diagram following FIG. 2;
FIG. 4 is a process diagram following FIG. 3;
FIG. 5 is a process diagram following FIG. 4;
6 is a process drawing following FIG. 5. FIG.
FIG. 7 is a process diagram following FIG. 6;
FIG. 8 is a process diagram following FIG. 7;
FIG. 9 is a process diagram following FIG. 8;
FIG. 10 is a process diagram following FIG. 9;
FIG. 11 is a process drawing following FIG. 10;
FIG. 12 is a process drawing following FIG. 11;
FIG. 13 is a process drawing following FIG. 12;
FIG. 14 is a process drawing following FIG. 13;
FIG. 15 is a process drawing following FIG. 14;
FIG. 16 is a process drawing following FIG. 15;
FIG. 17 is a diagram showing a peripheral circuit formed at an end portion of the first substrate.
FIG. 18 is an enlarged view showing a part of a second substrate disposed opposite to a heat sensitive part.
FIG. 19 is a process diagram showing a manufacturing process of the second substrate.
FIG. 20 is a process drawing following FIG. 19;
FIG. 21 is a process drawing following FIG. 20;
FIG. 22 is a process drawing following FIG. 21;
FIG. 23 is a process drawing following FIG. 22;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Address line 2 1st board | substrate 3 Thermosensitive part 4 Support leg 5 V-shaped groove 6 Micro prism array (2nd board | substrate)
7 Silicon substrate 8 Convex portions 9 and 10 Hollow portions 11 and 12 Groove portions 21 SOI substrate 22 Single crystal silicon substrate 23 Silicon oxide film 24 Single crystal p-type silicon thin film layer 25 Element isolation region 29 Gate oxide film 30 Gate electrodes 39 and 42 Interlayer Films 41 and 44 Wiring layer 43 Contact 47 Recess

Claims (8)

画素ピッチで複数形成された凸部を有する第1の基板と、
前記第1の基板の前記凸部間に前記第1の基板から離間して配置され、入射赤外線を熱に変換する感熱部と、
前記感熱部を前記第1の基板から離間して支持する少なくとも1本の支持脚と、
前記第1の基板に対向配置され、入射赤外線を屈折させて前記感熱部に集光させる傾斜面を有する溝からなるマイクロプリズムが画素ピッチで複数形成されたマイクロプリズムアレイを有する第2の基板と、を備え、
前記凸部のそれぞれが前記溝のそれぞれに噛み合わされてなることを特徴とする熱型赤外線撮像素子。
A first substrate having a plurality of convex portions formed at a pixel pitch;
A heat-sensitive portion that is disposed between the convex portions of the first substrate and spaced from the first substrate, and converts incident infrared rays into heat;
At least one support leg for supporting the heat sensitive part away from the first substrate;
A second substrate having a microprism array, which is arranged opposite to the first substrate, and in which a plurality of microprisms each having an inclined surface that refracts incident infrared rays and condenses them on the heat-sensitive portion is formed at a pixel pitch. With
Each of the convex portions is engaged with each of the grooves, and the thermal infrared imaging device.
前記溝はV字状に加工されていることを特徴とする請求項1に記載の熱型赤外線撮像素子。The thermal infrared imaging element according to claim 1, wherein the groove is processed into a V shape. 前記凸部に画素を選択するためのアドレス線が形成されていることを特徴とする請求項1または2に記載の熱型赤外線撮像素子。3. The thermal infrared imaging element according to claim 1, wherein an address line for selecting a pixel is formed on the convex portion. 前記第2の基板の隣接する前記溝の間は平坦であり、前記溝の端部は前記感熱部の端部と面合わせされることを特徴とする請求項1〜3のいずれかに記載の熱型赤外線撮像素子。The gap between adjacent grooves of the second substrate is flat, and an end of the groove is flush with an end of the heat-sensitive part. Thermal infrared imaging device. 前記感熱部と前記第1の基板との間に形成される中空部と、前記感熱部と前記第2の基板との間に形成される中空部とは、所定の気圧以下に設定されることを特徴とする請求項1〜4のいずれかに記載の熱型赤外線撮像素子。The hollow part formed between the heat-sensitive part and the first substrate and the hollow part formed between the heat-sensitive part and the second substrate are set to a predetermined atmospheric pressure or lower. The thermal infrared imaging device according to any one of claims 1 to 4. 画素を選択するためのアドレス線と、画素ピッチで複数形成された凸部と、前記凸部間に配置され入射赤外線を熱に変換する感熱部と、この感熱部を離間して支持する少なくとも1本の支持脚と、を有する第1の基板と、
入射赤外線を屈折させて前記感熱部に集光させる傾斜面を有する溝が前記感熱部と同じ間隔で複数形成されたマイクロプリズムアレイを有する第2の基板と、を備えた熱型赤外線撮像素子の製造方法であって、
前記第2の基板の前記溝を前記第1の基板の前記凸部に噛み合わせた状態で、前記溝と前記凸部とを真空中で接合し、
前記第2の基板の前記第1の基板と対向する面とは逆側の面を研磨することを特徴とする熱型赤外線撮像素子の製造方法。
An address line for selecting a pixel, a plurality of convex portions formed at a pixel pitch, a heat sensitive portion arranged between the convex portions to convert incident infrared rays into heat, and at least one supporting the heat sensitive portion apart from each other A first substrate having a book support leg;
And a second substrate having a microprism array in which a plurality of grooves having inclined surfaces for refracting incident infrared rays and condensing them on the heat-sensitive portion are formed at the same intervals as the heat-sensitive portion. A manufacturing method,
In a state where the groove of the second substrate is engaged with the convex portion of the first substrate, the groove and the convex portion are bonded in a vacuum,
A method of manufacturing a thermal infrared imaging device, comprising polishing a surface of the second substrate opposite to a surface facing the first substrate.
前記凸部と前記溝とを接合する前に、前記溝の傾斜面を不活性ガスで活性化するとともに、前記第1の基板の前記凸部周辺を不活性ガスで活性化することを特徴とする請求項6に記載の熱型赤外線撮像素子の製造方法。Before joining the convex portion and the groove, the inclined surface of the groove is activated with an inert gas and the periphery of the convex portion of the first substrate is activated with an inert gas. The manufacturing method of the thermal type infrared imaging element of Claim 6. 前記第2の基板の前記溝は、切削加工により形成されることを特徴とする請求項6または7に記載の熱型赤外線撮像素子の製造方法。The method for manufacturing a thermal infrared imaging device according to claim 6 or 7, wherein the groove of the second substrate is formed by cutting.
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WO2011030428A1 (en) * 2009-09-10 2011-03-17 株式会社 東芝 Infrared imaging element
JP2011153994A (en) * 2010-01-28 2011-08-11 Honda Motor Co Ltd Vehicle periphery monitoring system
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JP2007316005A (en) * 2006-05-29 2007-12-06 Nissan Motor Co Ltd Infrared sensor and manufacturing method therefor
JP2009222633A (en) * 2008-03-18 2009-10-01 Mitsubishi Electric Corp Thermal infrared imaging element
WO2011030428A1 (en) * 2009-09-10 2011-03-17 株式会社 東芝 Infrared imaging element
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