JP2005019927A - Four-terminal type laminated chip capacitor and its manufacturing method, and precursor for the chip capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form an external electrode of a four-terminal type laminated chip capacitor capable of taking noise elimination measures in a frequency band in which a resonant point of a residual inductance is relatively high, in one or two processes. <P>SOLUTION: An external electrode forming electrode paste is applied to two side surfaces of a precursor and an internal electrode layer whose plane shape is almost square and which is provided with a pair of external electrode conducting parts capable of conducting to a pair of external electrodes at mutually facing side parts or diagonal parts thereof, in one or two processes, to form four external electrodes 2a, 2b, 2c and 2d, so that a four-terminal type laminated chip capacitor 16 is constituted. Though this four-terminal type laminated chip capacitor 16 exhibits the same performance as a three-terminal type laminated chip capacitor, at least one process can be omitted in external electrode formation works compared with that for the three-terminal type laminated chip capacitor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

BACKGROUND OF THE INVENTION
[0001]
BACKGROUND OF THE INVENTION
The present invention provides a multilayer capacitor suitable for noise reduction measures, in particular, a precursor for manufacturing a four-terminal multilayer capacitor, a method for manufacturing a four-terminal multilayer capacitor using the precursor, and a method thereof. It relates to the structure of the capacitor.
[0002]
[Prior art]
[Patent Document 1] Japanese Utility Model Laid-Open No. 2-82022 Conventionally, a three-terminal multilayer capacitor having a shape as shown in FIG. 9 has been known (Japanese Utility Model Laid-Open No. 2-82022), and the planar shape is generally substantially rectangular. A pair of signal input / output external electrodes 53a, 53b are provided at both ends 52a, 52b of a chip 51 in which a plurality of internal electrode layers formed are integrated via a ceramic layer, and the chips are in a back relationship with each other. A pair of ground electrodes 55a and 55b are attached to two side surfaces 54a of 51 (one side surface is hidden and not visible in FIG. 7).
[0003]
[Problems to be solved by the invention]
In general, the reactance | Xc | of a capacitor is expressed by “Xc = 1 / 2πfC” (f: frequency, C: electrostatic capacity). If an ideal capacitor is used, a multilayer capacitor is placed “between the signal line and the ground line”. When connected, the higher the frequency, the lower the impedance of the capacitor, and the high frequency is bypassed to ground, resulting in a large insertion loss.
[0004]
However, a normal multilayer capacitor has a structure in which internal electrodes are drawn to both end faces, so that a large residual inductance (ESL) is parasitic in series with the capacitor, and the resonance point of the capacitor and the residual inductance is a relatively low frequency. The insertion loss (noise attenuation effect) suddenly decreases in a frequency band that appears in a band and exceeds the resonance frequency.
[0005]
The three-terminal multilayer capacitor is effective for noise suppression by reducing the residual inductance. However, the three-terminal multilayer capacitor is provided on the peripheral side surface of the chip with the external electrode conducting portion that is the lead-out end of the internal electrode. In the manufacturing process of the type multilayer capacitor, external electrodes must be formed in three steps, resulting in a problem that the cost is increased.
[0006]
Accordingly, the present inventors diligently proposed a precursor for a multilayer chip capacitor that can easily form an external electrode in a manufacturing process of a multi-terminal multilayer capacitor that reduces residual inductance and exhibits power for noise suppression. As a result of research, the internal electrode layer has a specific planar shape, and a pair of external electrode conducting portions that can be energized with the external electrode are formed to extend in a specific direction, and are laminated via a ceramic layer. The present invention has been completed by finding the fact that the external electrode forming step can be simplified by forming a precursor with the external electrode conductive portion exposed on a specific surface of a substantially rectangular parallelepiped or cubic chip.
[0007]
Accordingly, an object of the present invention is to provide a multilayer chip capacitor capable of forming an external electrode of a four-terminal multilayer chip capacitor capable of noise removal measures in one or two steps in a frequency band where the resonance point of the capacitor and the residual inductance is relatively high. An object is to provide a precursor and a method of manufacturing a four-terminal multilayer chip capacitor by attaching an external electrode to the precursor, and a multilayer chip capacitor obtained by the method.
[0008]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the present invention has an internal structure in which a planar shape is substantially a quadrangle and a pair of external electrode conducting portions that can be energized with a pair of external electrodes at opposite sides or diagonal portions thereof. A four-terminal multilayer chip capacitor in which a plurality of electrode layers are laminated via a ceramic layer, and the external electrode conducting portion is exposed on two side surfaces that are in a back relationship with each other in a substantially rectangular or cubic chip. It is used as a precursor. In this aspect, a pair of external electrode conductive portions formed on any internal electrode layer exposed on the two side surfaces is formed on another internal electrode layer directly above or directly below the internal electrode layer. If it is provided in a portion that does not overlap with the other pair of external electrode conducting portions (invention 2), the external electrode can be formed by a simple operation with respect to the side surface.
[0009]
A third aspect of the present invention provides a method for producing the precursor for a four-terminal multilayer chip capacitor, wherein a pair of external electrode conducting portions capable of energizing an external electrode at opposite sides or diagonal portions of the planar shape is substantially square. A substantially rectangular parallelepiped or cubic chip formed by laminating a plurality of internal electrode layers with a ceramic layer interposed therebetween, and the external electrode conducting portion with respect to two side surfaces of the chip that are in a back relation to each other After the chip capacitor precursor is exposed, the external electrode forming electrode paste is applied to the two side surfaces to form four external electrodes, and further exposed to the two side surfaces. A pair of external electrode conductive portions in any internal electrode layer is provided in a portion that does not overlap with a pair of external electrode conductive portions in another internal electrode layer immediately above or directly below the internal electrode layer. The claim 4 invention) that, so the four external electrodes can be easily formed by simple work.
[0010]
As a result, the planar shape is substantially quadrilateral, the internal electrode layer having a pair of external electrode conducting portions that can be energized with the external electrode on the opposite side or diagonal portion, and the ceramic layer above or below the internal electrode layer In a substantially rectangular parallelepiped or cubic chip containing at least one set of external electrodes and another internal electrode layer having a pair of external electrode conducting portions that can be energized in the same manner as described above via a ceramic, a back surface relationship with each other The four-sided multilayer chip capacitor has four external electrodes on the two side surfaces of the chip that are exposed by overlapping the external electrode conducting portions so as not to conduct each other.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Next, the most preferred embodiment of the present invention will be described with reference to the drawings. First, the method for producing a precursor for a four-terminal multilayer chip capacitor according to the present invention will be described in detail, and then the structure of the precursor and the four-terminal multilayer chip capacitor obtained by the method will be described. A sheet of water slurry in which a binder such as polyvinyl alcohol is added to a ceramic dielectric raw material powder such as alumina or barium titanate is formed by a doctor blade method, and then an internal electrode forming paste such as palladium paste is formed in a matrix form on the sheet Print on.
[0012]
Then, the sheet is dried and desolvated to form a sheet on which internal electrodes are formed, and the sheet is cut into a matrix, and as shown in FIG. 4, four types of ceramic sheets having a substantially rectangular plane shape, The first ceramic having a first internal electrode 4a having a pair of external electrode conducting portions 3a, 3b that can be energized with an external electrode, which will be described later, in a portion near the arbitrary diagonal portions 8a, 8b in the opposing side portions 1a, 1b. The same pair of external electrode conducting portions 3c and 3d as those described above are provided on the sheet 5a and on the opposite side portions 1a and 1b near the other diagonal portions 8c and 8d different from the arbitrary diagonal portions 8a and 8b. At least one set of the second ceramic sheet 5b having the second internal electrode 4b and the ceramic sheet having no internal electrode manufactured in the same manner as described above, Upper and lower ceramic sheet 5c that sandwich the sheet, producing 5d.
[0013]
Next, by pressing and firing the ceramic sheets 5a, 5b, 5c, and 5d, the chip capacitor precursor 6 shown in FIG. 2 is formed. The precursor 6 is a chip having a substantially rectangular parallelepiped shape or a cubic shape, and the two side surfaces 7a and 7b which are in a back relation to each other among the side surfaces are located at different diagonal portions 8a, 8b, 8c and 8d. The external electrode conducting portions 3a, 3b, 3c, and 3d are exposed without overlapping each other.
[0014]
If a plurality of sets of the first and second ceramic sheets 5a and 5b are stacked between the upper and lower ceramic sheets 5c and 5d, the external portions are similarly formed at the positions near the diagonal portions 8a, 8b, 8c and 8d. The electrode conducting portions 3a, 3b, 3c, and 3d are superposed and arranged in the vertical direction without being energized through the first and second ceramic sheets 5a and 5b. Since the chip capacitor precursor 6 has already been fired, each of the first and second ceramic sheets 5a and 5b and the upper and lower ceramic sheets 5c and 5d is an unrecognizable ceramic body. In the body, the first electrode layer 4a and the second electrode layer 4b (these electrode layers are not visible in FIG. 2) are alternately laminated in the vertical direction via the ceramic layer 5, Is embedded in the ceramic body leaving the external electrode conducting portions 3a, 3b, 3c, 3d (the external electrode conducting portions 3b, 3d are not visible in FIG. 2).
[0015]
Next, as shown in FIG. 5, the other opposing sides 1c and 1d of the chip capacitor precursor 6 are held at a predetermined interval by a support means 9 such as an adhesive tape, and another set of opposing sides is obtained. Four external electrodes 2a, 2b, 2c, and 2d are formed by attaching the electrode paste 10 to the external electrode conducting portions 3a, 3b, 3c, and 3d exposed on the side surfaces 7a and 7b of the portions 1a and 1b. In this case, as means for attaching the electrode paste 10 to the chip capacitor precursor 6, a container 11 for containing the electrode paste 10 is preferably installed on both sides of the supporting means 9 that moves downward in the vertical direction. The coating roller 13 is rotated in contact with the fraying roller 12 partially immersed in the electrode paste 10.
[0016]
As the application roller 13, as shown in FIG. 6, both wheel bodies 13 a and 13 b having notched grooves 14 having a width corresponding to the lateral width of the external electrode are used on the peripheral surface, and these are conveyed by the support means 9. The scraping knives 15a and 15b are brought into contact with the two ring bodies 13a and 13b while being brought into contact with the coming chip capacitor precursor 6. In this embodiment, both the wheel bodies 13a and 13b can be configured as four wheels each having a relatively narrow width, or can be configured as two wheels having a wide width as shown in FIG.
[0017]
When such two-wheel bodies 13a and 13b are used, the electrode paste 10 adhering to the outer peripheral surfaces of the two-wheel bodies 13a and 13b is almost scraped off, and only the electrode pace 10 in the notch groove 14 is conveyed, and the chip capacitor is used. It adheres to the precursor 6. Therefore, if the application roller 13 is installed so that the notch groove 14 is close to the external electrode conducting portions 3a, 3b, 3c, and 3d exposed to the outside of the precursor 6, four external electrodes are provided. The electrode paste 10 can be simultaneously attached to the conductive portions 3a, 3b, 3c, and 3d, and if the electrode paste 10 is dried, the four-terminal multilayer chip capacitor 16 having a structure as shown in FIG. 1 can be manufactured. .
[0018]
This four-terminal type multilayer chip capacitor 16 is a multilayer capacitor having an equivalent circuit shown in FIG. 3 and suitable for noise removal, and optionally has a pair of external electrodes 2a and 2b as signal lines 17 and another pair of external electrodes. If 2c and 2d are incorporated in the electric / electronic circuit as the ground line 18, the noise of the signal passing through the signal line 17 is removed in the same manner as the conventional three-terminal multilayer chip capacitor, and the self-resonant frequency region is high and wide. Exhibits large insertion loss characteristics in the frequency band.
[0019]
The present invention can be carried out by changing a part of the above embodiment as long as the fundamental technical idea is followed and the effect of the invention is not significantly impaired. For example, the width and installation site of the external electrode can be arbitrarily changed as necessary.
[0020]
Further, as an aspect in which the electrode paste is applied to both opposite side surfaces, as shown in FIG. 8, two relatively narrow two-wheel bodies 13a and 13b are used to oppose the chip capacitor precursor 6 according to the present invention. After the electrode paste is attached to one side of the side portions 1a and 1b, the other side of the opposite side portions 1a and 1b is then placed on the other side of the opposite side portions 1a and 1b by another pair of wheels (not shown) provided below the both wheel bodies 13a and 13b. A mode in which the electrode paste is applied (upper and lower step sequential application method), or the electrode paste is again adhered between the two relatively narrow two-wheeled bodies 13a and 13b, or the electrode paste is dried to obtain an external electrode. A mode (repetitive coating method) in which the electrode capacitor paste is applied by passing the chip capacitor precursor 6 may be adopted. When the chip capacitor precursor according to the present invention is used, the operation of forming the external electrodes can be remarkably increased in these aspects as compared with the case of forming the external electrodes on the three-terminal multilayer chip capacitor.
[0021]
【The invention's effect】
As described above in detail, the present invention is excellent in that an external electrode of a four-terminal multilayer chip capacitor capable of taking noise countermeasures can be formed in one or two steps in a frequency band where the resonance point of the capacitor and the residual inductance is relatively high. Show the effect.
[Brief description of the drawings]
FIG. 1 is a perspective view of a four-terminal multilayer chip capacitor according to the present invention.
FIG. 2 is a perspective view of a precursor for a chip capacitor according to the present invention.
FIG. 3 is an equivalent circuit diagram of the four-terminal multilayer chip capacitor.
FIG. 4 is an exploded perspective view showing a manufacturing process of the chip capacitor precursor.
FIG. 5 is a process diagram showing a process of forming an external electrode on the chip capacitor precursor.
FIG. 6 is a perspective view of an electrode paste application roller used in the process.
FIG. 7 is a perspective view showing another embodiment of an electrode paste application roller used in the method of the present invention.
FIG. 8 is a perspective view showing still another aspect of the electrode paste application roller used in the method of the present invention.
FIG. 9 is a perspective view of the prior art.
[Explanation of symbols]
1a, 1b, 1c, 1d: opposing side portions 2, 2a, 2b, 2c, 2d: external electrodes 3a, 3b, 3c, 3d: external electrode conducting portion 4: external electrodes 4a, 4b: first and second internal electrodes Layer 5: Ceramic layers 5a, 5b: Second and second ceramic sheets 5c, 5d: Upper and lower ceramic sheets 6: Chip capacitor precursors 7a, 7b: Side surfaces 8a, 8b, 8c, 8d: Diagonal portion 9: Support means 10: Electrode paste 11: Container 12: Raising roller 13: Application roller 13a, 13b: Both wheels 14: Notch groove 15a, 15b: Scraping knife 16: Four-terminal multilayer chip capacitor 17: Signal line 18: Ground wire 51: chip bodies 52a, 52b: both end portions 53a, 53b: external electrodes 54a, 54b: side surfaces.

Claims (5)

A pair of external electrode conducting portions (3a) capable of energizing a pair of external electrodes (2) at opposite sides (1a, 1b) or diagonal portions (8a, 8b, 8c, 8d) of the planar shape being substantially square. 3b, 3c, 3d), and a plurality of internal electrode layers (4a, 4b) stacked in a plurality of layers via a ceramic layer (5). A precursor for a four-terminal multilayer chip capacitor, wherein the external electrode conducting portion is exposed to the side surfaces (7a, 7b). The pair of external electrode conductive portions (3a, 3b) in the arbitrary internal electrode layer (4a) exposed on the two side surfaces (7a, 7b) is another internal electrode directly above or below the internal electrode layer. The precursor for a four-terminal multilayer chip capacitor according to claim 1, wherein the precursor is provided in a portion of the layer (4b) that does not overlap with the pair of external electrode conducting portions (3c, 3d). A pair of external electrode conducting portions (3a, 3b) capable of energizing the external electrode (2) to the opposite side portions (1a, 1b) or diagonal portions (8a, 8b, 8c, 8d) of the planar shape being substantially square. 3c, 3d) are substantially rectangular parallelepiped or cubic chips formed by laminating a plurality of internal electrode layers (4a, 4b) with ceramic layers (5), and the chips are in a back-to-back relationship with each other. After manufacturing the chip capacitor precursor (6) with the external electrode conductive portion exposed to two side surfaces (7a, 7b), the electrode paste (10) for forming an external electrode is applied to the two side surfaces. And forming four external electrodes (2a, 2b, 2c, 2d). The pair of external electrode conductive portions (3a, 3b) in the arbitrary internal electrode layer (4a) exposed on the two side surfaces (7a, 7b) is another internal electrode directly above or below the internal electrode layer. The method of manufacturing a four-terminal multilayer chip capacitor according to claim 3, wherein the layer (4b) is provided at a portion that does not overlap with the pair of external electrode conducting portions (3c, 3d). A pair of external electrode conducting portions (3a, 3b) capable of energizing the external electrode (2) to the opposite side portions (1a, 1b) or diagonal portions (8a, 8b, 8c, 8d) of the planar shape being substantially square. ) And another pair of external electrode conductive portions (3c, 3d) that can be electrically connected to the external electrode via the ceramic layer (5) above or below the internal electrode layer. In a substantially rectangular parallelepiped or cubic chip containing at least one set of another internal electrode layer (4b) having a ceramic layer therebetween, the two side surfaces (7a, 7b) of the chip that are in a back relationship with each other, A four-terminal multilayer chip capacitor in which the external electrode conducting portions are exposed to overlap each other so as not to conduct electricity, and four external electrodes (2a, 2b, 2c, 2d) are formed thereon.

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