JP2005019724A - Member for semiconductor heat treatment - Google Patents

Member for semiconductor heat treatment Download PDF

Info

Publication number
JP2005019724A
JP2005019724A JP2003183032A JP2003183032A JP2005019724A JP 2005019724 A JP2005019724 A JP 2005019724A JP 2003183032 A JP2003183032 A JP 2003183032A JP 2003183032 A JP2003183032 A JP 2003183032A JP 2005019724 A JP2005019724 A JP 2005019724A
Authority
JP
Japan
Prior art keywords
sic
heat treatment
wafer
sic film
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003183032A
Other languages
Japanese (ja)
Other versions
JP4350438B2 (en
Inventor
Masaya Yokogawa
雅也 横川
Katsuyuki Shimanuki
克之 島貫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Original Assignee
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Ceramics Co Ltd filed Critical Toshiba Ceramics Co Ltd
Priority to JP2003183032A priority Critical patent/JP4350438B2/en
Publication of JP2005019724A publication Critical patent/JP2005019724A/en
Application granted granted Critical
Publication of JP4350438B2 publication Critical patent/JP4350438B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a member for semiconductor heat treatment, which will not generate a slip on a semiconductor wafer by preventing the rear surface of wafer from generating a flaw and which is suitable for a manufacturing process which requires high cleanliness. <P>SOLUTION: The member for semiconductor heat treatment is constituted of a carbon substrate and an SiC film, formed on the surface of the substrate while the thickness of the SiC film is not less than 30 μm and not more than 150 μm and SiC crystals, observed on the surface of the SiC film and whose grain size is not less than 10 μm, occupy not less than 80% of an arbitrary area having the size of 150μm×150μm, further, the area of the SiC film is the growth surface of the SiC crystal and a center line average roughness Ra, measured by a length of not less than 200 μm at an arbitrary position, is not less than 1.2 μm and not more than 4 μm. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は半導体熱処理用部材に係わり、特にSiC被覆カーボンを用いた半導体熱処理用部材に関する。
【0002】
【従来の技術】
一般にSiC被覆カーボンを用いたエピタキシャル成長用サセプタは、任意の形状に加工したカーボン基材にSiC膜を被覆して製造される。サセプタの耐食性能は、SiC膜の結晶性に大きく影響される。すなわち耐食性を高めるためには、表面が結晶性の良好なSiC膜のファセット、結晶軸、格子点で覆われている状態が好適である。一方、SiC結晶が非常に発達したサセプタでは、表面粗さが粗くなり、半導体ウェーハの裏面に傷を付け易く、スリップ発生の重大な要因の一つとなっていた。
【0003】
従来、サセプタ等の半導体熱処理用部材に用いられるSiC被覆カーボンは、塩素置換シラン類を原料としたCVDにより形成されているが、この方法ではSiC結晶の成長が不十分で、半導体ウェーハ処理において、十分な耐食性は得られない。そこで結晶性の発達を促しSiC膜を形成しているが、この方法ではサセプタの表面粗さが粗く、ウェーハ裏面に傷を発生させることがあった。これを改良するものとして、例えば特許文献1では、SiC結晶の粒径とその占拠率を制御する半導体熱処理用部材が提案されているが、粒径が5μm以上であるため、ウェーハ裏面に傷が発生する場合があり、問題が十分解消されていない。また、特許文献2では、結晶性の高いSiCの表面を一部研磨し、表面粗さを低減させているが、この方法では概ね10〜95%の研磨面が露出し、この研磨面がファセットと比較して耐食性に劣るため、シリコンボートとともに使用し、処理した場合にSiCダストを発生するという問題点があった。さらに、特許文献2のものは、不活性雰囲気下では、処理温度においてSiCからの揮発成分は極めて少ないが、シリコンウェーハと同時に処理した場合、近傍のシリコン蒸気によって、表面の反応が促進され、種々の分解ガス成分が気相中でSiCを運搬する。Si蒸気によりSiC(固体)→SiC(気体)の活性エネルギーが約30%低減する。SiC部材からのSiC汚染を抑制するために、表面を酸化する方法が考えられるが、SiCに比べてSiOの不純物拡散係数は極めて大きく、この方法では製品内部の不純物や酸化炉内の不純物を表面に凝集してしまい、高清浄度を必要とする製造工程には不適当である。
【0004】
【特許文献1】
特公平6−66265号(第2頁第3欄第15〜19行、第1図)
【0005】
【特許文献2】
特許第3094312号(明細書段落番号[0005]、図1)
【0006】
【発明が解決しようとする課題】
本発明は上述した事情を考慮してなされたもので、ウェーハ裏面の傷の発生を防止して半導体ウェーハにスリップを発生させることがなく、かつ高清浄度を必要とする製造工程に適する半導体熱処理用部材を提供することを目的とする。
【0007】
【課題を解決するための手段】
上記目的を達成するため、本発明の1つの態様によれば、カーボン質基材の表面にSiC被膜を形成した半導体熱処理用部材であって、前記SiC被膜の厚さが30μm以上150μm以下であり、前記SiC被膜の表面にて観察されるSiC結晶が粒径10μm以上のものが150μm×150μm以上大きな任意の面積当り80%以上を占め、かつ、前記SiC被膜の面積はSiC結晶成長面であり、任意の位置での200μm以上の長さで測定した中心線平均粗さRaが1.2μm以上4μm以下であることを特徴とする半導体熱処理用部材が提供される。これにより、ウェーハ裏面の傷の発生を防止して半導体ウェーハにスリップを発生させることがなく、かつ高清浄度を必要とする製造工程に適する半導体熱処理用部材が実現される。
【0008】
【発明の実施の形態】
以下、本発明に係わる半導体熱処理用部材の実施の形態について添付図面を参照して説明する。
【0009】
図1は本発明に係わる半導体熱処理用部材の実施形態として半導体ウェーハ熱処理用治具が組込まれた半導体ウェーハ熱処理用装置の斜視図を示す。
【0010】
図1に示すように、本実施形態の半導体ウェーハ熱処理用治具1は、ウェーハ熱処理用装置2に組込まれて使用されてウェーハボートとして使用される。
【0011】
ウェーハ熱処理用装置2は、Si材が用いられ、円板形状の基台3と、この基台3に開口部4が形成されるように立設された3本の支柱5、これら支柱5に設けられた多数の水平方向に延びる突起部6と、支柱5の安定と支柱5間の間隔保持のために支柱5の上端に設けられたほぼ馬蹄形状の上部固定板7で構成されている。
【0012】
半導体ウェーハ熱処理用治具1(以下、単に治具という。)は、開口部4から挿入され、この支柱5の各々の突起部6に載置されてウェーハ熱処理用装置2に着脱に収納、配置される。
【0013】
図1および図2に示すように、治具1は、平板状で一部が切欠されたリング状(ほぼ馬蹄形状)をなし、この馬蹄形部分に半導体ウェーハWを支持するウェーハ受部1sが形成されている。
【0014】
さらに、図3に示すように、治具1にはカーボン基材1aにSiC膜1bを形成してなるSiC被覆カーボンが用いられ、SiC膜1bの表面は、何かしらの加工が施された加工面ではなくCVDコーティング等での結晶成長によって得られたそのままの面であるSiC結晶成長面からなり、その膜厚が30μm以上150μm以下であり、SiC被膜の表面にて観察されるSiC結晶が粒径10μm以上のものが150μm×150μm以上大きな任意の面積当り80%以上を占め、その表面の任意の位置について200μm以上の長さで測定した中心線平均粗さRa(JIS−B0601−1982)が1.2μm以上4μm以下になっている。
【0015】
なお、ここで粒径とは、治具1の任意の一表面に対し垂直な方向からSiC被膜を構成する各SiC結晶をSEM(走査型電子顕微鏡)にて観察した際のSiC結晶各頂点の外接円の直径をいい、また、加工とは、研磨等の機械的加工あるいはケミカルエッチング等の化学的加工を意味する。また、150μm×150μm以上大きな任意の面積でのSiC結晶の評価は、本発明のSiC結晶の特徴をより明確にするのに必要な観察視野の広さを特定している。
【0016】
治具1に用いられるSiC被覆カーボンを製造するには、予め当該製品形状をSiCよりも熱膨張係数の大きな基材カーボンに賦与し、SiCを少なくとも1回1500℃以上1850℃以下の温度で被覆した後、その表面の少なくとも一部を所定の表面粗さにまで研磨し、その後再度SiCを1500℃℃以上1850℃以下の温度で少なくとも1回被覆する。
【0017】
上記のようにして得られた治具1は、表面がSiCのファセット、結晶軸、格子点(SiC結晶成長)からなる結晶性が高く耐食性に優れ、従来法では達成されないような表面粗さが制御されている。
【0018】
上記表面をファセット、結晶軸、格子点(SiC結晶成長)のみで構成するのは、最表面の構造を熱力学的に最も安定な状態とするためである。ここでSiC膜厚が30μm未満では、SiC膜が薄く、基材との熱膨張係数差による熱変形に耐えられず、破損または変形し、実用に耐えない。一方SiC膜厚が150μmを超えるとSiC膜がほとんど熱変形できず、加熱時にSiC膜にクラックが発生し、実用に耐えない。SiC膜の性状として、10μm以上の粒子が80%以上を占有するとしたのは、SiC膜では粒界とファセットの耐食性が大きく異なり、粒界部を起点として侵食されるのを防ぐためである。10μm未満の粒子ではファセットの面積に対する粒界の割合が比較的高いために、粒界からSiC膜が侵食され易く、この割合が20%を超えると10μm未満の粒子付近を起点としたSiC膜の侵食が、基材近傍まで到達するのに要する時間が短くなり、部材の寿命を短縮する。
【0019】
本発明において、Raを1.2μm以上としたのは、Raが1.2μmより小さいと例えばシリコンウェーハを載置して熱処理した際のSiCとSiの固着を防止するためである。一方、Raを4μm以下としたのは、Raが4μmを超えると、鋭利な凹凸の発生が激しくなるため、ウェーハ裏面に傷(スクラッチ)を与え、スリップを引起すためである。
【0020】
図1に示すように、半導体ウェーハ熱処理用治具1が組込まれ、シリコンウェーハWがウェーハ受部1sに載置されたウェーハ熱処理用装置2を熱処理炉に入れて、熱処理を行なうが、治具1のウェーハ受部1sはその表面のSiC結晶の発達が抑制されて、SiC被膜の表面にて観察されるSiC結晶が粒径10μm以上のものが150μm×150μm以上大きな任意の面積当り80%以上を占め、その表面の任意の位置について200μm以上の長さで測定した中心線平均粗さRaが1.2μm以上4μm以下に制御されているので、半導体ウェーハの裏面に傷が付かず、スリップ発生もない。また、SiCの表面に研磨面、加工面が露出しないので、SiCダストの発生が大幅に抑制され、図4に示す従来の状態のように製品内部の不純物や酸化炉内の不純物がウェーハ表面に凝集してしまうことがなく、高清浄度の熱処理が行なえる。
【0021】
なお、上記実施形態では、半導体ウェーハ熱処理用治具をSi製の半導体ウェーハ熱処理用装置に組込んだ例で説明したが、SiC製等他の材質の半導体ウェーハ熱処理用装置に組込んでも、さらに、本発明に係わる半導体熱処理用部材を半導体ウェーハ熱処理に適するリング状、円板状等種々の形状にして用いても、本発明の効果が得られる。本発明に係わる半導体熱処理用部材を半導体ウェーハ熱処理に適する種々の形状にしたものも本発明の範囲に属する。
【0022】
【実施例】
[試験] 下記のようにSiC膜の条件を変化させた試料を作製し、シリコン製ボートに装着し、ウェーハ受部にシリコンウェーハを載置してArガス雰囲気下1300℃で2時間処理を繰返し、ウェーハ裏面傷、SiCダクト発生および耐用回数について調べた。
【0023】
[試料] (実施例1)1600〜1800℃の温度で20〜0.1トールの減圧に保持された反応室内の反応ゾーンに、ウェーハ受部が形成されたカーボン基材(C源)を配置し、一酸化ケイ素ガス(Si源)を反応室内に導入し、基材表面にSiC膜を形成した。このSiC膜を形成する一つの結晶粒は30〜180μmであった。このサセプタのウェーハ受部をRa0.9μmに研磨し、その後再び1600〜1800℃の温度で20〜0.1トールの減圧に保持された反応室内の反応ゾーンに、上記ウェーハ受部を研磨したSiC被覆カーボンを配置し、一酸化ケイ素ガスを反応室内に導入し、表面にSiC結晶を形成して、SiC被覆カーボンを得た。
なお、実施例及び比較例におけるRaとは、接触式表面粗さ計を用い、JIS−B0601−1982に基づき、算出された中心線平均粗さを意味する。
(実施例2)ウェーハ受部研磨時の表面粗さをRa0.2μmとする以外は実施例1と同様にしてSiC被覆カーボンを得た。
(実施例3)ウェーハ受部研磨時の表面粗さをRa0.1μmとする以外は実施例1と同様にしてSiC被覆カーボンを得た。
【0024】
(比較例1)実施例1のSiC被覆カーボンのウェーハ受部表面を研磨してSiC被覆カーボンを得た。
(比較例2)ウェーハ受部研磨時の表面の表面粗さをRa1.4μmとする以外は実施例1と同様にしてSiC被覆カーボンを得た。
(比較例3)ウェーハ受部研磨時の表面の表面粗さをRa0.04μm(鏡面)とする以外は実施例1と同様にしてSiC被覆カーボンを得た。
(比較例4)作製時の処理温度を1100〜1400℃にする以外は実施例1と同様にしてSiC被覆カーボンを得た。なお、このときSiC膜を形成する結晶粒は10μm未満の粒子を15%含んでいた。
(比較例5)SiC膜形成時間を1/4とする以外は実施例2と同様にしてSiC被覆カーボンを得た。なお、このときSiC膜厚は20μmであった。
(比較例6)実施例1の工程を2回繰返して、SiC被覆カーボンを得た。なお、このときSiC膜厚は180μmであった。
【0025】
[結果]
【表1】

Figure 2005019724
【0026】
表1からもわかるように、本発明の範囲内のSiC膜厚、粒径10μm以上のSiC結晶粒子の占有率およびウェーハ受部表面粗さRaを有する実施例1〜3は、いずれもウェーハ裏面傷がなく、SiCダスト発生もなく、さらに、耐用回数が158〜139回と極めて多かった。
【0027】
これに対して、各条件とも本発明の範囲内であるが、研磨面の露出がある比較例1は、SiCダスト発生があり、さらに、耐用回数が実施例1〜3に比べて、32〜22%低下した。
【0028】
ウェーハ受部表面粗さの線粗さが本発明の範囲外(超)である比較例2は、耐用回数が実施例1並に優れているが、ウェーハ裏面に傷が発生した。
【0029】
ウェーハ受部表面粗さの線粗さが本発明の範囲外(未満)である比較例3は、SiCダスト発生があり、さらに、耐用回数が実施例1の60%に低下した。
【0030】
粒径10μm以上のSiC結晶粒子の占有率が本発明の範囲外(未満)である比較例4は、SiCダスト発生があり、さらに、耐用回数が実施例1の51%に低下した。
【0031】
SiC膜厚が本発明の範囲外(未満)である比較例5は、ウェーハ裏面の傷およびSiCダストの発生が共にないが、耐用回数が実施例1の12%(19回)と著しく低下した。
【0032】
SiC膜厚が本発明の範囲外(超)である比較例6は、ウェーハ裏面の傷およびSiCダストが共に発生し、さらに、耐用回数が実施例1の62%に低下した。
【0033】
【発明の効果】
本発明に係わる半導体熱処理用部材によれば、ウェーハ裏面の傷の発生を防止して半導体ウェーハにスリップを発生させることがなく、かつ高清浄度を必要とする製造工程に適する半導体熱処理用部材を提供することができる。
【図面の簡単な説明】
【図1】本発明に係わる半導体熱処理用部材の実施形態が組込まれた半導体ウェーハ熱処理用装置の斜視図。
【図2】本発明に係わる半導体熱処理用部材の実施形態の平面図。
【図3】本発明に係わる半導体熱処理用部材の実施形態の断面図。
【図4】従来のウェーハ熱処理用治具の使用状態を示す概念図。
【符号の説明】
1 治具
1a 基材
1b SiC膜
1s ウェーハ受部
2 ウェーハ熱処理用装置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor heat treatment member, and more particularly to a semiconductor heat treatment member using SiC-coated carbon.
[0002]
[Prior art]
In general, an epitaxial growth susceptor using SiC-coated carbon is manufactured by coating an SiC film on a carbon substrate processed into an arbitrary shape. The corrosion resistance of the susceptor is greatly influenced by the crystallinity of the SiC film. That is, in order to improve the corrosion resistance, it is preferable that the surface is covered with facets, crystal axes, and lattice points of a SiC film having good crystallinity. On the other hand, in a susceptor in which SiC crystal is very developed, the surface roughness becomes rough, the back surface of the semiconductor wafer is easily scratched, and this is one of the important causes of slip occurrence.
[0003]
Conventionally, SiC-coated carbon used for semiconductor heat treatment members such as susceptors has been formed by CVD using chlorine-substituted silanes as raw materials, but this method has insufficient growth of SiC crystals, and in semiconductor wafer processing, Sufficient corrosion resistance cannot be obtained. Therefore, the development of crystallinity is promoted to form a SiC film. However, this method has a rough surface of the susceptor and may cause scratches on the back surface of the wafer. In order to improve this, for example, Patent Document 1 proposes a semiconductor heat treatment member for controlling the grain size of SiC crystal and the occupation ratio thereof. However, since the grain size is 5 μm or more, the back surface of the wafer is damaged. It may occur and the problem has not been fully resolved. In Patent Document 2, the surface of SiC having high crystallinity is partially polished to reduce the surface roughness. However, in this method, approximately 10 to 95% of the polished surface is exposed, and this polished surface is faceted. Therefore, there is a problem that SiC dust is generated when used together with a silicon boat and processed. Furthermore, in the case of Patent Document 2, the volatile component from SiC is extremely small at the processing temperature under an inert atmosphere, but when processing at the same time as the silicon wafer, the surface reaction is promoted by the nearby silicon vapor, The decomposed gas component carries SiC in the gas phase. The active energy of SiC (solid) → Si 2 C (gas) is reduced by about 30% by Si vapor. In order to suppress SiC contamination from the SiC member, a method of oxidizing the surface can be considered, but the impurity diffusion coefficient of SiO 2 is extremely large compared to SiC, and in this method, impurities inside the product and impurities in the oxidation furnace are removed. They are agglomerated on the surface and are not suitable for manufacturing processes that require high cleanliness.
[0004]
[Patent Document 1]
JP-B-6-66265 (page 2, column 3, lines 15-19, Fig. 1)
[0005]
[Patent Document 2]
Japanese Patent No. 3094312 (paragraph number [0005], FIG. 1)
[0006]
[Problems to be solved by the invention]
The present invention has been made in consideration of the above-described circumstances, and prevents the occurrence of scratches on the back surface of the wafer so that the semiconductor wafer does not slip and is suitable for a manufacturing process that requires high cleanliness. It aims at providing the member for use.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, according to one aspect of the present invention, there is provided a semiconductor heat treatment member in which a SiC film is formed on a surface of a carbonaceous substrate, wherein the SiC film has a thickness of 30 μm or more and 150 μm or less. The SiC crystal observed on the surface of the SiC film has a grain size of 10 μm or more occupies 80% or more per arbitrary area larger than 150 μm × 150 μm, and the area of the SiC film is the SiC crystal growth surface There is provided a semiconductor heat treatment member characterized in that the center line average roughness Ra measured at a length of 200 μm or more at an arbitrary position is 1.2 μm or more and 4 μm or less. As a result, it is possible to realize a semiconductor heat treatment member suitable for a manufacturing process that requires high cleanliness without causing generation of scratches on the semiconductor wafer by preventing generation of scratches on the back surface of the wafer.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a semiconductor heat treatment member according to the present invention will be described below with reference to the accompanying drawings.
[0009]
FIG. 1 is a perspective view of a semiconductor wafer heat treatment apparatus in which a semiconductor wafer heat treatment jig is incorporated as an embodiment of a semiconductor heat treatment member according to the present invention.
[0010]
As shown in FIG. 1, the semiconductor wafer heat treatment jig 1 according to the present embodiment is incorporated into a wafer heat treatment apparatus 2 and used as a wafer boat.
[0011]
The wafer heat treatment apparatus 2 is made of Si material and includes a disk-shaped base 3, three pillars 5 erected so that an opening 4 is formed on the base 3, and the pillars 5. It is composed of a large number of horizontally extending projections 6 and a substantially horseshoe-shaped upper fixing plate 7 provided at the upper end of the column 5 in order to stabilize the column 5 and maintain the interval between the columns 5.
[0012]
A semiconductor wafer heat treatment jig 1 (hereinafter simply referred to as a jig) is inserted from the opening 4, placed on each protrusion 6 of the column 5, and detachably accommodated in the wafer heat treatment apparatus 2. Is done.
[0013]
As shown in FIGS. 1 and 2, the jig 1 has a flat plate shape with a part cut away (substantially a horseshoe shape), and a wafer receiving portion 1s for supporting the semiconductor wafer W is formed in the horseshoe shape portion. Has been.
[0014]
Further, as shown in FIG. 3, the jig 1 is made of SiC-coated carbon formed by forming the SiC film 1b on the carbon substrate 1a, and the surface of the SiC film 1b has a processed surface on which some kind of processing has been performed. The SiC crystal growth surface, which is an as-is surface obtained by crystal growth by CVD coating or the like, has a film thickness of 30 μm or more and 150 μm or less, and the SiC crystal observed on the surface of the SiC film has a grain size 10 μm or more occupies 80% or more per arbitrary area 150 μm × 150 μm or larger, and the center line average roughness Ra (JIS-B0601-1982) measured at a length of 200 μm or more at any position on the surface is 1 .2 μm or more and 4 μm or less.
[0015]
Here, the grain size is the size of each vertex of the SiC crystal when each SiC crystal constituting the SiC film is observed with a scanning electron microscope (SEM) from a direction perpendicular to an arbitrary surface of the jig 1. The diameter of the circumscribed circle is referred to, and the processing means mechanical processing such as polishing or chemical processing such as chemical etching. Moreover, the evaluation of the SiC crystal in an arbitrary area larger than 150 μm × 150 μm specifies the width of the observation field necessary for clarifying the characteristics of the SiC crystal of the present invention.
[0016]
In order to manufacture the SiC-coated carbon used in the jig 1, the product shape is previously applied to the base carbon having a larger thermal expansion coefficient than SiC, and the SiC is coated at a temperature of 1500 ° C. or more and 1850 ° C. or less at least once. Then, at least a part of the surface is polished to a predetermined surface roughness, and then SiC is coated again at a temperature of 1500 ° C. to 1850 ° C. at least once.
[0017]
The jig 1 obtained as described above has high crystallinity with a surface composed of SiC facets, crystal axes, and lattice points (SiC crystal growth) and excellent corrosion resistance, and has a surface roughness that cannot be achieved by conventional methods. It is controlled.
[0018]
The reason why the surface is constituted only by facets, crystal axes, and lattice points (SiC crystal growth) is to make the outermost surface structure thermodynamically most stable. Here, when the SiC film thickness is less than 30 μm, the SiC film is thin and cannot withstand thermal deformation due to a difference in thermal expansion coefficient from the base material, and is damaged or deformed, so that it is not practical. On the other hand, when the SiC film thickness exceeds 150 μm, the SiC film can hardly be thermally deformed, and cracks are generated in the SiC film during heating, which is not practical. The reason why the SiC film is characterized by the fact that particles of 10 μm or more occupy 80% or more is that the corrosion resistance of the grain boundary and the facet is greatly different in the SiC film, and is prevented from being eroded starting from the grain boundary part. Since the ratio of the grain boundary to the facet area is relatively high for particles of less than 10 μm, the SiC film is easily eroded from the grain boundary. When this ratio exceeds 20%, the SiC film starting from the vicinity of the particles of less than 10 μm The time required for the erosion to reach the vicinity of the substrate is shortened, and the life of the member is shortened.
[0019]
In the present invention, Ra is set to 1.2 μm or more in order to prevent SiC and Si from sticking when, for example, a silicon wafer is placed and heat-treated when Ra is smaller than 1.2 μm. On the other hand, the reason why Ra is set to 4 μm or less is that, when Ra exceeds 4 μm, sharp unevenness is generated, so that scratches (scratches) are given to the back surface of the wafer and slip is caused.
[0020]
As shown in FIG. 1, a semiconductor wafer heat treatment jig 1 is incorporated, and a wafer heat treatment apparatus 2 on which a silicon wafer W is placed on a wafer receiving portion 1s is placed in a heat treatment furnace for heat treatment. In the first wafer receiving portion 1s, the development of SiC crystal on the surface is suppressed, and the SiC crystal observed on the surface of the SiC film has a particle size of 10 μm or more, but 150 μm × 150 μm or more. Since the center line average roughness Ra measured at a length of 200 μm or more at an arbitrary position on the surface is controlled to be 1.2 μm or more and 4 μm or less, the back surface of the semiconductor wafer is not damaged and slip occurs. Nor. In addition, since the polished surface and processed surface are not exposed on the surface of SiC, generation of SiC dust is greatly suppressed, and impurities inside the product and impurities in the oxidation furnace are exposed to the wafer surface as in the conventional state shown in FIG. Heat treatment with high cleanliness can be performed without agglomeration.
[0021]
In the above embodiment, the semiconductor wafer heat treatment jig has been described as being incorporated in a semiconductor wafer heat treatment apparatus made of Si, but even if incorporated in a semiconductor wafer heat treatment apparatus of another material such as SiC, Even if the semiconductor heat treatment member according to the present invention is used in various shapes such as a ring shape and a disk shape suitable for semiconductor wafer heat treatment, the effects of the present invention can be obtained. The semiconductor heat treatment member according to the present invention having various shapes suitable for semiconductor wafer heat treatment also belongs to the scope of the present invention.
[0022]
【Example】
[Test] Samples with different SiC film conditions were prepared as described below, mounted on a silicon boat, a silicon wafer placed on a wafer receiver, and the treatment was repeated at 1300 ° C. for 2 hours in an Ar gas atmosphere. The wafer back surface scratches, the occurrence of SiC ducts and the number of service life were examined.
[0023]
[Sample] (Example 1) A carbon base material (C source) on which a wafer receiving portion is formed is disposed in a reaction zone in a reaction chamber maintained at a reduced pressure of 20 to 0.1 Torr at a temperature of 1600 to 1800 ° C. Then, silicon monoxide gas (Si source) was introduced into the reaction chamber to form a SiC film on the substrate surface. One crystal grain forming this SiC film was 30 to 180 μm. The wafer receiving portion of this susceptor is polished to Ra 0.9 μm, and then the SiC is obtained by polishing the wafer receiving portion in a reaction zone in the reaction chamber held again at a temperature of 1600 to 1800 ° C. and a reduced pressure of 20 to 0.1 Torr. Coated carbon was placed, silicon monoxide gas was introduced into the reaction chamber, and SiC crystals were formed on the surface to obtain SiC-coated carbon.
In addition, Ra in an Example and a comparative example means the centerline average roughness computed based on JIS-B0601-1982 using a contact-type surface roughness meter.
(Example 2) An SiC-coated carbon was obtained in the same manner as in Example 1 except that the surface roughness during polishing of the wafer receiving part was set to Ra 0.2 µm.
(Example 3) A SiC-coated carbon was obtained in the same manner as in Example 1 except that the surface roughness at the time of polishing the wafer receiving part was Ra 0.1 µm.
[0024]
(Comparative Example 1) The surface of the wafer receiving part of the SiC-coated carbon of Example 1 was polished to obtain SiC-coated carbon.
(Comparative Example 2) A SiC-coated carbon was obtained in the same manner as in Example 1 except that the surface roughness of the wafer receiving portion was changed to Ra 1.4 µm.
(Comparative Example 3) A SiC-coated carbon was obtained in the same manner as in Example 1 except that the surface roughness of the wafer receiving part was changed to Ra 0.04 µm (mirror surface).
(Comparative Example 4) A SiC-coated carbon was obtained in the same manner as in Example 1 except that the processing temperature during production was 1100 to 1400 ° C. At this time, the crystal grains forming the SiC film contained 15% of particles less than 10 μm.
(Comparative Example 5) An SiC-coated carbon was obtained in the same manner as in Example 2 except that the SiC film formation time was set to 1/4. At this time, the SiC film thickness was 20 μm.
(Comparative Example 6) The process of Example 1 was repeated twice to obtain SiC-coated carbon. At this time, the SiC film thickness was 180 μm.
[0025]
[result]
[Table 1]
Figure 2005019724
[0026]
As can be seen from Table 1, each of Examples 1 to 3 having the SiC film thickness within the scope of the present invention, the occupation ratio of SiC crystal particles having a particle size of 10 μm or more, and the wafer receiving portion surface roughness Ra are all on the wafer back surface. There were no scratches, no generation of SiC dust, and the service life was extremely high at 158 to 139 times.
[0027]
On the other hand, although each condition is within the scope of the present invention, Comparative Example 1 having an exposed polished surface has generation of SiC dust, and the service life is 32 to 22% decrease.
[0028]
In Comparative Example 2 in which the line roughness of the surface roughness of the wafer receiving portion was outside (extra) of the present invention, the number of service life was excellent as in Example 1, but scratches occurred on the back surface of the wafer.
[0029]
In Comparative Example 3 in which the line roughness of the surface roughness of the wafer receiving portion was outside (less than) the scope of the present invention, SiC dust was generated, and the service life decreased to 60% of Example 1.
[0030]
In Comparative Example 4 in which the occupation ratio of SiC crystal particles having a particle diameter of 10 μm or more is outside (less than) the scope of the present invention, SiC dust was generated, and the number of service life was reduced to 51% of Example 1.
[0031]
In Comparative Example 5 in which the SiC film thickness is outside (less than) the range of the present invention, both the scratches on the back surface of the wafer and the generation of SiC dust are not observed, but the service life is significantly reduced to 12% (19 times) of Example 1. .
[0032]
In Comparative Example 6 in which the SiC film thickness was outside the range of the present invention (extra), both scratches and SiC dust on the back surface of the wafer were generated, and the durability was reduced to 62% of Example 1.
[0033]
【The invention's effect】
According to the semiconductor heat-treating member according to the present invention, there is provided a semiconductor heat-treating member suitable for a manufacturing process which prevents the occurrence of scratches on the back surface of the wafer and does not cause the semiconductor wafer to slip, and requires high cleanliness. Can be provided.
[Brief description of the drawings]
FIG. 1 is a perspective view of a semiconductor wafer heat treatment apparatus in which an embodiment of a semiconductor heat treatment member according to the present invention is incorporated.
FIG. 2 is a plan view of an embodiment of a semiconductor heat treatment member according to the present invention.
FIG. 3 is a cross-sectional view of an embodiment of a semiconductor heat treatment member according to the present invention.
FIG. 4 is a conceptual diagram showing a usage state of a conventional wafer heat treatment jig.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Jig 1a Base material 1b SiC film 1s Wafer receiving part 2 Wafer heat processing apparatus

Claims (1)

カーボン質基材の表面にSiC被膜を形成した半導体熱処理用部材であって、前記SiC被膜の厚さが30μm以上150μm以下であり、前記SiC被膜の表面にて観察されるSiC結晶が粒径10μm以上のものが150μm×150μm以上大きな任意の面積当り80%以上を占め、かつ、前記SiC被膜の面積はSiC結晶成長面であり、任意の位置での200μm以上の長さで測定した中心線平均粗さRaが1.2μm以上4μm以下であることを特徴とする半導体熱処理用部材。A semiconductor heat treatment member having a SiC film formed on the surface of a carbonaceous substrate, wherein the SiC film has a thickness of 30 μm or more and 150 μm or less, and a SiC crystal observed on the surface of the SiC film has a particle size of 10 μm The above occupies 80% or more per arbitrary area larger than 150 μm × 150 μm, and the area of the SiC film is the SiC crystal growth surface, and the center line average measured at a length of 200 μm or more at an arbitrary position A member for semiconductor heat treatment, wherein the roughness Ra is 1.2 μm or more and 4 μm or less.
JP2003183032A 2003-06-26 2003-06-26 Semiconductor heat treatment materials Expired - Lifetime JP4350438B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003183032A JP4350438B2 (en) 2003-06-26 2003-06-26 Semiconductor heat treatment materials

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003183032A JP4350438B2 (en) 2003-06-26 2003-06-26 Semiconductor heat treatment materials

Publications (2)

Publication Number Publication Date
JP2005019724A true JP2005019724A (en) 2005-01-20
JP4350438B2 JP4350438B2 (en) 2009-10-21

Family

ID=34183250

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003183032A Expired - Lifetime JP4350438B2 (en) 2003-06-26 2003-06-26 Semiconductor heat treatment materials

Country Status (1)

Country Link
JP (1) JP4350438B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080041798A1 (en) * 2006-06-30 2008-02-21 Memc Electronic Materials, Inc. Wafer Platform
CN116516468A (en) * 2023-07-04 2023-08-01 苏州优晶光电科技有限公司 Device and method for simultaneously treating multiple silicon carbide seed crystal coatings

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080041798A1 (en) * 2006-06-30 2008-02-21 Memc Electronic Materials, Inc. Wafer Platform
CN116516468A (en) * 2023-07-04 2023-08-01 苏州优晶光电科技有限公司 Device and method for simultaneously treating multiple silicon carbide seed crystal coatings
CN116516468B (en) * 2023-07-04 2023-10-13 苏州优晶光电科技有限公司 Device and method for simultaneously treating multiple silicon carbide seed crystal coatings

Also Published As

Publication number Publication date
JP4350438B2 (en) 2009-10-21

Similar Documents

Publication Publication Date Title
JP5961357B2 (en) SiC epitaxial wafer and manufacturing method thereof
JP4887418B2 (en) Method for manufacturing SiC epitaxial wafer
JP5897834B2 (en) Method for manufacturing SiC epitaxial wafer
JP5076020B2 (en) SiC epitaxial wafer
US20050170307A1 (en) Heat treatment jig for semiconductor silicon substrate
JP2008532315A (en) Baffle wafer and randomly oriented polycrystalline silicon used therefor
JP3092801B2 (en) Thin film growth equipment
JP2003532612A (en) Epitaxial silicon wafer without autodoping and backside halo
WO2008023756A1 (en) Method for producing silicon carbide substrate and silicon carbide substrate
TWI471970B (en) A wafer-supporting jig and a method for manufacturing a crystal tube for a vertical type heat treatment and a wafer support
JP3454033B2 (en) Silicon wafer and manufacturing method thereof
JP2006004983A (en) Silicon wafer and manufacturing method thereof
JP2005056984A (en) Apparatus and method for vapor phase growth
JP4998246B2 (en) Semiconductor substrate support jig and manufacturing method thereof.
JP4350438B2 (en) Semiconductor heat treatment materials
JP3094312B2 (en) Susceptor
JP2003022989A (en) Epitaxial semiconductor wafer and production method therefor
JP3990575B2 (en) Monitor wafer for film thickness measurement
TW200933706A (en) Epitaxial wafer
JP3687578B2 (en) Heat treatment jig for semiconductor silicon substrate
JP6069545B2 (en) Evaluation method of SiC epitaxial wafer
JP2006186312A (en) Hetero-epitaxial semiconductor subjected to internal gettering and manufacturing method thereof
JPH10251062A (en) Production of silicon carbide formed body
JPH09266212A (en) Silicon wafer
KR102211607B1 (en) Silicon member and method of producing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060306

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20070711

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080725

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080812

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081014

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090203

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090406

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090721

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090722

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4350438

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130731

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term