JP2005011898A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
JP2005011898A
JP2005011898A JP2003172315A JP2003172315A JP2005011898A JP 2005011898 A JP2005011898 A JP 2005011898A JP 2003172315 A JP2003172315 A JP 2003172315A JP 2003172315 A JP2003172315 A JP 2003172315A JP 2005011898 A JP2005011898 A JP 2005011898A
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Japan
Prior art keywords
semiconductor element
resin
protective layer
semiconductor device
surface protective
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JP2003172315A
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Japanese (ja)
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JP4230833B2 (en
Inventor
Yuichi Kanayama
裕一 金山
Takashi Yoshida
孝志 吉田
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Asahi Kasei Electronics Co Ltd
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Asahi Kasei Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is resin-sealed with high reliability so as not to damage a property of a semiconductor element, and also to provide its manufacturing method. <P>SOLUTION: End faces 32b of a surface passivation layer 32 which are to be brought into contact with a principal plane of the semiconductor element 31 are formed into a shape curved toward the principal plane side of the semiconductor element 31 (for example, rounded into a circular arc shape), to efficiently release voids generated during a cooling process of sealing resin from a contact region 34 between the surface passivation layer 32 and the semiconductor element 31, resulting in preventing the occurrence of an air gap in this region 34. Consequently, even when resin sealing is carried out by screen printing, causes for reducing reliability such as the occurrence of package cracks during a moisture absorption reflow test can be suppressed, resulting in providing the semiconductor device which is resin-sealed with high reliability so as not to damage a property of the semiconductor element. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は半導体装置およびその製造方法に関し、より詳細には、ホール素子、トランジスタ、ICなどの半導体素子を樹脂封止した半導体装置およびその製造方法に関する。
【0002】
【従来の技術】
半導体素子を樹脂封止する際に生じる樹脂モールド起因のストレスや汚染から半導体素子の表面を保護して半導体素子の特性変動をすることを目的として、樹脂封止前に予め半導体素子表面に表面保護層を設け、この表面保護された半導体素子を樹脂封止する技術が知られている(例えば、特許文献1参照)。
【0003】
図1はこのような従来の樹脂封止型半導体装置の構成例を説明するための断面図で、ダイパッド11に固定された半導体チップ12は、インナーリードの内端部13とワイヤ14により接続され、半導体チップ12とワイヤ14とがシリコーン樹脂などの弾性材15で被覆された状態で封止樹脂16によってモールドされている。
【0004】
上記例は、半導体チップの作製後に個別に素子封止する際の封止態様であるが、半導体素子の製造工程内において多数の半導体素子を形成したウエハ全面に表面保護層を設け、これをフォトリソにより加工して各素子間の表面保護層を除去した後にダイシングして個別に表面保護された半導体素子を得る封止態様もある。後者の封止態様においては、ダイシング後の半導体素子の表面に設けられた電極部分に外部電極との配線を施すことが必要となることから、表面保護層を素子表面全体に設けることはできず、電極形成した領域は露出された状態としておく必要がある。
【0005】
図2は、このような態様で封止された半導体素子の様子を説明するための図で、この図において21は樹脂封止される半導体素子、22は半導体素子21の表面保護層、23は半導体素子21の表面上に設けられた電極である。表面保護層22は半導体素子21の全面には設けられておらず、電極23が設けられた領域が露出されており、この電極23と図示しない外部電極とがボンディングワイヤなどにより接続されることとなる。
【0006】
【特許文献1】
特開平5−283593号公報
【0007】
【発明が解決しようとする課題】
しかしながら、図2に示したような従来の表面保護方法では、表面保護された半導体素子21の全体を樹脂封止した後に、図2の24で示した箇所(すなわち、表面保護層22と半導体素子21とが接する部分)に封止樹脂の冷却中に空隙が生じてしまうという問題があった。この問題は、トランスファーモールドにより加圧しながら樹脂充填させて封止する場合にはさほど顕在化しなかったものの、スクリーン印刷により樹脂封止する場合には顕著となり、吸湿リフロー試験でパッケージクラックが生じてしまうなど、信頼性を低下させる原因となっていた。
【0008】
本発明はこのような問題に鑑みてなされたもので、その目的とするところは、半導体素子の特性を損なうことのない高い信頼性で半導体素子を樹脂封止した半導体装置およびその製造方法を提供することにある。
【0009】
【課題を解決するための手段】
本発明はこのような目的を達成するために、請求項1に記載の発明は、半導体装置であって、半導体素子の主表面上に設けられ当該主表面を保護するための表面保護層を備え、前記半導体素子の主面と接する前記表面保護層の端面は前記半導体素子の主面側に湾曲した形状を有していることを特徴とする。
【0010】
請求項2に記載の発明は、請求項1に記載の半導体装置において、前記表面保護層は、感光性樹脂であることを特徴とする。
【0011】
請求項3に記載の発明は、請求項2に記載の半導体装置において、前記感光性樹脂はフォトレジストであることを特徴とする。
【0012】
請求項4に記載の発明は、請求項1乃至3の何れかに記載の半導体装置において、前記半導体素子と前記表面保護層の全体は、樹脂により封止されていることを特徴とする。
【0013】
請求項5に記載の発明は、請求項4に記載の半導体装置において、前記封止のための樹脂は、粘度100Pa.s以上の粘度を有する樹脂であることを特徴とする。
【0014】
請求項6に記載の発明は、半導体装置の製造方法であって、複数の半導体素子を全面に形成したウエハ上にレジストを塗布する第1のステップと、前記半導体素子の各々の電極形成領域を除く所望領域に前記レジストを残存させるための露光を実行して前記半導体素子の表面に表面保護層を形成する第2のステップと、を備え、前記第2のステップにおける露光は、前記半導体素子の主面と接する前記表面保護層の端面が前記半導体素子の主面側に湾曲した形状となるように実行されることを特徴とする。
【0015】
請求項7に記載の発明は、請求項6に記載の半導体装置の製造方法において、前記第2のステップにおいて、前記半導体素子の主面と接する前記表面保護層の端面領域の露光は、当該端面領域以外の露光領域に用いられる光とは異なる強度の光を用い、前記レジストの種類に応じて当該端面領域のレジスト感光深さが所望の値となるように実行されることを特徴とする。
【0016】
【発明の実施の形態】
以下に図面を参照して本発明の実施の形態について説明する。
【0017】
本発明者らの検討によれば、上述したような、表面保護層と半導体素子とが接する部分に空隙が生じてしまうという問題は、表面保護層の端面が半導体素子の主面と成す角度が略垂直であることに起因するものであることが明らかとなった。そこで、本発明においては、表面保護層が半導体素子の主面と接する端面に半導体素子の主面側に湾曲した形状(例えば、円弧状の丸み)をもたせることとし、封止樹脂の冷却過程において生じるボイドを効率的に上記表面保護層と半導体素子とが接する部分から排出することでこの領域に空隙が生じることを回避することとしている。
【0018】
図3は、このような態様で樹脂封止される半導体素子上の表面保護層の形状例を説明するための図で、この図において31は樹脂封止される半導体素子、32は半導体素子31の表面保護層、33は半導体素子31の表面上に設けられた電極であり、この電極33と図示しない外部電極とがボンディングワイヤなどにより接続されることとなる。この図に示すように、本発明においては表面保護層32の端面は半導体素子31の主面と接する領域34が円弧状の丸みを有する形状とされており、この状態で樹脂封止された場合に樹脂の冷却過程においてボイドが生じた場合であっても、この円弧状の形状ゆえにボイドはこの領域34から効率的に排除され冷却後の封止樹脂の上記領域34に対応する部分に空隙が生じることは回避されることとなる。
【0019】
このような形状を得るためには種々の手法が考えられるが、その一例としては、半導体素子を全面に形成したウエハ上にレジストを塗布し、このレジストを感光させてパターンニングするフォトリソ工程において、半導体素子31の表面保護層32以外の領域と表面保護層32の円弧状領域とで露光強度を変えるという手法が取り得る。この場合には、硬化したレジスト材が表面保護層32となる。すなわち、図3において、表面保護層32の平坦領域32aはマスクして露光しない状態としておき、半導体素子31の表面保護層32以外の領域を強度Pの光で露光させる一方、表面保護層32の円弧状領域32bの露光に際してはその領域における表面保護層32の平坦領域32aとの距離に応じて露光強度を変化させる(この図においてはPおよびP)。そして、露光後に感光したレジストを除去して表面保護層32を形成する。ここで、表面保護層32の円弧状領域32bの露光に用いた光の強度(PおよびP)は感光深さが所望の値となるようにレジストの種類に応じて選択される。
【0020】
例えば、図3においては強度Pは塗布したレジストの全厚みに対して感光能力を有するが、強度PおよびPはレジストの厚み方向に一定の深さでのみ感光能力を有しており、半導体素子31の表面保護層32以外の領域に近い領域のレジストを感光させる強度Pの光は比較的深くまで感光能力を有する一方、表面保護層32の平坦領域32aに近い領域のレジストを感光させる強度Pの光は比較的浅い感光能力を有する。このように表面保護層32の形成の際の露光に用いる光にレジストに対する感光能力の差異を設けることとすれば、露光後のレジストを除去した後に得られる表面保護層32の端面領域の形状を円弧状とすることが可能となる。
【0021】
図4は、このような表面保護層を備えた半導体素子を樹脂封止して得られた半導体装置の構成例を説明するための図で、図4(a)は上面図、図4(b)は断面方向から眺めた場合の概略図である。半導体素子31は外部電極35を有する基板38上に載置され、半導体素子31の電極33と外部電極35とは金のワイヤ36により接続されている。既に説明したように、半導体素子31の表面は図3で説明した態様で表面保護層32により保護されており、ワイヤ36で接続された半導体素子31と基板38はその主面側全面が封止樹脂37により封止されている。なお、図4(a)において表面保護層32の上面形状は円状とされているがこの形状に限定されるものではなく所望に応じて四角形などの他の形状であってもよいことはいうまでもない。
【0022】
このような封止態様で樹脂封止される半導体素子31は、特にその種類に制限はなく、ホール素子やトランジスタあるいはICなど、いかなる種類の素子であってもよい。
【0023】
また、表面保護層は、シリコン系やポリイミド系などの感光性樹脂とすることが好ましく、その厚みは厚いほど上述した空隙排除効果が顕著となるが、概ね5μm以上であれば充分である。
【0024】
さらに、封止樹脂はエポキシ系やアクリル系のほか何れの樹脂であってもよい。なお、封止樹脂の粘度に関しては、スクリーン印刷で所望の厚さが得られるような一定以上の粘度が必要であり、かつ、粘度が高いほど空隙排除効果が顕著となるが、粘度100Pa.s以上であれば充分な効果が得られる。
【0025】
【発明の効果】
以上説明したように本発明の半導体装置においては、表面保護層が半導体素子の主面と接する端面に半導体素子の主面側に湾曲した形状(例えば、円弧状の丸み)をもたせることとし、封止樹脂の冷却過程において生じるボイドを効率的に上記表面保護層と半導体素子とが接する部分から排出することでこの領域に空隙が生じることを回避することとしたので、スクリーン印刷により樹脂封止する場合にも吸湿リフロー試験でパッケージクラックが生じてしまうなどの信頼性低下原因の発生を抑制することが可能となり、半導体素子の特性を損なうことのない高い信頼性で半導体素子を樹脂封止した半導体装置を提供することが可能となる。
【図面の簡単な説明】
【図1】従来の樹脂封止型半導体装置の構成例を説明するための断面図である。
【図2】従来方法により樹脂封止された半導体素子の様子を説明するための図である。
【図3】本発明の封止態様で樹脂封止される半導体素子上の表面保護層の形状例を説明するための図である。
【図4】図3に示した表面保護層を備えた半導体素子を樹脂封止して得られた半導体装置の構成例を説明するための図で、(a)は上面図、(b)は断面方向から眺めた場合の概略図である。
【符号の説明】
31 半導体素子
32 表面保護層
33 電極
34 表面保護層の端面と半導体素子の主面が接する領域
35 外部電極
36 ワイヤ
37 封止樹脂
38 基板
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device in which a semiconductor element such as a Hall element, a transistor, or an IC is sealed with a resin, and a manufacturing method thereof.
[0002]
[Prior art]
In order to protect the surface of the semiconductor element from the stress and contamination caused by the resin mold that occurs when the semiconductor element is encapsulated with the resin, and to change the characteristics of the semiconductor element, the surface of the semiconductor element is previously protected before the resin encapsulation. A technique of providing a layer and sealing the surface-protected semiconductor element with a resin is known (for example, see Patent Document 1).
[0003]
FIG. 1 is a cross-sectional view for explaining a configuration example of such a conventional resin-encapsulated semiconductor device. A semiconductor chip 12 fixed to a die pad 11 is connected to an inner end portion 13 of an inner lead by a wire 14. The semiconductor chip 12 and the wire 14 are molded with a sealing resin 16 in a state where the semiconductor chip 12 and the wire 14 are covered with an elastic material 15 such as a silicone resin.
[0004]
The above example is a sealing mode when individual elements are sealed after the fabrication of the semiconductor chip. In the semiconductor element manufacturing process, a surface protective layer is provided on the entire surface of the wafer on which a large number of semiconductor elements are formed. There is also a sealing mode in which a semiconductor element whose surface is individually protected is obtained by dicing after removing the surface protective layer between the elements by processing. In the latter sealing mode, it is necessary to provide wiring with an external electrode on the electrode portion provided on the surface of the semiconductor element after dicing, and therefore a surface protective layer cannot be provided on the entire element surface. The region where the electrodes are formed needs to be exposed.
[0005]
FIG. 2 is a diagram for explaining the state of the semiconductor element sealed in this manner. In this figure, 21 is a semiconductor element sealed with resin, 22 is a surface protective layer of the semiconductor element 21, and 23 is This is an electrode provided on the surface of the semiconductor element 21. The surface protective layer 22 is not provided on the entire surface of the semiconductor element 21, the region where the electrode 23 is provided is exposed, and the electrode 23 and an external electrode (not shown) are connected by a bonding wire or the like. Become.
[0006]
[Patent Document 1]
JP-A-5-283593 [0007]
[Problems to be solved by the invention]
However, in the conventional surface protection method as shown in FIG. 2, the entire surface-protected semiconductor element 21 is sealed with resin, and then the portion indicated by 24 in FIG. 2 (that is, the surface protection layer 22 and the semiconductor element). There is a problem that voids are generated during the cooling of the sealing resin in the portion where the material 21 comes into contact. Although this problem did not become so obvious when sealing with resin filling while applying pressure by transfer molding, it became significant when sealing with resin by screen printing, and package cracking occurred in the moisture absorption reflow test. It was a cause of lowering reliability.
[0008]
The present invention has been made in view of such problems, and an object of the present invention is to provide a semiconductor device in which a semiconductor element is resin-sealed with high reliability without impairing the characteristics of the semiconductor element, and a method for manufacturing the same. There is to do.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a semiconductor device comprising a surface protective layer provided on a main surface of a semiconductor element for protecting the main surface. The end surface of the surface protective layer in contact with the main surface of the semiconductor element has a shape curved toward the main surface side of the semiconductor element.
[0010]
According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the surface protective layer is a photosensitive resin.
[0011]
According to a third aspect of the present invention, in the semiconductor device according to the second aspect, the photosensitive resin is a photoresist.
[0012]
According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the semiconductor element and the entire surface protective layer are sealed with a resin.
[0013]
The invention according to claim 5 is the semiconductor device according to claim 4, wherein the resin for sealing has a viscosity of 100 Pa.s. It is a resin having a viscosity of s or more.
[0014]
The invention according to claim 6 is a method of manufacturing a semiconductor device, wherein a first step of applying a resist on a wafer having a plurality of semiconductor elements formed on the entire surface, and an electrode formation region of each of the semiconductor elements are provided. And a second step of forming a surface protective layer on the surface of the semiconductor element by performing exposure for leaving the resist in a desired region except for the exposure, wherein the exposure in the second step It is performed so that the end surface of the surface protective layer in contact with the main surface has a shape curved toward the main surface side of the semiconductor element.
[0015]
According to a seventh aspect of the present invention, in the method for manufacturing a semiconductor device according to the sixth aspect, in the second step, the exposure of the end surface region of the surface protective layer in contact with the main surface of the semiconductor element is performed on the end surface. The present invention is characterized in that light having an intensity different from light used for an exposure region other than the region is used, and the resist photosensitive depth of the end surface region is set to a desired value according to the type of the resist.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0017]
According to the study by the present inventors, the problem that a gap is generated at the portion where the surface protective layer and the semiconductor element are in contact with each other is that the angle formed between the end surface of the surface protective layer and the main surface of the semiconductor element is as follows. It became clear that it was caused by being substantially vertical. Therefore, in the present invention, the surface protective layer has an end surface in contact with the main surface of the semiconductor element having a curved shape (for example, an arcuate round shape) toward the main surface side of the semiconductor element, and in the cooling process of the sealing resin By efficiently discharging the generated voids from the portion where the surface protective layer and the semiconductor element are in contact with each other, the formation of voids in this region is avoided.
[0018]
FIG. 3 is a diagram for explaining an example of the shape of the surface protective layer on the semiconductor element that is resin-sealed in this manner. In this figure, 31 is a semiconductor element that is resin-sealed, and 32 is a semiconductor element 31. The surface protective layer 33 is an electrode provided on the surface of the semiconductor element 31, and the electrode 33 and an external electrode (not shown) are connected by a bonding wire or the like. As shown in this figure, in the present invention, the end face of the surface protective layer 32 has a shape where the region 34 in contact with the main surface of the semiconductor element 31 has an arcuate round shape, and is sealed with resin in this state. Even when a void is generated in the cooling process of the resin, the void is efficiently excluded from the region 34 because of the arc shape, and there is a gap in the portion corresponding to the region 34 of the sealing resin after cooling. It will be avoided.
[0019]
In order to obtain such a shape, various methods can be considered. As an example, in a photolithography process in which a resist is applied to a wafer on which a semiconductor element is formed on the entire surface, and the resist is exposed and patterned. A method of changing the exposure intensity between the region other than the surface protective layer 32 of the semiconductor element 31 and the arc-shaped region of the surface protective layer 32 can be taken. In this case, the hardened resist material becomes the surface protective layer 32. That is, in FIG. 3, the flat region 32 a of the surface protective layer 32 is masked so as not to be exposed, and the region other than the surface protective layer 32 of the semiconductor element 31 is exposed with light having an intensity P 1 while the surface protective layer 32 is exposed. of the time exposure of the arcuate region 32b to vary the exposure intensity according to the distance between the flat region 32a of the surface protective layers 32 in the region (P 2 and P 3 in this figure). Then, the resist exposed after the exposure is removed to form the surface protective layer 32. Here, the light intensity (P 2 and P 3 ) used for exposure of the arc-shaped region 32b of the surface protective layer 32 is selected according to the type of resist so that the photosensitive depth becomes a desired value.
[0020]
For example, in FIG. 3, the intensity P 1 has photosensitivity for the entire thickness of the applied resist, but the intensities P 2 and P 3 have photosensitivity only at a certain depth in the resist thickness direction. while having a relatively deep to the photosensitive ability resist light intensity P 2 for sensitizing the near region in a region other than a surface protective layer 32 of the semiconductor element 31, the resist regions near the flat region 32a of the surface protective layer 32 light intensity P 3 to the photosensitive has a relatively shallow photosensitive capability. As described above, if the difference in the photosensitive ability with respect to the resist is provided in the light used for the exposure at the time of forming the surface protective layer 32, the shape of the end face region of the surface protective layer 32 obtained after removing the resist after the exposure is changed. An arc shape is possible.
[0021]
4A and 4B are views for explaining a configuration example of a semiconductor device obtained by resin-sealing a semiconductor element having such a surface protective layer. FIG. 4A is a top view and FIG. ) Is a schematic view when viewed from the cross-sectional direction. The semiconductor element 31 is placed on a substrate 38 having an external electrode 35, and the electrode 33 of the semiconductor element 31 and the external electrode 35 are connected by a gold wire 36. As already described, the surface of the semiconductor element 31 is protected by the surface protective layer 32 in the manner described in FIG. 3, and the semiconductor element 31 and the substrate 38 connected by the wire 36 are sealed on the entire main surface side. Sealed with resin 37. In FIG. 4A, the upper surface shape of the surface protective layer 32 is circular. However, the shape is not limited to this shape, and may be other shapes such as a square as desired. Not too long.
[0022]
The type of the semiconductor element 31 that is resin-sealed in such a sealing mode is not particularly limited, and may be any type of element such as a Hall element, a transistor, or an IC.
[0023]
The surface protective layer is preferably made of a photosensitive resin such as a silicon-based resin or a polyimide-based resin. The thicker the thickness, the more the above-described void elimination effect becomes more prominent, but approximately 5 μm or more is sufficient.
[0024]
Further, the sealing resin may be any resin other than epoxy or acrylic. As for the viscosity of the sealing resin, a certain level of viscosity is required so that a desired thickness can be obtained by screen printing, and the higher the viscosity, the more significant the void elimination effect. If it is s or more, a sufficient effect can be obtained.
[0025]
【The invention's effect】
As described above, in the semiconductor device of the present invention, the surface protective layer has a curved shape (for example, an arcuate round shape) on the main surface side of the semiconductor element on the end surface in contact with the main surface of the semiconductor element. Since voids generated in the cooling process of the stop resin are efficiently discharged from the portion where the surface protective layer and the semiconductor element are in contact with each other, the formation of voids in this region is avoided. Even in this case, it is possible to suppress the occurrence of reliability deterioration such as package cracking in the moisture absorption reflow test, and the semiconductor element is a resin-encapsulated semiconductor element with high reliability that does not impair the characteristics of the semiconductor element. An apparatus can be provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view for explaining a configuration example of a conventional resin-encapsulated semiconductor device.
FIG. 2 is a view for explaining a state of a semiconductor element sealed with resin by a conventional method.
FIG. 3 is a diagram for explaining a shape example of a surface protective layer on a semiconductor element that is resin-sealed in the sealing mode of the present invention.
4A and 4B are diagrams for explaining a configuration example of a semiconductor device obtained by resin-sealing a semiconductor element having a surface protective layer shown in FIG. 3; FIG. 4A is a top view, and FIG. It is the schematic at the time of seeing from a cross-sectional direction.
[Explanation of symbols]
31 Semiconductor element 32 Surface protective layer 33 Electrode 34 Area where end face of surface protective layer and main surface of semiconductor element are in contact 35 External electrode 36 Wire 37 Sealing resin 38 Substrate

Claims (7)

半導体素子の主表面上に設けられ当該主表面を保護するための表面保護層を備え、前記半導体素子の主面と接する前記表面保護層の端面は前記半導体素子の主面側に湾曲した形状を有していることを特徴とする半導体装置。A surface protective layer is provided on the main surface of the semiconductor element to protect the main surface, and an end surface of the surface protective layer in contact with the main surface of the semiconductor element has a shape curved toward the main surface side of the semiconductor element. A semiconductor device including the semiconductor device. 前記表面保護層は、感光性樹脂であることを特徴とする請求項1に記載の半導体装置。The semiconductor device according to claim 1, wherein the surface protective layer is a photosensitive resin. 前記感光性樹脂はフォトレジストであることを特徴とする請求項2に記載の半導体装置。The semiconductor device according to claim 2, wherein the photosensitive resin is a photoresist. 前記半導体素子と前記表面保護層の全体は、樹脂により封止されていることを特徴とする請求項1乃至3の何れかに記載の半導体装置。4. The semiconductor device according to claim 1, wherein the entire semiconductor element and the surface protective layer are sealed with a resin. 前記封止のための樹脂は、粘度100Pa.s以上の粘度を有する樹脂であることを特徴とする請求項4に記載の半導体装置。The resin for sealing has a viscosity of 100 Pa.s. The semiconductor device according to claim 4, wherein the semiconductor device is a resin having a viscosity of s or more. 複数の半導体素子を全面に形成したウエハ上にレジストを塗布する第1のステップと、
前記半導体素子の各々の電極形成領域を除く所望領域に前記レジストを残存させるための露光を実行して前記半導体素子の表面に表面保護層を形成する第2のステップと、を備え、
前記第2のステップにおける露光は、前記半導体素子の主面と接する前記表面保護層の端面が前記半導体素子の主面側に湾曲した形状となるように実行されることを特徴とする半導体装置の製造方法。
A first step of applying a resist on a wafer having a plurality of semiconductor elements formed on the entire surface;
A second step of forming a surface protective layer on the surface of the semiconductor element by performing exposure for leaving the resist in a desired area except for each electrode forming area of the semiconductor element,
The exposure in the second step is performed such that an end surface of the surface protective layer in contact with the main surface of the semiconductor element has a shape curved toward the main surface side of the semiconductor element. Production method.
前記第2のステップにおいて、前記半導体素子の主面と接する前記表面保護層の端面領域の露光は、当該端面領域以外の露光領域に用いられる光とは異なる強度の光を用い、前記レジストの種類に応じて当該端面領域のレジスト感光深さが所望の値となるように実行されることを特徴とする請求項6に記載の半導体装置の製造方法。In the second step, the exposure of the end face region of the surface protective layer in contact with the main surface of the semiconductor element uses light having a different intensity from the light used in the exposure region other than the end face region. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the resist photosensitive depth in the end face region is set to a desired value according to the step.
JP2003172315A 2003-06-17 2003-06-17 Semiconductor device and manufacturing method of semiconductor device Expired - Fee Related JP4230833B2 (en)

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