JP2004530901A - Power detection circuit used for power amplifier - Google Patents

Abstract

The short element, preferably an inductor-capacitor resonance circuit, is connected in parallel with the sense transistor, which itself is connected in parallel with the power transistor. The use of a short circuit element in combination with a sense transistor provides a technique with a monotonic power detector. The short-circuit element eliminates the extra current caused by the parasitic collector-base and collector-substrate diodes of the sense transistor, and also provides a mutual coupling between the power transistor and the inductor connected to the sense transistor. The extra fluctuation of the collector voltage of the sense transistor caused by the above is removed.

Description

【Technical field】
[0001]
The present invention relates to improvements in monitoring circuits, and more specifically, techniques for monitoring the power provided by power amplifiers, transistors, etc. when used in certain applications such as, for example, wireless communications.
[Background Art]
[0002]
Semiconductor power devices are used in a variety of applications, including the generation of radio signals. In such applications, it is necessary and / or desirable to ascertain the magnitude of the power output by a particular device.
[0003]
FIG. 1 illustrates a typical prior art circuit configuration for measuring power supplied to a load 101 by a radio frequency (RF) signal input through a capacitor 102. The actual chip has an on-chip capacitor 102, a circuit 104, transistors Q1 and Q2, and is shown surrounded by a dotted line 103 in FIG. Bonding pads 110-112 represent the actual chip-to-pin interface when an off-chip signal is transmitted. Inductor 114 represents a ground inductance, and inductors 115 and 116 represent inherent inductors, for example, not only the inductance of a lead frame of a chip package, but also the inductance caused by wire bonding.
[0004]
Typically, the load 101 is driven by the RF signal 130 via the off-chip matching network 132 of FIG. Several techniques are available for measuring the power delivered to the load. Some include a potential divider circuit and measure the change in signal applied to the load. Others utilize off-chip averaging circuits. In addition, several other methods exist as well.
[0005]
The configuration of FIG. 1 shows one prior art technique for measuring power delivered to a load. More specifically, the value of the transistor Q2 is selected to be considerably smaller than that of the transistor Q1, and the current passing through the transistor Q2 is 1% or less of the current passing through the transistor Q1. The averaging circuit includes a resistor 140 and a capacitor 142.
DISCLOSURE OF THE INVENTION
[Problems to be solved by the invention]
[0006]
FIG. 2 illustrates a graph of the potential of Vdetect of FIG. 1 as a function of the power delivered by the device. In FIG. 2, at about 1.8 watts, the point where the slope of the curve becomes positive is characteristic. This change in slope depends on various factors. FIG. 3 shows an enlarged view of the transistor Q2, and one of the reasons for the change in the slope can be understood from FIG. That is, a base collector diode 301 and a collector diode 302 on the substrate are shown. These two diodes are both device-specific and result from the physical process of manufacture. However, at high power levels, these diodes become forward biased, creating an additional current path to the collector of Q2. Thus, the measured current value, labeled "i_sense" in FIG. 1, is no longer an accurate value of the power delivered by the device. Instead, the measured signal is distorted because the change to higher potential at higher power creates an additional current path to the collector of Q2. Also, the coupling between the inductor 115 and the inductor 116 causes an additional error in the current “i_sense”. As a result, the measurement system shown in FIG. 1 works only with small power signals and does not operate properly with high power.
[0007]
In view of the above, there is a need for an improved technique for measuring current supply and power at high output power. This problem is particularly important in wireless communication devices that use a circuit similar to the circuit shown in FIG.
[0008]
It is an object of the present invention to provide a power measurement that does not require large components or bulky or lossy equipment.
[Means for Solving the Problems]
[0009]
The above and other problems in the prior art are solved by the present invention. The measurement transistor Q2 is connected in parallel with the power transistor Q1. The short-circuit device is connected in parallel with a measurement transistor for short-circuiting the signal to ground, but the signal is limited to a signal having substantially the same frequency as the input RF signal. In the preferred embodiment, the shorting device is an inductor / capacitor (LC) resonant circuit.
[0010]
According to the present invention, high frequency signals whose potentials change significantly and produce the additional current paths described above are shorted to ground. By using a resonant circuit, the use of a large capacitor can be avoided and the desired impedance for the short circuit device can be obtained.
[0011]
Further, in a preferred embodiment, the capacitor for the short circuit device is formed on the chip, and the inductor portion of the LC resonance circuit is formed as an inductor inherent in the chip bonding pad.
BEST MODE FOR CARRYING OUT THE INVENTION
[0012]
FIG. 4 shows a typical embodiment of the present invention. In operation, an RF signal 420 is input through capacitor 402 and Q1. Bias circuit 401 operates in a conventional manner. An averaging circuit comprising a resistor 409 and a capacitor 410 provides a DC voltage Vdetect which is substantially proportional to the power delivered to the load resistor 411.
However, the current generated by Vdetect, and thus the current measured through transistor Q2, is distorted by the effects described above. Specifically, the coupling between the inductors 408 and 409, the intrinsic diode between the collector of the transistor Q2 and the substrate 2, similar to a base-collector diode, all of which result in an inaccurate current measurement. Causes distortion.
[0013]
The presence of capacitor 406 and inductor 407 serves to minimize and / or eliminate high frequency components of the signal at the collector of Q2. These high frequency components are variations and cause additional current components, thereby distorting the measurement of the power delivered to the load 411.
[0014]
Preferably, the capacitor 406 and the inductor 407 are set to values that resonate at a desired operating frequency. As is well known, the series connection of LC resonant circuits looks like a short circuit at the critical frequency at which the FR signal is sent. Moreover, capacitors can be added on-chip with minimal cost, and inductor 407 is in any case the wire bond inductance inherent in the system.
[0015]
In a preferred embodiment, the unwanted extraneous signal at the collector of Q2 is increased by increasing the resistance between the level on the substrate on which Q1 is formed and the level on the second substrate on which Q2 is formed. Can be achieved. One such technique involves placing a substrate tap around Q2, a location remote from the grounded tap around Q1. Regardless of the technique used, the substrate is isolated from the increased resistance to effectively and sufficiently eliminate the cross inductance caused by the coupling between L2 and L3.
[0016]
The response curve of Vdetect as a function of the power of the device according to the modified circuit of FIG. 4 is shown in FIG. As can be seen from FIG. 5, there is no portion where the gradient is positive at high output power. A curve with a negative slope is important in a feedback system, and if the slope of the curve changes to positive as in the conventional system shown in FIG. 2, the feedback system may become unstable.
[0017]
Another embodiment of the present invention is shown in FIG. Most of the components are substantially the same as the components related to FIG. 4 described above, and thus the description thereof will not be repeated.
[0018]
The averaging circuit 601 includes a resistor 602 and a capacitor 603. Two series connected inductors 604, 605 are used. Inductor 604 (which can be a transmission line) provides a large inductance at RF. The inductor 608 and the resistor 609 are parasitic components inherent in the installed capacitor 607. The rest of the operation of the circuit is the same as previously described.
[0019]
The inductors 605 and 608 cooperate with the capacitor 607 to function as a resonance circuit. Inductor 605 represents the inductance of bonding pad 606. The capacitor 607 and the inductors 608 and 605 are selected such that the resonance frequency of the circuit is substantially equal to the frequency of the input RF signal.
[0020]
At that desired frequency, the path into the collector of Q2 is short, thereby reducing the distortion that disturbs the measurement. However, it should be noted that the embodiment of FIG. 6 may be less preferred than the embodiment of FIG. The coupling K23 shown in FIG. 6 is due to the fact that in the embodiment of FIG. 4, such a coupling is almost eliminated, whereas in the method of FIG. 6, it is not so reduced. In order to reduce the coupling K23, the wire bond and the pinout must be separated from each other. To further reduce coupling, ground wire bonds and / or ground pins must be separated from them.
[0021]
However, the embodiment of FIG. 6 eliminates the two sources of error discussed with respect to FIG. 3 above, and manufactures components on a chip which may be necessary in the embodiment shown in FIG. It has the potential advantage of not requiring you. The choice between the two techniques or other techniques for implementing a short circuit in parallel with the measurement transistor Q2 is up to the designer.
[0022]
While the preferred embodiment of the invention has been described, various other improvements and additions will be apparent to those skilled in the art.
[Brief description of the drawings]
[0023]
FIG. 1 illustrates a prior art circuit arrangement for a method of delivering power to a load.
FIG. 2 is a diagram showing a change in potential in the circuit arrangement of FIG.
FIG. 3 is a diagram showing a unique diode of the transistor device used in the circuit arrangement of FIG. 1;
FIG. 4 illustrates an exemplary embodiment of the present invention.
FIG. 5 is a diagram showing how a voltage changes in the circuit arrangement of FIG. 4;
FIG. 6 is a diagram showing another embodiment of the present invention.

Claims (19)

A first transistor for supplying power to the load;
A second transistor connected in parallel with the first transistor;
A short-circuit element column-connected to the first transistor and the second transistor, and configured to operate substantially as a short-circuit in a predetermined frequency range;
An apparatus equipped with. An input signal source connected to the first transistor;
The apparatus of claim 1, wherein the input signal is in the predetermined frequency range. The apparatus of claim 2, wherein the short circuit is arranged in series such that the capacitor and the inductor resonate at approximately the predetermined range of frequencies. The apparatus of claim 3, wherein the first and second transistors are on different substrates, each substrate being surrounded by a separate on-substrate tap. The apparatus of claim 3, wherein the first transistor is located on a first substrate, and wherein the capacitor and the second transistor are located on a second substrate. The device of claim 5, wherein the inductor is a wire connection inductance. The apparatus of claim 3, wherein the load is a transmitter for a wireless communication device. The apparatus of claim 7, wherein said first transistor is connected to a matching network. 9. The apparatus of claim 8, wherein said first transistor is made on a chip and said matching network is not made on said chip. A first transistor for delivering power to a particular load;
A second transistor connected in parallel with the first transistor and having a collector, wherein the collector of the second transistor is a first series connection of a first inductor, a second inductor, and an averaging circuit; And the first and second inductors are connected at a junction, and a second series connection of a resistor, a capacitor, and an inductor is connected to the junction. The first transistor is connected to a radio frequency (RF) source;
The apparatus of claim 10, wherein the second series connection and the first inductor coupled thereto have a resonance frequency substantially equal to the RF source. Wherein the first and second transistors are made on different substrates.
An apparatus according to claim 11. Further equipped with a matching network,
The apparatus of claim 11, wherein the matching network is not provided on an integrated circuit on which the first transistor is located. First and second transistors formed on at least one substrate to form an integrated circuit; and a resonant circuit connected in parallel to the second transistor;
The integrated circuit configuration, wherein the resonance circuit includes an inductor formed from a bonding pad. The configuration of claim 14, wherein the first transistor is on a different substrate from the second transistor, and each substrate is surrounded by a separate substrate tap. The configuration according to claim 14, further comprising an averaging circuit connected to the second transistor. 17. The arrangement according to claim 16, wherein said second transistor comprises a collector, and an averaging circuit is connected to said collector. 17. The arrangement according to claim 16, wherein said first transistor is arranged to drive a load comprising a wireless communication device. 19. The arrangement of claim 18, wherein said first transistor has its base connected to both a capacitor and a set of bias circuits.

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