JP2004525351A - A system for CMOS compatible three-dimensional image sensing using quantum efficiency modulation - Google Patents

Abstract

Measuring distance and / or brightness by emitting light energy having a modulated periodic waveform that can idealize high frequency components to S ₁ = cos (ω · t) to measure distance and / or brightness, preferably implemented in CMOS Possible methods and systems. A portion of the emitted light energy is reflected by the target and detected by at least one of the plurality of semiconductor photodetectors. The quantum efficiency of the photodetector is modulated to process the detected signal to produce data proportional to the distance z separating the target and the photodetector. Detection involves measuring a phase change between the emitted light energy and a portion of the reflected light energy. Quantum efficiency can be modulated by a fixed or variable phase method and can be enhanced using enhanced photocharge collection, differential modulation, spatial multiplexing and temporal multiplexing. Using an inductor that resonates at the photodetector capacitance and operating frequency can also reduce the power requirements of the system. The system includes an on-chip photodetector, associated electronics, and processing.

Description

【００６５】
表１で留意すべきことは、典型的なＰＩＮフォトダイオードでは、逆バイアスが０．５ＶＤＣから２ＶＤＣの間で変化するにつれて、フォトダイオード電流（例えば光電流）の大きさはが４倍に変化することである。
フォトダイオード逆バイアスの変調は、アレイ中のフォトダイオードの検出感度を向上させるためにＱＥを変化させるメカニズムである。しかしながら、更に効率的なＱＥ変調検出の実施においては、フォトゲート構造を使用する。そのような実施例では、フォトゲートは、フォトダイオード構造のゲートに加えたポテンシャルを変えることによってＱＥを変調するフォトゲートＭＯＳフォトダイオードとして実施されることが好ましい。
【００６６】
次に図６Ａ及び図６Ｂを参照して、基板４１０がｐタイプ素材で、それぞれＳとＤするＭＯＳタイプのソース領域とドレイン領域がｎドープ素材のものであると仮定する。しかし先に記述したようにドーピング極性はもちろん逆でもかまわない。また、ソースＳとドレインＤは、図６Ａで示したように互いに結合していると仮定する。ゲートＧに与えた電圧Ｓ１（ｔ）が高い時、ここでもｎチャンネル素子であると仮定すると、素子２４０−ｘは空乏化し、それから反転する。この構成では、ゲートＧとその下にある薄い酸化物（ＴＯＸ）は、入射フォトンエネルギーＳ２（ｔ）に対し実質的に透明であると仮定する。この条件は、ゲートＧを作るために使われるポリシリコン素材がポリサイド化していない場合に満たされる。
【００６７】
図６Ａ及び図６Ｂを参照すると、ゲート構造ＧはＳ２（ｔ）で示される入射光エネルギーに対し実質的に透明である。図６Ａで示した構造は、Ｓ及びＤで表されるソース領域及びドレイン領域の両方を含んでいる。対照的に図６Ｂの構造は、量子効率変調を向上させるために、ドレイン構造がないものである。図６Ａではソース領域とドレイン領域が互いに結合しているので、素子２４０ｘは、図６Ｂで示したようにドレイン領域なしで作動することができる。記述したようにＩＣ７０を実現するためには、ＭＯＳ製造プロセスを用いることが好ましい。それにより本発明が実施されている。多くのＭＯＳファブリケーションプロセスでは、図６Ｂに示すように素子２４０ｘのドレイン領域は省かれてもよい。ドレイン領域を効果的に省略することによって、低感度動作状態と高感度動作状態の間の素子の収集効率の相対的変化を増加させる。以下に記述するように、光透明ゲートポテンシャルのバイアスの変化は、空乏層の形を変化させる。実質的にソース領域だけに限られた層４８０はゲートバイアスが低い時に存在し、その空乏層領域４８０′はゲートバイアスが高い時には、実質的にはゲート領域の下にまで及ぶ。
【００６８】
例えばＥＨ１、ＥＨ２などの光電荷は、フォトンエネルギーＳ２（ｔ）に応答してゲート領域下の基板で生成される。ゲート領域にチャンネルが存在しない場合には、ほとんどの光電荷が失われ、ソース領域とドレイン領域だけが光電荷を集める。しかし、ゲートの下の領域が反転及び／または空乏化していると、生成された光電荷は捕らえられソース領域とドレイン領域に掃引される。これによりフォトン収集構造２４０−ｘの効率が効果的に増加する。収集効率の増加は、ゲートＧ下の面積とソース領域及びドレイン領域の面積つまりＳとＤの面積との比率に大体比例する。フォトゲートダイオード２４０ｘが適当な大きさの場合、この比率は１０：１またはそれ以上である。この効率は突然増加し、電圧Ｓ１（ｔ）が閾値を超えると効率が急に増加する。チャンネル部分がドープされておらず基板ドーピング１０¹⁷以上の場合、閾値は約０Ｖであり、フォトゲート光検出器２４０ｘは約−０．１Ｖのゲート電圧で低感度モードであり、ゲート電圧が約＋０．１の時には高感度モードになる。ゲート電圧の比較的小さな変化が、素子の感度に大幅な変化をもたらすことが分かるだろう。
【００６９】
図６Ｃは、フォトゲートフォトダイオード２４０Ｘと、キャパシターＣ₀に結合したより従来的なＭＯＳフォトダイオードＤ１の間の回路がおよそ等しいことを示している。当然のことながら、ＭＯＳフォトダイオードの電圧レベルは、フォトゲートフォトダイオードの電圧レベルと異なる場合もある。したがって、フォトダイオード、光検出器、画素検出器２４０ｘという用語は、図６Ａ−６Ｃに関連して上述したようなフォトゲートフォトダイオードを含むと理解される。同様に、ここで説明する従来的なＭＯＳフォトゲートに関してのＱＥ変調の様々な回路や分析も、上述したようなフォトゲートフォトダイオード２４０ｘに使用できると理解できる。分かり易く図示するため、ここでの実施例の殆どはフォトゲート検出器ではなくＭＯＳタイプのフォトダイオード検出器に関して図示したが、どちらのタイプの検出器でも使用できる。
【００７０】
図７Ａ及び図７Ｂは、Ｄ１で示されるフォトダイオード検出器２４０の等価回路を描写し、寄生分流キャパシターＣ₁を含む。図７Ａは、変調信号がキャパシターＣ₀を通じて結合している高側のＱＥ変調の図示として参照してもよい。図７Ｂでは、変調信号はキャパシターＣ１を経由して結合され、図は低側のＱＥ変調を図示している。図７Ｂでは、キャパシターＣ₀は通常、画素検出器Ｄ１に関連したエレクトロニクス内の増幅器（図示はされていない）内に設置されている。
【００７１】
図７Ａの右部分では、Ｖ２に比例しているＬ１からの光電子放出を引き起こすように、励振源Ｖ２が、例えばレーザーダイオードやＬＥＤのような発光器Ｌ１に結合されている。図７Ａの左部分では、フォトダイオードＤ１がＬ１からそのようなフォトンエネルギーを受け取り、光電流Ｉ１がそれに応じて誘起される。フォトダイオードＤ１（例えば、アレイ２３０中のフォトダイオード２４０−ｘ）は逆バイアスされるので、バイアス源Ｖ１が電圧オフセットを含むと理解できる。もう一つの方法として、入射信号を検出する前に、フォトダイオードのノードＮ_dを初期化の間にプリチャージすることができる。図７Ａ及び図７Ｂにおいて、Ｖ２は周期的な波形のジェネレーター２２５に類似しており、Ｌ１は光エネルギー発光器２２０に類似していることが分かる。（他の図中の図を参照）
【００７２】
図７Ａ及び図７Ｂでは、フォトダイオードのバイアス電圧、したがってフォトダイオードのＱＥが、バイアス源Ｖ１によって変調される。図７Ａでは、逆バイアス電圧がＶｄ１＝Ｖ１・（Ｃ₀）／（Ｃ₀＋Ｃ₁）によって与えられ、ここでＣ₀はＶ１とＤ１の間に直列結合されている。表１と図５Ａ及び図５Ｂから、大きな振幅のＶ１は、フォトダイオード空乏層領域の幅Ｗを有利に増加できる大きな逆バイアスを表す。これが今度はフォトダイオードＤ１（または２４０）の感度を増加し、その結果フォトダイオード電流Ｉ１が、Ｌ１から入射するフォトンエネルギー（または、ターゲット対象物２０から反射され、入射するフォトンエネルギー）に対応して増加する。
【００７３】
励振源Ｖ₂及びバイアス源Ｖ₁が同一の周波数（ω）で動作する場合、サイクル毎の電流ソースＩ₁が与える総電荷はＶ₁及びＶ₂が同位相にある時、例えばＶ₁（ωｔ）及びＶ₂（ωｔ）の振幅が同時に高い時に最大となる。これは、入射フォトンエネルギーが最大強度である時つまり最も輝度が高い時に、フォトダイオードの感度が最大になることによる結果である。反対に、入射フォトンエネルギーが最大の時にＤ１感度が最小になるならば、Ｉ₁によって供給されるサイクル毎の電荷の量は最小になる。
【００７４】
所与のサイクル数後のフォトダイオードノードＮ_d上の電荷ΔＱ_Nの量の変化は、そのサイクルの間にＩ₁によって供給された電荷の量である。キャパシターＣ₀及びＣ₁が光電流Ｉ１によって放電される前後におけるノードＮ_d上の電圧ΔＶ_Dの差を測定することによってΔＱ_Nの変化は決定される。通常、光電流Ｉ₁は非常に小さく、直接測定することが困難である。しかしながら、多くのサイクル後の蓄積効果の結果、測定可能な電圧の変化ΔＶ_Dになる。
【００７５】
フォトダイオードの陽極端子及び陰極端子それぞれが図５Ｂの任意の電圧にセットされる場合、Ｃ₀の上部リードを図７Ｂに示されるようにグランドポテンシャルにあるようにできる。いくつかの実施例に関して後述するように、一般的にノードＮ_dは増幅器入力に結合していて、分流キャパシターも同一入力ノードに結合している。図７Ｂの構成の効果は、増幅器の寄生分流容量を、追加のキャパシターまたは専用の分流キャパシターの代わりにＣ₁として使用できることである。そのようにすることで、部品の数を減らし、ＩＣチップ上で本発明を実施するために必要とする面積を減らすことができる。更に、この構成ではノイズが少なく、生産技術における変動に過敏でない。
【００７６】
フォトンエネルギーがフォトダイオードに降りかかる際、入射フォトンエネルギーの到着と、放出された電子の収集には時間的遅れがある。この時間的遅れは、光エネルギーの波長が長く成るにつれ大きく増加し、約８５０ｎｍの波形の場合数ｎｓ程度である。したがって、光エネルギー発光器２２５は、アレイ２３０中のフォトダイオード２４０−ｘが早い反応をし、高い周波数ωでＱＥ変調できるように、短い波長を放射するように選択される。
【００７７】
当然のことながら本発明の様々な実施例で使用されるフォトダイオードは、効果的に検出するだけでなく、素早く検出することが望ましい。比較的短い波長の光エネルギーを送信できる発光器２２０を利用すれば検出器の効率性を促進するが、そのような発光器を製作することは長波長のエネルギーを与える発光器よりも高価になる。例えば、比較的安価なレーザーダイオードを波長が８５０ｎｍ程度のエネルギーを送信するための発光器２２０として利用できる。そのような発光器は比較的安価ではあるが、長波長は画素検出器の構造内に例えば７μｍといったように深く入り込み、その結果量子効率が損失し反応が遅くなる。
【００７８】
次に図７の典型的なＣＭＯＳ構造を参照すると、ターゲット対象物２０が反射した入射するフォトンエネルギーの大半が、画素検出器２４０のエピタキシャル領域４１０の奥深くで電子−正孔ペア（ＥＨｘ）を作り出し、構造の更に奥深くにある領域４１２にも電子−正孔ペア（ＥＨｘ’）を作り出すため、量子効率が落ちる。残念ながらこれらの深く放出された電子の多くは、光検出器の表面領域に到達できず、電子は表面領域で収集されるので、これらの電子はフォトダイオード検出信号電流には寄与することができない。更に、長めの波長を用いることで、信号電流が発生する前に好ましくない時間遅延が生じる。通常数ｎｓのこの遅延は、フォトダイオード電流に寄与できるように深く放出された電子を収集する際に、拡散効果がドリフト効果より優位になるために起こる。
【００７９】
仮にＥＨｘとＥＨｘ’に関連する電子がどうにかしてフォトダイオード構造の表面領域近くに動かされたとすると、ドリフト効果が拡散効果より優位になり、より早く検出電流を見ることができる。エピタキシャル層４１０のドーピングが非常に低いため、エピタキシャル層の奥深くで作られた電子を比較的小さな電流を用いて動かすことが可能である。
【００８０】
図７Ｃを参照すると、エピタキシャル層４１０は通常およそ７μｍの厚さで、そのドーパント濃度は約Ｎ_A＝１０¹⁵／ｃｍ³であり、その下にあるドーパント濃度の高い基板領域４１２はおよそ数百μｍの厚さであり、そのドーパント濃度は約Ｎ_A＝１０¹⁸／ｃｍ³である。図７Ｃに示すような構造は数多くの業者から簡単に入手可能である。
【００８１】
図７Ｃでは、ｎ井戸領域４３０とＰ＋＋領域４６０がエピタキシャル層４１０内に作られている。Ｎ＋領域４４０はｎ井戸領域４３０と共に形成される。以下に記述するとおり、収集リード４４５と収集リード４４７を設けて深く放出された電荷を動かし、好ましくは上方へ動かしｎ井戸４３０により収集する。（記載したドーパント極性は、例えば代わりにｎ型の基板を使うなど逆にすることもでき、またドーパントレベルと構造の厚さは変更できるものとする。）
【００８２】
次に、ＥＨｘに関連する電荷を上方に動かして一度電荷がｎ井戸に近づけば、最終的にはｎ井戸４３０が拡散効果により電荷を収集できるようにする方法について述べる。深く放出された電子を十分にゆっくりと促して、Ｐ＋＋領域に関連するリード４４７ではなく、ｎ井戸に関連するリード４４５に収集させることがゴールである。これから記述する方法では電子−正孔ペアＥＨｘに関連する電子をうまく収集することはできるが、構造の更に奥深くに到達してＥＨｘ’に関連する電子をも収集することはできない。そのような動きを図７ＣのＬ型鎖線によって示す。ＥＨｘ’の電子をも回収するには、層４１２に関連する高ドーパントレベルのために、許容できないような大きさの電流を必要とする。
【００８３】
次に本発明にしたがって電子を動かすために必要な電流の大きさについて考える。上から見て、図７Ｃに示す構造が１μｍＸ１μｍという大きさの正方形であり、その面積はＡ_sで示されると想定する。領域４１０の厚さを７μｍとすると、結果として体積は７Ｘ１０^-12／ｃｍ³となる。そのような体積から除去されなければならない必要電荷は、１０¹⁵Ｘ１０^-8Ｘ７Ｘ１０^-4Ｘ１．６Ｘ１０^-19Ａ_s＝１．１２Ｘ１０^-15Ａ_sであり、ここで１．６Ｘ１０^-19は電子一つに関連する電荷である。これだけの電荷を例えば１ｎｓ以内に除去することがゴールであるとすれば、必要な電流は約１．１２μＡとなる。この電流はごく僅かというわけではないが、光検出器アレイ２３０に関連する１平方マイクロンメートルごとにこの電流を提供することは実際に実行可能である。２００ＭＨｚで変調されている１ｍｍＸ１ｍｍという大きさのアレイで、電子を７μｍ上方に動かすには電流は全体で約２００ｍＡとなる。基板領域４１２に関連するドーパントレベルが高いので、この方法を用いてＥＨｘ’から電子を回収しようとすることはできないことが理解できる。
【００８４】
したがって、深く放出された電子をどうにか層４１０から収集のために上方に動かすアプローチの一つは、実質的に全ての正孔を約７μｍ下方に掃引することである。電子と正孔の移動度はかなり近いので、こうして自由になった電子を少なくとも７マイクロン上方に動かすことができ、ｎ井戸領域４３０に十分に近いところまでたどり着き、そこにある空乏領域の影響を好ましく受けさせることができる。空乏領域の影響は、そのような深く放出された電子が構造の上の方で収集されることを促進する。
【００８５】
ｎ井戸領域４３０の下に好ましくはパルス電流を流すことにより、その高い移動度により電子を同じ距離だけ上方に動かしながら、正孔を下方に７μｍほど動かすことができる。記述したとおり、一度電子が空乏領域がｎ井戸領域内に作り出す電界の影響を受けるのに十分な程近くに来ると、電子が収集される可能性は相当に高まる。
【００８６】
一実施例において、ｎ井戸領域４３０の外の基板上にオーミックコンタクト４６０を形成し、電子を空乏層近くに持ってくることを促進するために使用する。このアプローチは、エピタキシャル層４１０のドーパント濃度が比較的低く、電子を上方に約７μｍ掃引するために要する電荷の大きさが許容可能なものであり、うまく働く。構造２１０の上部にあるドーパント濃度の高い領域においては正孔が多過ぎるため、電子を上方に７μｍ以上動かすことを推奨する理由はない。必要に応じて、オーミックコンタクトではなくキャパシター構造を用いたＡＣ結合アプローチを代わりに用いてもよい。
【００８７】
次に、様々なタイプのエピタキシャル領域におけるドーピング勾配を用いた検出器構造について述べる。図７Ｄに示した構造は図７Ｃの構造に似ているが、図７Ｄの構造２４０’の深さは約７μｍより深くてもよい。図７Ｄでは、エピタキシャル層４１０’が、比較的高い濃度（ｐ１）から低めの濃度（ｐ３）の範囲にわたる異なるドーパント濃度を規定することが好ましい。ドーパント濃度の推移は連続していてもよいし、例えば、それぞれ関連するドーパント濃度の別個のエピタキシャル層を形成するなど、段階的に成っていてもよい。
【００８８】
当業者ならば各ドーピング領域の境界線に関連する電界が存在することを知っている。構造の上表面に近づくにつれドーパント濃度が低くなる構造２４０’では、電界の方向は下向きに規定することができる。ＥＨｘ’の中で領域４１２の上表面に近いところにある電子は、領域４１２とｐ１の間に存在するインターフェースを、そのインターフェースの電界によって、通り抜けて上方に動く。これらの電子は、そのインターフェースを通り抜けて下方には動かないため、次のエピタキシャルドーピングインターフェース（ｐ１、ｐ２）の近くに素早く上方に動くよう誘導できる（拡散効果により）可能性が非常に高く、それらの電子はそこから再び次のドーパント領域、ここではｐ２、に進入していくようにｐ１、ｐ２に存在する電界によって誘導される。一度その（ドーパント濃度のより低い）エピタキシャル領域（ここではｐ２）に入ると、電子はまたｐ１、ｐ２インターフェースを通り抜けて下方には動かなくなり、上方に動き次のドーパント領域（ｐ３）の影響を受ける可能性が非常に高くなり、そこから更にその領域に進入すべく誘導される。
【００８９】
当然のことながら、上述したのと同じ現象は、最初はエピタキシャル領域のどこかに開放されたＥＨｘペアからの電子にも最初は働く。またエピタキシャル領域内に、二つ以下または四つ以上のドーパント濃度を規定することができることは理解される。
【００９０】
したがって、エピタキシャル層から成るｐ１、ｐ２、ｐ３といった様々なインターフェースまたは境界線領域の中の電界に関連するドリフト電流現象は、ｐ１、ｐ２．．．のインタフェース領域の各々を通り抜けて電子が素早く上方に動くように誘導する。
【００９１】
以上に記載したとおり、段階的にドープされたエピタキシャル領域は、その領域に進入するために十分な程近くに辿り着いた電子のための「ステージング」領域あるいは「ホールディング」領域として機能する。しかしながら、エピタキシャル領域４１０’全体を通じて連続したドーパント勾配が規定されるとすると、（別個のエピタキシャル領域は本来存在しないので）一つの領域内で「ホールディング時間」はない。その効果は、ｎ井戸４３０による収集のために自由になった電子をより素早く捕らえて上方に掃引することである。
【００９２】
以下のセクションでは差動ＱＥ変調と、それがもたらすことのできる効果について記述する。繰り返すが、差動ＱＥ変調を含むＱＥ変調は、従来のＭＯＳタイプのフォトダイオード検出器及び／またはフォトゲート検出器を用いて実施してもよい。
【００９３】
再び図５Ａ及び５Ｂを参照して、入射するフォトンエネルギーが、図示したフォトダイオードの基板内に、任意の位置「Ｘ」に発生させる電子−正孔ペアＥＨ₁を含む電子−正孔ペアを発生させるとする。図５Ａでは、位置Ｘは準中性領域であり、空乏領域（斜線で示した部分）ではない。本発明において、この時点で変調がＱＥを減らし、ＥＨ₁を含む可能な限りの数の電子−正孔ペアを放棄することが望ましい。例えばフォトダイオードの逆バイアスを増加させるなどして、フォトダイオードのＱＥをそれからすぐに増加させたならば、位置Ｘを網羅するように空乏領域の幅Ｗを広げることができる（図５Ｂ参照）。
【００９４】
図５Ｂにおいて、ＥＨ₁はこの時点では空乏領域にある位置Ｘにまだ残存しており、ＥＨ₁は今度は光電流に大きく寄与する。一方では図５Ｂにある増加した空乏領域が、フォトン検出感度を高めることができる。しかし、ＱＥが低い時（図５Ａ）にフォトンが入ってきた時に発生した電子−正孔ペアは、ＱＥが高い時（図５Ｂ）に全光電流に寄与することができる。例えば、その寄与は別の時点でなされことになる。好ましくない結果としては、高変調率で効果的にＱＥを変更できないことである。しかしながら、高ＱＥ時に入ってきたフォトンのみが常に光電流に寄与することが好ましい。
【００９５】
上述した時間的遅れ効果を取り除くことによって、より早いフォトダイオードＱＥ変調を達成することが望ましい。環境光と所謂フォトダイオード暗電流とによって生じるフォトダイオード出力信号共通モード効果を除去することが、更に望ましい。全体として、ＱＥ変調は基本的にフォトダイオード構造内で電子のための収集ターゲットの大きさを変調することであるとわかる。他に収集ターゲットがなければ、たとえ小さなターゲットであって、ほとんどの電子は比較的長い寿命のために最終的には収集されることになる。したがって、電子の数に関しては、ＱＥ変調はターゲットエリアの変化に比べて相当に少ない。
【００９６】
代替隣接ターゲットの大きさを拡大したり縮小したりしながら、収集ターゲットの大きさを拡大したり縮小したりする差動ＱＥ変調技術を使用する本発明の様々な要素について次に記述する。その効果は、与えられたフォトダイオードのターゲットエリアを縮小しながら、電子と正孔のための大きな代替ターゲットを提供することである。これにより電子は寿命が尽きるよりかなり前に、代替ターゲットに収集され、縮小されたターゲットの対する循環から外されると共に、ＱＥが高められる。
【００９７】
本発明では、ＱＥ変調の最中にフォトダイオード内の幾つかの領域、通常は接合のドーパント濃度が低めの領域が、準中性領域になったり空乏領域になったり状態が入れ替わると認識している。これらの領域を最低限に抑えることができれば、フォトダイオードをより明確にＱＥ変調することができる。本文で後に図８Ａ及び図８Ｂに関して述べるように、そのような高められたＱＥ変調は差動変調アプローチを用いて促進される。図８Ａ及び図８Ｂは、ＡとＢで示される１８０度離れた二つの隣接するフォトダイオードの「スナップショット」を表している。好ましくはアレイ２３０において、隣接するフォトダイオードＡとフォトダイオードＢはお互いに十分に近く表面積が小さく、それぞれが常に実質的に同じ量の入射するフォトンエネルギーを受ける。フォトダイオードグループＡまたはバンクＡとフォトダイオードグループＢまたはバンクＢを、それぞれのＱＥが１８０度位相外れになるように、すなわちフォトダイオードＢのＱＥが最小の時にフォトダイオードＡのＱＥが最大に達し、かつ逆もまた同様になるように、バイアス変調する。
【００９８】
図８Ａ及び図８Ｂで留意すべきことは、隣接するフォトダイオードＡとＢの間の準中性領域５００は常にかなり小さいので、そこで作り出される電子−正孔ペアの数もかなり少ない。ＱＥ変調を減らすのは空乏領域付近の準中性領域なので、このことは好都合である。図８Ｂでは、フォトダイオードＢのＱＥが増加した時、フォトダイオードＡとフォトダイオードＢのダイオードの間の準中性領域５００にある電子−正孔ペアを隣接するフォトダイオードＢのための光電流の中へ掃引してもよい。準中性領域５００は小さいので、領域５００によるＱＥ変調の劣化が少なくて、有利である。
【００９９】
図８Ａ及び図８Ｂにおいて、ある時にフォトダイオードＡとフォトダイオードＢはそれぞれ０ＶＤＣと２ＶＤＣで逆バイアスされると想定する。例えば、仮にＡとＢが適当なＣＭＯＳ０．２５μｍプロセスにより製作されたとして、フォトダイオードＢは通常フォトダイオードＡに比べて最大で３０％多くのフォトンエネルギーを変換する。フォトダイオードＡのＱＥは０ＶＤＣから逆バイアスの僅かな増加に対して急速に増加するのに対し、１ＶＤＣほどで逆バイアスされたフォトダイオードＢは、逆バイアスの僅かな変化ではほとんど影響を受けない。したがって、フォトダイオードＡの逆バイアスが可能な限り小さいことが、最大ＱＥ変調にとっては有利である。このバイアス方式は、フォトダイオードＡとフォトダイオードＢの間の準中性領域５００にチャンネルが形成されるＭＯＳトランジスターに対応する。ＭＯＳトランジスターゲート構造は存在しないが、高いソース−ドレーン電圧下の閾値下の領域においてのある電圧値に対して存在すると想定できる。
【０１００】
図８Ａに示したタイムフレームの間、フォトダイオードＡには弱く逆バイアスをかける。結果として、フォトダイオードＡとフォトダイオードＢの間には相当量のの漏れ電流があり得、それは図８Ａ及び図８Ｂに示すフォトダイオードＡがソースとなりフォトダイオードＢがドレーンとなっているＭＯＳトランジスターの閾値下漏洩と合致する。そのような漏れ電流は、少なくともフォトダイオードＡとフォトダイオードＢの間の領域においては対象の光エネルギーに対して透明であると想定されるポリシリコンゲートＧ’を形成し、ゲートＧ’の下に薄い酸化物（ＴＯＸ）の絶縁層を形成することによって減らすことができる。そのようなゲートを製作した場合、ゲート電圧をコントロールすることによって閾値下漏れ電流をコントロールできる。ドープされていないチャンネルについては、漏れ電流を大幅に減らすには通常約−０．４ＶＤＣのゲート電圧で十分である。
【０１０１】
図８Ｃはアレイ２３０の一部の平面図で、ここではフォトダイオードＡまたはフォトダイオードＢと呼ばれるフォトダイオードの列と行を描写している。異なる斜線によって示されているとおり、全てのフォトダイオードＡのＱＥ変調ノードは並列に結合してあり、全てのフォトダイオードＢのＱＥ変調ノードは並列に結合してある。本質的に、図８Ｃは一つの大きなフォトダイオードＡと一つの大きなフォトダイオードＢの平面図と見ることができる。本発明の差動ＱＥ変調モードにおいて、全てのフォトダイオードＡは全てのフォトダイオードＢを変調する信号から１８０度の位相で変調できる。フォトダイオードＡとフォトダイオードＢの間にはごく小さな準中性領域しか存在しないので、ＡとＢ両方のクラスのフォトダイオードのそれぞれのＱＥを明確に変調できる。高変調周波数でＱＥ変調を顕著にぼかすのは、実質的に各フォトダイオードの底の領域にある準中性領域のみである。
【０１０２】
ＱＥ変調の基礎を成す概念の概要を説明したので、次にそのような技術を用いたシステムの様々な構成について記述する。実施例の第一のカテゴリーにおいて本発明では、専用のエレクトロニックミキサー（例えばギルバートセル）をＱＥ変調で置き換えた可変位相遅延（ＶＰＤ）技術を用いる。第一のカテゴリーを描写するシステムトポグラフィーは主に図９Ａから図９Ｃに示す。第二のカテゴリーの実施例では、固定位相遅延をＱＥ変調を用いて混合し、様々な空間的マルチプレクシングアプローチ及び時間的マルチプレクシングアプローチを実施する。第二のカテゴリーを描写するシステムトポグラフィーは主に図１０に示す。
【０１０３】
好都合なことに、どちらのカテゴリーの実施例でも、フォトダイオードの逆バイアスを変更することにより、あるいはＭＯＳ実装フォトダイオードにフォトゲートを付けてゲート電圧を変更することによって、ＭＯＳで実施したフォトダイオードのＱＥを変調することができる。どちらの方法でも、シングルエンドまたはダブルエンドの差動信号処理を用いてよい。差動ＱＥ変調には迅速なＱＥ変調が可能になるという効果があり、かつ環境光とフォトダイオードの暗電流による共通モード効果を大幅に取り除く差動出力を提供する。どちらの方法のカテゴリーでも、フォトダイオードのキャパシターに光検出器信号電荷を蓄積するので、有利である。各カテゴリーでも、ＱＥ変調停止時に電荷を周期的に調べてもよい。そのような信号蓄積アプローチは、高周波数小信号の光電流を直接測る方法よりも好ましい。
【０１０４】
次にカテゴリー１の実施例と呼ばれる本発明の可変位相遅延（ＶＰＤ）ＱＥ変調実施例に関して、図９Ａから図９Ｃを説明する。ＶＰＤ技術を用いて、ＱＥ変調された画素フォトダイオード（またはフォトゲートフォトダイオード）のそれぞれからの光電流を、広バンド幅、高周波数または高閉ループ利得を示す必要のない、関連する比較的高入力インピーダンスの増幅器に入力として結合する。増幅器の出力をローパスフィルター（ＬＰＦ）に直接フィードする。このローパスフィルターの出力は積分器を駆動する。積分器の出力は、可変位相遅延（ＶＰＤ）をコントロールするように結合する。可変位相遅延（ＶＰＤ）は、光検出器ダイオードを駆動するＱＥ変調信号をコントロールする。ＶＰＤはまた、光エネルギー発信器をコントロールする周期的信号ジェネレーターからの信号により駆動される。画素フォトダイオード検出器からの出力信号に関連するＤＣオフセット及びホモダイン駆動信号に関連するＤＣオフセットがあってもなくてもよい。オフセットがないと想定すると、定常状態においてＬＰＦ出力はゼロとなる。適当なオフセットがあるものと想定すると、定常状態においてＬＰＦ出力は最小値または最大値となる。この方法はシングルエンドで実施してもよいが、ポジティブ信号とネガティブ信号が位相がずれてＱＥ変調されたフォトダイオードから発生する相補型アプローチを用いて、ダブルエンドで実施するのが好ましい。
【０１０５】
分かり易く図示するために、フォトダイオード（またはフォトゲート）検出器のバイアス付与は明示していない。バイアスを付与するには、単にレファレンスソースからシングルエンドＱＥ変調、そして差動モードＱＥ変調のための様々な光検出器へとレジスターを結合するだけでよいことは、当業者の認識するところである。差動ＱＥ変調の場合、フィードバックを共通モードのバイアス付与レファレンスに加え、比較される二つの信号の合計が望ましいダイナミックレンジ内に確実に留まるようにすることが、更に好ましい。
【０１０６】
次に図９Ａを参照してカテゴリー１の可変位相遅延（ＶＰＤ）の実施例について説明する。図９Ａは、ＩＣ２１０の一部、アレイ２３０、画素検出器２４０−１から２４０−ｘ、及び各ダイオードの関連する典型的なエレクトロニクス２５０’−１から２５０’−ｘまでを描写している。図９Ａ中の要素で、前出の図の要素と同様な参照番号が付いているものは、それらと同一の場合もあるが、必ずしも同一でなければならないわけではない。例えば、図９Ａの可変位相遅延ユニット３２０あるいはフィルター３４０は、図４の部品と同一でもよいが、同一である必要はない。図９Ａの画素ダイオード２５０−ｘのそれぞれは、（図４の２５０’−ｘという表記とは対応して）２５０−ｘで示される関連するエレクトロニックユニットを有する。ここでもまた分かり易く図示するために、数千個ほどの画素ダイオード２４０のうち二つの画素ダイオードと関連する電子回路のみを描写する。繰り返すが、必要に応じて、オムニバスＡ／Ｄ機能をＩＣチップ２１０上に実施するのではなく、エレクトロニクス２５０’−１から２５０’−ｘのそれぞれの一部として専用のＡ／Ｄコンバーターを設けることもできる。
【０１０７】
図４の構成と図９Ａに示す構成を比べてみると、図４は各画素ダイオードに専用のエレクトロニクスミキサー３１０を設けているのに対し、図９Ａのエレクトロニクス２５０−ｘにはそのような別個の、明示されたミキサーは含まれていない。その代わりに、本発明によれば、図９Ａの構成はＱＥ変調を用い、データの中でも発信信号と受信信号の位相の差異を導き出し、ＴＯＦを導き出す。図９Ａとここに記載するその他のＱＥ変調の実施例は、ミキサーを使わず、ミキサーが混合のために入力として必要とする十分に増幅した信号がなくてもよい、という効果がある。
【０１０８】
図９Ａでは、アレイ２３０中の検出した波形信号フォトダイオード２４０−ｘは、図２Ｃに示すような.１＋Ａ・ｃｏｓ（ω・ｔ＋Φ）という形のＤＣオフセットを含む。この１＋Ａ・ｃｏｓ（ω・ｔ＋Φ）という信号の最小値は０ＶＤＣで、最大値はおそらく＋３ＶＤＣであることが好ましい。図２Ｃに関して先に述べたように、任意のＤＣオフセットを含むための表記の変更は、関係する数学的分析に影響を与えるものではない。
【０１０９】
図９Ａにおいて、アレイ２３０中のエレクトロニクスシステム２５０−ｘ毎に、可変位相遅延（ＶＰＤ）３２０からの出力信号は、キャパシターＣ₀を経由して関連するフォトダイオード２４０−ｘのノードＮ_dに結合されている。Ｃ₀結合された変調信号がＳ₂＝Ａ・ｃｏｓ（ωｔ＋Φ）というように検出した光エネルギーと位相が合っている場合、増幅器４００の入力インピーダンスＲ_i両端に発生する信号が最大値となる。Ｒ_iは例えば＞１ＧΩと大きく、Ｒ_i両端の信号電圧の振幅は周期的信号ｃｏｓ（ωｔ）の数多くの周期にわたってゆっくりと増える。各エレクトロニクス２５０−ｘ内のフィードバックパスは、ローパスフィルター３４０と積分器３３０を含み、結果として生じるフィードバックにより例えばＲ_i両端の電圧といった増幅器４００の入力の振幅が最小になる。フォトダイオード２４０−ｘが受信した信号Ｓ₂＝Ａ・ｃｏｓ（ωｔ＋Φ）が変調信号ｃｏｓ（ωｔ＋Ψ）と１８０度位相が外れている時に、Ｒｉ両端の振幅が最小になる。図５に示すように、各エレクトロニクス２５０−ｘのために、結果として生じた位相値Ψ_xを各積分器３３０の出力端子での電圧信号として読み出すことができる。
【０１１０】
したがって、図９Ａのエレクトロニクス２５０−ｘは図４のエレクトロニクス２５０’−ｘといくらか似た働きをし、入射する周期的なフォトンエネルギーを調べ、システムからターゲット対象物２０までの距離ｚを測ることのできる位相出力信号を作り出す。図９Ａにおいて、増幅器出力はそれぞれローパスフィルター３４０の入力へ直接伝えられるので、増幅器４００のための高周波数反応は必要ない。更に、各増幅器入力インピーダンスＲｉ両端の電圧信号は、数多くの周期的サイクルにわたって増えることができる。したがって、最終的に検出される信号は比較的大きくなり、例えば数ｍＶまたは数十ｍＶであると好ましい。結果として、図４の増幅器３００とは違い、図９Ａの実施例においては増幅器４００は極めて高利得で極めて低ノイズの高周波の装置である必要はない。その結果、増幅器４００はＩＣチップの小さい面積内に実施することができ、消費する電流もより少なく、しかしながら図４の複雑な構成よりも優れた距離ｚ解像度を提供することができる。
【０１１１】
次に図９Ｂを見てみると、もう一つのカテゴリー１のＶＰＤの実施例が描写されている。図９Ｂでは、相補的な１８０度位相がずれたＶＰＤ３２０からの出力を用い、そのうち一つのＶＰＤ出力はキャパシターＣ₀を経由して関連するフォトダイオードＤつまり２４０−ｘに結合する。相補的ＶＰＤ出力は、同様のキャパシターＣ₁₀を経由して同様のここではＤ’で示されるフォトダイオードと結合する。したがって、フォトダイオード２４０−ｘは一つのＶＰＤ出力によりＱＥ変調され、他方でダイオードＤ’は別のＶＰＤ出力で１８０度位相がずれてＱＥ変調される。本質的には、様々なフォトダイオードのＱＥ変調ノードは、フォトダイオードのグループが並列にＱＥ変調されるように、並列に結合されている。フォトダイオード２４０−ｘとフォトダイオードＤ’はそれぞれ放電し、各フォトダイオードへの逆バイアスを周期的に所定のレベルまでリフレッシュすることを必要とする共通モード信号が発生する。更に、図９Ｂの構成は増幅器４００’への差動入力を用い、アレイ２３０のフォトダイオード２４０−ｘに降りかかる環境光の影響は最小限である。図９Ｂの構成がもたらすもうひとつの効果は、フォトダイオード２４０−ｘと関連するフォトダイオードＤ’を、著しい遅れなしに急速にダイオードの組に対してＱＥ変調することを可能にする差動構成でもって実施できることである。したがって、アレイ２３０の各フォトダイオード２４０−ｘに対し、実質的に同一の特徴を有するフォトダイオードＤ’を各増幅器４００’の（図９Ｂの構成内の）反転入力に結合する。
【０１１２】
次に図９Ｃを見てみると、差動比較器とデジタル積分器を用いたＶＰＤのＱＥ変調の実施例を示している。繰り返すが、様々なフォトダイオードのためのＱＥ変調ノードは並列結合してあり、フォトダイオードが並列にＱＥ変調されるようなっている。図９Ｃでは、図９Ｂにおける増幅器４００’と一般的にアナログの積分器３３０を、差動比較器５１０及びデジタル積分器５２０で置き換えている。規則的なインターバルで、マイクロプロセッサー２６０（図３参照）はエネルギー発信器２２０に放射を停止するように、あるいはシャットダウンするように命令し、ＶＰＤ３２０の出力は双方とも一定の電圧に設定される。各差動比較器５１０はそこで、その入力ノードに示された差動信号を比較する。各デジタル積分器５２０はそこでこの比較の結果（Ｃ）を読み出し、Ｃ＝１の場合そのデジタル出力を少量分だけ増し、Ｃ＝０の場合はそのデジタル出力を少量分だけ減らす。必要に応じて、電圧比較を必要としないフォトダイオードのＱＥ変調中は、比較器５１０をシャットダウンしてもよい。
【０１１３】
引き続き図９Ｃを参照しながら、以下の例を考えてみる。定常状態において、デジタル比較器５１０からの出力は「０」と「１」との間でトグルする。デジタル積分器５２０からの出力は二つの値、例えば５と６との間でトグルする。ＶＰＤユニット３２０は（本実施例では）５と６との間でトグルしながら遅延を作り出す。光検出器Ｄはｃｏｓ（ωｔ＋５）とｃｏｓ（ωｔ＋６）との間でトグルする信号で引き続き変調される。上記の例において、５と６という値が実質的に近ければ、平衡状態ではフォトダイオードＤはｃｏｓ（ωｔ＋５．５）で変調されているように見える。
【０１１４】
次に固定位相ＱＥ変調を用いた所謂カテゴリー２の実施例を、主に図１０を参照しながら解説する。カテゴリー２の実施例では、各光検出器をＱＥ変調するために固定位相信号を用いる。フォトダイオード検出器の異なるグループまたはバンクを、アレイ内で非局在の方法で規定することができる。例えば、フォトダイオード検出器の第一のバンクを固定の０度位相シフトでＱＥ変調し、第二のバンクを固定の９０度位相シフトでＱＥ変調し、第三のバンクを固定の１８０度位相シフトでＱＥ変調し、第四のバンクを固定の２７０度位相シフトでＱＥ変調する。各画素内には、四つのバンク全てに対応するフォトダイオード検出器がある。位相情報とターゲット対象物の輝度情報は、画素内の各バンクの出力値を調べることにより決定できる。この固定遅延アプローチでは、各画素に関連するエレクトロニック回路構成が簡易化され、電力消費も削減され、必要なＩＣチップ面積を減らすこともでき、時間的マルチプレクシング及び空間的マルチプレクシングのための様々な技術をも可能にする。
【０１１５】
シングルエンドまたは差動の空間的マルチプレクシングと時間的マルチプレクシング、及び実際のフォトダイオードと画素の一対一に対応しないマッピングを含む、カテゴリー２のＱＥ変調の様々な側面について説明する。更に、カテゴリー２の実施例ではインダクターを用い、コンデンサー容量による損失を離調したり補ったりすることによって、電力消費を削減することができる。
【０１１６】
カテゴリー２の固定位相遅延ＱＥ変調について、図１０を参照しながら次に記述する。この構成の効果は、エレクトロニクス２５０−ｘをある程度簡易化でき、その他のＱＥ変調の実施例と同じく、輝度測定を出力できることである。図１０において、アレイ２３０のフォトダイオード２４０−ｘとフォトダイオードＤ’は固定位相変調器５３０で変調されている。固定位相変調器５３０の出力は、例えばマイクロコントローラー２６０（図３参照）によって０度の位相または９０度の位相を選択できる。メモリー２７０に含むことのできるソフトウェアが、画素へのパス遅延による画素フォトダイオード間の（固定）変調位相の差異を修正することが好ましい。変調信号とその相補的信号をアレイ２３０に提供してもよく、また相補的信号は各画素エレクトロニクス２５０−ｘ内で、固定位相遅延ユニット５３０の単一出力に結合した１８０度遅延ユニット５４０を含むことにより再生してもよい。
【０１１７】
図１０において、システム２００（図３参照）は数多くの（コア周波数がωの）周期の間動作することを許可されていて、その後はレーザーまたはその他のフォトンエネルギーの発信器２２０がシャットダウンされる。発信器２２０がシャットダウンされると、ダイオード変調電圧信号とその相補的信号は一定の振幅に設定される。以下の記述には、所謂「ｃｏｓ（ωｔ）＋１」分析が用いられる。ＱＥ変調がいくらかリニアであると想定して、フォトダイオード（Ｄ）信号（Ｂ｛ｃｏｓ（ωｔ＋Φ）＋１｝を変調信号（ｃｏｓ（ωｔ）＋１）と掛けた後、積分すると結果はＢ（０．５｛ｃｏｓ（Φ）｝＋１）となる。フォトダイオード（Ｄ’）信号（Ｂ｛ｃｏｓ（ωｔ＋Φ）＋１｝を変調信号（ｃｏｓ（ωｔ＋１８０°）＋１））と掛けた結果はＢ（−０．５｛ｃｏｓ（Φ）｝＋１）となる。二つの式を引算すると、差動増幅器４００’の出力で信号Ｖ₀＝Ｂ・ｃｏｓ（Φ）となる。ここでＢは輝度係数である。そこで、元の変調信号とは９０度ずれた変調位相で新たな測定を実行する。すると差動増幅器４００’の出力での結果はＶ₉₀＝Ｂ・ｓｉｎ（Ψ）となる。０度と９０度の測定で、角度Ψは次のようにして得ることができる：
ｔａｎ（Ψ）＝Ｖ₉₀／Ｖ₀
【０１１８】
輝度Ｂは次の式から求められる。
Ｂ＝√（Ｖ₀ ²＋Ｖ₉₀ ²）
好都合なことに、そして本文に前述した実施例とは対照的に、図１０の構成は各エレクトロニクス２４０−ｘ内に積分器を必要としないので、システムデザインが簡易化される。
図１０の構成の更なる効果は、システム動作電力を削減するためにインピーダンスの合ったインダクターを用いることができることである。例えば、フォトダイオード２４０−ｘがそれぞれ約１５μｍの正方形で、約１０ＦＦの容量（Ｃ）を有すると想定する。また、変調周波数ｆ＝ω／（２π）として、ｆが約１ＧＨｚであり、システム２００が例えば電池電源などの３ＶＤＣ電力供給源で動作していると想定する。フォトダイオード画素ごとの電力消費はＣ・Ｖ²・ｆに比例し、およそ８μＷになる。２００画素Ｘ２００画素から成るアレイ２３０では、電力消費は約０．３２Ｗとなる。
【０１１９】
電力消費は容量Ｃに直接比例するため、有効容量を減少することにより電力消費を削減できる。この望ましい結果は、同調インダクター（Ｌ_p）をフォトダイオードの容量に並列に結合することによって達成できる。しかしながら、仮に同調インダクターＬ_pを図１１に示すように各画素内に設置すると、１ＧＨｚで共振するには各インダクターＬ_pがおよそ１００μＨとなり、各画素フォトダイオード内に実装するには大き過ぎる値である。
【０１２０】
図９ＣのＶＰＤによるＱＥ変調の実施例とは対照的に図１０の実施例では、図８ＣのフォトダイオードＡ及びフォトダイオードＢと似たように並列結合されたフォトダイオードのバンクそれぞれのための共通変調信号を用いて、全ての画素を変調する。この構成の効果は、並列結合されたフォトダイオードのバンクの中の全てのフォトダイオードが並列に駆動されることである。並列結合されたフォトダイオードそれぞれのための様々な寄生分流容量はそれら自体が並列に結合されている。結果として、望ましい周波数での共振を達成するためには一つの（または比較的数少ない）インダクターを一つの並列バンク内の全てのフォトダイオードに結合すればよい。２００Ｘ２００アレイの上記の例では、各画素フォトダイオードに対し１００μＨが必要である。例えば２００Ｘ２００のフォトダイオードを並列結合すると、Ｌ_pの値は１００μＨ／（２００・２００）または０．２５ｎＨまで減少し、製作するには非常に現実的なインダクタンスの大きさとなる。更に、アレイの大きさは実際２００Ｘ２００よりも大きい場合もあり、その場合フォトダイオードの数が増えフォトダイオード全体の容量も増加し、望ましいＱＥ変調周波数で共振するために必要な一つのインダクターＬ_pの大きさが更に削減される。そのようなインダクタンスはＩＣチップ２１０の上に製作でき、あるいはチップ外に実装してもよい。上記の例では、図１１Ｂのおよそ０．２５ｎＨのレベルの一つのインダクターＬ_pが並列結合した２００Ｘ２００のフォトダイオードの有効容量を離調するが、図１１Ａでは各フォトダイオードが相当大きなインダクタンスを持つ別個のインダクターを必要とする。
【０１２１】
図１０の固定位相遅延（カテゴリー２）構成は、典型的な例として意図されたものである。実際には、様々な所謂空間的マルチプレクシング技術及び時間的マルチプレクシング技術が用いられる。アレイ内の光検出器の異なるグループまたはバンクで、グループとして固定位相で変調できるものについて、異なる空間的トポロジー（図８Ｃに示した差動ＱＥ変動がそのうちの一例である）を用いることができる。空間的トポロジーはフォトンエネルギーが光検出器内に放出した電荷の収集効率を高めるので、信号検出効率を高めることができる。時間的トポロジーとは、同じ光検出器のバンクを異なる時に異なる固定変調位相で変調することを指す。空間的トポロジーによっては、複数の画素全体にわたって光検出器を共有すること、例えば同じ光検出器を異なる画素に再利用することを含むことのできる、空間的マルチプレクシングが許される。時間的トポロジーは時間におけるマルチプレクシングを可能にし、それによってパイプライニングが促進できる。本発明では、様々な画素バンクトポロジー及び各種の時間−位相トポロジーを利用した、これらの側面のどれでも、また全てでも実施できる。
【０１２２】
図８Ｄにおいて実施した空間的マルチプレクシング技術は、図１０の典型例に示したもので、そこでの光検出器トポロジーは図８Ｃのそれであり、０度−１８０度、９０度−２７０度の時間トポロジーを用いている。更に、図１０の典型的な構成は、時間マルチプレクシングやパイプライニングのみならずフォトダイオードの空間的マルチプレクシングを支援するために用いることもできる。
【０１２３】
次に本発明の別の空間的トポロジーの実施例について、図１２Ａを参照して記載する。図１２Ａの空間的マルチプレクシングの実施例は原則的に、図１０の０度−１８０度−９０度−２７０度の時間分割トポロジーの実施例と同様に動作する。しかしながらその違いは、例えば図１２Ａの平面図に示す四つの光検出器ｄ₁つまり２４０−（ｘ）、ｄ₂つまり２４０−（ｘ＋１）、ｄ₃つまり２４０−（ｘ＋２）及びｄ₄つまり２４０−（ｘ＋３）を利用して、測定値が時間τ₁において同時に求められることである。
前のとおり、ΔＶ_d＝［ΔＶ_d1（τ₁）−ΔＶ_d2（τ₁）］／［ΔＶ_d3（τ₁）−ΔＶ_d4（τ₁）］＝ｔａｎ（Φ）となる。
【０１２４】
次に図１２Ｂを見てみると、光検出器アレイ全体にわたり異なる画素によって光検出器を共有できることがわかる。図１２Ｂでは、図１２Ａで示した四つの光検出器が、その二重の役割が分かるように斜線を付けて描写してある。例えば、フォトダイオードｄ１−ｄ２−ｄ３−ｄ４は、アレイ２３０の一つの画素内に四つの光検出器のクラスターを形成すると言うことができる。しかし、フォトダイオードｄ１とｄ３はまた、フォトダイオードｄ１、ｄ５、ｄ３、ｄ６から成るフォトダイオードのクラスターの一部でもある、等々。留意すべきことは、個別のフォトダイオードは異なるクラスターにおいて複数の役割を果たすことができるが、示したような空間的的に多重化した実施例を実施するための追加のＩＣチップ部分が必要になることはなく、したがってＩＣチップ面積の効率的な利用を促進するということである。必要に応じて、空間測定の一部を再利用して更なるデータ測定を得ることもできる。
【０１２５】
これは最も効率的な実施例ではないかもしれないが、必要に応じて０度−１２０度−２４０度の時間分割ＱＥ変調の実施例を実施してもよい。このような実施例では、図８Ｃに示す画素のアレイからタイムフレームτ₁及びタイムフレームτ₂に行われた二つの測定を用いる。時間τ₁における第一の測定に対しては、光検出器Ａから成る光検出器バンク（バンクＡ）が０度の位相におけるＳ１（ｔ）という正弦波の波形で作動し、一方隣接する光検出器Ｂから成る光検出器バンク（バンクＢ）がＳ２（ｔ）により１２０度位相がずれている。時間τ₂における第二の測定に対しては、バンクＢの位相が１２０度ずらされていて、バンクＡの位相が２４０度ずらされている。位相の差異の合計は以下のように求められる：
【０１２６】
ΔＶ_d＝［ΔＶ_d2（τ₂）−ΔＶ_d1（τ₂）］／ΔＶ_d1（τ₁）
であり、ここで時間τ₁で、
ΔＶ_d1＝Ａ［１＋ｃｏｓ（ωｔ）］ｃｏｓ（ωｔ＋Φ）
ΔＶ_d1＝Ａｃｏｓ（ωｔ＋Φ）＋０．５Ａ｛ｃｏｓ（Φ）＋ｃｏｓ（２ωｔ＋Φ）｝
また時間τ₂で、
ΔＶ_d1＝Ａ［１＋ｃｏｓ（ωｔ−１２０）］ｃｏｓ（ωｔ＋Φ）
ΔＶ_d1＝Ａｃｏｓ（ωｔ＋Φ）＋０．５Ａ｛ｃｏｓ（Φ＋１２０）＋ｃｏｓ（２ωｔ＋Φ−１２０）｝
ΔＶ_d2＝Ａ［１＋ｃｏｓ（ωｔ−２４０）］ｃｏｓ（ωｔ＋Φ）
ΔＶ_d2＝Ａｃｏｓ（ωｔ＋Φ）＋０．５Ａ［ｃｏｓ（Φ−１２０）＋ｃｏｓ（２ωｔ＋Φ＋１２０）］
であり、
【０１２７】
したがって、フィルタリング後は、
ΔＶ_d＝［ｃｏｓ（Φ−１２０）―ｃｏｓ（Φ＋１２０）］／ｃｏｓ（Φ）
ΔＶ_d＝２ｓｉｎ（Φ）ｓｉｎ（１２０）／ｃｏｓ（Φ）
ΔＶ_d＝Ｋ₁ｓｉｎ（Φ）／ｃｏｓ（Φ）
ΔＶ_d＝Ｋ₁ｔａｎ（Φ）となる。ここで、Ｋ₁＝√３である。
次に図１２Ｃを参照すると、０度−１２０度−２４０度の変調（空間的マルチプレクシング）の実施例が示してある。この空間的多重化の実施例は、三つの検出器ｄ₁、ｄ₂及びｄ₃を用いて測定値を時間τ₁において同時に測定を行う以外は、上記の０度−１２０度−２４０度の時間分割多重化の実施例と同様である。
【０１２８】
上記と同様に、
ΔＶ_d＝［ΔＶ_d3（τ₁）―ΔＶ_d2（τ₁）］／ΔＶ_d1（τ₁）＝Ｋ₁ｔａｎ（Φ）で、Ｋ₁＝√３となる。
図１２Ｂに関して述べたことからわかるように、図１２Ｃの光検出器を光検出器アレイ２３０の中の異なる画素全体に渡って共有してもよい。
再び図８Ｃを参照すると、バンクＡの中の各光検出器を、例えば上下左右の四つの画素にわたって共有することができることがわかる。例えば、光検出器の二番目の列において、第一の光検出器Ａは隣接する四つの光検出器Ｂのそれぞれと関連していてもよい。
【０１２９】
本発明の空間的マルチプレクシングを可能にするには、まずフォトダイオード検出器のバンクの間で差異信号を発生させて差動データを得るよりも、生データを各光検出器からシングルエンドで得ると有利であることがわかる。それでもＱＥ変調は差動で実行すること、つまり複数の検出器のバンクを異なる位相で変調することが好ましい。そのようなシングルエンドの生データは、データを信号処理する時に、差動データのみ利用可能な場合よりも高い柔軟性、例えば、隣接する光検出器からのデータを足したり引いたりすること（例えば、おそらくはデジタルで）、が存在するという点において好ましい。図１３Ａは光検出器出力の典型的な差動信号処理を示し、一方図１３Ｂはシングルエンドの信号処理を示している。
【０１３０】
図１０に示したような実施例に関するパイプライニングの概念について次に説明する。ここで用いられているように、パイプライニングとは、得たデータの連続するフレーム中の画素測定を得る時の待ち時間を削減することを指す。
次のように、全体の測定の処理量を増加させるために、得たデータのフレーム内の測定をインターレースすることができる。
０度−１８０度の測定： ΔＶ_d（τ₁）
９０度−２７０度の測定： ΔＶ_d（τ₂）→ΔＶ_d（τ₂）］／ΔＶ_d（τ₁）＝ｔａｎ（Φ）
０度−１８０度の測定： ΔＶ_d（τ₃）→ΔＶ_d（τ₂）］／ΔＶ_d（τ₃）＝ｔａｎ（Φ）
０度−２７０度の測定： ΔＶ_d（τ₄）→ΔＶ_d（τ₄）］／ΔＶ_d（τ₃）＝ｔａｎ（Φ）など。
【０１３１】
このように、測定情報の連続的なパイプラインを、計算速度を効果的に倍増しながら、しかしながら測定一つ分の待ち時間で計算できる。実際に、上記の時間分割マルチプレクシングＱＥ変調の実施例の効果の一つは、データ取得のフレーム率を相当に増加できるということである。述べたように、ここに述べた情報処理ステップを実行するためにチップ上のＣＰＵシステム２６０を用いることができ、またチップ上のエレクトロニクス２５０−ｘは、説明してきた様々な形のＱＥ変調及び信号処理を実施することができる。
再度図８Ａを参照して、隣り合う二つの光検出器２４０−（ｘ）（つまり検出器「Ａ」）と光検出器２４０−（ｘ＋１）（つまり検出器「Ｂ」）のそれぞれが、平面図で見ると実質的に同一の面積を有すると想定する。これから記述するのは、実際の光検出器の有効面積の差異に関連する影響を含む、これらの光検出器に降りかかる不均一な光量の悪影響を削減し、またこれらの光検出器と共に使用される増幅器の利得に関連する１／ｆノイズを削減する技術である。
【０１３２】
図３及び図８Ａを参照して、ターゲット対象物２０から帰還したフォトンエネルギーが光検出器Ａと光検出器Ｂに降りかかり、これら二つの光検出器が異なる信号、例えば異なる振幅を出力すると想定する。幾つかの理由により、検出した出力信号は異なることがある。光検出器Ａに降りかかる光量は光検出器Ｂに降りかかる光量と異なるかもしれない。光検出器Ａの有効検出面積と光検出器Ｂの有効検出面積は、部品不整合により異なるかもしれないし、あるいは光検出器Ａがただ単により良く製作されていて、より優れた検出特性を示すかもしれない。
再び図１０を参照し、説明を簡単にするため「１＋ｃｏｓ」分析を用いて、入射するフォトンエネルギー信号で光検出器Ａが見るものをＡ’｛ｃｏｓ（ωｔ＋Φ）＋１｝とし、入射するフォトンエネルギー信号で光検出器Ｂが見るものをＢ’｛ｃｏｓ（ωｔ＋Φ）＋１｝とする。仮にＡ’＝Ｂ’であるとすると、均一な光量であるが、それ以外の場合は均一な光量ではない。しかしながら、より一般的なケースではＡ’とＢ’は同一にはならない。
【０１３３】
図１０では、光検出器Ａが見たエネルギー信号であるＡ’｛ｃｏｓ（ωｔ＋Φ）＋１｝に｛ｃｏｓ（ωｔ）＋１｝を乗じて、蓄積後のＡ’（０．５ｃｏｓ（Φ）＋１）を得る。これ以後この式は式｛１｝と示す。同様に、光検出器Ｂが見たエネルギー信号であるＢ’｛ｃｏｓ（ωｔ＋Φ）＋１｝に｛ｃｏｓ（ωｔ＋１８０°）＋１｝を乗じて、蓄積後のＢ’（−０．５ｃｏｓ（Φ）＋１）を得る。これ以後この式は式｛２｝と示す。仮にＡ’＝Ｂ’であるとすると、Ａ’ｃｏｓ（Φ）を得るのは本文に前述したように簡単である。問題はＡ’とＢ’が同一でないということである。
先ほどの図１０の説明の中では、Ｋｂを輝度係数として、Ｋｂ｛ｃｏｓ（Φ）｝及びＫｂ｛ｓｉｎ（Φ）｝を得ることがゴールであった。不均一な光量の場合、本発明ではＡ’（ｃｏｓ（ωｔ＋Φ）＋１）に｛ｃｏｓ（ωｔ＋１８０°）＋１｝を乗じて、積分した後Ａ’（−０．５ｃｏｓ（Φ）＋１）を得る。これ以後この式は式｛３｝と示す。更に、本発明ではまた、Ｂ’｛ｃｏｓ（ωｔ＋Φ）＋１｝に｛ｃｏｓ（ωｔ）＋１｝を乗じて、Ｂ’（０．５ｃｏｓ（Φ）＋１）を得る。これ以後この式は式｛４｝と示す
【０１３４】
この時点で、本発明は（式｛１｝―式｛２｝―式｛３｝−式｛４｝）を実行して（Ａ’＋Ｂ’）｛ｃｏｓ（Φ）｝に至るための計算を実行する。同様に図１０に関して前述したように、同様な（Ａ’＋Ｂ’）｛ｓｉｎ（Φ）｝に至るために同じ演算を実行することができる。
したがって、（式｛１｝―式｛２｝）に基づいて一つの計算を実行し、（式｛３｝−式｛４｝）に基づいて同様の計算を実行してもよい。次に図８Ａ、図１０、図１４Ａ及び図１４Ｂを参照すると、概略的には以下のようにしてその手順を実行することができる。
（１）時間０＜ｔ＜ｔ１で、例えば０度と１８０度の変調では、検出器Ｄつまり２４０−（ｘ）に信号Ｓ１＝１＋ｃｏｓ（ωｔ）でバイアスをかけ、検出器２４０−（ｘ＋１）に信号Ｓ２＝１＋ｃｏｓ（ωｔ＋１８０°）でバイアスをかけ、
（２）それら二つの検出器から出力された信号を時間０＜ｔ＜ｔ１の間及び時間ｔ＝ｔ１の時において蓄積し、差動信号をデジタルまたはアナログの形で保存あるいはサンプルし、
（３）時間ｔ１＜ｔ＜ｔ２の間、検出器２４０−（ｘ）に信号Ｓ１＝１＋ｃｏｓ（ωｔ＋１８０°）でバイアスをかけ、検出器２４０−（ｘ＋１）に信号Ｓ２＝１＋ｃｏｓ（ωｔ）でバイアスをかけ、
（４）それら二つの検出器からの出力信号を蓄積し、時間ｔ＝ｔ２における蓄積の最後に、差動信号をデジタルまたはアナログの形で保存あるいはサンプルし、
（５）差分信号を、サンプルまたは保存されたアナログ及び／またはデジタル信号に対して計算する。
【０１３５】
図１４Ａ及び図１４Ｂは、それぞれアナログドメインとデジタルドメインにおける信号の引算のための典型的な技術を描写している。アナログまたはデジタルの「共有された」部品７００は、フォトダイオード画素検出器の外に設置でき、画素検出器の列―行アレイの中の行毎に一つの共有部品を用いるなどしてもよい。画素内のサンプル及びホールド（Ｓ／Ｈ）ユニットは、画素の列ごとに独立して繰り返される読み出し作業中の全ての時間において、両方の測定値をホールドする。代わりに、画素ブロック内で平均値算出を行ってもよいし、あるいはアナログ−デジタル変換（ＡＤＣ）を行うことすらできる。
図１４Ａにおいて、共有される回路構成７００はアナログ加算器７１０を含む。アナログ加算器７１０のアナログ出力は、アナログ−デジタルコンバーター７２０によってデジタル化される。図１４Ｂにおいて、共有回路構成は本質的には、その入力がネゲートされているデジタル加算器７３０である。加算器７３０からの出力はレジスター７４０へ入力される。レジスター７４０の出力は、加算器の入力にフィードバックされる。Ａ／Ｄコンバーター７２０は加算器にデジタル入力を提供する。図１４Ｂにおいて、平均値算出はデジタルドメインで行われ、アナログ−デジタル変換は画素の全ての列にわたって共有することができ、これは蓄積した電圧信号を変換のためにＡＤＣに送るまで信号をホールドしておくために、画素毎にＳ／Ｈが必要となることを意味する。したがって、図１４Ｂのデジタルドメインの実施例での信号の平均値算出には、図１４Ａのアナログドメインの実施例に比べ２倍の数のＡ／Ｄ変換が必要となる。時間分割マルチプレクシング及び空間的マルチプレクシングを含む、説明してきたその他様々な変調スキームにおいて、同様のアプローチを用いることができることを理解するものである。
【０１３６】
ここに記載する様々な実施例において、検出したイメージの輪郭内での個々の対象物の動きは、例えばマイクロプロセッサー２６０により得たデータのフレームとフレームの間の輪郭の動きを識別するなどして、計算することができる。輪郭内の画素検出器は全て、輪郭の速度である均一な速度を用いることができる。対象物は対象物の輪郭を用いて識別することができるので、チップ上のプロセッサー２６０を用いて当該対象物を追跡できる。そのような場合、必要に応じて、ＩＣチップ２１０は対象物２０がどこへ動いたとしても、対象物２０全体の位置の変化を表す一つの値（ＤＡＴＡ）をエクスポートできる。したがって、ＩＣチップからフレーム全体の画素をフレーム率でエクスポートする代わりに、当該対象物の位置の変化を表す一つのベクトルを送ってもよい。そうすることで結果としてＩＣチップの入力／出力が相当に削減され、チップ外で要求されるデータ処理量を大幅に削減することができる。チップ上のマイクロプロセッサー２６０は空間的トポロジー及び／または時間的トポロジーのシーケンス化を監督することもでき、また空間的マルチプレクシング及び／または時間的マルチプレクシングを最適化することもできることがわかる。
【０１３７】
その他のアプリケーションにおいてシステム２００は、例えばそのバーチャルキーがユーザーの指によって押されるキーボードといったような、バーチャル入力デバイスである対象物を認識するために利用されることもある。例えば、２０００年２月１１日に出願された同時系属米国出願シリアル番号０９／５０２，４９９、「バーチャル入力デバイスを用いてデータを入力するための方法及び装置」において、バーチャル入力デバイスを実施するために、三次元レンジファインディングＴＯＦシステムが用いられている。ユーザーの手あるいはスタイラスがバーチャルキーまたはそのようなデバイスの領域を「押す」と、ＴＯＦ測定を用いたシステムはどのキーまたはどの領域が「押された」のか決定する。その後システムは、例えばＰＤＡといった、バーチャル入力デバイスとユーザーとのインタラクションからの入力データを受け取る付随したデバイスに、キーストローク情報の等価物を出力することができる。本発明はそのようなアプリケーションに用いることもでき、その場合図３のＤＡＴＡは、マイクロプロセッサー２６０によってチップ上で処理されたキーストローク識別情報を表す。
【０１３８】
記述したとおり、おそらくはメモリー２７０と関連しているソフトウェアを実行するマイクロプロセッサー２６０は、ジェネレーター２２５の変調及び様々な電子回路２５０による検出をコントロールすることができる。必要に応じて、特別なイメージ処理ソフトウェアを用いて検出信号を処理してもよい。システム２００は好ましくはその電力消費量の低さゆえに電池で稼動するため、そのようなソフトウェアが十分なイメージ解像度が得られたと決定すると、アレイ２３０の様々な部分への動作電力を選択的に止めることができる。更に、適当な検出を確実にするに足る十分なフォトンエネルギーがアレイ２３０に達する場合は、発信器２２０が出力する信号の形を変えることができる。例えば、発信器エネルギーのピーク電力及び／またはデューティーサイクルを削減することができ、したがってシステム２００の電力消費全体を減らすことができる。光エネルギー出力信号の形を変えることによる設計トレードオフは、ｚ解像度の精度、ユーザーの安全及び発信器２２０の処理能力に関係する。
【０１３９】
まとめとして、発信器２２０からのピーク電力及び平均電力が好ましくは数十ｍＷの範囲であるという理由で、小さな電池でシステム全体を動かすことができるという効果がある。それにもかかわらず、距離解像度はｃｍの範囲内であり、信号／ノイズ比は許容できるものである。距離ｚに比例する情報を得ることに関して様々な実施例を記載してきたが、必要に応じて本発明をターゲット対象物の輝度のみに関係する情報を得るために実施してもよいことがわかる。そのようなアプリケーションにおいては、本発明は本質的に環境光の輝度情報に対する影響を大幅に減らすかなり良好なフィルターとして用いることができる。一方でｚ情報を得ることはエネルギー供給源を１００ＭＨｚを超える変調周波数で変調することに関係し、輝度情報を得るべく指示されたアプリケーションは、おそらく５０Ｋｈｚといったような相当に低い率でエネルギー供給源を変調する。
【０１４０】
ここに記述する請求項の範囲で定義する本発明の対象と本質を逸脱することなく、開示した実施例に修正や変化を加えてもよい。
【図面の簡単な説明】
【０１４１】
【図１】従来技術による一般的な明度に基づくレンジファインディングシステムを示すダイヤグラムである。
【図２Ａ】本発明によって発信された高周波成分を有する、発信された周期的な信号を図示しており、ここでは理想的な余弦波形である。
【図２Ｂ】本発明によって用いられるような、図２Ａで発信された信号の位相遅延を持つ帰還波形を図示している。
【図２Ｃ】図２Ｂで示されたものと類似の帰還波形を図示しているが、本発明で使用されるように、ＤＣオフセットレベルを有するものである。
【図２Ｄ】現在米国特許番号６，３２３，９４２Ｂ１と成って出願人の先行発明によるシステムによって放射されるような、放射光エネルギーのパルスタイプの周期的な波形を図示する。
【図２Ｅ】本発明による放射された光エネルギーの非パルスタイプ波形を図示する。
【図３】本発明の好ましい実施例のブロックダイヤグラムである。
【図４】出願人の原実用新案出願による二つの画素検出器とその関連エレクトロニクスとを示したブロックダイヤグラムである。
【図５Ａ】本発明による光検出器ダイオードの断面の斜視図であり、ＱＥ変調を実施するための空乏層幅の逆バイアス電圧変調を示している。
【図５Ｂ】本発明による光検出器ダイオードの断面の斜視図であり、ＱＥ変調を実施するための空乏層幅の逆バイアス電圧変調を示している。
【図６Ａ】本発明によるゲート電圧を変化させることにによってＱＥ変調できるフォトゲートフォトダイオードを図示している。
【図６Ｂ】本発明によるゲート電圧を変化させることにによってＱＥ変調できるフォトゲートフォトダイオードを図示している。
【図６Ｃ】本発明によるキャパシターに直列結合したＭＯＳタイプフォトダイオードと、図６Ａで示したようなフォトゲートフォトダイオードがほぼ等価であることを示している。
【図７Ａ】本発明による図５Ａと図５Ｂの典型的なフォトダイオードの等価回路と電圧バイアス構成であり、それぞれ、高めのＱＥ変調と低めのＱＥ変調を示している。
【図７Ｂ】本発明による図５Ａと図５Ｂの典型的なフォトダイオードの等価回路と電圧バイアス構成であり、それぞれ、高めのＱＥ変調と低めのＱＥ変調を示している。
【図７Ｃ】本発明による典型的な光検出器の構造の断面であり、フォトンのエネルギーが生み出した電荷が、如何にして電流を用いて回収されるかを図示している。
【図７Ｄ】本発明による典型的な光検出器の構造の断面であり、エピタキシャル層のドーパント濃度の連続変化または不連続変化を示し、フォトンのエネルギーが生み出した電荷を如何にして電流によって回収するかを図示している。
【図８Ａ】本発明による、１８０度位相をずらしてＱＥ変調された低リークゲート付きの二つの隣接したフォトダイオードの側面の断面図である。
【図８Ｂ】本発明による、１８０度位相をずらしてＱＥ変調された低リークゲート付きの二つの隣接したフォトダイオードの側面の断面図である。
【図８Ｃ】本発明によるフォトダイオードのアレイの平面図で、ＱＥ変調するためにフォトダイオードのバンクの変調ノードを交互に残りのフォトダイオードのバンクに、相補的に平行結合してある。
【図９Ａ】本発明のシングルエンドの可変位相遅延（ＶＰＤ）ＱＥ変調の実施例における二つの光検出器とそれらの関連エレクトロニクスを示したブロックダイヤグラムである。
【図９Ｂ】本発明による、フォトダイオードがＱＥ差動変調される４つの光検出器とそれらの関連エレクトロニクスとから成る、二つの画素を示したＶＰＤ実施例のブロックダイヤグラムである。
【図９Ｃ】本発明による、フォトダイオードがＱＥ差動変調される４つの光検出器とデジタル積分器を含むそれらの関連単純エレクトロニクスとから成る、二つの画素を示したＶＰＤ実施例のブロックダイヤグラムである。
【図１０】本発明による、フォトダイオードの選択可能な固定位相ＱＥ変調が用いられる４つのフォトダイオードとそれらの関連エレクトロニクスとから成る、二つの画素を示したブロックダイヤグラムである。
【図１１Ａ】本発明による、電力消費を削減するための、図１０の構成のフォトダイオードにおいてチューニングされたインダクターの使用を図示する。
【図１１Ｂ】本発明による、電力消費を削減するための、図１０の構成のフォトダイオードにおいてチューニングされたインダクターの使用を図示する。
【図１２Ａ】本発明による０度−９０度−１８０度−２７０度の空間的マルチプレクシングＱＥ変調の実施例の平面図であり、４つの隣接したフォトダイオードを示している。
【図１２Ｂ】本発明による、図１２Ａの空間的マルチプレクシングＱＥ変調の実施例のための異なる画素の間で光検出器を共有する様子を図示している。
【図１２Ｃ】本発明による、０度−１２０度−２４０度の空間的マルチプレクシングＱＥ変調の実施例を図示し、三つの光検出器を示す。
【図１３Ａ】本発明による光検出器出力の差動信号処理とシングルエンド信号処理を図示している。
【図１３Ｂ】本発明による光検出器出力の差動信号処理とシングルエンド信号処理を図示している。
【図１４Ａ】本発明による、不均一な照明と１／ｆノイズの光検出器に対する影響を減少させるための回路構成を図示している。
【図１４Ｂ】本発明による、不均一な照明と１／ｆノイズの光検出器に対する影響を減少させるための回路構成を図示している。[0001]
(Relationship with prior application)
Applicants' co-pending U.S. Provisional Patent Application Serial No. 60 / 254,873, filed December 11, 2000, claiming priority over "CMOS 3D multi-pixel sensor using photodiode quantum efficiency modulation." I have. Applicants refer to and incorporate the foregoing application. Applicants also refer to co-pending US utility model application serial number 09 / 876,373, filed June 6, 2001, entitled "CMOS Compatible 3D Image Sensing Using Reduced Peak Energy." , Take it here.
【Technical field】
[0002]
The present invention relates generally to range finder type image sensors, and more particularly, to an image sensor that can be implemented on a single integrated circuit using CMOS fabrication. More particularly, it relates to reducing the power consumption of systems utilizing such sensors.
[Background Art]
[0003]
Electronic circuits for measuring the distance of a circuit to an object are known in the art and can be illustrated in the system 10 of FIG. The generalized system of FIG. 1 uses the imaging circuitry within system 10 to approximate the distance (e.g., Z1, Z2) to an object 20 whose top portion appears farther than its bottom portion. , Z3). In general, the system 10 includes a light source 30 and collects the light output of the light source 30 via a lens 40 and directs it to an object to be imaged, here object 20. Other prior art systems do not provide the light source 30, but instead rely on the surrounding light that the object reflects, and do require ambient light.
[0004]
The surface portion of the object 20 reflects light from the light source 30 at various rates, and the lens 50 collects this light. This return light is incident on various detection elements 60, such as photodiodes in an array on an integrated circuit (IC) 70, for example. Element 60 provides an interpretation of the brightness of the object (eg, 10) in the scene and estimates distance data therefrom. In some applications, device 60 may be charge coupled (CCD) or an array of CMOS devices.
[0005]
In general, the CCD is set in the form of a so-called bucket brigade, in which the charge detected by the first CCD is connected in series to an adjacent CCD, and the output is then connected to a third CCD. This bucket relay setting usually prevents fabrication of the processing circuitry on the same IC containing the CCD array. In addition, CCDs provide serial readout rather than random readout. For example, if a CCD range finder system is used in a digital zoom lens application, the relevant data is provided by only a few CCDs in the array, but the relevant data must be accessed by the array. The whole must be read, and the process is time consuming. In still images and certain moving image applications, CCD-based systems may still be practical.
[0006]
As noted, the top of the object 20 is intentionally shown farther than the bottom. That is, the distance Z3> Z2> Z1. In a rangefinder autofocus camera environment, an approximate average distance from the camera (eg, from Z = 0) to the object 10 is obtained from the element 60 by considering relative brightness data obtained from the object. In some applications, such as range finding binoculars, the field of view is very narrow, and all focused objects are at substantially the same distance. However, lightness-based systems usually do not work. For example, in FIG. 1, the upper portion of the object 20 is shown darker than its lower portion, and is probably farther away than its lower portion. However, in the real world, more distant portions of the object may be shiny or shiny (ie, reflect more light energy) rather than closer but darker portions. In complex scenes, it is very difficult to estimate the focal length to an object or subject standing against the background using a change in brightness to distinguish the subject from the background. In various such applications, circuits 80, 90, and 100 in system 10 of FIG. 1 assist in this signal processing. As noted, if IC 70 includes CCD 60, other circuits, such as circuit 80, circuit 90, and circuit 100, are fabricated off-chip.
[0007]
Reflected brightness data unfortunately does not provide a truly accurate interpretation of distance because the reflectivity of the object is unknown. Thus, a shiny surface on a distant object surface may reflect as much (possibly more) light than a dull surface on a nearby object.
[0008]
Other focus systems are known in the art. Infrared (IR) autofocus systems used in cameras and binoculars provide a single distance that is the average or shortest distance to all targets in the field of view. In other camera autofocus systems, it is often necessary to mechanically focus the lens on the subject to measure the distance. These prior art focus systems cannot measure the distance of all objects in the field of view simultaneously, at best, by adjusting the lens to one object in the field of view.
[0009]
In general, the reproduction or estimation of the original brightness in a scene allows the human visual system to understand which objects were present in the scene and to estimate their relative position binocularly become. For a sad-binocular image, such as that shown on a normal television screen, the human brain uses past experience to determine the apparent size, distance, and shape of the object. Specialized computer programs can also estimate the distance of the object under special conditions.
[0010]
The binocular image allows the observer to more accurately determine the distance to the object. However, it is difficult for a computer program to determine the distance of an object from a binocular image. Often errors occur, and essential signal processing requires specialized hardware and computation. Binocular images are at best an indirect way of creating three-dimensional images suitable for direct computer use.
[0011]
Many applications require that a three-dimensional interpretation of the scene be obtained directly. However, in practice, it is difficult to accurately extract distance and velocity data along the line of sight from the brightness measurement. Nevertheless, many applications require accurate tracking of distance and speed. For example, welding robots on assembly lines must measure the exact distance and speed of the object to be welded. The required distance measurement may be erroneous due to changing lighting conditions and other disadvantages mentioned above. Systems capable of capturing three-dimensional images directly would benefit such applications.
[0012]
Although specialized three-dimensional imaging systems exist in the field of nuclear magnetic resonance and scanning lasers, such systems have significant equipment costs. Furthermore, these systems are severely disturbing and are dedicated to certain tasks, such as, for example, showing the internal organs.
[0013]
In other applications, the scanning laser range finding system raster scans the image using mirrors that deflect the laser beam in the x-axis and possibly also in the y-axis. The angle of curvature of each mirror is used to determine the coordinates of the image pixel to sample. In such a system, it is necessary to accurately detect the angle of each mirror in order to know which pixel is being viewed. Not surprisingly, the need to provide precision moving mechanical parts makes such range finding systems larger, more complex, and more costly. Furthermore, such systems sample each pixel serially, thus limiting the number of complete image frames that can be sampled per unit time. The term "pixel" shall refer to the output result produced by one or more detectors in an array of detectors.
[0014]
In summary, there is a need for a system that can perform direct three-dimensional imaging using CMOS fabrication technology, preferably on a single IC, with a reduced number of discrete components required and no moving components required. Optionally, the system can output data from the detector in a non-serial or random manner. More preferably, such a system may use inexpensive illuminants that require relatively low peak luminous output, but provide high sensitivity.
The present invention provides such a system.
SUMMARY OF THE INVENTION
[0015]
The present invention provides a system for measuring distance and velocity data in real time using time-of-flight (TOF) data rather than relying on brightness data. The system is CMOS compatible and provides such three-dimensional imaging without the need for moving parts. The system can be fabricated on a single IC that includes both a CMOS compatible pixel detector for detecting photon light energy and associated processing circuitry.
[0016]
In applicant's US Pat. No. 6,323,942 B1 (2001), “CMOS compatible three-dimensional image sensor IC”, a microprocessor on a CMOS compatible IC preferably continuously triggers an LED or laser light source, Points on the surface of the object to be imaged at least partially reflect the light output pulse. To obtain good image resolution, for example in cm, large but short pulses of light energy are required. For example, a peak pulse energy of 10 W, a pulse width of about 15 ns, and a repetition frequency of about 3 KHZ. The need for a peak power of 10 W, while the average energy of Applicants' previous system is only 1 mW, essentially dictates the use of relatively expensive laser diodes as the preferred energy source. Each pixel detector of the detector array has associated electronics that measure the time of flight from the emission of the light energy pulse to the detection of the return signal. The invention requires a high bandwidth pixel detector amplifier to emit high peak power narrow energy pulses.
[0017]
The referenced applicant's co-pending U.S. patent application discloses a system for transmitting a periodic signal having a high average frequency component with a small average power and a small peak power, such as tens of mW instead of many watts. For simplicity of analysis, a periodic signal of optical energy having an ideal sinusoidal waveform such as cos (ω · t) is assumed, but is also assumed here. Emitting such low peak power, high frequency component periodic signals allows the use of inexpensive light sources and simple narrow bandwidth pixel detectors. For an operating (radiant energy modulation) frequency of about 200 MHz, the bandwidth may be on the order of hundreds of KHz. Good resolution accuracy can also be obtained using low peak power light emitters, which means that the effective repetition frequency is higher than the output from the narrow pulse high peak power light emitter.
[0018]
In such a system, and in the present invention, the energy emitted from the light source is approximately S₁= K · cos (ω · t) where K is the amplitude coefficient, ω = 2πf, and the frequency f is probably 200 MHZ. Further, it is assumed that the distance separating the light energy light emitter and the target object is z. In order to express mathematically easy to understand, K = 1, but a coefficient of 1 or less or 1 or more may be used. The word "approximately" is used in recognition that it is difficult to generate a perfect sinusoidal waveform. Due to the time of flight required for the energy to traverse distance z, between the energy transmitted and the energy detected by the photodetectors in the array, S_Two= A · cos (ω · t + φ). The coefficient A represents the brightness of the detected reflected signal and can be measured separately using the same feedback signal received by the pixel detector.
[0019]
The phase shift φ due to the time of flight is:
Φ = 2 · ω · z / C = 2 · (2 · π · f) · z / C
Becomes Here, C is the speed of light 300,000 km / sec. Thus, the distance z from the energy emitter (and from the detector array) is determined as follows:
z = Φ · C / 2 · ω = ΦC / {2 · (2 · π · f)}
[0020]
The distance z is obtained by modulo 2πC / (2 · ω) = C / (2 · f). If necessary, f₁, F_Two, F_Three,. . . . Using several different modulation frequencies of light radiant energy, such as C / (2 · f₁), C / (2 · f_Two), C / (2 · f_Three) May be used as the modulo to measure z. Using a plurality of different modulation frequencies has the effect of reducing aliasing. If f₁, F_Two, F_ThreeIs an integer, the aliasing is LCM (f₁, F_Two, F_ThreeF)₁, F_Two, F_ThreeTo the least common multiple of f₁, F_Two, F_ThreeIf is not an integer, a₁/ D, a_Two/ D, a_ThreeIt is preferable to model as a fraction that can be expressed as / D. Where a_iIs an integer, and D = (GCD) is a₁, A_Two, A_ThreeRepresents the greatest common divisor of. From the above, the distance z is LCM (a₁, A_Two, A_Three) / D can be determined as modulo. This same analytical approach is also implemented in various embodiments of the invention described herein below.
[0021]
The phase Φ and the distance z are determined by the signal S detected by each pixel detector._Two= A · cos (ω · t + Φ) and the signal S for driving the light energy light emitting device₁= Cos (ω · t) (or homodyne reception). The result of mixing S₁・ S_TwoIs 0.5 · A · {cos (2 · ω · t + Φ) + cos (Φ)}, and the time average value is 0.5 · A · cos (Φ). If necessary, the amplitude of the detected feedback signal, that is, the luminance A, may be separately measured from the output of each pixel detector.
[0022]
To perform homodyne measurement of phase Φ and distance z, each pixel detector in the detector array is a low noise amplifier that amplifies the signal detected by the associated pixel detector, variable phase delay unit, mixer, low pass filter And dedicated electronics including an integrator. The mixer mixes the output of the low noise amplifier with the transmitted sine wave signal with a variable phase delay. The output of the mixer is processed by a low pass filter, integrated and fed back to the control phase shift of the variable phase delay unit. At equilibrium, the output of each integrator is the time of flight TOF between the associated pixel detector and a point on the target object that is at a distance z away, or the phase Ψ (関 連 = Φ ± π / 2) related to the distance z. ). The analog phase information is immediately digitized and the microprocessor on the chip can then calculate the value of z from each pixel detector to a point on the associated target object. If desired, the microprocessor can also calculate dz / dt (and / or dx / dt, dy / dt).
[0023]
However, in the co-pending provisional patent application referenced by the Applicant, the TOF, dz / dt (and / or dx / dt, dy / The detection sensitivity of such systems for measuring dt) and other information has been significantly increased. More specifically, there is a description of an improved mixer, in which mixing can be effected, for example, by using the gate of a MOS transistor or by changing the reverse bias of the photodetector (QE) of the photodetector in the detector array. ) As a result of modulation. The effects of such mixing include improved high frequency sensitivity, improved detection signal / noise ratio, smaller form factor, reduced power consumption, and reduced fabrication costs.
[0024]
In the present invention, several embodiments of QE modulation will be described. Conceptually, the embodiments can be divided into two general categories. The first category relates to the variable phase delay approach (which is not unlike that described in Applicant's co-pending application Serial No. 09 / 876,373), but with dedicated electronic mixers (eg, Gilbert cells, etc.). ) Are replaced by QE modulation. The second category involves mixing in a fixed phase using QE modulation and implementing various spatial and temporal multiplexing approaches. Both methods modulate the QE of a photodiode implemented in a MOS by changing the reverse bias of the photodiode or by applying a gate voltage to a photodiode with a photogate implemented in a MOS and then modifying it. effective. Either method may use single-ended or double-ended differential signal processing. Differential QE modulation has the effect of enabling faster QE modulation and provides a differential output that sufficiently eliminates common mode effects due to ambient light and dark current of the photodiode. In general, either method category is advantageous for storing photodetector signal charges on the photodiode capacitors. If necessary, the charge accumulated when the QE modulation is stopped may be checked periodically. Such a signal storage approach is preferred over methods that attempt to directly measure high frequency, small amplitude photocurrents.
[0025]
Using a variable phase delay (Category 1), the photocurrent from each of the QE-modulated pixel photodiodes (or photogate photodiodes) can be associated with a wide bandwidth, high frequency response or high closed loop gain without the need to exhibit To a relatively high input impedance amplifier. The output of the amplifier is applied directly to a low pass filter (LPF), which outputs an integrator. The output of the integrator is coupled to control a variable phase delay (VPD) that controls a QE modulated signal that drives a photodetector diode. The VPD is also driven by a signal from a periodic signal generator that controls the light energy emitter. There may or may not be a DC offset associated with the output signal from the pixel photodiode detector and the homodyne drive signal. Assuming no offset, the LPF output will be zero in steady state. Assuming that there is an appropriate DC offset, the LPF output will be at a minimum or maximum in steady state. This method may be implemented single-ended, but is preferably implemented double-ended using a complementary approach, where the positive and negative signals are obtained from QE-modulated and out-of-phase photodiodes.
[0026]
When using a fixed phase delay (category 2), each photodetector is QE modulated using a fixed homodyne signal. In category 2, different groups or banks of photodiode detectors can be defined in the array in a delocalized manner. For example, the first bank of the photodiode detector is QE modulated with a fixed 0 degree phase shift, the second bank is QE modulated with a fixed 90 degree phase shift, and the third bank is a fixed 180 degree phase shift. And the fourth bank can be QE modulated with a fixed 270 degree phase shift. Within each pixel there may be a photodiode detector corresponding to each of the four banks. The phase information and the luminance information of the target object can be measured by examining the output value of each bank in one pixel. This fixed-delay approach simplifies the electronic circuitry associated with each pixel, reduces power consumption and also reduces the required IC chip area, for temporal and spatial multiplexing. Various technologies are also applicable.
[0027]
In various embodiments of the present invention, the measurement information on the chip may be a random output, rather than a sequential order, to facilitate on-chip signal processing of object tracking and other information requiring a three-dimensional image. It can be carried out. The overall system is small, robust, requires relatively few off-chip discrete components, and exhibits improved detection signal characteristics. The circuit configuration on the chip can thus use the TOF data to immediately measure the distances and velocities of all points on the object or the distances and velocities of all objects in one scene at the same time.
[0028]
Other features and advantages of the present invention are set forth in the following detailed description of the preferred embodiments and illustrated with the accompanying drawings.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0029]
The present invention advantageously transmits and detects periodic light energy with high frequency components and relies on a phase shift between the transmitted waveform and the detected waveform to identify the time of flight and thus the distance data z. Although a periodic waveform of the pulse type is used, the present invention describes the emission and detection of a sinusoidal waveform because the waveform is easy to analyze mathematically. However, it is understood that a periodic pulse waveform having high frequency components including an imperfect sinusoidal waveform can be mathematically represented as a group of complete sinusoidal waveforms of various coefficients and frequency multiples. The transmission and detection of such waveforms has the advantage that relatively inexpensive light emitters with low peak power can be utilized and that amplifiers with relatively narrow bandwidth can be used. This is the applicant's reference US Pat. No. 6,323,942 B1 (2001) which describes that a series of pulses with a narrow pulse width and a low duty cycle are emitted by a very high peak power emitter. ).
[0030]
FIG. 2A depicts the high frequency component of a typical and ideal periodic light energy signal emitted in the present invention, here represented as cos (ωt). The period T of the waveform is represented by T = 2 · π / ω. The signal is depicted as being AC-coupled in the sense that there is no offset of any magnitude. As described below, the operating frequency of the transmitted signal is preferably in the range of several hundred MHz, and the average and peak transmission powers are relatively weak, for example, less than about 50 mW.
[0031]
A portion of the transmitted energy reaches the target object and at least a portion is reflected and detected in the direction of the device of the invention. FIG. 2B depicts the returned version of the transmitted waveform, represented by A · cos (ωt + φ). Where A is the attenuation coefficient and φ is the phase shift resulting from the time-of-flight (TOF) of the energy it takes to traverse the distance from the device of the present invention to the target object. Knowing the TOF is equivalent to knowing the distance z from a point on the target object, such as the target 20, to the receiving pixel detector in the array of detectors in the system according to the invention.
[0032]
FIG. 2C is similar to that shown in FIG. 2B, except that a DC offset is present in the present invention. The waveform shown in FIG. 2B can be represented as 1 + A · cos (ωt + φ). As described below, a DC offset is desirable in some embodiments of biasing the photodiode, but does not significantly affect the underlying mathematical calculations. Again, assume that the period T of the waveform in FIG. 2C is T = 2π / ω, as shown in FIGS. 2A and 2B.
[0033]
2D and 2E are useful in understanding the concept of duty cycle as used herein. For a pulse type periodic signal as shown in FIG. 2D, the duty cycle d is the time ratio T_H/ T, where T_HIs the signal at a given threshold V_HAt higher times, T is the period of the signal. Threshold level V_HIs typically the average of the maximum and minimum signal levels. In the context of the present invention, T_HThe above definition is similar, except that represents the time during which photodiode detector 240-X is modulated, and T turns on and off the modulation of light emitter 220 as shown in FIG. 2E. Or repetition period. In the context of the present invention, by appropriately adjusting the peak power emission of the light energy emitter 220 to keep the average power constant, T_H/ T can be reduced. As noted, if the light energy emitted by the light emitters 220 is periodic, they need not be square waves or like square waves. A waveform as shown in FIG. 2E can be emitted and detected. However, it is assumed that the above definition of the duty cycle is also applicable to the waveform as shown in FIG. 2E.
[0034]
Identifying the repetition rate of the transmitted periodic light energy signal involves consideration of the transmitted waveform and duty cycle, the desired accuracy in resolving the distance z, and the peak power requirements of the light energy emitter. With a trade-off. For example, assuming that the detected phase shift information is converted from analog to digital by 8 bits, a periodic transmission signal whose high-frequency component is several hundred MHz such as 200 MHz has a resolution of a distance z of about cm and a resolution of about z. Match. In practice, assuming a continuous sinusoidal waveform, the peak power required from a light energy emitter is about 10 mW. Of course, if the duty cycle of the transmitted waveform is reduced to 1%, the peak power of the optical energy emitter must be increased to about 500 mW. The ability to use low peak power light emitters is understood to be one of the factors that indicate the difference between the present invention and applicant's previously referenced US Pat. No. 6,323,942B1 (2001). it can.
[0035]
Next, the processing and use of the phase shift information of the present invention will be described with reference to FIG. FIG. 3 is a block diagram depicting the present invention 200, a three-dimensional imaging system that is preferably fabricated on one IC 210. System 200 does not require moving parts and may have relatively few components off-chip. FIG. 3 is an excerpt from the applicant's concurrent utility utility model application as a reference, and although the circuit details of the various elements of FIG. 3 are different, they can be used to explain the present invention. It is possible. In summary, in various embodiments of the present invention, each photodetector 240-x in array 230 preferably has associated electronics 250-x that performs QE modulation within the photodetector. Whether the technique of variable phase delay or fixed phase delay is used, in the present invention, the distance z is calculated by z = φ · C / 2 · ω = φ · C / {2 · (2 · π · f)}. To determine.
[0036]
System 200 includes a light emitter, such as a low peak power laser diode or a low peak power LED, capable of outputting about 50 mW of peak power when driven at a repetition rate of, for example, several hundred MHz, and in a preferred embodiment, The duty cycle is close to 100% as defined in At present, useful emitters are made from materials such as AlGaAs, whose bandgap energy is significantly different from silicon, which is the preferred material for CMOS IC 210. Therefore, although illuminator 220 is depicted in FIG. 3 as being off-chip of 210, the phantom line surrounding illuminator 220 is to place illuminator 220, made of a CMOS compatible material, on IC 210 instead. Indicates that it may be manufactured.
[0037]
Light source 220 is preferably a low peak power LED or laser that emits energy at a wavelength of 800 nm, although other wavelengths are possible. At wavelengths below 800 nm, the emitted visible light begins to become, making laser fabrication more difficult. At wavelengths above 900 nm, the efficiency of CMOS / silicon photodiodes drops rapidly. In any case, 1100 nm is the highest wavelength for devices fabricated on a silicon substrate, such as IC 210. The system 200 operates with or without ambient light by using radiation having a particular wavelength and filtering incident light of a different wavelength. The ability of the system 200 to function in the dark is useful for security and military type imaging applications. An off-chip mounted lens 290 preferably filters the incident light onto the sensor array 230 such that the pixel detector 240x receives light from one particular point in the field of view (eg, a point on the surface of the object). Focus on
[0038]
Depending on the nature of the light wave transmission, light can be collected on the sensor array using a normal lens 290. If the lens (290 ') needs to collect the light energy transmitted from the light emitter 220, then using a mirror type arrangement, a single lens is used for 290 and 290'. A typical LED or laser diode light emitter 220 will likely have a shunt capacitance on the order of 100 pF. Therefore, when driving light emitter 220, a small inductance (perhaps on the order of a few nH) is placed in parallel with the capacitance so that the combined inductance-capacitance resonates at the light emitter's periodic frequency, typically several hundred MHz. It is advantageous. Instead, the inductance (again a few nH) can be coupled in series with the emitter and its parasitic capacitance. Such an inductance can be made using a bonding wire to the light emitter, if desired.
[0039]
On top of the CMOS compatible IC 210 is an oscillator 225 driver, an array 230 (possibly consisting of 100 × 100 (or more) pixel detectors 240 and 100 × 100 (or more) related electronics processing circuits 250), micro- A processor or microcontroller unit 260, a memory 270 (preferably including random access memory or RAM and a read only memory or ROM), eg, an 8-bit A / A of phase information φ detected by various pixel detectors in array 230. It is preferable to fabricate various computation and input / output (I / O) circuitry 280 that includes an analog-to-digital (A / D) conversion unit that provides D-to-D conversion. Depending on the implementation, as part of each electronic processing circuit 250, an (A / D) converter function is provided on a single chip, or a dedicated A / D converter is installed. Preferably, the I / O circuit 280 can also provide a signal that controls the frequency of the oscillator 225 that drives the energy emitter 220.
[0040]
The DATA output lines shown in FIG. 3 represent some or all of the information calculated by the present invention using the phase shift information from the various image detectors 240 in the array 230. Preferably, microprocessor 260 consults successive frames stored in RAM 270 to identify objects in the viewing scene. The microprocessor 260 can then calculate the distance z and calculate the velocities dz / dt, dx / dt, dy / dt of the object. In addition, circuitry on the chip associated with the microprocessor 260 may provide a desired image, such as a user's finger if the application using the system 200 detects a user interface with a virtual input device. Can be programmed to recognize shapes. In such an application, the data provided by microprocessor 260 is converted to keystroke information. Part or all of this information (shown as DATA in FIG. 3) can be transferred from the IC to an external computer for further processing, for example, via a universal serial bus. If the microprocessor 260 has sufficient computing power, additional on-chip processing may be performed. It should also be noted that if desired, the output from the array of CMOS compatible detectors 240 can be accessed in a random manner, thereby outputting the TOF data in any order.
[0041]
As another function, the microprocessor 260 operating through the interface circuit 280 is, for example, f₁The driver 225 is periodically oscillated at a desired frequency such as = 200 MHz and a desired duty cycle. In response to a signal from the oscillator driver 225, a laser diode or LED₁Emit light energy at the desired frequency, duty cycle, such as = 200 MHz. Again, sine or cosine waveforms are assumed for ease of mathematical description, but periodic waveforms with similar duty cycles, repetition rates, and peak power, such as square waves, may be used. Good. As described, the present invention has the effect that the average power and peak power are quite low, for example 10 mW. As a result, the cost of the LED emitter 220 is increased while the high peak power laser diode of the applicant's earlier invention described in US Pat. No. 6,323,942 B1 (2001) costs many dollars. It is about 30 cents.
[0042]
Ideally, the periodic high frequency component is S₁= Cos (ωt) is condensed by the lens 290 ′ on the target object 20 at a distance z. At least a portion of the light energy falling on target 20 is reflected toward system 200 and detected by one or more pixel detectors 240 in array 230. Because of the distance z separating the system 200, and more specifically any pixel detector 240 in the array 230, and the target point on the object 20, the phase is proportional to the time of flight or the distance z separating the detected light energy. Delay by an amount φ. Incident light energy detected by different pixel detectors 240 may have different phases φ because different flight times or distances z are involved. In various figures, including FIG. 3, the incident light energy is S_Two= A · cos (ωt + φ), for example, is actually the AC component of the feedback signal including the DC component. However, the DC component is relatively unimportant and is not shown.
[0043]
As discussed below, in conjunction with the microprocessor 260 and software mounted on the memory 270 executed by the microprocessor, examining and determining the relative phase delay is accomplished by the electronics 250 associated with each pixel detector 240 in the array 230. Function. In applications where the system 200 images a data entry mechanism, such as a virtual keyboard, the microprocessor 260 may determine which of several virtual keys, or which areas of the virtual device, for example, a virtual keyboard, are used by the user. Process sufficient detection data to identify whether a finger or stylus has been touched. Therefore, the DATA output from system 200 contains various information. Such information may include information on distance z, velocity dz / dt of object 20 (and / or dx / dt, dy / dt), and objects such as identification of virtual keys touched by a user's hand or stylus. Includes, but is not limited to, object identification.
[0044]
The preferred IC 210 also includes a microprocessor or microcontroller unit 260, a memory 270 (preferably including random access memory or RAM and a read-only memory or ROM) and various computing, input / output (I / O) circuits 280. . For example, the output from I / O circuit 280 can control the frequency of oscillator 225 driving energy emitter 220. As another function, the controller unit 260 can calculate the distance z to the target and the speed (dz / dt, dy / dt, dx / dt) of the target. The DATA output lines shown in FIG. 3 represent some or all of such information calculated by the present invention using the phase shift information from the various pixel detectors 240.
[0045]
The two-dimensional array of pixel sensing detectors 230 is preferably fabricated using standard commercial silicon technology. This has the effect that not only the circuits 225, 260, 270, 280, but also a single IC 210 including various pixel detectors 240 and their associated circuits 250, preferably including the energy light emitter 220, can be manufactured. Of course, if such circuits and components could be fabricated on the same IC as the array of pixel detectors, the signal path would be shorter and processing and delay times could be reduced. In FIG. 3, system 200 may include condenser lenses 290 and / or 290 ′, but those lenses are fabricated outside of IC chip 210.
[0046]
Each pixel detector 240 outputs a current equal to the parallel combination of a current source, an ideal diode, a shunt impedance, and a noise current source, and proportional to the amount of incident photon light energy falling upon it. Preferably, CMOS fabrication is used to realize an array of CMOS pixel diodes or photogate detector elements. Typical photodiode fabrication techniques include well diffusion, substrate diffusion, well-to-substrate junction and photogate structures. Well-to-substrate photodiodes are more sensitive to infrared (IR) and exhibit less capacitance, and are therefore preferred over substrate-diffused photodiodes.
[0047]
As noted, FIG. 4 illustrates an embodiment described in applicant's co-pending utility model application. FIG. 4 shows a portion of the IC 210 and a portion of the array 230, depicting pixel detectors 240-1 through 240-x and typical diode-related electronics 250'-1 through 250'-x. In various figures including FIG. 4, the lens 290 is not shown for clarity. FIG. 4 is not directly related to the present invention, but is included to evaluate the benefits provided by the present invention and to be better understood. In the description that follows, FIGS. 9A-9C are for QE modulation techniques in Category 1 VPD, FIGS. 10A-10C are for Category 2 fixed phase modulation techniques, and the remaining figures are Fig. 3 illustrates features of various technologies.
[0048]
Although the actual array includes hundreds or thousands of pixel detectors and associated electronics, FIG. 4 shows only two pixel detectors 240 and two associated electronics 250 'for clarity. Is illustrated. As described, instead of implementing the omnibus A / D function on the IC chip 210 as needed, a dedicated A / D converter is installed as a part of each of the electronic circuits 250'-1 to 250'-x. be able to.
[0049]
Next, detection of incident light energy by the pixel detector 240-1 will be considered. 220 is an ideal high frequency component for low power LED or laser diode 220₁Assuming to emit light radiation with = cos (ω · t), a portion of such radiation reflected at a point on the surface of the target 20 (at a distance z) is S_Two= A · cos (ω · t + φ). Upon receiving the incident radiation, the pixel detector 240-1 outputs a signal amplified by the low noise amplifier 300. Typical amplifier 300 has a closed loop gain on the order of 12 dB.
[0050]
As noted, the periodic emission from the light source 220 is preferably sinusoidal or sinusoidal with a high frequency component of several hundred MHz. Despite this high optical modulation frequency, all frequencies of interest are close to this modulation frequency, so that amplifier 300 has a bandwidth of 100 KHz or so, perhaps as low as tens of KHz. Placing hundreds or thousands of low noise, relatively low bandwidth amplifiers 300 on the IC 210 is easier than installing a wide bandwidth amplifier that transmits narrow pulses as in applicant's original invention, It is understood that this is an economic initiative. Thus, in FIG. 4, the array 230 functions with relatively small bandwidth amplifiers 300, the output of each amplifier being directly coupled to the first input of the associated mixer 310. The second input of the associated mixer 310 is a signal having a frequency similar to the frequency at the first input. If each amplifier 300 and the associated mixer 310 are realized as a single unit, the whole unit has a bandwidth of about several tens KHz, and a high frequency response of about several tens KHz is sufficient.
[0051]
As shown in FIG. 4, when the detection signal and the transmission signal are compared, there is a phase shift φ related to the TOF and the distance z. Each circuit 250'-x couples the output of low noise amplifier 300 associated with a first input of mixer 310. 4, the mixer 310 can be realized as a Gilbert cell, a multiplier, or the like.
Essentially each mixer 310 has an amplified detection output signal S from the associated pixel detector 240._TwoTo the generator 225 signal S₁And homodyne detection. Assuming that the emitted light energy has an ideal high-frequency component expressed as a sine wave or cosine wave, the product S₁・ S_TwoIs 0.5 · A · {cos (2 · ω · t + φ) + cos (φ)}, and the average value is 0.5 · A · cos (φ). The amplitude of the detected feedback signal, that is, the luminance A, may be measured separately from each pixel detector output as needed. In practice, the 8-bit analog to digital resolution of A · cos (φ) results in a resolution of about one centimeter in z measurements.
[0052]
Each mixer 310 has a second input coupled to the output of a variable phase delay (VPD) unit 320. VPD unit 320 can be implemented in various ways. For example, a method of using a series of series-coupled inverters in which the operating power supply voltage changes so as to increase or decrease the signal transmission speed of each inverter. The first input to each VPD unit 320 is made by a signal generator 225 and S₁= Cos (ωt), which is the signal coefficient added or subtracted or given at most. Assume that VPD 320 adds a variable time delay に to the cos (ωt) signal generated by generator 225. Then, the mixer 310 mixes the amplified cos (ω · t + φ) signal output by the amplifier 300 and the cos (ω · t + ψ) signal output by the VPD 320. Then, mixer 310 outputs a signal including 0.5 · A · {cos (φ−ψ) + cos (2 · ω · t + φ + ψ)}. The output of mixer 310 is coupled to the input of low pass filter 340. The filter 340 preferably has a bandwidth of about 100 Hz to several KHz. Thus, the output from filter 340 is a low frequency signal proportional to 0.5 · A · cos (φ−ψ). This low frequency signal is now input to the integrator 330. The output of the integrator 330 is φφ for the pixel detector 240-x._xIt is.
[0053]
The VDP 320 is driven by two signals that have a phase difference (φ−ψ) but have the same modulation frequency as that emitted by the light emitter 220. It should be noted that if the phase shift is ψ = φ ± 90 degrees, the output polarity of integrator 330 changes. In the structure shown in FIG. 4, the phase shift ψ associated with the feedback signal detected by each pixel detector 240-x._x= Φ_x± 90 degrees is obtained from the pixel detector integrator 330-x.
The phase shift φ due to the time of flight can be obtained as follows.
φ = 2 · ω · z / C = 2 · (2 · π · f) · z / C
Here, C is the speed of light of 300,000 km / sec. Thus, the distance z from the energy emitter 220 to the pixel detector 240-x in the array 230 is determined as follows.
z = φ · C / 2 · ω = φ C / {2 · (2 · π · f)}
[0054]
The distance z can be found by modulo 2πC / (2 · ω) = C / (2 · f). f₁, F_Two, F_ThreeBy using several different modulation frequencies, such as..., The distance z is C / (2 · f₁), C / (2 · f_Two), C / (2 · f_Three) Etc. can be determined as modulo, and aliasing can be avoided or at least reduced. For example, microprocessor 260 may provide generator 225 with, for example, f₁, F_Two, F_ThreeTo output a sine drive signal of a selected frequency. For example, i = f as an integer₁, F_Two, F_ThreeIs an integer, the aliasing is LCM (f₁, F_Two, F_ThreeF)₁, F_Two, F_ThreeTo the least common multiple of f₁, F_Two, F_ThreeIf is not an integer, a₁/ D, a_Two/ D, a_ThreeIt is preferably modeled as a fraction that can be expressed as / D. Where a_iIs an integer i, and D = GCD (a₁, A_Two, A_Three) Where GCD is the greatest common divisor. Therefore, the distance z is LCM (a₁, A_Two, A_Three) / D is determined as modulo.
[0055]
The two input signals to each mixer 310 are, for example, depending on the circuit implementation,_x= Φ_x+90 degrees or ψ_x= Φ_xAt a selected phase of -90 degrees, the closed-loop feedback circuit configuration of FIG. 4 reaches a stable point when 90 degrees out of phase with each other. In an appropriate 90 degree out-of-phase steady state, the output signal from each low pass filter 340 is ideally zero. For example, if the output signal of the low pass filter 340 signal is positive, the output signal from the associated integrator 330 will add an additional phase shift that drives the output of the low pass filter back to a zero state.
[0056]
When the feedback system is in a steady state, the pixel detector electronics 250'-x in the array 230 is_X= Φ_X± 90 degrees,₁, Ψ_Two, Ψ_Three... ψ_NVarious phase angles are provided. Preferably, the phase angle is converted from an analog format to a digital format, such as by using an analog / digital conversion function associated with electronics 280. If desired, electronics 250'-x can mix signals having a constant phase value for all pixels. Microprocessor 260 may execute software for calculating distance z (and / or other information) using the mathematical relationships described above, such as software mounted on or capable of being mounted on memory 270. effective. If desired, the macro processor 260 can improve the performance of the system by reducing or eliminating aliasing errors, for example, by using f₁, F_Two, F_ThreeThe generator 225 may be instructed to output a discontinuous frequency such as.
[0057]
Still referring to FIG. 4, various implementations can be used to create the phase angle ψ = φ ± 90 degrees. Assume that a given application requires images to be acquired at a frame rate of 30 frames / second. For such applications, it is sufficient to sample the phase angle 間 に while the A / D conversion is taking place, at a sample rate of about 30 ms. This sample rate is equivalent to the relatively low bandwidth inherently present in electronics 250'-x, as shown in FIG. In practice, the system 200 can provide a resolution of a distance z of about 1 cm, and in practical applications the range of z is on the order of 100 m or less.
[0058]
Although the distance z is determined from the TOF information obtained from the phase delay ψ, it is noted that the relative brightness of the signal returning from the target object 20 can also provide useful information. The amplitude coefficient “A” on the feedback signal indicates the relative luminance. Although the feedback structure of FIG. 4 seeks to achieve a minimum output signal from the low-pass filter 340, with minor changes the maximum low-pass filter output signal may be used instead, and the output signal will exhibit a luminance coefficient A. . Such a structure can be implemented using a signal that is 90 degrees out of phase with the output from VPD 320 to modulate another copy of the output of low noise amplifier 300. The average amplitude of the signal thus modulated is proportional to the factor A in the incoming detected feedback signal.
[0059]
Having completed the applicant's description of the prior invention, various embodiments of the present invention will now be described with particular reference to FIGS. 9A-9C (Category 1) and FIG. 10 (Category 2). The present invention does not use a dedicated electronics mixer (as used in the prior invention as shown here in FIG. 4), but instead uses quantum efficiency (QE) modulation techniques. These QE modulation techniques have the effect of accumulating the detected signal charge and are preferred over methods that attempt to directly measure high frequency, small amplitude signals generated by the detected photocurrent.
[0060]
Before classifying the QE modulator topography according to the present invention, it is useful to describe the behavior of the MOS diode and how the MOS diode quantum efficiency varies with bias potential and / or photogate potential. . FIGS. 5A and 5B depict a portion of an IC 210, here depicting a single photodiode detector 240, shown as fabricated on a p-doped substrate 410. FIG. The photodiode 240 is shown with a depletion layer 420 having a width of W and having an n region 430 with a lower doping concentration and an n region 440 with a higher doping concentration thereon. (Here, the terms depletion layer and depletion region are used synonymously.)⁺Doped region 440 serves as the photodiode anode, and the connection to it is shown as 450. P formed in the upper region of the substrate 520⁺The doped region 460 serves as the cathode of the photodiode, and the connection to it is shown as 470. A depletion region 480 having a depletion width of W exists between the − region 430 and the p substrate region 410. (It is understood that the doping polarity described herein may be reversed, and that the structure may be fabricated on an n-substrate material instead of on the described p-substrate material.)
[0061]
The width W of the depletion region 480 changes or modulates when the reverse bias voltage applied between the photodiode anode 450 and the photodiode cathode 470 changes. This bias potential is represented as Vr1 in FIG. 5A and Vr2 in FIG. 5B. 5A and 5B, Vr2> Vr1, and as a result, the width W of the depletion region increases.
For example, photons representing incident light energy, such as energy reflected from target 20, fall onto photodiodes 240-x in array 230. See, for example, FIG. 3 in the figures. Photons can create electron-hole pairs in the depletion and quasi-neutral regions of these photodiodes. These electron-hole pairs have a relatively long lifetime before recombination. Photons that create hole pairs in the depletion region have the effect of producing much higher photocurrent per photon than photons that create electron-hole pairs in the quasi-neutral region of the substrate. This is because the electron-hole pairs generated in the depletion region are quickly swept by the electric field and contribute significantly to the resulting photocurrent. In contrast, electron-hole pairs generated in the quasi-neutral region are likely to remain there for some time and recombine without substantial contribution to photocurrent. Increasing the width W of the depletion layer provides a wider area where hole pairs are generated and quickly swept to contribute to the photocurrent, thereby increasing the quantum efficiency of the photodiode.
[0062]
Those skilled in the relevant art will appreciate that the width W of the depletion layer may be expressed as:
W = [2ε · (ψ₀+ V_R-V_B)]^0.5｛[QN_A・ (1 + N_A/ N_D)]｝^-0.5+ [QN_D・ (1 + N_D/ N_A)]^-0.5｝
Where (V_R-V_B) Is the reverse bias of the photodiode 240, N_AAnd N_dIs the doping concentration of the n region and the q region of the diode, respectively.₀= V_TIn (N_AN_D/ N_i ^Two) Where V_T= KT / q = 26mV, n = 1.5 · 10^Tencm^-3It is.
[0063]
From the above equations, it is recognized that the quantum depletion width W of the quantum efficiency (QE) modulation according to the present invention can be modulated by various reverse biases applied between the anode and the cathode of the photodiode. This allows the quantum efficiency (QE) of the photodiode to be varied, resulting in improved detection sensitivity of the entire system. Table 1 shows typical data for individual PIN photodiodes exposed to a fixed level of light and is a measurement of the photodiode current as the reverse bias voltage applied to the photodiode is varied. Data for photodiodes implemented in CMOS may of course differ from the data in Table 1.
[0064]
[Table 1]

[0065]
It should be noted in Table 1 that for a typical PIN photodiode, the magnitude of the photodiode current (eg, photocurrent) changes by a factor of four as the reverse bias varies between 0.5 VDC and 2 VDC. That is.
Modulation of the photodiode reverse bias is a mechanism that changes the QE to improve the detection sensitivity of the photodiodes in the array. However, a more efficient implementation of QE modulation detection uses a photogate structure. In such an embodiment, the photogate is preferably implemented as a photogate MOS photodiode that modulates QE by changing the potential applied to the gate of the photodiode structure.
[0066]
Next, referring to FIGS. 6A and 6B, it is assumed that the substrate 410 is a p-type material, and the source and drain regions of the MOS type of S and D are of the n-doped material. However, as described above, the doping polarities may of course be reversed. It is also assumed that the source S and the drain D are connected to each other as shown in FIG. 6A. When the voltage S1 (t) applied to the gate G is high, again assuming that it is an n-channel device, the device 240-x is depleted and then inverted. In this configuration, it is assumed that the gate G and the underlying thin oxide (TOX) are substantially transparent to the incident photon energy S2 (t). This condition is satisfied when the polysilicon material used to form the gate G is not polycide.
[0067]
Referring to FIGS. 6A and 6B, the gate structure G is substantially transparent to the incident light energy indicated by S2 (t). The structure shown in FIG. 6A includes both source and drain regions denoted by S and D. In contrast, the structure of FIG. 6B has no drain structure to improve quantum efficiency modulation. Because the source and drain regions are tied together in FIG. 6A, device 240x can operate without the drain region as shown in FIG. 6B. In order to realize the IC 70 as described, it is preferable to use a MOS manufacturing process. Thereby, the present invention is implemented. In many MOS fabrication processes, the drain region of device 240x may be omitted, as shown in FIG. 6B. Effectively omitting the drain region increases the relative change in device collection efficiency between the low and high sensitivity operating states. As described below, a change in the bias of the optically transparent gate potential changes the shape of the depletion layer. A layer 480 substantially limited to only the source region is present when the gate bias is low, and its depletion region 480 'extends substantially below the gate region when the gate bias is high.
[0068]
For example, photocharges such as EH1 and EH2 are generated on the substrate below the gate region in response to photon energy S2 (t). If there is no channel in the gate region, most of the photocharge will be lost and only the source and drain regions will collect the photocharge. However, if the region under the gate is inverted and / or depleted, the generated photocharge is captured and swept to the source and drain regions. This effectively increases the efficiency of the photon collection structure 240-x. The increase in collection efficiency is roughly proportional to the ratio between the area under the gate G and the area of the source and drain regions, ie, the area of S and D. If the photogate diode 240x is appropriately sized, this ratio is 10: 1 or more. This efficiency increases suddenly, and increases abruptly when the voltage S1 (t) exceeds the threshold. Undoped channel portion and substrate doping 10¹⁷In the above case, the threshold value is about 0 V, and the photogate photodetector 240x is in the low sensitivity mode with a gate voltage of about -0.1 V, and is in the high sensitivity mode when the gate voltage is about +0.1. It will be appreciated that relatively small changes in the gate voltage will result in significant changes in device sensitivity.
[0069]
FIG. 6C shows a photogate photodiode 240X and a capacitor C₀Shows that the circuits between the more conventional MOS photodiodes D1 coupled to are approximately equal. Of course, the voltage level of the MOS photodiode may be different from the voltage level of the photogate photodiode. Thus, the terms photodiode, photodetector, pixel detector 240x are understood to include photogate photodiodes as described above in connection with FIGS. 6A-6C. Similarly, it will be appreciated that various circuits and analyzes of QE modulation with respect to the conventional MOS photogate described herein can be used for the photogate photodiode 240x as described above. For simplicity of illustration, most of the embodiments herein have been illustrated with reference to a MOS type photodiode detector rather than a photogate detector, but either type of detector can be used.
[0070]
7A and 7B depict an equivalent circuit of the photodiode detector 240, indicated by D1, and show the parasitic shunt capacitor C₁including. FIG. 7A shows that the modulation signal is a capacitor C₀May be referred to as an illustration of the high side QE modulation coupled through. In FIG. 7B, the modulation signal is coupled via capacitor C1, and the figure illustrates low side QE modulation. In FIG. 7B, the capacitor C₀Is usually located in an amplifier (not shown) in the electronics associated with the pixel detector D1.
[0071]
In the right part of FIG. 7A, an excitation source V2 is coupled to a light emitter L1, such as a laser diode or LED, to cause photoemission from L1 that is proportional to V2. In the left part of FIG. 7A, photodiode D1 receives such photon energy from L1, and photocurrent I1 is induced accordingly. Since photodiode D1 (eg, photodiode 240-x in array 230) is reverse biased, it can be seen that bias source V1 includes a voltage offset. Alternatively, before detecting the incident signal, the node N_dCan be precharged during initialization. 7A and 7B, V2 is similar to the periodic waveform generator 225, and L1 is similar to the light energy light emitter 220. (See figures in other figures)
[0072]
7A and 7B, the bias voltage of the photodiode, and thus the QE of the photodiode, is modulated by the bias source V1. In FIG. 7A, the reverse bias voltage is Vd1 = V1 · (C₀) / (C₀+ C₁) Where C₀Are connected in series between V1 and D1. From Table 1 and FIGS. 5A and 5B, a large amplitude V1 represents a large reverse bias that can advantageously increase the width W of the photodiode depletion layer region. This in turn increases the sensitivity of the photodiode D1 (or 240) so that the photodiode current I1 corresponds to the photon energy incident from L1 (or the photon energy reflected and incident from the target object 20). To increase.
[0073]
Excitation source V_TwoAnd bias source V₁Operate at the same frequency (ω), the current source I₁Gives a total charge of V₁And V_TwoAre in phase, for example, V₁(Ωt) and V_TwoIt is maximum when the amplitude of (ωt) is simultaneously high. This is because the sensitivity of the photodiode is maximized when the incident photon energy has the maximum intensity, that is, when the luminance is highest. Conversely, if the D1 sensitivity is minimized at the maximum incident photon energy, then I₁The amount of charge per cycle supplied by the
[0074]
Photodiode node N after a given number of cycles_dCharge ΔQ on_NChanges during the cycle₁Is the amount of charge supplied by Capacitor C₀And C₁N before and after is discharged by the photocurrent I1_dUpper voltage ΔV_DΔQ by measuring the difference between_NIs determined. Usually, the photocurrent I₁Is very small and difficult to measure directly. However, as a result of the accumulation effect after many cycles, the measurable voltage change ΔV_Dbecome.
[0075]
When each of the anode terminal and the cathode terminal of the photodiode is set to an arbitrary voltage shown in FIG.₀Can be at ground potential as shown in FIG. 7B. As described below with respect to some embodiments, generally node N_dIs coupled to the amplifier input, and a shunt capacitor is also coupled to the same input node. The effect of the configuration of FIG. 7B is that the parasitic shunt capacitance of the amplifier is reduced by C₁It can be used as By doing so, the number of components can be reduced and the area required to implement the invention on an IC chip can be reduced. Furthermore, this configuration has low noise and is not sensitive to variations in production technology.
[0076]
As the photon energy falls on the photodiode, there is a time delay between the arrival of the incident photon energy and the collection of the emitted electrons. This time delay greatly increases as the wavelength of the light energy increases, and is about several ns for a waveform of about 850 nm. Thus, the light energy emitter 225 is selected to emit short wavelengths so that the photodiodes 240-x in the array 230 respond quickly and can be QE modulated at high frequencies ω.
[0077]
Of course, it is desirable that the photodiodes used in various embodiments of the present invention not only be detected effectively, but also quickly. Utilizing light emitters 220 that can transmit light energy at relatively short wavelengths promotes detector efficiency, but fabricating such light emitters is more expensive than light emitters providing long wavelength energy. . For example, a relatively inexpensive laser diode can be used as the light emitter 220 for transmitting energy having a wavelength of about 850 nm. Although such light emitters are relatively inexpensive, long wavelengths penetrate deep into the structure of the pixel detector, eg, 7 μm, resulting in loss of quantum efficiency and slower response.
[0078]
Referring now to the exemplary CMOS structure of FIG. 7, most of the incident photon energy reflected by the target object 20 creates electron-hole pairs (EHx) deep within the epitaxial region 410 of the pixel detector 240. Since electron-hole pairs (EHx ') are also created in a region 412 deeper in the structure, the quantum efficiency decreases. Unfortunately, many of these deeply emitted electrons cannot reach the surface area of the photodetector, and because the electrons are collected at the surface area, these electrons cannot contribute to the photodiode detection signal current . In addition, the use of longer wavelengths causes an undesirable time delay before signal current occurs. This delay, typically a few ns, occurs because the diffusion effect prevails over the drift effect when collecting electrons that are emitted deep enough to contribute to the photodiode current.
[0079]
If the electrons associated with EHx and EHx 'were somehow moved closer to the surface area of the photodiode structure, the drift effect would dominate the diffusion effect and the sensed current could be seen earlier. The very low doping of the epitaxial layer 410 allows electrons created deep in the epitaxial layer to be moved using a relatively small current.
[0080]
Referring to FIG. 7C, the epitaxial layer 410 is typically about 7 μm thick and has a dopant concentration of about N_A= 10¹⁵/ Cm^ThreeAnd the underlying high dopant concentration substrate region 412 is approximately a few hundred μm thick and has a dopant concentration of about N_A= 10¹⁸/ Cm^ThreeIt is. Structures as shown in FIG. 7C are readily available from many vendors.
[0081]
In FIG. 7C, n-well region 430 and P ++ region 460 have been created in epitaxial layer 410. N + region 440 is formed together with n well region 430. As described below, a collection lead 445 and a collection lead 447 are provided to move the deeply released charge, preferably upward and collected by the n-well 430. (The described dopant polarity can be reversed, for example, using an n-type substrate instead, and the dopant level and structure thickness can be varied.)
[0082]
Next, a method will be described in which the charge related to EHx is moved upward so that once the charge approaches the n-well, the n-well 430 eventually collects the charge by the diffusion effect. The goal is to stimulate deeply emitted electrons slowly enough to be collected by the lead 445 associated with the n-well, rather than the lead 447 associated with the P ++ region. Although the method described here will successfully collect electrons associated with the electron-hole pair EHx, it will not be able to reach further into the structure to collect electrons associated with EHx '. Such movement is indicated by the dashed line in FIG. 7C. Recovering the EHx 'electrons also requires an unacceptably large current due to the high dopant levels associated with layer 412.
[0083]
Next, consider the magnitude of the current required to move the electrons according to the present invention. When viewed from above, the structure shown in FIG. 7C is a square having a size of 1 μm × 1 μm, and its area is A_sSuppose that Assuming that the thickness of the region 410 is 7 μm, the resulting volume is 7 × 10^-12/ Cm^ThreeBecomes The required charge that must be removed from such a volume is 10¹⁵X10^-8X7X10^-FourX1.6X10^-19A_s= 1.12 × 10^-15A_sWhere 1.6 × 10^-19Is the charge associated with one electron. If the goal is to remove such charges within, for example, 1 ns, the required current is about 1.12 μA. Although this current is not very small, it is indeed feasible to provide this current for each square micron meter associated with the photodetector array 230. In an array of size 1 mm × 1 mm modulated at 200 MHz, the total current would be about 200 mA to move the electrons 7 μm upwards. It can be seen that it is not possible to attempt to recover electrons from EHx 'using this method because of the high dopant levels associated with the substrate region 412.
[0084]
Thus, one approach to moving deeply emitted electrons upward from layer 410 for collection is to sweep substantially all holes down about 7 μm. Since the mobilities of the electrons and holes are so close, the electrons thus freed can be moved at least 7 microns above and reach sufficiently close to the n-well region 430 to favor the effect of the depletion region there. Can be received. The effect of the depletion region facilitates such deeply emitted electrons being collected at the top of the structure.
[0085]
By passing a pulse current, preferably below the n-well region 430, holes can be moved down by about 7 μm while electrons are moved up by the same distance due to their high mobility. As noted, once electrons come close enough to be affected by the electric field created by the depletion region in the n-well region, the likelihood of electron collection is significantly increased.
[0086]
In one embodiment, an ohmic contact 460 is formed on the substrate outside the n-well region 430 and used to facilitate bringing electrons near the depletion layer. This approach works well because the dopant concentration in the epitaxial layer 410 is relatively low and the magnitude of the charge required to sweep the electrons upward by about 7 μm is acceptable. There is no reason to recommend moving electrons upward by more than 7 μm in the high dopant concentration region above the structure 210 because there are too many holes. If desired, an AC coupling approach using a capacitor structure instead of an ohmic contact may be used instead.
[0087]
Next, detector structures using doping gradients in various types of epitaxial regions will be described. The structure shown in FIG. 7D is similar to the structure of FIG. 7C, but the depth of structure 240 'of FIG. 7D may be greater than about 7 μm. In FIG. 7D, the epitaxial layer 410 'preferably defines different dopant concentrations ranging from a relatively high concentration (p1) to a lower concentration (p3). The transition of the dopant concentration may be continuous or stepwise, for example, by forming a separate epitaxial layer of each associated dopant concentration.
[0088]
Those skilled in the art know that there is an electric field associated with the boundaries of each doping region. In a structure 240 'where the dopant concentration decreases as approaching the top surface of the structure, the direction of the electric field can be defined downward. Electrons in the EHx 'near the upper surface of region 412 move upward through the interface between region 412 and p1 due to the electric field at that interface. Since these electrons do not move down through that interface, they are very likely to be able to be induced to move quickly (due to diffusion effects) near the next epitaxial doping interface (p1, p2), and Are then induced by the electric field present at p1, p2 to re-enter the next dopant region, here p2. Once in the (lower dopant concentration) epitaxial region (here, p2), the electrons also move downward through the p1, p2 interface and move upward and are affected by the next dopant region (p3). The likelihood is very high and from there he is guided further into the area.
[0089]
Of course, the same phenomena as described above also work initially for electrons from EHx pairs that are initially open somewhere in the epitaxial region. It is also understood that two or less or four or more dopant concentrations can be defined within the epitaxial region.
[0090]
Thus, the drift current phenomena associated with the electric field in the various interface or border regions, such as p1, p2, p3 comprising the epitaxial layers, are p1, p2. . . To move quickly upward through each of the interface areas.
[0091]
As described above, the step-doped epitaxial region functions as a "staging" or "holding" region for electrons that have reached close enough to enter the region. However, if a continuous dopant gradient is defined throughout epitaxial region 410 ', there is no "holding time" within one region (since there is no separate epitaxial region by nature). The effect is that electrons freed for collection by n-well 430 are more quickly captured and swept upward.
[0092]
The following sections describe differential QE modulation and the effects it can bring. Again, QE modulation, including differential QE modulation, may be implemented using a conventional MOS-type photodiode detector and / or photogate detector.
[0093]
Referring again to FIGS. 5A and 5B, the incident photon energy causes an electron-hole pair EH to be generated at an arbitrary position “X” in the substrate of the illustrated photodiode.₁It is assumed that an electron-hole pair containing is generated. In FIG. 5A, the position X is a quasi-neutral region, not a depletion region (a portion indicated by hatching). In the present invention, at this point the modulation reduces QE and EH₁It is desirable to discard as many electron-hole pairs as possible, including If the QE of the photodiode is then increased immediately, for example by increasing the reverse bias of the photodiode, the width W of the depletion region can be increased to cover position X (see FIG. 5B).
[0094]
In FIG. 5B, EH₁Still remains at the position X in the depletion region at this time, and EH₁This time contributes significantly to the photocurrent. On the one hand, the increased depletion region in FIG. 5B can increase photon detection sensitivity. However, electron-hole pairs generated when photons enter when QE is low (FIG. 5A) can contribute to the total photocurrent when QE is high (FIG. 5B). For example, the contribution will be made at another time. An undesired result is that the QE cannot be changed effectively at high modulation rates. However, it is preferable that only the photons entering at the time of high QE always contribute to the photocurrent.
[0095]
It is desirable to achieve faster photodiode QE modulation by eliminating the time delay effects described above. It is further desirable to eliminate photodiode output signal common mode effects caused by ambient light and so-called photodiode dark current. Overall, it can be seen that QE modulation essentially modulates the size of the collection target for electrons within the photodiode structure. Without other collection targets, even small targets, most electrons will eventually be collected due to their relatively long lifetime. Thus, with respect to the number of electrons, QE modulation is significantly less than changes in target area.
[0096]
Various elements of the present invention that use differential QE modulation techniques to increase or decrease the size of the acquisition target while increasing or decreasing the size of the alternative adjacent target will now be described. The effect is to provide a large alternative target for electrons and holes while reducing the target area of a given photodiode. This allows the electrons to be collected at an alternate target long before their lifespan expires, out of circulation to the reduced target, and enhances QE.
[0097]
The present invention recognizes that during QE modulation, some regions in the photodiode, typically regions with lower dopant concentrations at the junction, will alternate between quasi-neutral and depleted regions. I have. If these regions can be minimized, the photodiode can be QE modulated more clearly. Such enhanced QE modulation is facilitated using a differential modulation approach, as described later herein with respect to FIGS. 8A and 8B. FIGS. 8A and 8B show "snapshots" of two adjacent photodiodes, indicated by A and B, 180 degrees apart. Preferably, in array 230, adjacent photodiodes A and B are sufficiently close to each other to have a small surface area, and each will always receive substantially the same amount of incident photon energy. The photodiode group A or bank A and the photodiode group B or bank B are arranged such that their respective QEs are 180 degrees out of phase, that is, when the QE of the photodiode B is at a minimum, the QE of the photodiode A reaches a maximum, Bias modulation is performed so that the reverse is also true.
[0098]
It should be noted in FIGS. 8A and 8B that the quasi-neutral region 500 between adjacent photodiodes A and B is always quite small, so that the number of electron-hole pairs created there is also quite small. This is advantageous because the QE modulation is reduced in the quasi-neutral region near the depletion region. In FIG. 8B, when the QE of the photodiode B increases, the electron-hole pair in the quasi-neutral region 500 between the photodiodes A and B changes the photocurrent for the adjacent photodiode B. It may be swept in. Since the quasi-neutral region 500 is small, the deterioration of QE modulation due to the region 500 is small, which is advantageous.
[0099]
8A and 8B, it is assumed that at some point photodiodes A and B are reverse biased at 0 VDC and 2 VDC, respectively. For example, if A and B were fabricated by a suitable CMOS 0.25 μm process, photodiode B would typically convert up to 30% more photon energy than photodiode A. The QE of photodiode A increases rapidly from 0 VDC to a slight increase in reverse bias, while photodiode B, reverse biased at about 1 VDC, is hardly affected by small changes in reverse bias. Therefore, it is advantageous for the maximum QE modulation that the reverse bias of the photodiode A is as small as possible. This bias method corresponds to a MOS transistor in which a channel is formed in the quasi-neutral region 500 between the photodiode A and the photodiode B. There is no MOS transistor gate structure, but it can be assumed that it exists for certain voltage values in the sub-threshold region under the high source-drain voltage.
[0100]
During the time frame shown in FIG. 8A, photodiode A is weakly reverse biased. As a result, there can be a significant amount of leakage current between photodiode A and photodiode B, which is the MOS transistor with photodiode A as the source and photodiode B as the drain shown in FIGS. 8A and 8B. Matches leak below threshold. Such a leakage current forms a polysilicon gate G 'which is assumed to be transparent to the light energy of interest, at least in the region between the photodiodes A and B, and under the gate G' This can be reduced by forming a thin oxide (TOX) insulating layer. When such a gate is fabricated, subthreshold leakage current can be controlled by controlling the gate voltage. For undoped channels, a gate voltage of about -0.4 VDC is usually sufficient to significantly reduce leakage current.
[0101]
FIG. 8C is a plan view of a portion of the array 230, depicting columns and rows of photodiodes, referred to herein as photodiodes A or photodiodes B. As indicated by the different diagonal lines, the QE modulation nodes of all photodiodes A are coupled in parallel, and the QE modulation nodes of all photodiodes B are coupled in parallel. Essentially, FIG. 8C can be viewed as a plan view of one large photodiode A and one large photodiode B. In the differential QE modulation mode of the present invention, all photodiodes A can modulate by 180 degrees from the signal that modulates all photodiodes B. Since there is only a very small quasi-neutral region between photodiodes A and B, the respective QEs of both A and B classes of photodiodes can be clearly modulated. Significant blurring of QE modulation at high modulation frequencies is substantially only in the quasi-neutral region at the bottom region of each photodiode.
[0102]
Having outlined the concepts underlying QE modulation, various configurations of systems using such techniques will now be described. In the first category of embodiments, the present invention uses a variable phase delay (VPD) technique in which a dedicated electronic mixer (eg, Gilbert cell) is replaced with QE modulation. The system topography depicting the first category is shown mainly in FIGS. 9A to 9C. In a second category of embodiments, the fixed phase delays are mixed using QE modulation to implement various spatial and temporal multiplexing approaches. The system topography depicting the second category is shown mainly in FIG.
[0103]
Advantageously, in both categories of embodiments, by changing the reverse bias of the photodiode or by attaching a photogate to the MOS-mounted photodiode and changing the gate voltage, the photodiode implemented in the MOS can be used. QE can be modulated. Either method may use single-ended or double-ended differential signal processing. Differential QE modulation has the effect of enabling rapid QE modulation and provides a differential output that significantly eliminates common mode effects due to ambient light and dark current of the photodiode. Either method category is advantageous because it stores the photodetector signal charge on the photodiode capacitor. In each category, the charge may be periodically checked when the QE modulation is stopped. Such a signal accumulation approach is preferable to a method of directly measuring the photocurrent of a high frequency small signal.
[0104]
9A through 9C are described for a variable phase delay (VPD) QE modulation embodiment of the present invention, referred to as a category 1 embodiment. Using VPD technology, the photocurrent from each of the QE-modulated pixel photodiodes (or photogate photodiodes) is transferred to an associated relatively high input without having to exhibit wide bandwidth, high frequency or high closed loop gain. Coupled as input to impedance amplifier. The output of the amplifier is fed directly to a low pass filter (LPF). The output of this low pass filter drives the integrator. The output of the integrator is coupled to control the variable phase delay (VPD). Variable phase delay (VPD) controls the QE modulation signal that drives the photodetector diode. The VPD is also driven by a signal from a periodic signal generator that controls a light energy transmitter. There may or may not be a DC offset associated with the output signal from the pixel photodiode detector and a DC offset associated with the homodyne drive signal. Assuming no offset, the LPF output will be zero in steady state. Assuming that there is an appropriate offset, the LPF output will be at a minimum or maximum in steady state. This method may be implemented single-ended, but is preferably implemented double-ended, using a complementary approach in which the positive and negative signals are out of phase and QE modulated photodiodes.
[0105]
For clarity of illustration, the biasing of the photodiode (or photogate) detector is not shown. Those skilled in the art will recognize that biasing can be accomplished by simply coupling the registers from the reference source to the various photodetectors for single-ended QE modulation and differential mode QE modulation. In the case of differential QE modulation, it is further preferred to add feedback to the common mode biasing reference to ensure that the sum of the two compared signals remains within the desired dynamic range.
[0106]
Next, an embodiment of the variable phase delay (VPD) of the category 1 will be described with reference to FIG. 9A. FIG. 9A depicts a portion of the IC 210, the array 230, the pixel detectors 240-1 through 240-x, and the associated typical electronics 250'-1 through 250'-x of each diode. Elements in FIG. 9A that have the same reference numbers as the elements in the preceding figures may be, but need not be, the same. For example, the variable phase delay unit 320 or filter 340 of FIG. 9A may be, but need not be, identical to the components of FIG. Each of the pixel diodes 250-x in FIG. 9A has an associated electronic unit designated 250-x (corresponding to the designation 250'-x in FIG. 4). Again, for simplicity of illustration, only the electronics associated with two of the thousands of pixel diodes 240 are depicted. Again, if necessary, provide dedicated A / D converters as part of each of electronics 250'-1 to 250'-x, rather than implementing omnibus A / D functions on IC chip 210. You can also.
[0107]
Comparing the configuration of FIG. 4 with the configuration shown in FIG. 9A, FIG. 4 provides a dedicated electronics mixer 310 for each pixel diode, while electronics 250-x of FIG. , No explicit mixer is included. Instead, according to the present invention, the configuration of FIG. 9A uses QE modulation to derive the phase difference between the transmitted signal and the received signal, among other data, to derive the TOF. FIG. 9A and the other QE modulation embodiments described herein have the advantage that no mixer is used and there is no need for a sufficiently amplified signal that the mixer needs as input for mixing.
[0108]
In FIG. 9A, the detected waveform signal photodiode 240-x in the array 230 includes a DC offset of the form .1 + A.cos (.omega.t + .PHI.) As shown in FIG. 2C. Preferably, the minimum value of the signal 1 + A.cos (.omega.t + .phi.) Is 0 VDC, and the maximum value is probably +3 VDC. As described above with respect to FIG. 2C, changing the notation to include an arbitrary DC offset does not affect the mathematical analysis involved.
[0109]
In FIG. 9A, for each electronics system 250-x in array 230, the output signal from variable phase delay (VPD) 320 is₀And the node N of the associated photodiode 240-x_dIs bound to C₀The combined modulated signal is S_Two= A · cos (ωt + Φ), the phase of the detected light energy matches the input impedance R of the amplifier 400._iThe signal generated at both ends has the maximum value. R_iIs large, for example,> 1 GΩ, and R_iThe amplitude of the signal voltage across it increases slowly over many periods of the periodic signal cos (ωt). The feedback path in each electronics 250-x includes a low-pass filter 340 and an integrator 330, and the resulting feedback, e.g._iThe amplitude of the input of amplifier 400, such as the voltage across it, is minimized. The signal S received by the photodiode 240-x_Two= A · cos (ωt + Φ) is 180 degrees out of phase with modulation signal cos (ωt + Ψ), the amplitude at both ends of Ri is minimized. As shown in FIG. 5, for each electronics 250-x, the resulting phase value Ψ_xCan be read out as a voltage signal at the output terminal of each integrator 330.
[0110]
Thus, electronics 250-x of FIG. 9A works somewhat similar to electronics 250'-x of FIG. 4, examining the incident periodic photon energy and measuring the distance z from the system to the target object 20. Create a phase output signal that can be In FIG. 9A, no high frequency response is required for amplifier 400 because the amplifier outputs are each passed directly to the input of low pass filter 340. Further, the voltage signal across each amplifier input impedance Ri can increase over many periodic cycles. Therefore, the finally detected signal is relatively large, for example, preferably several mV or several tens mV. As a result, unlike the amplifier 300 of FIG. 4, in the embodiment of FIG. 9A, the amplifier 400 need not be a very high gain, very low noise, high frequency device. As a result, the amplifier 400 can be implemented within a small area of the IC chip, consumes less current, but provides better distance z resolution than the complex configuration of FIG.
[0111]
Turning now to FIG. 9B, another category 1 VPD embodiment is depicted. In FIG. 9B, the outputs from VPD 320 that are complementary 180 degrees out of phase are used, one of which is₀To the associated photodiode D, ie, 240-x. The complementary VPD output is connected to a similar capacitor C_TenAnd a similar photodiode D ′ here. Thus, photodiode 240-x is QE modulated by one VPD output, while diode D 'is QE modulated 180 degrees out of phase by another VPD output. In essence, the QE modulation nodes of the various photodiodes are coupled in parallel such that groups of photodiodes are QE modulated in parallel. The photodiodes 240-x and D 'each discharge and generate a common mode signal that requires the reverse bias on each photodiode to be periodically refreshed to a predetermined level. Further, the configuration of FIG. 9B uses a differential input to the amplifier 400 'and the effect of ambient light falling on the photodiodes 240-x of the array 230 is minimal. Another advantage provided by the configuration of FIG. 9B is a differential configuration that allows the photodiode 240'-x and associated photodiode D 'to be rapidly QE modulated to the set of diodes without significant delay. It can be done with. Thus, for each photodiode 240-x in array 230, a photodiode D 'having substantially the same characteristics is coupled to the inverting input (in the configuration of FIG. 9B) of each amplifier 400'.
[0112]
Turning now to FIG. 9C, an embodiment of QE modulation of a VPD using a differential comparator and a digital integrator is shown. Again, the QE modulation nodes for the various photodiodes are coupled in parallel, such that the photodiodes are QE modulated in parallel. 9C, the amplifier 400 'in FIG. 9B and the generally analog integrator 330 are replaced by a differential comparator 510 and a digital integrator 520. At regular intervals, microprocessor 260 (see FIG. 3) instructs energy transmitter 220 to stop emitting or shut down, and both outputs of VPD 320 are set to a constant voltage. Each differential comparator 510 then compares the differential signal shown at its input node. Each digital integrator 520 then reads the result of this comparison (C), increasing its digital output by a small amount if C = 1 and decreasing its digital output by a small amount if C = 0. If necessary, the comparator 510 may be shut down during QE modulation of a photodiode that does not require a voltage comparison.
[0113]
With continuing reference to FIG. 9C, consider the following example. In the steady state, the output from digital comparator 510 toggles between "0" and "1". The output from digital integrator 520 toggles between two values, eg, 5 and 6. VPD unit 320 creates a delay while toggling between 5 and 6 (in this embodiment). Photodetector D is subsequently modulated with a signal that toggles between cos (ωt + 5) and cos (ωt + 6). In the above example, if the values 5 and 6 are substantially close, then at equilibrium the photodiode D appears to be modulated at cos (ωt + 5.5).
[0114]
Next, a so-called category 2 embodiment using fixed phase QE modulation will be described mainly with reference to FIG. Category 2 embodiments use a fixed phase signal to QE modulate each photodetector. Different groups or banks of photodiode detectors can be defined in a non-localized manner within the array. For example, the first bank of the photodiode detector is QE modulated with a fixed 0 degree phase shift, the second bank is QE modulated with a fixed 90 degree phase shift, and the third bank is a fixed 180 degree phase shift. And the fourth bank is QE-modulated with a fixed 270 degree phase shift. Within each pixel is a photodiode detector corresponding to all four banks. The phase information and the luminance information of the target object can be determined by examining the output value of each bank in the pixel. This fixed-delay approach simplifies the electronic circuitry associated with each pixel, reduces power consumption, can also reduce the required IC chip area, and provides various multiplexing for temporal and spatial multiplexing. Enable technology.
[0115]
Various aspects of Category 2 QE modulation are described, including single-ended or differential spatial and temporal multiplexing, and non-one-to-one mapping of actual photodiodes to pixels. Furthermore, category 2 embodiments use inductors to reduce or compensate for losses due to capacitor capacitance, thereby reducing power consumption.
[0116]
Category 2 fixed phase delay QE modulation will now be described with reference to FIG. The effect of this configuration is that the electronics 250-x can be simplified to some extent, and luminance measurement can be output as in the other QE modulation embodiments. In FIG. 10, the photodiodes 240-x and D 'of the array 230 are modulated by the fixed phase modulator 530. The output of the fixed phase modulator 530 can be selected to have a phase of 0 degrees or a phase of 90 degrees by the microcontroller 260 (see FIG. 3), for example. Preferably, software that can be included in memory 270 corrects for differences in (fixed) modulation phase between pixel photodiodes due to path delay to the pixels. The modulated signal and its complement may be provided to array 230, and the complementary signal includes a 180 degree delay unit 540 coupled to a single output of fixed phase delay unit 530 within each pixel electronics 250-x. It may be played back by the user.
[0117]
In FIG. 10, the system 200 (see FIG. 3) is allowed to operate for a number of cycles (of core frequency ω), after which the laser or other photon energy transmitter 220 is shut down. When the oscillator 220 is shut down, the diode modulated voltage signal and its complement are set to a constant amplitude. The following description uses the so-called “cos (ωt) +1” analysis. Assuming that the QE modulation is somewhat linear, multiplying the photodiode (D) signal (B {cos (ωt + Φ) +1}) by the modulation signal (cos (ωt) +1) and then integrating results in B (0. The result of multiplying the photodiode (D ′) signal (B {cos (ωt + Φ) +1} by the modulation signal (cos (ωt + 180 °) +1)) is B (−0 .0). 5 ｛cos (Φ)｝ + 1) When the two equations are subtracted, the signal V at the output of the differential amplifier 400 ′ is obtained.₀= B · cos (Φ). Here, B is a luminance coefficient. Therefore, a new measurement is performed at a modulation phase shifted by 90 degrees from the original modulation signal. Then the result at the output of the differential amplifier 400 'is V₉₀= B · sin (Ψ). With measurements at 0 and 90 degrees, the angle Ψ can be obtained as follows:
tan (Ψ) = V₉₀/ V₀
[0118]
The brightness B is obtained from the following equation.
B = √ (V₀ ^Two+ V₉₀ ^Two)
Advantageously, and in contrast to the embodiments described hereinabove, the configuration of FIG. 10 does not require an integrator in each electronics 240-x, thereby simplifying system design.
A further advantage of the configuration of FIG. 10 is that matched inductors can be used to reduce system operating power. For example, assume that photodiodes 240-x are each about 15 μm square and have a capacitance (C) of about 10FF. Also, assume that f is about 1 GHz, with modulation frequency f = ω / (2π), and that system 200 is operating from a 3 VDC power supply, such as a battery power supply. The power consumption of each photodiode pixel is CV^Two・ It is approximately 8 μW in proportion to f. In an array 230 of 200 pixels × 200 pixels, the power consumption is about 0.32 W.
[0119]
Since power consumption is directly proportional to capacity C, power consumption can be reduced by reducing effective capacity. The desired result is that the tuning inductor (L_p) In parallel with the capacitance of the photodiode. However, if the tuned inductor L_pIs installed in each pixel as shown in FIG. 11, to resonate at 1 GHz, each inductor L_pIs about 100 μH, which is too large to be mounted in each pixel photodiode.
[0120]
In contrast to the embodiment of QE modulation by VPD of FIG. 9C, the embodiment of FIG. 10 has a common for each of the banks of photodiodes coupled in parallel in a manner similar to photodiode A and photodiode B of FIG. 8C. All the pixels are modulated using the modulation signal. The effect of this configuration is that all photodiodes in the bank of photodiodes coupled in parallel are driven in parallel. The various parasitic shunt capacitances for each of the photodiodes coupled in parallel are themselves coupled in parallel. As a result, one (or relatively few) inductors may be coupled to all photodiodes in one parallel bank to achieve resonance at the desired frequency. In the above example of a 200 × 200 array, 100 μH is required for each pixel photodiode. For example, when a 200 × 200 photodiode is coupled in parallel, L_pIs reduced to 100 μH / (200 · 200) or 0.25 nH, which is a very realistic inductance magnitude for fabrication. Furthermore, the size of the array may in fact be larger than 200 × 200, in which case the number of photodiodes will increase, the overall capacitance of the photodiodes will increase, and one inductor L required to resonate at the desired QE modulation frequency._pIs further reduced. Such an inductance can be fabricated on the IC chip 210 or mounted off-chip. In the above example, one inductor L at the level of approximately 0.25 nH in FIG._pDetunes the effective capacitance of the 200 × 200 photodiodes coupled in parallel, but FIG. 11A requires each photodiode to have a separate inductor with significant inductance.
[0121]
The fixed phase delay (category 2) configuration of FIG. 10 is intended as a typical example. In practice, various so-called spatial and temporal multiplexing techniques are used. For different groups or banks of photodetectors in the array, which can be modulated with a fixed phase as a group, different spatial topologies (of which the differential QE variation shown in FIG. 8C is an example) can be used. The spatial topology increases the signal collection efficiency because the photon energy increases the collection efficiency of the charge released into the photodetector. Temporal topology refers to modulating the same bank of photodetectors at different times with different fixed modulation phases. Some spatial topologies allow spatial multiplexing, which can include sharing a photodetector across multiple pixels, for example, reusing the same photodetector for different pixels. Temporal topologies allow multiplexing in time, which can facilitate pipelining. The present invention can implement any or all of these aspects utilizing various pixel bank topologies and various time-phase topologies.
[0122]
The spatial multiplexing technique implemented in FIG. 8D is shown in the exemplary example of FIG. 10, where the photodetector topology is that of FIG. 8C, with a 0 ° -180 °, 90 ° -270 ° temporal topology. Is used. In addition, the exemplary configuration of FIG. 10 can be used to support spatial multiplexing of photodiodes as well as temporal multiplexing and pipelining.
[0123]
Next, another spatial topology embodiment of the present invention will be described with reference to FIG. 12A. The spatial multiplexing embodiment of FIG. 12A operates in principle similar to the 0-180-90-270 degree time division topology embodiment of FIG. However, the difference is that the four photodetectors d shown in the plan view of FIG.₁That is, 240- (x), d_TwoThat is, 240− (x + 1), d_ThreeThat is, 240− (x + 2) and d_FourThat is, using 240− (x + 3), the measured value is calculated as time τ₁At the same time.
As before, ΔV_d= [ΔV_d1(Τ₁) −ΔV_d2(Τ₁)] / [ΔV_d3(Τ₁) −ΔV_d4(Τ₁)] = Tan (Φ).
[0124]
Turning now to FIG. 12B, it can be seen that the photodetectors can be shared by different pixels throughout the photodetector array. In FIG. 12B, the four photodetectors shown in FIG. 12A are drawn with diagonal lines so that their dual roles can be understood. For example, photodiodes d1-d2-d3-d4 can be said to form a cluster of four photodetectors within one pixel of array 230. However, photodiodes d1 and d3 are also part of a photodiode cluster consisting of photodiodes d1, d5, d3, d6, and so on. It should be noted that individual photodiodes can play multiple roles in different clusters, but require additional IC chip portions to implement the spatially multiplexed embodiment as shown. And thus promote efficient use of IC chip area. If necessary, some of the spatial measurements can be reused to obtain additional data measurements.
[0125]
While this may not be the most efficient embodiment, an embodiment of time division QE modulation of 0-120-240 degrees may be implemented if desired. In such an embodiment, the time frame τ from the array of pixels shown in FIG.₁And time frame τ_TwoUse the two measurements made for Time τ₁, The photodetector bank consisting of photodetector A (bank A) operates with a sinusoidal waveform of S1 (t) at 0 degree phase, while the adjacent photodetector B Are shifted in phase by 120 degrees due to S2 (t). Time τ_TwoFor the second measurement at, the phase of bank B is shifted by 120 degrees and the phase of bank A is shifted by 240 degrees. The sum of the phase differences is determined as follows:
[0126]
ΔV_d= [ΔV_d2(Τ_Two) −ΔV_d1(Τ_Two)] / ΔV_d1(Τ₁)
Where time τ₁so,
ΔV_d1= A [1 + cos (ωt)] cos (ωt + Φ)
ΔV_d1= Acos (ωt + Φ) + 0.5A {cos (Φ) + cos (2ωt + Φ)}
Time τ_Twoso,
ΔV_d1= A [1 + cos (ωt−120)] cos (ωt + Φ)
ΔV_d1= Acos (ωt + Φ) + 0.5A {cos (Φ + 120) + cos (2ωt + Φ-120)}
ΔV_d2= A [1 + cos (ωt−240)] cos (ωt + Φ)
ΔV_d2= Acos (ωt + Φ) + 0.5A [cos (Φ-120) + cos (2ωt + Φ + 120)]
And
[0127]
So, after filtering,
ΔV_d= [Cos (Φ-120) -cos (Φ + 120)] / cos (Φ)
ΔV_d= 2 sin (Φ) sin (120) / cos (Φ)
ΔV_d= K₁sin (Φ) / cos (Φ)
ΔV_d= K₁tan (Φ). Where K₁= √3.
Referring now to FIG. 12C, an example of 0 degree-120 degree-240 degree modulation (spatial multiplexing) is shown. An embodiment of this spatial multiplexing comprises three detectors d₁, D_TwoAnd d_ThreeThe measured value using time τ₁Is performed in the same manner as in the above-described embodiment of the time division multiplexing of 0 ° -120 ° -240 ° except that measurement is performed simultaneously.
[0128]
As above,
ΔV_d= [ΔV_d3(Τ₁) -ΔV_d2(Τ₁)] / ΔV_d1(Τ₁) = K₁In tan (Φ), K₁= √3.
12B, the photodetectors of FIG. 12C may be shared across different pixels in photodetector array 230.
Referring again to FIG. 8C, it can be seen that each photodetector in bank A can be shared, for example, over four pixels: up, down, left, and right. For example, in a second column of photodetectors, a first photodetector A may be associated with each of four adjacent photodetectors B.
[0129]
To enable the spatial multiplexing of the present invention, rather than first generate a difference signal between banks of photodiode detectors to obtain differential data, raw data is obtained from each photodetector on a single-ended basis. Is advantageous. Nevertheless, it is preferable to perform the QE modulation differentially, that is, to modulate the banks of the detectors with different phases. Such single-ended raw data is more flexible when processing the data than when only differential data is available, for example, adding or subtracting data from adjacent photodetectors (eg, (Possibly in digital). FIG. 13A shows typical differential signal processing of the photodetector output, while FIG. 13B shows single-ended signal processing.
[0130]
The concept of pipelining for the embodiment as shown in FIG. 10 will now be described. As used herein, pipelining refers to reducing the latency in obtaining pixel measurements in successive frames of the obtained data.
Measurements within a frame of acquired data can be interlaced to increase the overall measurement throughput as follows.
0 ° -180 ° measurement: ΔV_d(Τ₁)
90 ° -270 ° measurement: ΔV_d(Τ_Two) → ΔV_d(Τ_Two)] / ΔV_d(Τ₁) = Tan (Φ)
0 ° -180 ° measurement: ΔV_d(Τ_Three) → ΔV_d(Τ_Two)] / ΔV_d(Τ_Three) = Tan (Φ)
0 ° -270 ° measurement: ΔV_d(Τ_Four) → ΔV_d(Τ_Four)] / ΔV_d(Τ_Three) = Tan (Φ).
[0131]
In this way, a continuous pipeline of measurement information can be calculated, while effectively doubling the calculation speed, but with one measurement latency. Indeed, one of the advantages of the time division multiplexing QE modulation embodiment described above is that the frame rate of data acquisition can be significantly increased. As mentioned, the CPU system 260 on the chip can be used to perform the information processing steps described herein, and the electronics 250-x on the chip can use the various forms of QE modulation and signal described. Processing can be performed.
Referring again to FIG. 8A, each of two adjacent photodetectors 240- (x) (ie, detector “A”) and photodetectors 240- (x + 1) (ie, detector “B”) Assume that they have substantially the same area when viewed in the figure. What will now be described is to reduce the adverse effects of non-uniform light amounts falling on these photodetectors, including the effects associated with differences in the effective area of actual photodetectors, and to be used with these photodetectors. This is a technique for reducing 1 / f noise related to the gain of an amplifier.
[0132]
Referring to FIGS. 3 and 8A, it is assumed that the photon energy returned from the target object 20 falls on the photodetectors A and B, and these two photodetectors output different signals, for example, different amplitudes. . For several reasons, the detected output signal may be different. The amount of light falling on photodetector A may be different from the amount of light falling on photodetector B. The effective detection area of photodetector A and the effective detection area of photodetector B may differ due to component mismatch, or photodetector A is simply better manufactured and exhibits better detection characteristics Maybe.
Referring again to FIG. 10, for simplicity of description, the incident photon energy signal that the photodetector A sees using the “1 + cos” analysis is A ′ {cos (ωt + Φ) +1}, and the incident photon energy The signal that the photodetector B sees is B ′ {cos (ωt + Φ) +1}. If A '= B', the light quantity is uniform, but otherwise, the light quantity is not uniform. However, in the more general case, A 'and B' will not be the same.
[0133]
In FIG. 10, A ′ {cos (ωt + Φ) +1} which is an energy signal viewed by the photodetector A is multiplied by {cos (ωt) +1}, and A ′ (0.5 cos (Φ) +1) after accumulation. Get. Hereinafter, this equation is represented as equation {1}. Similarly, B ′ {cos (ωt + Φ) +1}, which is an energy signal seen by the photodetector B, is multiplied by {cos (ωt + 180 °) +1} to obtain B ′ (− 0.5 cos (Φ) +1 after accumulation. Get) Hereinafter, this equation is represented as equation {2}. Assuming that A '= B', obtaining A'cos (.PHI.) Is simple as described above in the text. The problem is that A 'and B' are not the same.
In the above description of FIG. 10, the goal was to obtain Kb {cos (Φ)} and Kb {sin (Φ)} using Kb as the luminance coefficient. In the case of a non-uniform light amount, in the present invention, A '(cos ([omega] t + [phi]) + 1) is multiplied by {cos ([omega] t + 180 [deg.]) + 1], and after integration, A' (-0.5 cos ([phi]) + 1) is obtained. Hereinafter, this equation is represented as equation {3}. Further, in the present invention, B ′ (cos (ωt) +1) is multiplied by B ′ {cos (ωt + Φ) +1} to obtain B ′ (0.5 cos (Φ) +1). From now on, this formula is shown as formula {4}
[0134]
At this point, the present invention implements (Equation {1} -Equation {2} -Equation {3} -Equation {4}) to calculate (A '+ B') {cos (Φ)}. Execute. Similarly, as described above with respect to FIG. 10, the same operation can be performed to arrive at a similar (A '+ B') {sin (Φ)}.
Therefore, one calculation may be performed based on (Expression {1} -Expression {2}), and the same calculation may be performed based on (Expression {3} -Expression {4}). Referring now to FIGS. 8A, 10, 14A and 14B, the procedure can be performed generally as follows.
(1) At time 0 <t <t1, for example, at 0 and 180 degrees modulation, the detector D, that is, 240- (x) is biased with the signal S1 = 1 + cos (ωt), and the detector 240- (x + 1) Is biased with the signal S2 = 1 + cos (ωt + 180 °),
(2) accumulating the signals output from the two detectors during time 0 <t <t1 and at time t = t1, storing or sampling the differential signal in digital or analog form,
(3) During time t1 <t <t2, the detector 240- (x) is biased by the signal S1 = 1 + cos (ωt + 180 °), and the detector 240- (x + 1) is biased by the signal S2 = 1 + cos (ωt). Over
(4) accumulate the output signals from the two detectors and, at the end of the accumulation at time t = t2, store or sample the differential signal in digital or analog form;
(5) Calculate the difference signal on the sampled or stored analog and / or digital signal.
[0135]
FIGS. 14A and 14B depict exemplary techniques for subtraction of signals in the analog and digital domains, respectively. The analog or digital "shared" component 700 can be located outside the photodiode pixel detector, such as using one shared component per row in the column-row array of pixel detectors. The sample and hold (S / H) unit within the pixel holds both measurements at all times during the read operation, which is repeated independently for each column of pixels. Alternatively, the averaging may be performed within the pixel block, or even an analog-to-digital conversion (ADC) may be performed.
14A, the shared circuit configuration 700 includes an analog adder 710. The analog output of analog adder 710 is digitized by analog-to-digital converter 720. In FIG. 14B, the shared circuitry is essentially a digital adder 730 whose input is negated. The output from the adder 730 is input to the register 740. The output of register 740 is fed back to the input of the adder. A / D converter 720 provides a digital input to the adder. In FIG. 14B, averaging is performed in the digital domain, and analog-to-digital conversion can be shared across all columns of pixels, which holds the accumulated voltage signal until it is sent to the ADC for conversion. Means that S / H is required for each pixel. Therefore, calculating the average value of the signals in the digital domain embodiment of FIG. 14B requires twice as many A / D conversions as the analog domain embodiment of FIG. 14A. It is to be understood that a similar approach can be used in the various other modulation schemes described, including time division multiplexing and spatial multiplexing.
[0136]
In various embodiments described herein, the movement of individual objects within the detected image contour can be determined, for example, by identifying the contour movement between frames of data obtained by the microprocessor 260. , Can be calculated. All pixel detectors within the contour can use a uniform velocity, which is the velocity of the contour. The object can be identified using the outline of the object, so that the processor 260 on the chip can be used to track the object. In such a case, if necessary, the IC chip 210 can export a single value (DATA) representing a change in the position of the entire object 20 regardless of where the object 20 moves. Therefore, instead of exporting the pixels of the entire frame from the IC chip at the frame rate, one vector representing the change in the position of the object may be sent. As a result, the input / output of the IC chip is considerably reduced as a result, and the amount of data processing required outside the chip can be significantly reduced. It can be seen that the microprocessor 260 on the chip can also supervise the sequencing of the spatial and / or temporal topologies and optimize the spatial and / or temporal multiplexing.
[0137]
In other applications, the system 200 may be used to recognize objects that are virtual input devices, such as a keyboard whose virtual keys are pressed by a user's finger. For example, implementing a virtual input device in co-pending U.S. application Ser. No. 09 / 502,499, filed Feb. 11, 2000, entitled "Method and Apparatus for Entering Data Using a Virtual Input Device." For this purpose, a three-dimensional range finding TOF system is used. When a user's hand or stylus “presses” a virtual key or area of such a device, the system using TOF measurements determines which key or area is “pressed”. The system can then output the equivalent of the keystroke information to an associated device, such as a PDA, for receiving input data from a virtual input device-user interaction. The present invention can also be used in such applications, in which case the DATA of FIG. 3 represents the keystroke identification processed by the microprocessor 260 on the chip.
[0138]
As noted, a microprocessor 260, possibly executing software associated with memory 270, can control the modulation of generator 225 and detection by various electronics 250. If necessary, the detection signal may be processed using special image processing software. Because the system 200 preferably runs on batteries due to its low power consumption, when such software determines that sufficient image resolution has been obtained, it selectively turns off operating power to various portions of the array 230. be able to. Further, if enough photon energy reaches the array 230 to ensure proper detection, the signal output by the oscillator 220 can be altered. For example, the peak power and / or duty cycle of the transmitter energy can be reduced, and thus the overall power consumption of the system 200 can be reduced. Design trade-offs by changing the shape of the light energy output signal are related to z-resolution accuracy, user safety, and the processing power of the transmitter 220.
[0139]
In summary, the advantage is that the entire system can be run on a small battery because the peak and average power from transmitter 220 is preferably in the range of tens of mW. Nevertheless, the distance resolution is in the cm range and the signal / noise ratio is acceptable. While various embodiments have been described with respect to obtaining information proportional to distance z, it will be appreciated that the invention may be practiced to obtain information relating only to the brightness of the target object, if desired. In such applications, the present invention can be used as a fairly good filter, which substantially reduces the effect of ambient light on luminance information. Obtaining z information, on the other hand, involves modulating the energy source with a modulation frequency above 100 MHz, and the applications indicated to obtain luminance information require that the energy source be modulated at a much lower rate, perhaps 50 Khz. Modulate.
[0140]
Modifications and variations may be made to the disclosed embodiments without departing from the subject and essence of the invention as defined by the appended claims.
[Brief description of the drawings]
[0141]
FIG. 1 is a diagram illustrating a general brightness-based range finding system according to the prior art.
FIG. 2A illustrates a transmitted periodic signal having a high frequency component transmitted according to the present invention, here an ideal cosine waveform.
FIG. 2B illustrates a feedback waveform having a phase delay of the signal emitted in FIG. 2A, as used by the present invention.
FIG. 2C illustrates a feedback waveform similar to that shown in FIG. 2B, but with a DC offset level, as used in the present invention.
FIG. 2D illustrates a pulse-type periodic waveform of emitted light energy as emitted by a system according to Applicants' prior invention, now known as US Pat. No. 6,323,942B1.
FIG. 2E illustrates a non-pulse type waveform of emitted light energy according to the present invention.
FIG. 3 is a block diagram of a preferred embodiment of the present invention.
FIG. 4 is a block diagram showing two pixel detectors and their associated electronics according to the applicant's original utility model application.
FIG. 5A is a perspective view of a cross-section of a photodetector diode according to the present invention, showing reverse bias voltage modulation of the depletion layer width for performing QE modulation.
FIG. 5B is a perspective view of a cross section of a photodetector diode according to the present invention, illustrating reverse bias voltage modulation of the depletion layer width for performing QE modulation.
FIG. 6A illustrates a photogate photodiode that can be QE modulated by changing the gate voltage according to the present invention.
FIG. 6B illustrates a photogate photodiode that can be QE modulated by changing the gate voltage according to the present invention.
FIG. 6C shows that a MOS type photodiode serially coupled to a capacitor according to the present invention is substantially equivalent to a photogate photodiode as shown in FIG. 6A.
FIG. 7A is an equivalent circuit and voltage bias configuration of the exemplary photodiodes of FIGS. 5A and 5B in accordance with the present invention, illustrating higher QE modulation and lower QE modulation, respectively.
FIG. 7B is an equivalent circuit and voltage bias configuration of the exemplary photodiodes of FIGS. 5A and 5B according to the present invention, showing higher QE modulation and lower QE modulation, respectively.
FIG. 7C is a cross section of a typical photodetector structure in accordance with the present invention, illustrating how the charge generated by photon energy is collected using current.
FIG. 7D is a cross-section of a typical photodetector structure according to the present invention, showing a continuous or discontinuous change in the dopant concentration of the epitaxial layer, and how the charge generated by the photon energy is collected by current. FIG.
FIG. 8A is a side cross-sectional view of two adjacent photodiodes with low leakage gates QE modulated 180 degrees out of phase according to the present invention.
FIG. 8B is a side cross-sectional view of two adjacent photodiodes with low leakage gates QE modulated 180 degrees out of phase in accordance with the present invention.
FIG. 8C is a plan view of an array of photodiodes according to the present invention, wherein modulation nodes of a bank of photodiodes are alternately and parallel coupled to the remaining banks of photodiodes for QE modulation.
FIG. 9A is a block diagram illustrating two photodetectors and their associated electronics in a single-ended variable phase delay (VPD) QE modulation embodiment of the present invention.
FIG. 9B is a block diagram of a VPD embodiment showing two pixels, comprising four photodetectors with QE differentially modulated photodiodes and their associated electronics, in accordance with the present invention.
FIG. 9C is a block diagram of a VPD embodiment showing two pixels, consisting of four photodetectors whose photodiodes are QE differentially modulated and their associated simple electronics including a digital integrator, according to the present invention. is there.
FIG. 10 is a block diagram showing two pixels consisting of four photodiodes and their associated electronics where selectable fixed phase QE modulation of the photodiodes is used, in accordance with the present invention.
FIG. 11A illustrates the use of a tuned inductor in a photodiode of the configuration of FIG. 10 to reduce power consumption according to the present invention.
FIG. 11B illustrates the use of a tuned inductor in a photodiode of the configuration of FIG. 10 to reduce power consumption according to the present invention.
FIG. 12A is a plan view of an embodiment of 0 ° -90 ° -180 ° -270 ° spatial multiplexing QE modulation according to the present invention, showing four adjacent photodiodes.
FIG. 12B illustrates sharing a photodetector between different pixels for the spatial multiplexing QE modulation embodiment of FIG. 12A, in accordance with the present invention.
FIG. 12C illustrates an embodiment of spatial multiplexing QE modulation from 0 degrees-120 degrees-240 degrees according to the present invention, showing three photodetectors.
FIG. 13A illustrates differential and single-ended signal processing of the photodetector output according to the present invention.
FIG. 13B illustrates differential signal processing and single-ended signal processing of the photodetector output according to the present invention.
FIG. 14A illustrates a circuit configuration for reducing the effects of non-uniform illumination and 1 / f noise on a photodetector, according to the present invention.
FIG. 14B illustrates a circuit configuration for reducing the effects of non-uniform illumination and 1 / f noise on a photodetector according to the present invention.

Claims (56)

A method for measuring a distance z between at least one photodetector and one target,
(A) irradiating the target with light energy having a modulated periodic waveform including a high-frequency component S ₁ (ω · t);
(B) detecting, with the photodetector, a portion of the light energy reflected from the target;
(C) processing the signal detected in step (b) to modulate the quantum efficiency of the photodetector to produce data proportional to the distance z;
The method comprising: A method further comprising a plurality of photodetectors fabricated on one integrated circuit chip,
The method of claim 1, wherein the integrated circuit chip includes circuitry for performing steps (b) and (c). The method of claim 1, wherein the plurality includes at least one of (i) a photodiode detector, (ii) a MOS device with a bias gate, and (iii) a MOS device with a photogate. Method. The method of claim 1, wherein detecting in step (b) comprises measuring a phase change between the light energy emitted in step (a) and the signal detected in step (b). Step (c) is coupled to the source of the modulated periodic waveform and includes using a variable phase delay operating in a closed loop, wherein the phase delay of the variable phase delay is reduced to step (b). 5. A method according to claim 4, wherein the method indicates the phase delay of the signal detected in. The method of claim 4, wherein step (c) uses at least one fixed phase delay. The method of claim 4, wherein the phase change is proportional to the distance z. The method of claim 1, wherein step (c) changes the reverse bias of the photodetector. The method of claim 1, wherein the photodetector comprises a photogate detector, and step (c) changes the gate potential of the photogate detector. Detecting in step (b) includes measuring a phase change between the light energy emitted in step (a) and the signal detected in step (b);
Defining a bank of said photodetectors;
Increasing the efficiency of the quantum efficiency modulation by modulating the banks of photodetectors with different phases;
The method of claim 1, further comprising: The photodetector is formed on a semiconductor substrate;
Step (c) includes generating a current in the substrate to facilitate collection of photocharges emitted into the substrate by the reflected light energy;
The method of claim 1, wherein quantum efficiency modulation is enhanced. The photodetector is formed on a semiconductor substrate including an epitaxial region,
In the step (c), the epitaxial region comprises: (i) a plurality of layers each having a different doping concentration, wherein an uppermost layer of the plurality of layers is doped at a lower concentration than a lower layer of the plurality of layers. At least one selected from the group consisting of: (ii) the epitaxial region defining a layer with a dopant gradient such that the doping concentration is higher below the region than above it. The method of claim 1 including using a substrate having features. A method further comprising coupling an inductor to detune at least a portion of a capacitance coupled to a voltage node of the photodetector that controls its quantum efficiency modulation,
The method of claim 1, wherein power loss in the capacity is reduced. Defining at least a first bank of the photodetector and a second bank of the photodetector, wherein each bank is quantum efficiency modulated with a constant phase;
Defining at least one pixel consisting of one photodetector from the first bank and one photodetector from the second bank;
A method further comprising:
The method of claim 1, wherein step (c) comprises processing an output from one of the photodetectors used for one or more of the pixels. Determining a distance z over a plurality of time frames,
Step (c)
On a frame-by-frame basis, performing quantum efficiency modulation on the photodetector with at least a first phase shift, and obtaining information during the first phase shift from the photodetector,
Further comprising
Information obtained during the first phase shift from the photodetector is used for at least two of the time frames,
The method of claim 1, wherein: Digitally converting an analog output from each of the photodetectors,
The method of claim 1, further comprising: Wherein step (a) comprises at least one of: (i) emitting light energy having said frequency ω of at least 100 MHz; and (ii) emitting light energy having a wavelength of about 850 nm. The method of claim 1, wherein the method comprises: The method of claim 1, further comprising providing an integrated circuit including electronic circuitry that performs at least one of steps (b) and (c). A method of measuring the amplitude of a portion of the emitted light energy reflected from a target,
(A) irradiating the target with light energy having a modulated periodic waveform including a high-frequency component S ₁ (ω · t);
(B) providing at least one photodetector for detecting the portion of light energy reflected from the target;
(C) detecting, with the photodetector, the portion of the light energy reflected from the target;
(D) processing the signal detected in step (c) to modulate the quantum efficiency of the photodetector to produce data proportional to the amplitude;
The method comprising: 20. The method according to claim 19, wherein said frequency [omega] is at least 100 MHz. A system for measuring a distance z between at least one photodetector and one target,
An optical energy source that emits a modulated periodic waveform having a high frequency component S ₁ (ω · t);
A plurality of light detectors arranged to detect a portion of the light energy reflected from the target;
Means for processing the signal detected by the photodetector to modulate the quantum efficiency of the photodetector to produce data proportional to the distance z;
The system comprising: 22. The system of claim 21, wherein said plurality of photodetectors and said modulating means are fabricated on a single integrated circuit chip. 22. The device of claim 21, wherein the plurality includes at least one of (i) a photodiode detector, (ii) a MOS device with a bias gate, and (iii) a MOS device with a photogate. system. 22. The system of claim 21, further comprising circuitry for measuring a phase change between emitted light energy and a signal detected by at least some of the photodetectors. A variable phase delay circuit coupled to the source of the modulated periodic waveform and operating in a closed loop, wherein the phase delay of the variable phase delay is detected by a photodetector for emitted light energy. 22. The system of claim 21, further comprising the variable phase delay circuit indicating a phase delay of the signal. A system further comprising a circuit for measuring a phase change between light energy emitted from the light energy source and a signal detected by at least some of the photodetectors, wherein the circuit comprises at least one fixed phase. 22. The system of claim 21, wherein the system uses a delay. The system of claim 24, wherein the phase change is proportional to the distance z. The system of claim 24, wherein the modulating means changes the reverse bias of the photodetector. 22. The system of claim 21, wherein said photodetector comprises a photogate detector, and wherein said modulating means changes a gate potential of said photogate detector. A circuit configuration for measuring a phase change between light energy emitted from the light energy supply and a signal detected by the light detector,
A bank of the photodetectors;
A system further comprising:
22. The system of claim 21, wherein the modulating means modulates the banks of the photodetectors with different phases. The photodetector is formed on a semiconductor substrate;
The system further comprising: means for generating a current in the substrate to facilitate collection of photocharges emitted into the substrate by the reflected light energy.
22. The system of claim 21, wherein quantum efficiency modulation is enhanced. The photodetector is formed on a semiconductor substrate including an epitaxial region, wherein the epitaxial region of the substrate comprises: (i) the epitaxial region comprises a plurality of layers each having a different doping concentration; The upper layer is doped at a lower concentration than the lower layer of the plurality of layers; and (ii) the epitaxial region has a dopant gradient such that the doping concentration is higher below the region than above it. 22. The system of claim 21, having at least one feature selected from defining a layer. A system further comprising an inductor coupled to detune at least a portion of a capacitance coupled to a voltage node of the photodetector that controls the quantum efficiency modulation.
22. The system of claim 21, wherein power loss in the capacity is reduced. A first bank of photodetectors;
A second bank of photodetectors;
The modulation means, quantum efficiency modulation of the first bank and the second bank at a fixed phase,
At least one pixel consisting of one photodetector from the first bank and one photodetector from the second bank;
A system further comprising:
22. The system of claim 21, wherein the circuit processes output from one of the photodetectors used for more than one of the pixels. The system determines the distance z over a plurality of time frames;
On a frame-by-frame basis, the quantum efficiency modulator modulates the photodetector with at least a first phase shift, obtaining information from the photodetector during the first phase shift,
Information obtained during the first phase shift from the photodetector is used for at least two of the time frames,
22. The system of claim 21, wherein: 22. The system of claim 21, further comprising means for digitally converting an analog output from each of said photodetectors. 22. The system of claim 21, wherein said frequency [omega] is at least 100 MHz. An integrated circuit operable in CMOS for measuring a distance z between a source of light energy controlled by the system and a target, the integrated circuit being modulated with a high frequency component S ₁ (ω · t). A generator couplable with the source of light energy emitting a periodic waveform,
A plurality of light detectors arranged to detect a portion of the light energy reflected from the target;
Means for processing the signal detected by the photodetector to modulate the quantum efficiency of the photodetector to produce data proportional to the distance z;
An integrated circuit operable in said CMOS comprising: 39. The method of claim 38, wherein the plurality comprises at least one of (i) a photodiode detector, (ii) a MOS device with a bias gate, and (iii) a MOS device with a photogate. Integrated circuit. 39. The integrated circuit of claim 38, further comprising a circuit for measuring a phase change between emitted light energy and a signal detected by at least some of the photodetectors. A variable phase delay circuit coupled to the source of the modulated periodic waveform and operating in a closed loop, wherein the phase delay of the variable phase delay is detected by a photodetector for emitted light energy. 39. The integrated circuit according to claim 38, further comprising the variable phase delay circuit indicating a phase delay of the signal. An integrated circuit further comprising a circuit for measuring a phase change between light energy emitted from the light energy source and a signal detected by at least some of the light detectors, wherein the circuit is at least one fixed. 39. The integrated circuit of claim 38, wherein the integrated circuit uses a phase delay. 40. The integrated circuit according to claim 39, wherein the phase change is proportional to the distance z. 39. The integrated circuit according to claim 38, wherein said modulating means changes a reverse bias of said photodetector. 39. The integrated circuit according to claim 38, wherein said photodetector comprises a photogate detector, and said modulating means changes a gate potential of said photogate detector. A circuit configuration for measuring a phase change between light energy emitted from the light energy supply and a signal detected by the light detector,
An integrated circuit further comprising the photodetector bank;
39. The integrated circuit of claim 38, wherein said modulating means modulates said banks of said photodetectors with different phases. An integrated circuit further comprising means for generating a current in said substrate to facilitate collection of photocharges emitted into said substrate by said reflected light energy,
39. The integrated circuit of claim 38, wherein quantum efficiency modulation is enhanced. An integrated circuit further comprising a bias circuit for generating a current in the substrate to facilitate collection of photocharges emitted into the substrate by the reflected light energy,
39. The integrated circuit of claim 38, wherein quantum efficiency modulation is enhanced. The photodetector is formed on a semiconductor substrate including an epitaxial region, the epitaxial region of the substrate comprising: (i) a plurality of layers, each of the epitaxial regions having a different doping concentration; (Ii) the epitaxial region has a dopant gradient such that the doping concentration is higher at the lower portion of the region than at the upper portion thereof. 39. The integrated circuit of claim 38, having at least one feature selected from defining a layer. An integrated circuit further comprising an inductor coupled to detune at least a portion of a capacitance coupled to a voltage node of the photodetector that controls the quantum efficiency modulation.
39. The integrated circuit according to claim 38, wherein power loss of the capacitance is reduced. A first bank of photodetectors;
A second bank of photodetectors;
The modulation means, quantum efficiency modulation of the first bank and the second bank at a fixed phase,
At least one pixel consisting of one photodetector from the first bank and one photodetector from the second bank;
An integrated circuit further comprising:
39. The integrated circuit of claim 38, wherein the circuit processes an output from one of the photodetectors used for more than one of the pixels. The system measures the distance z over a plurality of time frames,
On a frame-by-frame basis, the quantum efficiency modulator modulates the photodetector with at least a first phase shift, obtaining information from the photodetector during the first phase shift,
Information obtained during the first phase shift from the photodetector is used for at least two of the time frames,
39. The integrated circuit according to claim 38. 39. The integrated circuit according to claim 38, further comprising a microprocessor that controls at least the operation of said modulating means. 39. The integrated circuit according to claim 38, further comprising means for digitally converting an analog output from each of said photodetectors. 39. The integrated circuit according to claim 38, wherein said frequency ω is at least 100 MHz. 39. The integrated circuit of claim 38, wherein said emitted light energy has a wavelength of about 850 nm.

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