JP2004363480A - Manufacturing method of solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high precision solid-state imaging device by a very simple process accompanying the realization of a miniaturization process. <P>SOLUTION: The method of manufacturing a semiconductor substrate 1, is characterised in that an insulating film 7 is disposed in an interelectrode region of a charge transfer, and an electrode material 4a is disposed for covering the surface of the charge transfer other than the interelectrode region and a photoelectric conversion part, and a resist mask R2 used for the etching processing of an electrode material for specifying an end edge or specifying between a photodiode constituting the photoelectric conversion part and a charge transfer electrode, is used intactly as a mask for impurity ion implantation for forming a diffusion layer of the photodiode. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a solid-state imaging device, and more particularly to a method for manufacturing a solid-state imaging device having a single-layer electrode CCD (charge coupled device) structure.
[0002]
[Prior art]
A solid-state imaging device using a CCD, which is an imaging device such as an area sensor, has, as a basic structure, a photoelectric conversion unit such as a photodiode, a charge readout unit from the photoelectric conversion unit, and a charge transfer for transferring the readout charge. And a charge transfer portion including an electrode. A plurality of these charge transfer electrodes are arranged adjacent to each other on a charge transfer channel formed on the surface of the semiconductor substrate, and are sequentially driven by a clock signal.
[0003]
Conventionally, a charge transfer electrode has a two-layer electrode structure, and after forming a first electrode (lower layer electrode), a method of forming a second electrode (upper layer electrode) with an insulating film in between is used. (For example, Patent Document 1). In this case, after patterning the charge transfer electrode, a resist pattern having an opening, which is newly formed in alignment with the pattern of the charge transfer electrode, is formed, and the electrode material of the photoelectric conversion unit is removed by etching. A method of performing ion implantation for forming a photodiode constituting the structure is employed.
[0004]
Also in Patent Document 2, in the solid-state imaging device having a two-layer electrode structure, when the photoelectric conversion portion is formed, after forming the second charge transfer electrode on the upper layer side, an opening for forming the light receiving portion is formed, A method of performing ion implantation has been proposed.
[0005]
In recent years, a solid-state imaging device having a single-layer electrode structure has been proposed. For example, after the electrode material is deposited, an opening for forming the diffusion layer is formed in the single-layer electrode material by dry etching using a resist having an opening pattern for forming the diffusion layer of the photodiode as an etching mask. There has also been proposed a technique of forming a charge transfer electrode by dry etching the electrode material after forming a diffusion layer of a photodiode by performing ion implantation using the resist as a mask (Patent Document 3).
[0006]
Further, in such a single-layer structure solid-state imaging device, not only the man-hours for electrode formation are reduced, but also between the first electrode and the second electrode generated in the charge transfer electrode having the two-layer electrode structure. Therefore, the stray capacitance between adjacent charge transfer electrodes can be reduced.
[0007]
As described above, miniaturization of the solid-state imaging device advances, high-speed driving of the charge transfer electrode is facilitated, and high-speed transfer of the signal charge advances, and the manufacturing process of the solid-state imaging device has been shortened more than before.
[0008]
[Patent Document 1]
Japanese Patent Laid-Open No. 6-120476 [Patent Document 2]
Japanese Patent Laid-Open No. 5-90562 [Patent Document 3]
Japanese Patent Laid-Open No. 9-064333
[Problems to be solved by the invention]
However, as described in Patent Document 1, for example, in a method of forming a diffusion layer of a photodiode using a resist mask provided with an opening after forming a charge transfer electrode, when the opening is displaced in the photolithography process, A positional shift occurs between the diffusion layer region and the edge of the charge transfer electrode of the charge readout unit described above, and the charge transfer efficiency between the regions decreases, and this positional shift is a very serious problem with miniaturization. It becomes.
Furthermore, as described in Patent Document 2, in the method of forming the diffusion layer of the photodiode by ion implantation using the charge transfer electrode as a mask, it is necessary to use an electrode material that can serve as a mask for ion implantation. There are restrictions on the choice of materials. Further, since the accelerated ions penetrate through the charge transfer electrode during ion implantation, deep ion implantation with high energy cannot be performed, and as a result, it is difficult to improve the photoelectric conversion efficiency.
[0010]
In addition, in the case of the two-layer electrode structure, not only the man-hours and the production workability are bad, but also the surface is not flat. Therefore, when forming a resist pattern for removing the electrode material of the photoelectric conversion portion, a high-precision opening is formed. There is a problem that it is difficult to form. This has caused a variation in sensitivity, which has caused a decrease in photoelectric conversion characteristics.
[0011]
In the method described in Patent Document 3, a charge transfer element having a single-layer electrode structure is formed. In order to process the charge transfer electrode by dry etching after forming the diffusion layer of the photodiode, this dry etching is performed. Etching damage tends to occur on the surface of the diffusion layer in the process, and there is a problem that the frequency of occurrence of white scratches increases.
[0012]
The present invention has been made in view of the above-described circumstances, and prevents the positional displacement between the charge transfer electrode end and the diffusion layer of the photodiode and suppresses the occurrence of white scratches, and is a fine, highly accurate and highly reliable solid. An object is to provide an imaging device.
Another object of the present invention is to improve productivity.
[0013]
[Means for Solving the Problems]
Therefore, in the present invention, in a method for manufacturing a solid-state imaging device including a photoelectric conversion unit and a charge transfer unit including a charge transfer electrode having a single layer structure, an insulating film is disposed in an inter-electrode region of the charge transfer unit. A step of preparing a semiconductor substrate in which an electrode material covering the surfaces of the charge transfer unit and the photoelectric conversion unit other than the inter-electrode region is disposed; and a region corresponding to the photoelectric conversion unit on the semiconductor substrate surface Forming a resist having an opening; etching the electrode material exposed to the opening using the resist as a mask; and implanting ions into the photoelectric conversion portion while leaving the resist; It is characterized by.
[0014]
That is, in the present invention, a semiconductor substrate in which an insulating film is disposed in an inter-electrode region of the charge transfer unit and an electrode material covering the surfaces of the charge transfer unit and the photoelectric conversion unit other than the inter-electrode region is disposed. In contrast, a resist having an opening for etching and removing the electrode material in the photodiode formation region of the photoelectric conversion portion is formed, and after the opening is formed, ion implantation is performed with the resist remaining to form the photoelectric conversion portion. In addition, since lithography can be performed on all flat surfaces, an extremely accurate opening can be formed when miniaturization is performed. Then, by performing ion implantation for forming the photoelectric conversion portion while leaving the resist for forming the opening, a photodiode is formed in a self-aligning manner.
[0015]
In addition, when forming a separation groove (gap) for forming an interelectrode separation region, the electrode material covering the photoelectric conversion portion remains, so that white scratches caused by damage to the photoelectric conversion portion due to etching are prevented. can do.
[0016]
In the above method, the step of preparing the semiconductor substrate includes a step of forming the electrode material on the entire surface of the semiconductor substrate, and a resist having an opening in a region corresponding to the region between the electrodes on the semiconductor substrate. Etching the electrode material using the resist as a mask to form a separation groove, and forming an insulating film in the separation groove.
Furthermore, in the above method, the step of preparing the semiconductor substrate includes a step of forming an insulating film in a region corresponding to the region between the electrodes on the semiconductor substrate, and the entire surface of the semiconductor substrate on which the insulating film is formed. Forming the electrode material; and removing the electrode material on the insulating film to planarize the surface.
[0018]
As described above, in the present invention, the resist mask used for etching the single-layer electrode material constituting the charge transfer electrode is used as it is as a mask for impurity ion implantation for forming the photodiode of the photoelectric conversion portion. Since the photodiode can be formed in a self-aligned manner with respect to the charge transfer electrode, highly accurate dimensional control is possible, and the solid-state imaging device can be easily miniaturized or the number of pixels can be easily increased. Since the resist mask used for this opening is used as a mask for ion implantation, the boundary between the charge transfer electrode and the photodiode formation region, that is, the edge on the photodiode formation region side is actually the photodiode formation. Since the photodiode is formed at the edge of the charge readout electrode in a self-aligned manner, the charge (electrons or holes) generated by photoelectric conversion by the photodiode is the charge readout channel. Efficiently transferred to the buried channel.
In this way, the charge transfer efficiency from the photoelectric conversion unit to the charge transfer unit is greatly improved.
[0019]
Moreover, a series of manufacturing processes is made efficient, and the manufacturing cost can be reduced.
[0020]
In the present invention, since the resist mask and the charge transfer electrode serve as an implantation mask in the impurity ion implantation, ion acceleration energy can be increased, a deep diffusion layer can be easily formed, and high photoelectric conversion efficiency can be obtained. It becomes possible to easily form a photoelectric conversion part having
[0021]
Furthermore, in the present invention, since the diffusion layer of the photodiode is formed after the charge transfer electrode is formed by etching, the problem of crystal damage in the diffusion layer of the photodiode as described in the prior art is eliminated. The probability of occurrence is greatly reduced.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the present invention will be described with reference to FIGS. In the following embodiments, a method for forming a photodiode and a charge transfer portion of a photoelectric conversion portion, which is a feature of the present invention, will be described in the order of steps.
[0023]
(First embodiment)
In this embodiment, a single-layer electrode material is etched with the progress of microfabrication technology, so that it is possible to form a solid-state imaging device including a charge transfer electrode having a single-layer electrode structure having a narrow interelectrode separation region. Focusing on this point, a solid-state imaging device that can be easily processed in a single photolithography process and that does not cause white flaws due to damage caused by etching and has no variation in characteristics is formed.
1 to 5 are manufacturing process diagrams of a photodiode and a charge transfer unit of a photoelectric conversion unit, for explaining the first embodiment. 1 and 3 are plan explanatory views of the resist pattern, and FIGS. 2, 4 and 5 are cross-sectional views taken along the line AA ′ of the plan view.
[0024]
As shown in FIG. 2A, for example, an n ⁻ type CCD buried channel 2 serving as a charge transfer channel is formed on the surface of a p type silicon substrate 1 having an impurity concentration of about 10 ¹⁶ atoms / cm ³ . Here, although not shown, a p ⁺ type channel stopper serving as an element isolation portion is formed in a predetermined region of the substrate surface. Next, the surface of the substrate is thermally oxidized to form a silicon oxide film 3a having a thickness of about 30 nm. Subsequently, a silicon nitride film 3b having a thickness of about 50 nm is formed by LPCVD (low pressure CVD), and then oxidized again to obtain a thickness of 3 nm. A silicon oxide film 3c is formed to a degree, and a gate oxide film 3 having a so-called ONO structure is formed.
[0025]
Then, an electrode material film 4 is deposited on the gate oxide film 3 with a tungsten polycide film that becomes a single-layer electrode material. The tungsten polycide film is formed by stacking a tungsten silicide layer having a thickness of about 200 nm on an n ⁺ type polysilicon layer having a thickness of about 100 nm. Here, as the electrode material film 4, a laminated film of a refractory metal silicide layer and a polysilicon layer such as a titanium polycide film and a cobalt polycide film may be used.
[0026]
Next, a first resist mask R1 is formed on the electrode material film 4 by using a known photolithography technique. As shown in the plan view of FIG. 1, the first resist mask R1 is formed with patterns of the first separation openings 5 and the second separation openings 6 at a constant pitch. These separation openings intersect with the pattern of the buried channel 2 and the pattern width is formed to be about 0.2 μm. In this photolithography process, pattern transfer to the photoresist is performed using a known KrF excimer laser beam. The pattern width may be 0.1 μm or less. Desirably, if the opening width of the resist pattern is narrowed by using the LELACS method, a finer pattern can be formed.
[0027]
Next, as shown in FIG. 2B, the electrode material film 4 is dry-etched by RIE (reactive ion etching) using the first resist mask R1 as an etching mask. In this way, the electrode material film 4 under the first separation opening 5 and the second separation opening 6 which are predetermined regions is selectively removed, and the separated electrode material film 4 having the separation gap region is formed. Process. Here, a mixed gas of HBr and Cl ₂ is used as the etching gas. This gas has a high etching selectivity with respect to the silicon oxide film 3c, and the silicon oxide film 3c is hardly etched and functions as an etching stopper.
[0028]
Next, as shown in FIG. 2C, the first resist mask R1 is removed by a well-known ashing method, and an APCVD (atmospheric pressure CVD) method using O ₃ and TEOS (tetraethoxysilane) as reaction gases. A silicon oxide film having a thickness of about 100 nm is deposited on the entire surface to form an interelectrode insulating film 7. This film forming method is excellent in embeddability, and the separation gap region of the electrode material film 4 is completely filled with a silicon oxide film. In addition to the above method, as a film formation method having excellent embeddability, an SOG method, a low pressure CVD method, or the like may be used.
[0029]
Next, as shown in FIG. 4A, a second resist mask R2 having a pattern of PD openings 8 is formed on the interelectrode insulating film 7 using a known photolithography technique. As shown in the plan view of FIG. 3, in the second resist mask R2, a large number of photodiode portion forming openings (PD openings) 8 that become photodiode regions of the photoelectric conversion portion are two-dimensionally arranged at regular intervals. Is done. Here, the pattern of the PD openings 8 is formed so as to partially overlap the pattern of the second separation openings 6.
[0030]
Subsequently, as shown in FIG. 4B, the electrode material film 4 separated from the interelectrode insulating film 7 is sequentially dried by reactive ion etching (RIE) using the second resist mask R2 as an etching mask. Etch. Here, for example, C ₄ F ₈ is used as the etching gas for the interelectrode insulating film 7, and the above-described mixed gas of HBr and Cl ₂ is used as the etching gas for the electrode material film 4. The first transfer electrode 9, the second transfer electrode 10, the second transfer electrode 10, and the second transfer electrode 10, which become a single-layer charge transfer electrode, are not used until the electrode material film 4 under the PD opening 8 is etched away using the second resist mask R 2 as an etching mask. The third transfer electrode 11, the fourth transfer electrode 12, and the like are formed at a predetermined pitch. As described above, the second transfer electrode 10 and the third transfer electrode 11 are completely separated by forming the pattern of the PD opening 8 and the pattern of the second separation opening 6 so as to overlap each other. . Here, the first transfer electrode 9 and the third transfer electrode 11 also have a role as a charge readout electrode of a charge readout portion from the photodiode.
[0031]
Next, as shown in FIG. 4C, phosphorus ions 13 are implanted into the surface of the silicon substrate 1 through the gate oxide film 3 having the ONO structure using the second resist mask R2 as it is as an ion implantation mask. Here, as the implantation conditions, the acceleration energy is set to 500 to 600 keV, and the dose is set to about 10 ¹⁰ to 10 ¹³ / cm ² . In this way, the n-type diffusion layer 14 is formed. Subsequently, the second resist mask R2 is removed by a known ashing method, and an annealing process is performed at 900 ° C. in a nitrogen gas atmosphere. This annealing treatment activates phosphorus impurities in the silicon substrate 1 and recovers implantation damage.
[0032]
In this manner, as shown in FIG. 5A, a photodiode is formed by the p-type silicon substrate 1 and the n-type diffusion layer 14. Here, the impurity concentration of the n-type diffusion layer 14 is about 10 ¹⁷ atoms / cm ² and the depth thereof is about 1 μm. Next, thermal oxidation at about 800 ° C. is performed in an O ₂ atmosphere to oxidize the side walls of the first transfer electrode 9 (side oxidation). In this way, as shown in FIG. 5B, the n ⁻ type buried channel 2 is formed on the surface of the p type silicon substrate 1, and has an ONO structure composed of the silicon oxide films 3a and 3c and the silicon nitride film 3b. A first transfer electrode 9, a second transfer electrode 10, a third transfer electrode 11, a fourth transfer electrode 12 and a predetermined number of charge transfer electrodes are formed on the silicon substrate 1 via the gate oxide film 3. The Here, since the first transfer electrode 9 functions as a charge reading electrode of the charge reading portion, the first transfer electrode 9 is also formed on the charge reading channel 15 shown in the drawing. By driving the charge readout electrode, charges (electrons) from the n-type diffusion layer 14 of the photodiode are read out to the buried channel 2. The above is the basic structure of the solid-state image sensor.
[0033]
Although not shown, a p ⁺ -type channel stopper serving as an element isolation portion is formed in the peripheral region of the n-type diffusion layer 14 except for the charge readout channel 15 region.
Further, in the subsequent processes, a light shielding film, a color filter, a condensing microlens, and the like are formed by using a well-known technique with an interlayer insulating film interposed therebetween, but the description thereof is omitted.
[0034]
In addition, in the embodiment of the present invention, in FIG. 1, all the second separation openings 6 are connected in the horizontal direction so that the pattern extends in the horizontal direction like the first separation openings 5. Good. In FIG. 3, an interelectrode insulating film having a width of about 0.2 μm is formed in the interelectrode gap of the charge transfer electrode formed in the region of the PD opening 8. The depth is about 1 μm, and the photodiode is not interrupted below the interelectrode insulating film. In this case as well, a high-precision and high-performance photoelectric conversion unit can be easily formed.
[0035]
Thus, in the present invention, since the resist mask used for etching the single layer electrode material or the charge transfer electrode is used as it is as a mask for impurity ion implantation for forming the diffusion layer of the photodiode, It can be formed in a self-aligned manner with respect to the charge transfer electrode, and further miniaturization of the solid-state imaging device or increase in the number of pixels becomes easier. In addition, a series of manufacturing processes is made efficient, and manufacturing costs can be easily reduced.
[0036]
In the present invention, since the resist mask and the charge transfer electrode serve as an implantation mask in the impurity ion implantation, the ion acceleration energy can be increased and a deep diffusion layer can be easily formed. For this reason, a photodiode with high photoelectric conversion efficiency can be easily formed. This is because a deep diffusion layer can be formed with a relatively low concentration of impurities, so that the depletion layer of the photodiode tends to spread toward the diffusion layer when receiving light at the photoelectric conversion portion, and the charges generated there are efficiently diffused. This is because it can be taken into the layer.
[0037]
In addition, since the photodiode is formed on the charge readout electrode in a self-aligned manner, charges (electrons or holes) generated by photoelectric conversion by the photodiode can be efficiently transferred to the buried channel through the charge readout channel. In this way, the charge transfer efficiency from the photoelectric conversion unit to the charge transfer unit is greatly improved.
[0038]
Furthermore, in the present invention, as described above, the diffusion layer of the photodiode is formed after the charge transfer electrode is formed by etching. Therefore, damage such as induced defects due to the charge transfer electrode etching process does not occur in the diffusion layer. Such a crystal defect induced by dry etching is likely to occur when dry etching is added to the ion-implanted diffusion layer as in Patent Document 2, and crystal recovery by annealing is difficult. For this reason, according to the method of the present invention, the probability of occurrence of white scratches as seen in Patent Document 2 is greatly reduced.
[0039]
(Second Embodiment)
Next, a second embodiment of the present invention will be described.
In the first embodiment, the electrode material is formed on the surface of the semiconductor substrate, the separation groove is formed in the interelectrode separation region, and this is filled with the insulating film. However, as the second embodiment of the present invention, An insulating film is formed in a region corresponding to the inter-electrode region on the semiconductor substrate, the electrode material is formed on the entire surface of the semiconductor substrate on which the insulating film is formed, and the electrode material on the insulating film is CMPed or etched back. Etc., and the surface is flattened, and an insulating film is disposed in the interelectrode region of the charge transfer portion, and an electrode material covering the surfaces of the charge transfer portion and the photoelectric conversion portion other than the interelectrode region is disposed. A formed semiconductor substrate may be formed.
[0040]
That is, when forming an insulating film between electrodes, a resist pattern wider than the target inter-electrode distance is formed on an oxidizable film such as a polycrystalline silicon film, and this resist pattern is processed isotropically. Then, the pattern width is reduced, the polycrystalline silicon film is patterned using the resist pattern as a mask, and oxidized to form a narrow interelectrode insulating film.
[0041]
According to this method, by forming a resist pattern at the resolution limit and further performing a reduction process, the width can be reduced and a fine pattern can be easily obtained.
[0042]
Next, the manufacturing process of this solid-state image sensor will be described.
First, as shown in FIG. 6A, a silicon oxide film 3a having a thickness of 15 nm, a silicon nitride film 3b having a thickness of 50 nm, and a silicon oxide film 3c having a thickness of 10 nm are formed on the surface of the n-type silicon substrate 1. Then, a gate insulating film 3 having a three-layer structure is formed. Subsequently, a non-doped polycrystalline silicon film 14 having a film thickness of 0.4 μm is formed on the gate insulating film 3 by low pressure CVD. The substrate temperature at this time is 500 ° C. A resist pattern R3 having a pattern width of 0.35 μm is formed on the upper layer by applying a resist pattern manufactured by Tokyo Ohka Co., Ltd. called OFPR so as to have a thickness of 0.8 to 1.4 μm. At this time, the resolution limit was 0.35 μm.
[0043]
Thereafter, as shown in FIG. 6B, the resist pattern is ashed using a microwave downstream type ashing device to which oxygen or nitrogen is added, and the width of the resist pattern R3 is reduced to 0.1 mm. The pattern was R4. At this time, ashing was performed at room temperature.
[0044]
Subsequently, as shown in FIG. 6C, the polycrystalline silicon film 14 is selectively removed by etching using the resist pattern R4 as a mask by reactive ion etching using a mixed gas of HBr and O _2. R4 is peeled off. Individually, it is desirable to use an etching apparatus such as ECR or ICP.
[0045]
Then, as shown in FIG. 7A, the polycrystalline silicon film 14 is subjected to pyrogenic oxidation in an HCl + O ₂ atmosphere to form a silicon oxide film, thereby forming an interelectrode insulating film 7.
[0046]
Thereafter, a polycrystalline silicon film 4a having a thickness of 50 to 150 m is formed by a low pressure CVD method using a mixed gas of SiCl ₄ and H ₂ . Thereafter, a tungsten thin film 4b having a film thickness of 500 to 600 nm is formed by a low pressure CVD method using WF ₆ and H ₂ SO ₄ . The substrate temperature at this time was 500 degreeC.
At this time, the substrate surface has no irregularities and is a flat surface.
As shown in FIG. 7B, the surface of the substrate is polished and chemically etched by CMP until the upper surface of the interelectrode insulating film 3 is exposed.
[0047]
Finally, a silicon oxide film is formed on the surface by the CVD method, and as shown in FIG. 7C, it consists of a two-layer film of a polycrystalline silicon film 4a and a tungsten film 4b separated by an interelectrode insulating film 7. A charge transfer electrode is formed.
Subsequent steps are the same as the steps of FIGS. 4A to 4C described in the first embodiment.
[0048]
Also by this method, a highly accurate and highly reliable solid-state imaging device can be formed with high accuracy.
[0049]
In the above embodiment, the case where the charge generated by photoelectric conversion is an electron has been described, but the present invention can be similarly applied even when the charge is a hole. However, in this case, all the conductivity types of the impurities described above may be reversed. In the above embodiment, the gate oxide film is described as having an ONO structure. However, the gate oxide film may be formed of only a silicon oxide film.
[0050]
Note that the present invention is not limited to the above-described embodiment, and can be appropriately made within the scope of the technical idea of the present invention.
[0051]
【The invention's effect】
As described above, in the present invention, the insulating film is disposed in the inter-electrode region of the charge transfer portion, and the electrode material covering the surfaces of the charge transfer portion and the photoelectric conversion portion other than the inter-electrode region is disposed. Prepared a semiconductor substrate, a resist mask used for etching an electrode material for defining an edge that defines between the photodiode constituting the photoelectric conversion portion and the charge transfer electrode, and a diffusion layer of the photodiode It is used as it is as a mask for impurity ion implantation to form. For this reason, the photodiode can be formed in a self-aligned manner with respect to the charge transfer electrode, and high-precision dimensional control is facilitated, and the solid-state imaging device is further miniaturized or the number of pixels is further facilitated. In addition, a series of manufacturing processes is made efficient, and manufacturing costs can be easily reduced.
[0052]
Since ion implantation is performed using the resist pattern as a mask, the ion implantation depth can be increased, and a photodiode with high photoelectric conversion efficiency can be easily formed. In addition, charges generated by photoelectric conversion by the photodiode are efficiently transferred to the buried channel through the charge readout channel, and the charge transfer efficiency from the photoelectric conversion unit to the charge transfer unit is greatly improved.
[0053]
Further, since the diffusion layer of the photodiode is formed after the charge transfer electrode is etched, the photodiode damage problem that occurs in the etching process is eliminated, and the probability of occurrence of white scratches is greatly reduced.
[0054]
As described above, according to the present invention, the process can be shortened and the productivity can be improved, and the characteristics of the photodiode of the photoelectric conversion unit can be greatly improved. Manufacturing becomes possible.
[Brief description of the drawings]
FIG. 1 is a plan view of one manufacturing process of a solid-state imaging device for explaining a first embodiment of the present invention;
FIG. 2 is a cross-sectional view of the manufacturing process of the solid-state imaging device for explaining the first embodiment of the present invention.
FIG. 3 is a plan view of a manufacturing process of the solid-state imaging device for explaining the first embodiment of the present invention.
FIG. 4 is a cross-sectional view of the manufacturing process of the solid-state imaging device for explaining the first embodiment of the present invention.
FIG. 5 is a cross-sectional view of the manufacturing process of the solid-state imaging device for explaining the first embodiment of the present invention.
FIG. 6 is a cross-sectional view of a manufacturing process of a solid-state imaging device for explaining a second embodiment of the present invention.
FIG. 7 is a cross-sectional view of a manufacturing process of a solid-state imaging device for explaining a second embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Buried channel 3 Gate oxide film 3a, 3c Silicon oxide film 3b Silicon nitride film 4 Electrode material film 4a Polycrystalline silicon film 4b Tungsten film 5 First isolation opening 6 Second isolation opening 7 Interelectrode insulating film 8 PD opening 9 1st transfer electrode 10 2nd transfer electrode 11 3rd transfer electrode 12 4th transfer electrode 13 Phosphorus ion 14 n-type diffusion layer 15 Charge readout channel R1 1st resist mask R2 2nd resist mask

Claims (3)

In a method for manufacturing a solid-state imaging device including a photoelectric conversion unit and a charge transfer unit including a charge transfer electrode having a single layer structure,
A step of preparing a semiconductor substrate in which an insulating film is disposed in an inter-electrode region of the charge transfer unit and an electrode material covering a surface of the charge transfer unit and the photoelectric conversion unit other than the inter-electrode region is disposed;
Forming a resist having an opening on the surface of the region corresponding to the photoelectric conversion portion on the surface of the semiconductor substrate;
Etching the electrode material exposed to the opening using the resist as a mask;
And a step of ion-implanting the photoelectric conversion portion while leaving the resist remaining. The step of preparing the semiconductor substrate includes:
Forming the electrode material on a semiconductor substrate surface;
Forming a resist having an opening in a region corresponding to the inter-electrode region on the semiconductor substrate, etching the electrode material using the resist as a mask, and forming a separation groove;
The method for manufacturing a solid-state imaging device according to claim 1, further comprising: forming an insulating film in the separation groove. The step of preparing the semiconductor substrate includes:
Forming an insulating film in a region corresponding to the inter-electrode region on a semiconductor substrate; forming the electrode material on the entire surface of the semiconductor substrate on which the insulating film is formed;
The method for manufacturing a solid-state imaging device according to claim 1, further comprising: removing the electrode material on the insulating film and flattening a surface.

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