JP2004363128A - Resin wiring board with pin - Google Patents

Resin wiring board with pin Download PDF

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Publication number
JP2004363128A
JP2004363128A JP2003155895A JP2003155895A JP2004363128A JP 2004363128 A JP2004363128 A JP 2004363128A JP 2003155895 A JP2003155895 A JP 2003155895A JP 2003155895 A JP2003155895 A JP 2003155895A JP 2004363128 A JP2004363128 A JP 2004363128A
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JP
Japan
Prior art keywords
hole
conductor
pin
wiring board
resin
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JP2003155895A
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Japanese (ja)
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JP4460854B2 (en
Inventor
Naoya Nakanishi
直也 中西
Masahiro Kamata
匡太 鎌田
Kazuya Ono
和也 小野
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a resin wiring board with pin in which connection pins are soldered to the pin-pad conductors of the resin wiring board and which is improved in the reliability of electrical characteristics. <P>SOLUTION: The resin wiring board 1 with pin is provided with connections 6 (composed of via conductors) which electrically connect lid-like conductor layers 4 formed on a core substrate 2 having through-hole conductors 22 and filling materials 23 in through holes 21 to the pin-pad conductors 5 provided with connection pins 9 which can be connected to the connection terminals of an external substrate. The resin wiring board is characterised in that the center axial lines 901 of the connection pins 9 not positioned on the through holes 21 when the penetrated directions of the through hole 21 are the directions of the center axial directions of the through holes 21. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明が属する技術分野】
本発明はピン付樹脂製配線基板に関し、詳しくは半導体集積回路素子(IC)等の電子部品を搭載して封止するPGA(ピングリッドアレイ)タイプのパッケージ配線基板のように、層間絶縁体層が樹脂材を用いて形成されるとともに、その配線基板の主面に形成された所定数のピンパッド導体に接続ピン(接続端子)がハンダ付けされたピン付樹脂製配線基板に関する。
【0002】
【従来の技術】
PGAタイプの配線基板は、その一主面にLSIやICチップなどの電子部品を搭載する際に用いる所定数のパット状電極を備えており、他方の主面にはマザーボードなどに設けられたソケットへ接続するための所定数のピンパッド導体及びそれにハンダ付けされた接続ピン(接続端子)を備えたものとされている。このようなタイプのピン付樹脂製配線基板においては、搭載するLSIやICチップあるいはチップコンデンサなどの電子部品の高集積化および高密度化を図るために、小型化や接続端子数(ピン数)の増大化が進められている。
【0003】
このようなピン付樹脂製配線基板の内部構造としては、図2(a)に示すように、絶縁性の基板に形成されたスルーホール内にスルーホール導体及び充填材を有するコア基板と、その上に形成された蓋状導体層、樹脂層、ピンパッド導体、及び接続ピン(接続端子)と、スルーホール導体とピンパッド導体(それにハンダ付けされた接続ピン)を導通させるよう樹脂層に埋設されたビア導体と、を備えるものが一般的である。
【0004】
【特許文献1】
特開2003−8219号公報(図1参照)
【0005】
【発明が解決しようとする課題】
上記のようなピン付樹脂製配線基板においては、製造の際などに行われる熱サイクルの過程で次のような問題が生じる。樹脂製配線基板の核となるコア基板には、2つの主面間を導通させるために、樹脂等からなる絶縁材基板の所定位置に厚さ方向を突き抜ける金属層が形成されている。金属と樹脂では熱膨張率が異なるため、熱サイクルによるコア基板の厚さ方向の膨張/収縮は位置によって偏りが生じる。このため、コア基板上に積層された層においては、コア基板の膨張/収縮により加わる力が不均一なものとなり、その結果、ビア導体の接合面等でクラックが発生し、スルーホール導体からピンパッド導体(及び、それにハンダ付けされた接続ピン)への電気的な接続が断ち切られやすくなってしまうという問題が生じていた。このことは、樹脂配線基板に求められる電気的特性などの品質が保持されないことに繋がる。
【0006】
本発明は、まさに上記問題を鑑みてなされたものである。樹脂製配線基板のピンパッド導体に接続ピンがハンダ付けされたピン付樹脂製配線基板を対象とし、電気的特性の信頼性の高いピン付樹脂製配線基板を提供することにある。
【0007】
【課題を解決するための手段及び作用・発明の効果】
上記課題を解決するため本発明のピン付樹脂製配線基板では、
絶縁性の基板に貫通して形成されたスルーホール、及び該スルーホールの内周面に形成された略筒状のスルーホール導体、及び該スルーホール導体の中空部に充填された充填材、を有するコア基板と、
前記コア基板の少なくとも一方の主面上において、前記スルーホールの端面を含む形にて形成され、かつ前記スルーホール導体と導通する蓋状導体層と、
前記蓋状導体層上に形成された複数の樹脂層と、
前記複数の樹脂層上に形成されたピンパッド導体と、
棒状部と該棒状部の一方の端部に形成された鍔部とからなり、該鍔部において前記ピンパッド導体上にハンダ付けされた、外部基板の接続端子と接続可能な接続ピンと、
前記蓋状導体層と前記ピンパッド導体とを導通させるよう前記複数の樹脂層のそれぞれに埋設されたビア導体からなる接続部と、
を備えるピン付樹脂製配線基板であって、
前記接続部は、フィルドビアからなるそれぞれの前記ビア導体が略同心状に連なるよう接続されたスタックドビアにて構成されるとともに、
前記スルーホールの貫通方向を中心軸線方向とした場合、前記スタックドビア(もしくは、前記接続ピン及び前記スタックドビア)の中心軸線は、前記スルーホール上に位置しないことを特徴とする。
【0008】
一般に、樹脂材の熱膨張率は、金属材のそれよりも大きい。図2(a)に示すようなピン付樹脂製配線基板1が加熱された場合、コア基板2を構成する略筒状のスルーホール導体22(金属材)、及びスルーホール導体22の中空部に充填された充填材23(樹脂材)、及びスルーホール21を有する絶縁性の基板材24(樹脂材:スルーホール導体22の周囲に位置する)は、それぞれ板厚方向に膨張する。その際、図2(b)に示すように、スルーホール導体21(金属材)の膨張が周囲の樹脂材23、24と比べ小さくなるめ、コア基板2の膨張に伴い、その上に積層されたの蓋状導体層4、及び樹脂層3、及びピンパッド導体5に印加される力に偏りが生じる。具体的には、スルーホール導体22近辺上においてのみ、周囲と比べて印加される力が小さくなるため、その近辺上ではあたかも下方向へ引き下げられるような力が発生する。また、ピン付樹脂製配線基板1が冷却された場合には、それとは逆の現象が起き、図2(c)に示すように、スルーホール導体22上近辺では、あたかも上方向へ突き上げられるような力が発生する。したがって、スルーホール導体22上に、フィルドビアからなるビア導体61、62や、ピンパッド導体5、接続ピン9の中心軸線があれば、コア基板2からの引き下げ/突き上げの影響を受け易く、蓋状導体層4とビア導体61の間、及びビア導体間(ビア導体61及び62の間)、及びビア導体62とピンパッド導体5の間に過度の応力集中が生じてしまい、それらの接続が断ち切られやすくなってしまう。
【0009】
そこで上記のように、スルーホール上の蓋状導体層に接続されているスタックドビア、及びピンパッド導体にハンダ付けされた接続ピンの中心軸線を、それぞれスルーホール上に位置しないように配置することで、上記のようなコア基板からの引き下げ/突き上げの影響を受け難くすることが可能となる。
【0010】
なお、ここでいう中心軸線とは、スルーホールの貫通方向と同方向で、かつそれぞれスルーホール、スタックドビア、接続ピン(接続ピンにおける中心軸線は棒状部にて規定されるものとする)を、前記貫通方向と垂直に交わる面に投影した略円形状の投影像における中心位置を通るものとする。
【0011】
また、本発明においては、製造上の理由等によりスタックドビアや接続ピンの配置される位置に誤差が生じることが考えられるので、中心軸線間のズレ量が0μm以上30μm以下の距離となる程度の誤差を許容するものとする。
【0012】
本発明において、スルーホールの径は50μm以上400μm以下とされることが好ましい。スルーホールの径が過度に小さい場合(50μm未満)、図3に示すコア基板2の膨張のように、充填材23の端面(充填材23と蓋状導体層4が接する面)のうち、熱膨張率の小さいスルーホール導体22に接続された蓋状導体層4により膨張が妨げられる部分(充填材23の端面の周縁付近)の割合が増加してしまう。この場合、充填材23の膨張は、スルーホール21の中心軸付近に集中してしまい、その付近上で突き上げによる過度の応力集中が生じやすくなってしまうため、スタックドビア及び接続ピンをスルーホールの中心軸線付近に配置することは逆に不利となってしまう場合がある。このような影響を避けるためには、スルーホールの径は50μm以上であることが必要である。また、スルーホールの径が400μmを超えると、配線基板の高集積化および高密度化に不利となってしまう場合が考えられる。より好ましくは、スルーホールの径は50μm以上300μm以下である。
【0013】
また、スルーホール径が上記範囲である場合、略筒状のスルーホール導体の平均壁厚は5μm以上50μm以下とされることが好ましい。平均壁厚が過度に厚いと、上述のようにスルーホール導体内部の充填材の膨張がスルーホールの中心軸付近に集中してしまい、突き上げによる過度の応力集中が生じる場合があるので、上限値を50μmとする。また、下限値については、特には限定されないが、過度に薄くすると導通が取れない場合が考えられるので、5μmとする。より好ましくは、略筒状のスルーホール導体の平均壁厚は5μm以上30μm以下である。
【0014】
さらに、スルーホール、またはスルーホール導体が上記範囲である場合、スタックドビアの中心軸線はスルーホール導体の外縁端から5μm以上600μm以下の距離となる位置に、また接続ピンの中心軸線はスルーホール導体の外縁端から5μm以上600μm以下の距離となる位置に配置されることが好ましい。両者とも該距離が下限値よりも小さければ、上記のようなコア基板からの引き下げ/突き上げの影響が大きいスルーホール導体位置に、その中心軸線が近過ぎてその影響を受け易くなってしまい、上限値よりも大きければ、配線基板の高集積化および高密度化に不利となってしまう場合が考えられる。より好ましくは、スタックドビアの中心軸線のスルーホール導体の外縁端からの距離は30μm以上500μm以下、接続ピンの中心軸線のスルーホール導体の外縁端からの距離は30μm以上500μm以下である。
【0015】
【発明の実施の形態】
以下、本発明のピン付樹脂製配線基板の実施形態を、図面を参照しつつ説明する。図1は、ピン付樹脂製配線基板1の断面図である。ピン付樹脂製配線基板1は、平面視矩形(例えば、縦横各50mm、厚さ1mm)をなし、図はそのうちの、マザーボード等の外部基板の接続端子と接続可能な接続ピン9が所定数設置される主面側の内部構造の一部を拡大した図である。また、図示しないが、これとは反対の主面側には、搭載する半導体集積回路素子IC接続用の電極が所定数形成されているとともに、内部には各層の内部配線層、各内部配線層同士を接続するビア導体が形成されている。
【0016】
コア基板2は、BT樹脂を主成分とする厚さ0.8mm程度の基板材24に1.3mm程度の間隔で貫通して形成された直径300μm程度のスルーホール21と、スルーホール21の内周面に形成された略筒状(壁厚18μm程度)で銅を主成分とするスルーホール導体22と、スルーホール導体22の中空部に充填されたエポキシ樹脂を主成分とする充填材23とを備える。なお、コア基板2は、その内部に導体層やビア導体が形成されていてもよい。コア基板2の表面上には、スルーホール21の端面を含む形にて蓋状導体層4が形成され、スルーホール導体22と導通している。蓋状導体層4は、例えば径が350μm程度、厚さが35μm程度の円柱形で、その中心軸線とスルーホール21の貫通方向の中心軸線201とが一致するよう配置される。また、径がスルーホール径(300μm程度)よりも大きいので、基板材24上をスルーホール21外縁端から25μm程度覆うような形態となっている。
【0017】
このようなコア基板2上には、エポキシ樹脂を主成分とし、下側樹脂層31と上側樹脂層32の2層からなり、厚さ50μm程度(1層あたり厚さ25μm程度)の複数の樹脂層3が形成される。本形態では複数の樹脂層3は2層からなるが、2層に限らず3層以上であってもよい。そして、上側樹脂層32上には、円柱形の銅を主成分とする導体層が1.3mm程度の間隔で所定数形成されており、その表面にはニッケルメッキ及び金メッキがかけられることで、ピンパッド導体5をなしている。ピンパッド導体5の大きさは径が800μm程度、厚さが15μm程度となっている。また、ピンパッド導体5の設置位置は、後述するスタックドビア(接続部)6のうちの上側フィルドビア62に接続可能な範囲であり、且つ上側主面51に略同心状に設置される接続ピン9が後述する条件を満たして設置可能な範囲とされる。
【0018】
なお、上側樹脂層32上において、ピンパッド導体5が配されていない部分については、厚さ25μm程度のソルダーレジスト層7が被服形成されている。このソルダーレジスト層7は、本形態ではピンパッド導体5の上側主面51周縁を所定の幅で覆って開口され、ピンパッド導体5の上側主面51の中心より部位を同心状に露出させるように形成されている。因みに本例では、その露出部位(ソルダーレジスト層7の開口、つまりピンパッド導体5の上側主面51うちソルダーレジスト層7に覆われていない部分)の径、つまりピンパッド導体5の上側主面51のハンダ付け面の径は650μm程度に設定されている。
【0019】
ピンパッド導体5の上側主面51には、接続ピン9が設置されており、中心軸線901(接続ピン9の棒状部91により規定される)がスルーホール21上に位置しないような位置、具体的にはスルーホール21の外縁端からの距離Lが約300μm程度となる位置にある。接続ピン9は、銅を主成分とする合金、例えばアロイ194(CDA合金 C19400(ASTM B 465準拠))等の銅合金からなり、断面円形の丸棒状の棒状部(直径約0.30mm程度)91をもつネイル形状のものである(全長約2mm程度)。その一方の端部には、半径方向に突出する円形の鍔部92を同心状で備えており、接続ピン9は鍔部92において適量の公知のハンダでハンダ付けされることにより設置されている(特許第3160583号公報)。ハンダ付けにより形成されるハンダの層をハンダ層8という。ただし、その鍔部92のうち、ピンパッド導体5の上側主面51に対向する接合面921は全体が凸となす球面状に形成され、ピンパッド導体5の上側主面51に同心状に当接するように配置される。なお、ハンダは、半導体集積回路素子ICのハンダ付け温度より融点が高い組成のハンダ(例えば、Pb82%/Sn10%/Sb8%、又はSn95%、Sb5%)とされている。なお、本実施形態においては、接続ピン9にはピンパッド導体5の上側主面51に対向する接合面921の全体が凸となす球面状の球面ピンを用いているが、これに限定されることはなく、ピンパッド導体5の上側主面51に対向する接合面が平面であるフラットピンを用いてもよい。
【0020】
ハンダ層8を形成するハンダの量は、接続ピン9を鍔部92において固定できる程度に適宜選択されている。また、ハンダを溶融させて接続ピン9を固定するため、ハンダ層8はピンパッド導体5の上側主面51表面に向かって濡れ広る形態となっている。ただし、ハンダ層8は、形成後のピンパッド導体5の上側主面51からの高さが300μm程度となることが望ましく、さらにハンダ層8の濡れ広がりが、ピンパッド導体5の上側主面51の周縁端位置を超えないようにすることが望ましい。
【0021】
複数の樹脂層3のそれぞれの層(下側樹脂層31及び上側樹脂層32)には、フィルドビア61、62が埋設されている(下側樹脂層31に埋設されたものを61、上側樹脂層32に埋設されたものを62とする)。フィルドビアは、樹脂層を貫通するよう形成されたビア孔を、銅を主成分とする金属材で充填することにより形成され、その最大径は例えば約85μm程度で構成される。フィルドビア61、62は略同心状に接続され、スタックドビア(接続部)6を形成しており、さらには、下側フィルドビア61はその下の蓋状導体層4の上側主面41と、上側フィルドビア62はその上のピンパッド導体5の下側主面52と接続されることで、蓋状導体層4とピンパッド導体5の間を導通させている。このスタックドビア(接続部)6の中心軸601は、コア基板2の収縮/膨張の影響を受け難くするよう、スルーホール21の外側、詳しくはスルーホール21の外縁端からの距離VLが50μm程度となるよう配置される。また、本実施形態においては、スタックドビア(接続部)6の中心軸線601と接続ピン9の中心軸線901とが一致するよう配置されているが、これに限ることはなく、それぞれの距離PL、VLが上記の範囲内にあり、且つスタックドビア(接続部)6とピンパッド導体5が接続可能な位置関係にあればよい。
【0022】
【実施例】
ここで、本発明のピン付樹脂製配線基板の具体的な実施例を比較例とともに説明する。上述の実施形態(図1)を実施例とし、比較例は、図2(a)に示すようなフィルドビアからなるビア導体、及びピンパッド導体が、スルーホール導体上に中心軸線を揃えて配置された形態とした。
【0023】
実施例及び比較例について、−55℃〜125℃の温度間で加熱、冷却を繰り返す熱サイクル(1サイクル当たり10分間)を、▲1▼与える前、▲2▼100サイクル後、▲3▼500サイクル後の3種類のサンプルをそれぞれ用意し、断面SEM(Scanning Electron Microscope)観察を行い、クラック発生率の評価を行った。
【0024】
評価結果によると、実施例では▲1▼熱サイクル前、▲2▼100サイクル後、▲3▼500サイクル後のサンプル全てにおいて、SEM像にクラック等の異変は見られなかったのに対し、比較例では、▲2▼100サイクル後、及び▲3▼500サイクル後の約半数以上のサンプルにクラック発生が認められた。また、▲1▼熱サイクル前のサンプルにおいても、既にクラックが発生しているものが見られた。これは、ハンダピン設置時の熱処理によるものと考えられる。
【図面の簡単な説明】
【図1】本発明のピン付樹脂製配線基板の内部構造の一部を表す図
【図2】コア基板の膨張/収縮が及ぼす影響を示す図
【図3】スルーホール径が小さい場合のコア基板の膨張/収縮
【符号の説明】
1 ピン付樹脂製配線基板
2 コア基板
21 スルーホール
22 スルーホール導体
23 充填材
3 複数の樹脂層
31 下側樹脂層
32 上側樹脂層
4 蓋状導体層
5 ピンパッド導体
6 スタックドビア(接続部)
61 下側フィルドビア
62 上側フィルドビア
7 ソルダーレジスト層
8 ハンダ層
9 接続ピン
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a resin wiring board with pins, and more particularly, to an interlayer insulating layer such as a PGA (pin grid array) type package wiring board in which electronic components such as semiconductor integrated circuit elements (ICs) are mounted and sealed. The present invention relates to a resin wiring board with pins, in which connection pins (connection terminals) are soldered to a predetermined number of pin pad conductors formed on the main surface of the wiring board.
[0002]
[Prior art]
The PGA type wiring board has a predetermined number of pad-like electrodes used for mounting electronic components such as LSIs and IC chips on one main surface, and a socket provided on a motherboard or the like on the other main surface. It has a predetermined number of pin pad conductors for connection to the connector and connection pins (connection terminals) soldered thereto. In this type of resin wiring board with pins, the size and the number of connection terminals (number of pins) are reduced in order to increase the integration and density of electronic components such as LSIs, IC chips or chip capacitors to be mounted. Are increasing.
[0003]
As shown in FIG. 2A, the internal structure of such a resin wiring board with pins includes a core substrate having a through-hole conductor and a filler in a through-hole formed in an insulating substrate; The cover-like conductor layer, the resin layer, the pin pad conductor, and the connection pin (connection terminal) formed on the top are buried in the resin layer so as to conduct the through-hole conductor and the pin pad conductor (connection pin soldered thereto). And a via conductor.
[0004]
[Patent Document 1]
JP 2003-8219 (see FIG. 1)
[0005]
[Problems to be solved by the invention]
In the resin wiring board with pins as described above, the following problem arises in the course of the thermal cycle performed during manufacturing or the like. A metal layer that penetrates through a thickness direction is formed at a predetermined position of an insulating material substrate made of resin or the like in order to conduct between two main surfaces on a core substrate serving as a core of the resin wiring substrate. Since the metal and the resin have different coefficients of thermal expansion, the expansion / contraction in the thickness direction of the core substrate due to the heat cycle is biased depending on the position. For this reason, in the layers laminated on the core substrate, the force applied due to the expansion / contraction of the core substrate becomes uneven, and as a result, cracks occur at the joint surfaces of the via conductors, and the pin pads are removed from the through-hole conductors. There has been a problem that the electrical connection to the conductor (and the connection pins soldered thereto) is easily cut off. This leads to failure to maintain the quality such as electrical characteristics required for the resin wiring board.
[0006]
The present invention has been made in view of the above problems. An object of the present invention is to provide a resin wiring board with pins having high reliability in electrical characteristics for a resin wiring board with pins in which connection pins are soldered to pin pad conductors of the resin wiring board.
[0007]
Means for Solving the Problems and Functions / Effects of the Invention
In order to solve the above problems, in the resin wiring board with pins of the present invention,
A through-hole formed through the insulating substrate, and a substantially cylindrical through-hole conductor formed on the inner peripheral surface of the through-hole, and a filler filled in a hollow portion of the through-hole conductor. A core substrate having
On at least one main surface of the core substrate, a lid-like conductor layer formed to include an end surface of the through-hole, and conducting with the through-hole conductor,
A plurality of resin layers formed on the lid-like conductor layer,
A pin pad conductor formed on the plurality of resin layers,
A connection pin comprising a rod-shaped part and a flange formed at one end of the rod-shaped part, soldered on the pin pad conductor at the flange, and connectable to a connection terminal of an external board,
A connection portion formed of a via conductor embedded in each of the plurality of resin layers so as to conduct the lid-shaped conductor layer and the pin pad conductor,
A resin wiring board with pins comprising:
The connection portion is configured by stacked vias connected so that each of the via conductors formed of filled vias are connected in a substantially concentric manner,
When the penetration direction of the through hole is the central axis direction, the central axis of the stacked via (or the connection pin and the stacked via) is not located on the through hole.
[0008]
Generally, the thermal expansion coefficient of a resin material is larger than that of a metal material. When the resin-made wiring board 1 with pins as shown in FIG. 2A is heated, a substantially cylindrical through-hole conductor 22 (metal material) constituting the core substrate 2 and a hollow portion of the through-hole conductor 22 are formed. The filled filler 23 (resin material) and the insulating substrate material 24 having the through holes 21 (resin material: located around the through-hole conductors 22) expand in the thickness direction. At this time, as shown in FIG. 2B, the expansion of the through-hole conductor 21 (metal material) is smaller than that of the surrounding resin materials 23 and 24. In addition, a bias is generated in the force applied to the lid-like conductor layer 4, the resin layer 3, and the pin pad conductor 5. Specifically, the applied force is smaller only in the vicinity of the through-hole conductor 22 than in the surroundings, so that a force is generated in the vicinity of the through-hole conductor 22 as if the force were lowered downward. When the resin wiring board with pins 1 is cooled, the opposite phenomenon occurs. As shown in FIG. 2C, the pin-like resin wiring board 22 is pushed upward in the vicinity of the through-hole conductor 22. Force is generated. Therefore, if the via conductors 61 and 62 formed of filled vias, the center axes of the pin pad conductors 5 and the connection pins 9 are provided on the through-hole conductors 22, the lid conductors are easily affected by pulling down / pushing up from the core substrate 2. Excessive stress concentration occurs between the layer 4 and the via conductor 61, between the via conductors (between the via conductors 61 and 62), and between the via conductor 62 and the pin pad conductor 5, and their connection is easily cut off. turn into.
[0009]
Therefore, as described above, the stacked via connected to the lid-like conductor layer on the through hole, and the center axis of the connection pin soldered to the pin pad conductor are arranged so as not to be located on the through hole, respectively. It is possible to reduce the influence of the pulling / pushing up from the core substrate as described above.
[0010]
Note that the central axis here is the same direction as the direction of penetration of the through-hole, and the through-hole, the stacked via, and the connection pin (the center axis of the connection pin is defined by a rod-shaped portion) are respectively It passes through the center position in a substantially circular projection image projected on a plane perpendicular to the penetration direction.
[0011]
Further, in the present invention, it is conceivable that an error occurs in the position where the stacked via or the connection pin is arranged due to manufacturing reasons or the like. Therefore, an error such that the amount of deviation between the center axes becomes a distance of 0 μm or more and 30 μm or less. Shall be allowed.
[0012]
In the present invention, it is preferable that the diameter of the through hole is 50 μm or more and 400 μm or less. When the diameter of the through-hole is excessively small (less than 50 μm), as shown in FIG. 3, the expansion of the core substrate 2, the heat is applied to the end surface of the filler 23 (the surface where the filler 23 contacts the lid-shaped conductor layer 4). The proportion of the portion where the expansion is hindered by the lid-like conductor layer 4 connected to the through-hole conductor 22 having a small expansion coefficient (near the periphery of the end face of the filler 23) increases. In this case, the expansion of the filler 23 concentrates in the vicinity of the center axis of the through-hole 21, and excessive stress concentration due to thrust up near the center tends to occur. Arrangement near the axis may be disadvantageous. In order to avoid such an effect, the diameter of the through hole needs to be 50 μm or more. Further, when the diameter of the through hole exceeds 400 μm, it may be disadvantageous for high integration and high density of the wiring board. More preferably, the diameter of the through hole is 50 μm or more and 300 μm or less.
[0013]
When the diameter of the through hole is in the above range, it is preferable that the average wall thickness of the substantially cylindrical through hole conductor is 5 μm or more and 50 μm or less. If the average wall thickness is excessively thick, the expansion of the filler inside the through-hole conductor concentrates near the central axis of the through-hole as described above, and excessive stress concentration due to thrust may occur, so the upper limit value is set. Is set to 50 μm. The lower limit is not particularly limited. However, if the thickness is excessively small, conduction may not be obtained. More preferably, the average wall thickness of the substantially cylindrical through-hole conductor is 5 μm or more and 30 μm or less.
[0014]
Further, when the through-hole or the through-hole conductor is in the above range, the center axis of the stacked via is located at a distance of 5 μm or more and 600 μm or less from the outer edge of the through-hole conductor, and the center axis of the connection pin is It is preferable to be arranged at a position having a distance of 5 μm or more and 600 μm or less from the outer edge. In both cases, if the distance is smaller than the lower limit value, the center axis is too close to the through-hole conductor position where the influence of the pull-down / push-up from the core substrate is large as described above, so that the influence is easily affected. If the value is larger than the above value, it may be disadvantageous for high integration and high density of the wiring board. More preferably, the distance of the center axis of the stacked via from the outer edge of the through-hole conductor is 30 μm or more and 500 μm or less, and the distance of the center axis of the connection pin from the outer edge of the through-hole conductor is 30 μm or more and 500 μm or less.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a resin wiring board with pins of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a resin wiring board 1 with pins. The resin wiring board 1 with pins has a rectangular shape in a plan view (for example, each of 50 mm in length and width, 1 mm in thickness), and a predetermined number of connection pins 9 which can be connected to connection terminals of an external board such as a motherboard are provided in the figure. It is the figure which expanded a part of internal structure of the main surface side performed. Although not shown, a predetermined number of electrodes for connecting a semiconductor integrated circuit element IC to be mounted are formed on the opposite main surface side, and the internal wiring layers of each layer and each internal wiring layer are formed therein. Via conductors for connecting them are formed.
[0016]
The core substrate 2 has a through hole 21 having a diameter of about 300 μm formed by penetrating through a substrate material 24 containing BT resin as a main component and having a thickness of about 0.8 mm at an interval of about 1.3 mm. A substantially cylindrical (wall thickness of about 18 μm) through-hole conductor 22 mainly composed of copper and a filler 23 mainly composed of epoxy resin filled in a hollow portion of the through-hole conductor 22 formed on the peripheral surface; Is provided. The core substrate 2 may have a conductor layer or a via conductor formed therein. The lid-shaped conductor layer 4 is formed on the surface of the core substrate 2 so as to include the end face of the through hole 21, and is electrically connected to the through hole conductor 22. The lid-shaped conductor layer 4 is, for example, a column having a diameter of about 350 μm and a thickness of about 35 μm, and is arranged so that the central axis thereof coincides with the central axis 201 of the through-hole 21 in the through direction. Since the diameter is larger than the diameter of the through hole (about 300 μm), the substrate material 24 is covered by about 25 μm from the outer edge of the through hole 21.
[0017]
On such a core substrate 2, a plurality of resins having a thickness of about 50 μm (about 25 μm per layer) are composed of two layers, a lower resin layer 31 and an upper resin layer 32, which are mainly composed of epoxy resin. Layer 3 is formed. In the present embodiment, the plurality of resin layers 3 are composed of two layers, but may be three or more without being limited to two layers. On the upper resin layer 32, a predetermined number of cylindrical conductor layers mainly composed of copper are formed at intervals of about 1.3 mm, and the surface thereof is nickel-plated and gold-plated. The pin pad conductor 5 is formed. The pin pad conductor 5 has a diameter of about 800 μm and a thickness of about 15 μm. The position of the pin pad conductor 5 is within a range where the pin pad conductor 5 can be connected to the upper filled via 62 of the stacked via (connecting portion) 6 described later, and the connection pin 9 installed substantially concentrically on the upper main surface 51 is described later. It is a range that can be installed under the conditions that meet the requirements.
[0018]
In addition, on the upper resin layer 32, a solder resist layer 7 having a thickness of about 25 μm is formed on portions where the pin pad conductors 5 are not arranged. In the present embodiment, the solder resist layer 7 is formed so as to cover the periphery of the upper main surface 51 of the pin pad conductor 5 with a predetermined width, and to form a portion concentrically exposed from the center of the upper main surface 51 of the pin pad conductor 5. Have been. Incidentally, in this example, the diameter of the exposed portion (the opening of the solder resist layer 7, that is, the portion of the upper main surface 51 of the pin pad conductor 5 that is not covered by the solder resist layer 7), that is, the diameter of the upper main surface 51 of the pin pad conductor 5. The diameter of the soldering surface is set to about 650 μm.
[0019]
The connection pin 9 is provided on the upper main surface 51 of the pin pad conductor 5, and a position where the center axis 901 (defined by the rod portion 91 of the connection pin 9) is not located on the through hole 21, specifically, Is located at a distance L from the outer edge of the through hole 21 to about 300 μm. The connecting pin 9 is made of an alloy containing copper as a main component, for example, a copper alloy such as Alloy 194 (CDA alloy C19400 (based on ASTM B465)) or the like, and is a round bar-shaped rod having a circular cross section (about 0.30 mm in diameter). It has a nail shape of 91 (total length of about 2 mm). At one end thereof, a circular flange 92 protruding radially is provided concentrically, and the connection pin 9 is installed by being soldered to the flange 92 with an appropriate amount of known solder. (Japanese Patent No. 3160583). A layer of solder formed by soldering is called a solder layer 8. However, of the flange portion 92, the joint surface 921 facing the upper main surface 51 of the pin pad conductor 5 is formed in a spherical shape that is entirely convex, and concentrically contacts the upper main surface 51 of the pin pad conductor 5. Placed in Note that the solder is a solder having a composition having a melting point higher than the soldering temperature of the semiconductor integrated circuit element IC (for example, Pb 82% / Sn 10% / Sb 8%, or Sn 95% and Sb 5%). In the present embodiment, a spherical spherical pin is used as the connection pin 9 in which the entire joint surface 921 facing the upper main surface 51 of the pin pad conductor 5 is convex. However, the present invention is not limited to this. Instead, a flat pin having a flat bonding surface facing the upper main surface 51 of the pin pad conductor 5 may be used.
[0020]
The amount of solder forming the solder layer 8 is appropriately selected so that the connection pin 9 can be fixed at the flange 92. Further, in order to fix the connection pins 9 by melting the solder, the solder layer 8 has a form that spreads toward the surface of the upper main surface 51 of the pin pad conductor 5. However, the height of the solder layer 8 from the upper main surface 51 of the pin pad conductor 5 after formation is desirably about 300 μm, and the spread of the solder layer 8 spreads over the periphery of the upper main surface 51 of the pin pad conductor 5. It is desirable not to exceed the end position.
[0021]
Filled vias 61 and 62 are buried in each of the plurality of resin layers 3 (the lower resin layer 31 and the upper resin layer 32). What is buried in 32 is referred to as 62). The filled via is formed by filling a via hole formed through a resin layer with a metal material containing copper as a main component, and has a maximum diameter of, for example, about 85 μm. The filled vias 61 and 62 are connected substantially concentrically to form a stacked via (connection portion) 6, and the lower filled via 61 further includes an upper main surface 41 of the lid-like conductor layer 4 below the lower via and an upper filled via 62. Is electrically connected between the lid-shaped conductor layer 4 and the pin pad conductor 5 by being connected to the lower main surface 52 of the pin pad conductor 5 thereon. The center axis 601 of the stacked via (connecting portion) 6 has a distance VL from the outside of the through hole 21, specifically, the outer edge of the through hole 21 of about 50 μm so as to be hardly affected by the contraction / expansion of the core substrate 2. It is arranged so that it becomes. Further, in the present embodiment, the center axis 601 of the stacked via (connection part) 6 and the center axis 901 of the connection pin 9 are arranged so as to coincide with each other. However, the present invention is not limited to this, and the respective distances PL and VL are provided. Is within the above-mentioned range, and the positional relationship is such that the stacked via (connecting portion) 6 and the pin pad conductor 5 can be connected.
[0022]
【Example】
Here, specific examples of the resin wiring board with pins of the present invention will be described together with comparative examples. The above embodiment (FIG. 1) is taken as an example, and in the comparative example, a via conductor formed of a filled via as shown in FIG. 2A and a pin pad conductor are arranged on the through-hole conductor with their central axes aligned. Form.
[0023]
Regarding Examples and Comparative Examples, a heat cycle (10 minutes per cycle) in which heating and cooling are repeated between -55 ° C. and 125 ° C. is performed before (1), after (2) 100 cycles, and after (3) 500 Three types of samples after the cycle were prepared, and a cross section SEM (Scanning Electron Microscope) was observed to evaluate the crack generation rate.
[0024]
According to the evaluation results, in Examples, (1) before heat cycling, (2) after 100 cycles, and (3) all samples after 500 cycles, no abnormalities such as cracks were observed in the SEM images. In the examples, cracks were observed in about half or more of the samples after (2) 100 cycles and (3) 500 cycles. (1) In the sample before the thermal cycle, cracks were already observed in some samples. This is considered to be due to heat treatment at the time of solder pin installation.
[Brief description of the drawings]
FIG. 1 is a view showing a part of the internal structure of a resin wiring board with pins of the present invention. FIG. 2 is a view showing the influence of expansion / contraction of a core board. FIG. 3 is a view showing a core having a small through-hole diameter. Expansion / contraction of substrate [Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Pin-made resin wiring board 2 Core board 21 Through hole 22 Through hole conductor 23 Filler 3 Plural resin layers 31 Lower resin layer 32 Upper resin layer 4 Cover conductor layer 5 Pin pad conductor 6 Stacked via (connection part)
61 Lower Filled Via 62 Upper Filled Via 7 Solder Resist Layer 8 Solder Layer 9 Connection Pin

Claims (2)

絶縁性の基板に貫通して形成されたスルーホール、及び該スルーホールの内周面に形成された略筒状のスルーホール導体、及び該スルーホール導体の中空部に充填された充填材、を有するコア基板と、
前記コア基板の少なくとも一方の主面上において、前記スルーホールの端面を含む形にて形成され、かつ前記スルーホール導体と導通する蓋状導体層と、
前記蓋状導体層上に形成された複数の樹脂層と、
前記複数の樹脂層上に形成されたピンパッド導体と、
棒状部と該棒状部の一方の端部に形成された鍔部とからなり、該鍔部において前記ピンパッド導体上にハンダ付けされた、外部基板の接続端子と接続可能な接続ピンと、
前記蓋状導体層と前記ピンパッド導体とを導通させるよう前記複数の樹脂層のそれぞれに埋設されたビア導体からなる接続部と、
を備えるピン付樹脂製配線基板であって、
前記接続部は、フィルドビアからなるそれぞれの前記ビア導体が略同心状に連なるよう接続されたスタックドビアにて構成されるとともに、
前記スルーホールの貫通方向を中心軸線方向とした場合、前記スタックドビアの中心軸線は、前記スルーホール上に位置しないことを特徴とするピン付樹脂製配線基板。
A through-hole formed through the insulating substrate, and a substantially cylindrical through-hole conductor formed on the inner peripheral surface of the through-hole, and a filler filled in a hollow portion of the through-hole conductor. A core substrate having
On at least one main surface of the core substrate, a lid-like conductor layer formed to include an end surface of the through-hole, and conducting with the through-hole conductor,
A plurality of resin layers formed on the lid-like conductor layer,
A pin pad conductor formed on the plurality of resin layers,
A connection pin comprising a rod-shaped part and a flange formed at one end of the rod-shaped part, soldered on the pin pad conductor at the flange, and connectable to a connection terminal of an external board,
A connection portion formed of a via conductor embedded in each of the plurality of resin layers so as to conduct the lid-shaped conductor layer and the pin pad conductor,
A resin wiring board with pins comprising:
The connection portion is configured by stacked vias connected so that each of the via conductors formed of filled vias are connected in a substantially concentric manner,
In the case where the through-hole direction of the through hole is the central axis direction, the central axis line of the stacked via is not located on the through hole.
前記接続ピンの中心軸線は、前記スルーホール上に位置しないことを特徴とする請求項1に記載のピン付樹脂製配線基板。2. The resin wiring board with pins according to claim 1, wherein a center axis of the connection pin is not located on the through hole. 3.
JP2003155895A 2003-05-30 2003-05-30 Plastic wiring board with pins Expired - Fee Related JP4460854B2 (en)

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Application Number Priority Date Filing Date Title
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