JP2004362773A - Data-reproducing device and data-recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reproduce multiplexing data from a data recording medium, in appropriate synchronization according to a multiplexing state. <P>SOLUTION: In a reproducing device for reproducing a data-recording medium, including a multiplexing flag for indicating whether each of at least two kinds of data, is contained; and an effective flag for indicating whether the multiplexing flag is effective, the multiplexing state in a specific data unit is determined, based on the multiplexing flag, when the effective flag regarding respective data is indicated as being effective. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a data reproducing apparatus and a data recording medium, and is suitably applied to, for example, an apparatus using a recording medium on which a moving image is digitized and recorded.

  Conventionally, as a data reproducing apparatus for reproducing a disk as a recording medium on which a moving image is digitized and recorded, a data reproducing apparatus corresponding to a variable rate as shown in FIG. 124168 (published May 6, 1994). In this data reproducing apparatus, data recorded on an optical disk 101 is reproduced from a pickup 102. The pickup 102 irradiates the optical disk 101 with a laser beam, and reproduces data recorded on the optical disk 101 from the reflected light. The signal reproduced by the pickup 102 is sent to a demodulation circuit 103. The demodulation circuit 103 demodulates the reproduction signal output from the optical pickup 102 and outputs the demodulated signal to the sector detection circuit 104.

  The sector detection circuit 104 detects an address recorded for each sector from the supplied data, outputs the address to the ring buffer control circuit 106, and outputs the data to the subsequent ECC circuit 105 in a state where the sector is synchronized. . Further, the sector detection circuit 104 outputs a sector number abnormality signal to the track jump determination circuit 118 via the ring buffer control circuit 106 when the address cannot be detected or when the detected addresses are not continuous, for example. .

  The ECC circuit 105 detects an error in the data supplied from the sector detection circuit 104, corrects the error using a redundant bit that is not allowed in the data, and outputs the error to a ring buffer memory (FIFO) 107 for a track jump. I do. Further, if the ECC circuit 105 cannot correct the data error, it outputs an error occurrence signal to the track jump determination circuit 118.

  The ring buffer control circuit 106 controls writing and reading of the ring buffer memory 107 and monitors a code request signal for requesting data output from the multiplexed data separation circuit 108.

  The track jump determining circuit 118 monitors the output of the ring buffer control circuit 106, outputs a track jump signal to the tracking servo circuit 117 when a track jump is required, and tracks the reproduction position of the pickup 102 with respect to the optical disk 101. It is made to jump. Further, the track jump determination circuit 118 detects a sector number abnormal signal from the sector detection circuit 104 or an error occurrence signal from the ECC circuit 105, outputs a track jump signal to the above-described tracking servo circuit 117, and reproduces the playback position of the pickup 102. The track jump is made.

  The output of the ring buffer memory 107 is supplied to a multiplexed data separation circuit 108. A header separating circuit 109 of the multiplexed data separating circuit 108 separates a packet header and a packet header from the data supplied from the ring buffer memory 107 and supplies them to a separating circuit control circuit 111, and also switches the time-division multiplexed data to a switching circuit. 110 to the input terminal G. Output terminals (switched terminals) H1 and H2 of the switching circuit 110 are connected to input terminals of a video code buffer 113 and an audio code buffer 115, respectively. Further, the output of the video code buffer 113 is connected to the input of the video decoder 114, and the output of the audio code buffer 115 is connected to the input of the audio decoder 116.

  A code request signal generated by the video decoder 114 is input to a video code buffer 113, and a code request signal generated by the video code buffer 113 is input to a multiplexed data separation circuit 108. Similarly, the code request signal generated by the audio decoder 116 is input to the audio code buffer 115, and the code request signal generated by the audio code buffer 115 is input to the multiplexed data separation circuit 108.

  Next, the operation of each section of the data reproducing apparatus will be described. The pickup 102 irradiates the optical disk 101 with a laser beam and reproduces data recorded on the optical disk 101 from the reflected light. Then, the reproduction signal output from the pickup 102 is input to the demodulation circuit 103 and demodulated. The data demodulated by the demodulation circuit 103 is input to the ECC circuit 105 via the sector detection circuit 104, where error detection and correction are performed.

  If the sector number (address assigned to the sector of the optical disk 101) is not normally detected by the sector detection circuit 104, a sector number abnormality signal is output to the track jump determination circuit 118. The ECC circuit 105 outputs an error occurrence signal to the track jump determination circuit 118 when uncorrectable data occurs. The corrected data is supplied from the ECC circuit 105 to the ring buffer memory 107 and stored therein.

  The ring buffer control circuit 106 reads an address for each sector from the output of the sector detection circuit 104, and specifies a write address (write point (WP)) on the ring buffer memory 107 corresponding to the address. Further, the ring buffer control circuit 106 designates a read address (reproduction point (RP)) of data written in the ring buffer memory 107 based on a code request signal from the multiplexed data separation circuit 108 at the subsequent stage, and The data is read from (RP) and supplied to the multiplexed data separation circuit 108.

  The header separating circuit 109 of the multiplexed data separating circuit 108 separates the packet header and the packet header from the data supplied from the ring buffer memory 107 and supplies the separated data to the separating circuit control circuit 111. The separation circuit control circuit 111 sequentially connects the input terminal G and the output terminals (switched terminals) H1 and H2 of the switching circuit 110 according to the packet header stream id (steram id) information supplied from the header separation circuit 109. The time-division multiplexed data is correctly separated and supplied to the corresponding code buffers 113 and 115.

  The video code buffer 113 generates a code request signal to the multiplexed data separation circuit 108 according to the remaining amount of the internal code buffer. Then, the received data is stored. Also, it receives a code request signal from video decoder 114 and outputs internal data. The video decoder 114 reproduces a video signal from the supplied data and outputs the video signal from an output terminal.

  The audio code buffer 115 generates a code request signal to the multiplexed data separation circuit 108 according to the remaining amount of the internal code buffer. Then, the received data is stored. It also receives a code request signal from audio decoder 116 and outputs internal data. The audio decoder 116 reproduces an audio signal from the supplied data and outputs it from an output terminal.

  Thus, the video decoder 114 requests data from the video code buffer 113, the video code buffer 113 issues a request to the multiplexed data separation circuit 108, and the multiplexed data separation circuit 108 requests the ring buffer control circuit 106. Make a request. At this time, data flows from the ring buffer memory 107 in the opposite direction to the request.

  By the way, for example, when data processing pertaining to a simple screen continues and the data consumption per unit time of the video decoder 114 decreases, the reading from the ring buffer memory 107 also decreases. In this case, the amount of data stored in the ring buffer memory 107 increases, which may cause an overflow. For this reason, the track jump determination circuit 118 calculates (detects) the amount of data currently stored in the ring buffer memory 107 based on the write point (WP) and the reproduction point (RP), and the data is stored in a predetermined predetermined range. If the reference value is exceeded, it is determined that the ring buffer memory 107 may overflow, and a tracking jump command is output to the tracking servo circuit 117.

  When the track jump determining circuit 118 detects a sector number abnormal signal from the sector detecting circuit 104 or an error occurrence signal from the ECC circuit 105, the track jump determining circuit 118 stores the write address (WP) and the read address (RP) in the ring buffer memory 107. The amount of remaining data is obtained, and while the optical disk 101 makes one rotation from the current track position (while the optical disk 101 waits for one rotation), the ring buffer memory 107 sends the data to the multiplexed data separation circuit 108. The amount of data required to guarantee the reading of data is obtained.

  When the amount of remaining data in the ring buffer memory 107 is large, even if data is read from the ring buffer memory 107 at the highest transfer rate, no underflow occurs in the ring buffer memory 107, so the track jump determination circuit 118 Determines that error recovery is possible by reproducing the error occurrence position again by the pickup 102, and outputs a tracking jump command to the tracking servo circuit 117.

  When a track jump command is output from the track jump determination circuit 118, the tracking servo circuit 117 jumps the reproduction position by the pickup 102 from the position A to a position B one track inner circumference as shown in FIG. Then, in the ring buffer control circuit 106, the reproduction position is maintained until the optical disk 101 makes one rotation again to reach the position A from the position B, that is, until the sector number obtained from the sector detection circuit 104 becomes the sector number at the time of the track jump. During this time, writing of new data to the ring buffer memory 107 is prohibited, and data already stored in the ring buffer memory 107 is transferred to the multiplexed data separation circuit 108 as necessary.

  After the track jump, even if the sector number obtained from the sector detection circuit 104 matches the sector number at the time of the track jump, if the data amount stored in the ring buffer memory 107 exceeds a predetermined reference value, When there is a possibility that the ring buffer memory 107 overflows, the writing of data to the ring buffer memory 107 is not restarted, and the track jump is performed again. In this manner, the data reproducing apparatus can cope with a variable rate by having the ring buffer memory 107, and can retry an error.

  In the conventional data reproducing apparatus described above, video data, audio data, and subtitle data multiplexed at a variable rate are multiplexed with video data, so as to conform to ISO11172 (MPEG1) or ISO13818 (MPEG2). If the audio data and subtitle data can be played back in synchronization, the out-of-synchronization can be corrected, the error can be dealt with, and the search, pause, and frame feed functions can be realized, the usefulness of the data playback device will be remarkable. It is thought that it can be improved.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has been made in consideration of the above circumstances, and has been made in view of the above-described embodiments, and has been made in consideration of the above-described aspects and modifications, and is intended to provide data multiplexing video data, audio data, and subtitle data compressed at a variable rate. A reproducing apparatus and a data recording medium are proposed.

  In order to solve this problem, according to the present invention, multiplexed data in which at least two types of data are multiplexed is recorded for each track, and data in which content content information having track information for each track is recorded. A recording medium, wherein the track information includes a multiplex flag indicating whether or not each of the at least two types of data is included, and a valid flag indicating whether the multiplex flag is valid. In a reproducing apparatus for reproducing a medium, a reading unit for reading data including multiplexed data from a data recording medium, a data reproducing unit for reproducing data read from the data recording medium, and a plurality of decoding units for decoding the multiplexed data. Means for controlling a multiplexing state of a predetermined data unit and controlling a plurality of decoding means according to the multiplexing state And a stage, valid flag for each of the data of at least two types of data, when indicating that multiplexing flags is valid, determines the multiplexing state of predetermined data unit based on the multiplexing flag.

  Further, in the present invention, in an optical recording medium for recording information by converging and irradiating a light beam and reading recorded information, a read in which information relating to data content recorded on a disk is arranged And a multiplexed data recording area in which multiplexed data in which at least two types of data are multiplexed is arranged for each track, and in the lead-in area, each track in which the multiplexed data is recorded is provided. A track information recording area for each track is provided corresponding to each track. In the track information recording area, a multiplex flag indicating whether at least two types of data are included in the track and a multiplex flag are valid. And a valid flag indicating whether or not this is the case.

  The data is reproduced from the data recording medium in the unit of sector number, and the data of the negative sector number attached to a part of the sector is also reproduced. At the position represented by the negative sector number, multiplexing information indicating whether or not image data, audio data, and subtitle data are multiplexed, and access points used for data search and random access, respectively. By recording the position information and reproducing it, it is possible to synchronously reproduce data multiplexed with video data, audio data and subtitle data compressed at a variable rate, and realize various functions. obtain.

  An embodiment of the present invention will be described below in detail with reference to the drawings.

(1) Configuration of Data Reproducing Apparatus FIG. 1 shows a data reproducing apparatus according to the present invention as a whole, and a data recording medium (DSM) 1 includes, for example, video, audio, subtitles, and TOC (table of contents). It is composed of an optical disk which is detachable from the drive unit 2 on which digital data such as information is recorded. However, the DSM 1 may be a removable or non-removable optical recording medium, magnetic recording medium, magneto-optical recording medium, semiconductor storage element, or other digital data recording medium.

  The drive unit 2 has a mechanism for mechanically mounting and unmounting the DSM 1 and a drive for driving a pickup made up of an optical head for reading out a reproduction signal from the DSM 1. However, the pickup is in accordance with DSM1 and may be a magnetic head or a magneto-optical head. When the DSM 1 is a semiconductor device, the pickup serves as an address pointer. Further, the drive unit 2 demodulates the read reproduction signal to obtain subcode data, multiplexed data, error correction data (C1), and error correction data (C2). It also has a demodulation circuit for sending to the error correction device 3 in the format shown.

  The error correction device 3 receives the subcode data, multiplexed data, error correction data (C1) and error correction data (C2) sent from the drive unit 2 in the format shown in FIG. Error detection and error correction are performed using the error correction data. It also has a function of analyzing sub-code data after error correction and extracting sector number data. Also, the multiplexed data after error correction has a function of adding the sector number data extracted from the subcode data and the error flag, and sending the multiplexed data to the ring buffer 4 in a format as shown in FIG. FIG. 12 shows the configuration of the error correction device 3. The RAM 30 stores the data supplied from the drive unit 2. The switch 31 switches the supply destination of the data read from the RAM 30 to the error correction circuit 32 or the data addition circuit 34. The error correction circuit 32 performs error correction using the error correction data (C1) and the error correction data (C2). The data adding circuit 34 adds the sector number data and the error flag supplied from the controller 33 to the multiplexed data read from the RAM 30. The controller 33 controls the address of the RAM, controls the switch 31, and analyzes the subcode data. In the case of a TOC reading state described later, the error correction can be performed a plurality of times for the same data by setting the switch 31 to the error correction circuit 32 continuously.

  The error flag is data that is added by 1 bit to the 8 bits of multiplexed data. When the 8 bits of multiplexed data have no error or when error correction is completely performed, 0 is set. If it is impossible, 1 is added. Further, the error correction device 3 sends the subcode data to the subcode decoder 21 (FIG. 1) only when there is no error or when the error is completely corrected.

  The subcode decoder 21 decodes the subcode data supplied from the error correction device 3, and sends the decoded data to the control circuit 16.

  The ring buffer 4 has a FIFO memory therein, and temporarily buffers multiplexed data, sector number data and error flags sent from the error correction device 3 in a format as shown in FIG. According to the read pointer indicated by the circuit 26, the multiplexed data, the associated sector number data and the error flag are transmitted in the format shown in FIG.

  In this buffering, all the data sent from the error correction device 3 are unconditionally buffered, and only the data after the sector number of the reading start point specified by the control device 16 out of the sent data is transmitted. Is selected for buffering, the case where only data up to the sector number of the end point specified by the control device 16 is buffered, and the case where the data is from the sector number of the start point specified by the control device 16 to the sector number of the end point. In some cases, only a specific range of data is buffered. These switching operations are performed via the ring buffer control circuit 26.

  The ring buffer control circuit 26 informs the control unit 16 that the data of the start point or the end point has been detected when the buffering start point and / or the end point are designated by the control unit 16. Further, upon receiving a TOC data load instruction, the TOC data sent from the error correction device 3 is loaded into a specific area for the TOC data in the buffering memory, and the end of the loading is detected. To inform the end of the loading of the TOC data. The ring buffer control circuit 26 sends the TOC data loaded and stored in the ring buffer 4 in response to a request from the control device 16. The ring buffer control circuit 26 monitors the amount of data stored in the ring buffer 4 as in the case of the ring buffer control circuit 106 and the track jump determination circuit 118 shown in FIG. Instructs the drive unit to perform a track jump.

  The demultiplexer 5 decomposes the multiplexed data sent from the ring buffer 4 as shown in FIG. 7A into a video bit stream, an audio bit stream, and a subtitle bit stream. C), as shown in FIG. 7 (D), the video data header and the video data are in the video code buffer 6, the audio data header and the audio data are in the audio code buffer 9, and the subtitle data header and the subtitle data are in the video code buffer 9. , To the subtitle code buffer 12.

  The demultiplexer 5 sends an error flag corresponding to each video data and audio data to the video code buffer 6, the audio code buffer 9, and the subtitle code buffer 12, respectively. However, when a signal indicating that one of the video code buffer 6, the audio code buffer 9 and the subtitle code buffer 12 has overflowed is sent, the code request to the ring buffer control circuit 26 is stopped and the video request is stopped. Data transmission to the code buffer 6, audio code buffer 9, and subtitle code buffer 12 is stopped.

  The demultiplexer 5 also includes a sector number data, a system clock reference (SCR) recorded in the system header, a video decoding time stamp (DTSV) indicating a decoding start time of video data recorded in the video data header. , An audio decoding time stamp (DTSA) indicating the decoding start time of the audio data recorded in the audio data header, and a subtitle decoding time stamp (DTSS) indicating the decoding start time of the subtitle data recorded in the subtitle data header. And sends a signal to the control device 16 indicating that the sector number data, SCR, DTSV, DTSA and DTSS have been detected. It also holds the detected sector number data, SCR, DTSV, DTSA, and DTSS, and transmits the contents to the control device 16 according to an instruction from the control device 16.

  Also, the continuity of the sector number is checked, and when data having a discontinuous sector number is sent from the ring buffer 4, dummy data with an error flag of 1 byte or more added between the discontinuous sectors is inserted. To the video code buffer 6, audio code buffer 9, and subtitle code buffer 12 to indicate that there is a discontinuous sector boundary due to lost data or a search operation at that location.

  The video code buffer 6 has a FIFO memory therein, buffers the video data header and video data sent from the demultiplexer 5, and sends them to the DTSV detector 7 in response to a request from the video decoder 8. . When the memory for buffering overflows or underflows, a signal is sent to the demultiplexer 5 and the controller 16 to notify the video code buffer overflow or underflow.

  The DTSV detector 7 passes only the video data of the video data header and the video data among the data transmitted from the video code buffer 6, and sends the data to the video decoder 8. Also, the DTSV in the video data header is detected, and a signal indicating that the DTSV is detected is sent to the control device 16, and the detected DTSV is held in an internal register. Tell

  The video decoder 8 includes a so-called MPEG decoder conforming to ISO1172 (MPEG1) or ISO13818 (MPEG2), decodes or decodes video data sent from the DTSV detector 7, and sends the decoding result to the post-processor 15. At the time of decoding, the control device 16 is notified that the decoding has been temporarily stopped, resumed from the temporary stop, the I-picture header search, and that the I-picture header has been detected. The MPEG decoder has a function of detecting the picture header, a function of discriminating the kind of the picture header, i.e., whether it is the I picture head, the P picture head, or the B picture head, and notifies the control device 16 of the detection of the picture head and the kind of the detected picture head. Has a function. Further, the video decoder 8 temporarily replaces the decoded video data with a screen such as black or blue to suppress output. If it is found that the transmitted compressed data contains a grammatically inconsistent description, or if it is attempted to decode data with an error flag, a signal notifying the control device 16 of the occurrence of an error is issued. send.

  The audio code buffer 9 has a FIFO memory therein, buffers the audio data header and audio data sent from the demultiplexer 5, and sends them to the DTSA detector 10 in response to a request from the audio decoder 11. . When the memory for buffering overflows or underflows, it sends a signal to the demultiplexer 5 and the control unit 16 to notify the audio code buffer overflow or underflow.

  The DTSA detector 10, like the DTSV detector 7, passes only the audio data of the audio data header and the audio data among the data transmitted from the audio code buffer 9, and sends the data to the audio decoder 11. Also, the DTSA in the audio data header is detected, and a signal indicating the detection is sent to the control device 16 and the audio decoder 11. Further, the DTSA detector holds the detected DTSA in an internal register and transmits the detected DTSA to the control device 16 according to a command from the control device 16.

  The audio decoder 11 decodes the compressed or uncompressed audio data sent from the DTSA detector 10 and outputs the result to an audio output terminal. When decoding, the audio decoder 11 temporarily stops decoding, resumes from the temporary stop, repeatedly decodes audio data for a fixed time, and skips audio data for a fixed time. The fixed time is, for example, four stages of 1 [second], 100 [millisecond], 10 [millisecond], 1 [millisecond], and the minimum decoding unit of the compressed data. Further, the audio decoder 11 receives the signal indicating the DTSA detection from the DTSA detector 10 and temporarily stops decoding. It also has a half mute function to temporarily lower the volume of the decoded audio output by a certain level, and a mute function to reduce the volume to zero.

  The caption code buffer 12 has a FIFO memory therein, buffers the caption data header and caption data sent from the demultiplexer 5, and sends them to the DTSS detector 13. When the memory for buffering overflows or underflows, a signal is sent to the demultiplexer 5 and the controller 16 to notify the subtitle code buffer overflow or underflow.

  The DTSS detector 13 allows only the subtitle data of the subtitle data header and subtitle data transmitted from the subtitle code buffer 12 to pass, and sends the data to the subtitle decoder 14. Also, the DTSS in the caption data header and the duration_time in the caption data are detected, a signal indicating the detection is sent to the control device 16, and the detected DTSS and the duration_time are held in an internal register. Is transmitted to the control device 16 according to.

  In the DTSS search operation, when DTSS is detected, a signal indicating that DTSS is detected is sent to the subtitle decoder 14 in addition to the control device 16. The caption decoder 14 decodes the caption data sent from the DTSS detector 13 and sends the result to the post-processor 15.

  When decoding subtitle data, decoding temporarily stops, resumes from the temporary stop, and temporarily stops the decoding result output. Further, at the time of the DTSS search, the subtitle data is read and discarded without decoding until a DTSS detection signal from the DTSS detector 13 is received.

  The post processor 15 generates a video signal for displaying information indicating the current state of the data reproducing device in response to a command from the control device 16, and outputs the video signal sent from the video decoder 8 and the subtitle decoder. And a video signal generated to represent the current state of the playback apparatus, and outputs the synthesized video signal to a video output terminal.

  The control device 16 has a function of receiving information from each unit and emitting a signal, and a function of controlling the operation of the entire data reproducing device shown in FIG. The external interface 17 receives a command from a computer device, an editing machine, or the like, and transmits the command to the control device 16. The user input device 18 receives a key input from a user via a push button or the like or a key input via a remote commander, and transmits the key input to the control device 16.

  The information display device 19 displays information indicating the current state of the playback device in response to a command from the control device 16 using, for example, a lamp or a liquid crystal display. The vertical synchronizing signal generation circuit 22 generates a vertical synchronizing signal, and supplies it to the video decoder 8, the subtitle decoder 14, the post processor 15, and the control device 16.

  The STC register 23 is a register that is incremented by receiving a signal from the STC count-up circuit 24, and implements a reference clock for realizing synchronous reproduction between video data, audio data, and subtitle data. The control device 16 has a function of setting an arbitrary value in the STC register 23. Although the STC register 23 is a register circuit independent of the control device 16 in this embodiment, the STC register 23 can be realized as a register held in software in the control device 16 as another embodiment.

  The STC count up circuit 24 generates a signal such as a pulse signal having a constant period and outputs the signal to the STC register 23. The output to the STC register 23 is temporarily stopped by a command from the control device 16. The STC count-up circuit 24 and the STC register function as an internal clock STC. Similarly to the STC register 23, the STC count-up circuit 24 is a circuit independent of the control unit 16 in this embodiment, but can be realized as a software-based count signal generator in another embodiment.

(2) Configuration of DSM On the DSM1, all data is recorded in units of sectors, and the data start position to be read from the DSM1 is specified by the control device 16 by the sector number. After the start position is specified, the subsequent sectors are continuously read unless a new position is specified from the control device 16. For example, when 100 sectors are designated as the start position, the data is read in the order of 100, 101, 102, 103,... Until a new read position is designated.

  As shown in FIG. 2, each sector is composed of 6208 bytes, and is composed of four types of data: subcode data, multiplexed data, error correction data (C1), and error correction data (C2). The data amount in one sector is 64, 4096, 1024, and 1024 bytes, respectively. Of the four types of data, the multiplexed data is the data to be reproduced, and the remaining three types of data, namely, the subcode data, the error correction data (C1), and the error correction data (C2), perform high-speed multiplexing. Or auxiliary data for accurate reproduction.

  The subcode data includes sector number information, time code information subcode content ID, and a reproduction prohibition flag as shown in FIG. The sector number information includes the sector number of the sector, the time code information includes information indicating the time at which the sector is reproduced, and the data content includes information indicating what data the subcode data includes. (For example, 01 when the reproduction inhibition flag is included), the reproduction inhibition flag indicates that the sector performs normal reproduction of a lead-in area (LEAD IN AREA), a lead-out area (LEAD OUT AREA), TOC data, and the like. A flag (for example, FF) indicating whether or not the sector has no data recorded therein is recorded. The remaining 59 bytes are reserved so that other information can be written as subcode data. In the multiplexed data, data in which video data, audio data and subtitle data to be reproduced are multiplexed, and data such as other computer programs are recorded.

  The error correction data of the C1 sequence and the C2 sequence is correction information for detecting and correcting an error occurring in the subcode data, the multiplexed data, and the error correction data itself. The C1 sequence and the C2 sequence have different interleaving directions, and have a structure in which the error correction capability can be increased by repeating the correction by the C1 sequence and the correction by the C2 sequence.

  FIG. 3 shows the types of data recorded in the multiplexed data portion of each sector by classification by sector number. The data recorded in the multiplexed data is originally data in which video data, audio data and subtitle data are multiplexed, but special data such as TOC data is exceptionally recorded from -3000 to 1023 sectors. Have been. After 1024 sectors, data in which video data, audio data, and subtitle data to be originally reproduced are multiplexed are recorded.

  An area called TOC area is provided in the area from -3000 sector to -1 sector of DSM1. In the TOC area, TOC data, that is, information on the contents of data recorded in the DSM 1 is recorded. As shown in FIG. 3, the TOC data is placed in three places on the DSM1 from -3000 to -2001, from -2000 to -1001, and from -1000 to -1 to improve the reliability against errors. Exactly the same is recorded. However, it is assumed that the size of the TOC data does not exceed 1000 sectors. By the way, the user can specify a sector number via the user input device 18 or the numeric keypad of the external interface 17 to obtain a desired image or sound. However, the TOC data is control data, and is normally reproduced. In this case, the access should not be made, so the TOC area is set to a negative sector number that cannot be specified by a normal numeric keypad.

  Sectors in which data obtained by multiplexing video data, audio data, and subtitle data on the DSM 1 are recorded are grouped into one or a plurality of tracks according to the contents. A group composed of a plurality of continuous sectors is called a track. FIG. 5 shows the structure of the TOC data. The TOC data includes a TOC header, a TOC size, the number of tracks, information of each track, an entry point table header, an entry point table, and a TOC end mark.

  In the TOC header, a special data pattern indicating that the TOC starts from here is recorded. In the TOC size, the length of the TOC data is recorded in byte units. The information of each track includes a track number, a start sector number, an end sector number, a title track flag, an end track flag, a reproduction prohibition track flag, a video encode flag, an audio encode flag, a subtitle encode flag, and an encoding flag valid information of each track. Consists of flags.

  In the track number, a serial number of the track is recorded. The range of normal track number values is from 1 to 254. In the start sector number and the end sector number, the range of the track on the DSM 1 is recorded by the sector numbers of the start point and the end point. The title track flag and the end track flag are flags indicating whether the track is a title track and an end track, respectively.

  The reproduction inhibition track flag is a flag that is set when the reproduction of the track is prohibited, and is not set when the reproduction is not prohibited. The video multiplexing flag, the audio multiplexing flag, and the subtitle multiplexing flag are flags indicating whether video data, audio data, and subtitle data are multiplexed in the multiplexed data of the track, respectively. Each multiplexing flag may indicate the number of multiplexed data in the track.

  The multiplex flag valid information flag is a flag indicating whether the contents of the video multiplex flag, audio multiplex flag, and subtitle multiplex flag recorded immediately before are valid. For example, if the multiplexing state of video, audio, and subtitle data changes within one track, the last three flags cannot be determined to one value, so an arbitrary value is written to the three flags. This is dealt with by recording a value indicating invalidity in the multiplexing flag valid information flag.

  In the above information example of each track, it is allowed to attach an attribute of each of the tracks 1 to 254 as a title track or an end track, but the structure of the DSM is shown in FIG. 4 instead of FIG. In this way, the TOC structure is changed to that shown in FIG. 5 as shown in FIG. 6, and special tracks having track numbers of 0 and 255 are provided for title track and end track, respectively, and these tracks are recorded on DSM1. By fixing the position, the processing of the reproducing apparatus can be simplified by reducing the TOC data and ensuring that the title track and the end track are unique within the DSM1.

  In the entry point table header, a special data pattern indicating that the entry point table starts from here is recorded. The entry point table includes the number of entry points and information on entry points. The number of entry points is composed of the number of entry points on the DSM 1, a value indicating the position of the entry point by a sector number, and time code information recorded in the subcode data of the sector.

  The entry point table is used for random access and search. In particular, when the video data is video data compressed at a variable rate in accordance with ISO11172 (MPEG1) or ISO13818 (MPEG2), the entry number table needs to be referred to because the increase in the sector number is not proportional to the increase in the time code. There is. In the TOC end mark, a special data pattern indicating that the TOC ends here is recorded.

(3) Operation of Data Reproduction Apparatus (3-1) Turning on Power FIG. 11 shows a transition diagram of the operation state of the control apparatus 16. When the power of the data reproducing apparatus shown in FIG. 1 is turned on, the control device 16 enters an initial setting state. FIG. 13 shows a processing flow of the control device in the initial setting state. In the initial setting state, the control device 16 first instructs the information display device 19 to turn on a lamp or the like indicating that the power has been turned on, and instructs the post processor 15 to display a display device such as a CRT (not shown). A message is displayed on the screen indicating that the power has been turned on (SP100). Subsequently, the control device 16 reads the test pattern stored in the ROM 25 in advance, and is mounted on the error correction device 3, the ring buffer 4, the video code buffer 6, the audio code buffer 9, the subtitle code buffer 12, and the storage device 20. A corresponding test pattern is written to and read from the memory (step SP102), and a check as to whether the operation is performed correctly, that is, a memory check is performed (step SP103).

  When an abnormality is found by the memory check, a command is issued to the information display device 19 to turn on a lamp or the like indicating that the abnormality has occurred, and a command is issued to the post-processor 15 to notify the post processor 15 of a CRT or the like (not shown). A message indicating that there is an abnormality in the memory is displayed on the screen of the display device (step SP104). Further, in this state, the control device 16 thereafter ignores any input from the external interface 17 or the user input device 18 except for a command to unmount the disk. Also, it does not read any data and signals from DSM1 at all. Further, when there is an abnormality in the memory, the control device 16 turns off the power after a predetermined time has elapsed (step SP105).

  When there is no abnormality in the memory, the control device 16 sends a signal to the drive unit 2 asking whether the DSM 1 is mounted (step SP106). When the drive unit 2 receives the signal, it sends a signal to the control unit 16 to indicate whether or not the DSM 1 is currently mounted. Whether or not the DSM 1 is mounted can be realized by detecting with a microswitch provided in the mechanism of the drive unit 2 or checking whether or not a predetermined portion of the DSM 1 is focused. When receiving the signal indicating that the DSM 1 is currently mounted, the control device 16 shifts to the TOC reading state of step SP2 shown in FIG. 11 (step SP107). Conversely, when receiving a signal that the DSM 1 is not currently mounted, the control device 16 instructs the information display device 19 to turn on a lamp or the like indicating that the DSM 1 is not mounted, and to execute the post-processor 15 To display on the screen a message indicating that DSM1 is not mounted (step SP108). The control device 16 then waits until receiving a signal from the drive unit 2 indicating that the DSM 1 has been mounted.

  The drive unit 2 detects that the user sets the DSM 1 to the drive unit 2 and performs mechanical mounting such as positioning of the DSM 1 so that the pickup of the drive unit can read out the signal. When the mounting is completed, the drive unit 2 sends a signal to the controller 16 indicating that the DSM 1 has been mounted. When the control device 16 receives a signal indicating that the mounting is completed in a state of waiting for a signal indicating that the DSM 1 has been mounted from the drive unit 2, the control device 16 shifts to the TOC reading state of step SP2 in FIG.

(3-2) Reading of TOC FIG. 14 shows a processing flow of the control device 16 in a TOC reading state. When shifting to the TOC reading state, the control device 16 first instructs the error correction device 3 to the TOC reading mode (step SP200). Further, the control device 16 instructs the drive unit 2 to seek to the portion where the first TOC data is written, that is, -3000 sectors (step SP201).

  The drive unit 2 reads data from the DSM 1 and transfers the data to the error correction device 3. The error correction device 3 performs error detection and error correction on data sent from the drive unit 2, and sends multiplexed data to the ring buffer 4 and subcode data to the subcode decoder 21. However, as for the number of error corrections, since the control device 16 indicates that the mode is the TOC reading mode, the number of repeatable times of the C1 correction and the C2 correction is set to be larger than that in the normal reproduction as follows.

  That is, in the normal data reproduction, the error correction by the error correction device 3 is the error correction by the C1 sequence and the error correction by the C2 sequence is from the reading of the data from the DSM1, the video output from the post processor 15 and the audio decoder 11 and the audio output terminal. In order to reduce the time required for the output from the device, each operation is performed only once.

  However, when there is no need to shorten the time from data reading to reproduction, the error correction capability can be improved by repeating the error correction by the C1 and C2 sequences many times. Therefore, in the reading of TOC data that does not require high-speed reading and requires high data reliability, the error correction device 3 removes an uncorrectable error by the C1 and C2 corrections from the control device 16 once. If it is detected, the error correction processing is further repeated. Alternatively, the C1 and C2 corrections are repeated a plurality of times, for example, four times from the beginning.

  For TOC data, the error correction capability is increased by increasing the number of error corrections. However, if a burst error on the DSM1 occurs, that is, data loss over a wide range, the error can be completely corrected even if error correction is repeated. There may not be. If the error cannot be completely corrected even after performing the error correction a certain number of times, the control device 16 issues a seek command to the drive unit 2 to the position where the error has occurred, re-reads the data from the DSM 1, and re-reads the data. The error detection / correction process is performed again on the data read by the above. This re-reading process is also not performed during normal reproduction because it takes time, but here, the control device 16 performs the re-reading process because it is in the TOC reading state.

  If the error cannot be corrected even after rereading the data from the DSM1 a predetermined number of times, the control device 16 sets the drive to read the second TOC information recorded three times at different positions on the DSM1. A seek is instructed to the unit, and reading to the ring buffer 4 is attempted in the same procedure as the first procedure for loading the TOC data. If the reading of the second TOC information has failed, the same operation is performed for the third TOC information. Reading from different positions is a possible process because the same TOC data is recorded in three places, and cannot be performed during normal reproduction. Here, since the control device 16 is in the TOC reading state, this processing is performed (steps SP202, SP203, SP204, SP205, SP206).

  When re-reading of all the TOC data recorded in the three places fails, a command is issued to the information display device 19 to turn on a lamp or the like indicating that the reading of the TOC has failed, and to the post processor 15. A message indicating a TOC reading error is displayed on the screen (step SP207). Further, the control device 16 issues a disk unmount command to the drive unit 2 (step SP208), and shifts to the initial setting state (SP1 in FIG. 11). Upon receiving the unmount command from the control device 16, the drive unit 2 unmounts the disk.

  When the TOC error correction is completed, the control device 16 instructs the ring buffer control circuit 26 to start reading the TOC (step SP209). The ring buffer control circuit controls the write pointer to load the TOC data into a specific area for loading the TOC data in the memory mounted on the ring buffer 4. The ring buffer 4 writes the reproduction data sent from the error correction device 3 to the area of the memory of the ring buffer 4 for the TOC data. At this time, if the ring buffer 4 has a sufficient memory for reading all the TOC data, all the TOC data shown in FIG. 5 are deleted. If the ring buffer 4 does not have a sufficient memory, the entry point table header and the entry point table are removed. Read the TOC data.

  The ring buffer 4 has a function of detecting the reading of the TOC end mark and detecting the end of the loading of the TOC data to the ring buffer 4, and when detecting the end of the loading, notifies the control device 16 of the end. The control unit 16 receives the signal indicating the end of the load sent from the ring buffer 4 and shifts to the stop state. (Step SP210).

(3-3) Stop state (Title track / end track playback)
FIG. 15 shows a processing flow of the control device 16 in the stop state. When the control device 16 shifts to the stop state, it determines whether or not the TOC has just been loaded (step SP300). Immediately after the TOC is loaded, the title track is reproduced (SP301). Similarly, the control unit 16 ends the end track in a case other than immediately after the TOC is loaded, such as immediately after all or a part of data reproduction from the DSM 1 is completed. (SP303).

  In the case of reproducing a title track, the TOC data is referred to (step SP301). If there is a track in which a flag indicating that the track is a title track is set, regardless of whether or not a reproduction instruction is issued from the user, the reproduction of the track is performed. A reproduction command is issued (step SP302). In the case of the end track reproduction, the TOC data is referred to in the same manner as in the case of the title track reproduction (step SP303). When there is a track in which a flag indicating the end track is set, reproduction from the user is performed. The reproduction of the corresponding track is instructed regardless of the presence or absence of the instruction (step SP304).

  When there is no title track or end track to be reproduced in the stop state, or when the reproduction of the title track or end track has been completed, the control device 16 issues a stop command to the drive unit 2 and issues an error correction device 3, the ring buffer 4, An error correction stop, a buffering stop, and a demultiplex stop instruction are sent to the demultiplexer 5 (step SP305). Further, the video code buffer 6, audio code buffer 9 and subtitle code buffer 12 are cleared (step SP306).

  In the stopped state, the control device 16 waits for a reproduction start command from the user transmitted through the user input device 18 or the external interface 17 (step SP307). Further, it instructs the information display device 19 and the post processor 15 to turn on a lamp or the like indicating that the apparatus is in a stopped state and to display a message on the screen (step SP308).

  The user input device 18 sends a reproduction start signal to the control device 16 when a reproduction start command key is input from the user. At this time or when a track to be reproduced is designated by the user in advance, the track number information is sent to the control device 16. When receiving a command from an external device (not shown), the external interface 17 sends a reproduction start signal to the control device 16. At this time or when a track number to be reproduced by the external device is specified in advance, the track number information is sent to the control device 16.

  When receiving the reproduction start signal from the user input device 18 or the external interface circuit 17, the control device 16 shifts to the reproduction preparation state of step SP4 in FIG. If the track number to be reproduced from the user input device 18 or the external interface circuit 17 is not specified in advance, the reproduction is started from the track indicated by the track number 1.

(3-4) Reproduction Preparation FIG. 16 shows a processing flow of the control device 16 in a reproduction preparation state. When the control device 16 shifts to the reproduction preparation state, it instructs the information display device 19 and the post processor 15 to turn on a lamp or the like indicating that preparation for reproduction is being performed and display the message on the screen (step SP400). ). The control unit 16 then controls the ring buffer 4, demultiplexer 5, video code buffer 6, video decoder 8, audio code buffer 9, audio decoder 11, subtitle code buffer 12, subtitle decoder 14, post-processor 15, and storage unit 20. Is initialized (step SP401). However, the TOC data loaded and held in the ring buffer 4 is not initialized.

  Further, the control device 16 instructs the error correction device 3 to be in a mode for performing normal reproduction (step SP402). In response to this command, the error correction device 3 sets the number of times of error correction repetition when an error occurs to one for each of the C1 sequence and the C2 sequence. Next, the control device 16 obtains the sector number of the head position of the track to be reproduced with reference to the TOC data, and issues a seek command to the drive unit 2 by the sector number (step SP403).

  The control device 16 sends a demultiplex start command to the demultiplexer 5 (step SP404). The demultiplexer 5 demultiplexes the multiplexed bit stream sent from the ring buffer in the format shown in FIG. 7A, and converts the multiplexed bit stream into a video code buffer 6, an audio code buffer 9, and a subtitle code buffer 12, respectively. 7 (b), (c) and (d). It also detects the SCR recorded in the system header and holds the value in an internal register.

  The video code buffer 6 stores the data sent from the demultiplexer 5 once in the buffer memory and then sends it to the DTSV detector 7. Similarly, the audio code buffer 9 and the subtitle code buffer 12 once store the data sent from the demultiplexer 5 in their respective buffer memories and then send them to the DTSA detector 10 and the DTSS detector 13.

  The DTSV detector 7 selects only video data from the data sent from the video code buffer 6 and sends it to the video decoder 8. Further, the DTSV of the video data header shown in FIG. 9 is detected, and if detected, the control device 16 is notified of the detection and the value is held. Similarly, the DTSA detector 10 and the DTSS detector 13 also select only audio data and subtitle data from the data transmitted from the audio code buffer 9 and the subtitle code buffer 12, respectively, and send them to the audio decoder 11 and the subtitle decoder 14. send. The DTSA of the audio data header shown in FIG. 9 and the DTSS of the subtitle data header shown in FIG. 9 are detected, and when detected, the control unit 16 is notified and the values are held. When the above processing ends, the control device 16 shifts to the synchronization start method determination state of step SP5 in FIG.

(3-5) Synchronous Start Method Determination State FIG. 17 shows a processing flow of the control device 16 in the synchronous start method determination state. In the synchronous start method determination state, the control device 16 performs a process of starting the reproduction of the video data, audio data, subtitle data, or a plurality of the data, but the data written in the TOC, DTSV, DTSA, or DTSS. , It is detected whether the data to be reproduced includes video data, audio data, and subtitle data, and the processing procedure at the start of data reproduction is selected.

  The controller 16 refers to the video multiplexing flag, audio multiplexing flag, and subtitle multiplexing flag of the information of each track of the TOC data shown in FIG. 5, and adds video data, audio data, and subtitle data to the data to be reproduced at present. Are detected. The control device 16 first reads track information corresponding to a track to be reproduced from the TOC stored in the ring buffer 4 (step SP500). Next, it is determined whether each multiplexing flag is valid based on the multiplexing flag validity information flag in the obtained track information (step SP501). If it cannot be determined from the TOC information because the multiplex flag valid information flag is a value indicating invalidity, etc., the DTSV detector 7, the DTSA detector 10, Judgment is made based on the presence or absence of a signal notifying the detection of DTSV, DTSA, and DTSS from the DTSS detector 13 (SP506).

  When it is determined from the multiplex flag of the TOC information that both the video data and the audio data are present in the track to be reproduced (SP502-SP503), or when both DTSV and DTSA are detected within a fixed time (SP507-SP510), the control device 16 shifts to the audio video synchronization start state. If it is determined from the multiplexing flag of the TOC information that video data exists on the track to be reproduced but audio data does not exist (SP502-SP503), or DTSV is detected within a certain period of time, If DTSA is not detected (SP507-SP510), the video only shifts to the synchronization start state. Further, when it is determined from the multiplexing flag of the TOC information that audio data exists in the track to be reproduced but video data does not exist (SP502-SP504), or DTSA is detected within a predetermined time, When the DTSV is not detected (SP507-SP508), only the audio is shifted to the synchronous start state.

  Further, if it is determined from the multiplexing flag of the TOC information that neither the video data nor the audio data exists in the track to be reproduced, or if neither DTSV nor DTSA is detected within a certain time, DTSS Is detected (SP502-SP504-SP505 or SP507-SP508-SP509), only the subtitles are shifted to the synchronous start state. Further, when it is determined from the TOC information that no video data, audio data, and subtitle data exist, or when DTSV, DTSA, and DTSS are not detected within a predetermined time (SP502-SP504-SP505 or SP507) -SP508-SP509), and the control device 16 shifts to the stop state (step SP502 to step SP510).

(3-6) Audio Video Synchronization Start State FIG. 18 shows a processing flow regarding video data of the control device 16 in the audio video synchronization start state. Upon transition to the audio video synchronization start state, the control device 16 instructs the video decoder 8 to temporarily stop decoding and perform an I-picture header search (step SP600). Thus, by performing the I-picture header search in the decoding pause state, the video decoder 8 does not start decoding after detecting the I-picture header, and waits until a pause release command from the control device 16 is received. The I-picture header is a specific data pattern at the start of intra-picture data in video data such as a video bit stream defined by ISO11172 (MPEG1) or ISO13818 (MPEG2).

  In DSM1 in which a multiplexed bit stream such as ISO11172 (MPEG1) or ISO13818 (MPEG2) is recorded, when recording data, the DTSV of FIG. 9 must be added to the video data header of the video data including the I-picture header. There is a rule that the DTSV is always recorded by the encoding method shown when encode flag = 1. Thus, when the video decoder 8 detects the I-picture header, the control device 16 can always read the DTSV corresponding to the I-picture from the DTSV detector 7. The reason for starting the synchronous start from the I picture is that pictures other than the I picture, that is, the P picture and the B picture, are predictively coded using pictures that are temporally earlier and / or later. This is because decoding cannot be started from a B picture.

  Next, the control device 16 determines whether or not the video code buffer (VCB) 6 is in an underflow state (step SP601). In the case of an underflow state, there is no data to be read from the video code buffer 6, so the control device 16 suspends reading of video data from the video code buffer 6. Next, when the control device 16 receives a signal indicating that an I-picture header has been detected from the video decoder 8, the control device 16 reads the value of DTSV from the DTSV detector 7 (step SP602). Next, control device 16 determines whether or not STC count-up circuit 24 is operating (step SP603).

  If the automatic count-up of the STC count-up circuit 24 is on, the video and audio must be started in synchronization with the system clock STC in which the count-up has already started, that is, the value indicated by the STC register 23. If the automatic counting up of the system clock STC is turned off, both the start of video and audio decoding and the automatic counting up of the system clock STC must be started.

  When the automatic count up of the STC is on, the following processing is performed for the video decoder 8. First, the STC stored in the STC register 23 is compared with the DTSV detected from the DTSV detector 7 (step SP604). If DTSV = <STC, it is determined that the decoding start timing has already passed. Then, the control unit 16 instructs the video decoder 8 to perform the I-picture header search again (step SP605), and reads the DTSV corresponding to the next I-picture on the video bit stream from the DTSV detector 7 (step SP601). SP602).

  Since the system clock STC is also automatically counted up, the latest value is read again from the STC register 23 (SP603). The read DTSV is compared with the STC again (step SP604), and this is repeated until DTSV> STC. When the DTSV satisfying DTSV> STC is read, the control device 16 waits until DTSV = STC (steps SP615 to SP616-615). When DTSV = STC, the control device 16 transmits the signal from the next vertical synchronization signal generation circuit 22. In synchronization with the received vertical synchronizing signal, a decoding temporary stop release instruction is sent to the video decoder 8 (steps SP617 to SP618). Since the system clock STC is automatically counted up while waiting for the vertical synchronization signal, the control device 16 sets DTSV in the system clock STC (step SP619).

  The underflow signal detection in the normal video code buffer 6 and the audio code buffer 9 must be dealt with by error processing. However, in the audio video synchronization start state, the control device 16 sends the I-picture to the video decoder 8. After commanding the tsuda search and before the I-picture is detected, even if an underflow error signal is received from the video code buffer 6, the control device 16 does not perform any special error processing and the audio code buffer 9 does not perform any special error processing. Waits until data is supplied from the demultiplexer 5 and the underflow state is released.

  If the video decoder 8 detects an I-picture, the controller 16 must wait until the video code buffer 6 has enough data. In this apparatus, in order to secure a predetermined code buffer fullness specified by ISO11172 (MPEG1) or ISO13818 (MPEG2), if the system clock STC has not been automatically counted up, the following method is used. Secure the ness.

  When the video decoder 8 detects the I-picture, the video decoder 8 is already in the decoding suspended state, so that the video data is received and accumulated from the demultiplexer 5 until the video code buffer 6 overflows. be able to. As the data is accumulated, the demultiplexer 5 detects a new SCR.

  The controller 16 reads the SCR, which is updated as data is accumulated in the video code buffer 6, at regular time intervals (step SP606), and compares it with the DTSV previously read from the DTSV detector 7 (step SP607). ). At this time, if DTSV = <SCR, it is determined that the data has sufficiently accumulated in the code buffer. If DTSV> SCR, the process waits until the demultiplexer 5 detects a new SCR. While waiting for a new SCR to be detected, a signal indicating an overflow is received from any of the video code buffer 6, audio code buffer 9, and subtitle code buffer 12 from the code buffer (CB). If so, it is determined that sufficient data has accumulated in the code buffer (step SP608).

  When the automatic count-up of the system clock STC is off, it is necessary to start the system clock STC in synchronization with the vertical synchronization signal. DTSV is encoded in synchronization with the vertical synchronization signal, while DTSA is encoded independently of the vertical synchronization signal. For this reason, when starting the system clock STC, DTSV is used as an initial value, and the system clock STC is started in synchronization with the vertical synchronization signal. After the system clock STC starts and the decoding of video data is started at the same time, the decoding of audio data is started using DTSA. When the automatic count-up of the system clock STC is off, the control device performs the following processing on the video decoder. The control device 16 sets the DTSV read from the DTSV detector 7 in the STC register 23 (step SP609).

  Next, the control device 16 compares the DTSA read from the DTSA detector 10 with the DTSV read from the DTSV detector 7 (step SP610). If DTSA = <DTSV, it means that the audio data starts decoding before the video data, and the system clock STC cannot be started in synchronization with the vertical synchronization signal. Issues a DTSA search instruction to the audio decoder 11 until DTSA> DTSV. The details of the control of the audio decoder 11 will be described later.

  When the above processing is completed, the control device 16 sends a decoding start command to the subtitle decoder 14 (step SP614), and shifts to a steady reproduction state.

  When DTSV and DTSA are read and DTSA> DTSV is satisfied, the control device 16 waits for a vertical synchronization signal from the vertical synchronization signal generation circuit 22 (SP611), and synchronizes with the vertical synchronization signal to increase the STC count. The circuit 24 is operated to turn on the automatic count-up of the STC (step SP612). At the same time as activating the STC count-up circuit 24, the control device 16 sends a pause release command to the video decoder 8 to start decoding video data (Vdec) (step SP613).

  FIG. 19 shows a processing flow relating to audio data of the control device 16 in the audio video synchronization start state. Upon transition to the audio video synchronization start state, the control device 16 sends a command to mute the output and a DTSA search command to the audio decoder 11 (step SP700). Upon receiving the DTSA search command, the audio decoder 11 sends a code request to the audio code buffer (ABC) 9 and starts decoding, which means that the DTSA detector 10 has detected a DTSA signal. Wait for a signal to be sent. However, in this state, since the audio decoder 11 has received the mute command, it does not actually output the decoded data. The control device 16 monitors an underflow of the audio code buffer 9 (step SP701). Since the underflow of the audio code buffer 9 means that there is no data to be sent out in the audio code buffer 9, the control device 16 temporarily stops sending data from the audio code buffer 9 when detecting this. Then, when the underflow is resolved, data transmission is permitted again. Upon receiving a signal indicating the detection of a DTSA signal from the DTSA detector 10, the audio decoder 11 temporarily stops decoding. At this time, the control device 16 can read the DTSA detected from the DTSA detector 10 (step SP702). The pause state of the audio decoder 11 can be released by the control device 16 as described later.

  Next, control device 16 determines the operation state of system clock STC (step SP703). When the automatic count-up of the STC is turned on, the audio decoder 11 performs the following processing in the same manner as the processing for the video decoder 8 described above. That is, the DTSA is compared with the latest STC read from the STC register 23 and the DTSA detector 10 (step SP704), and a DTSA search instruction to the audio decoder 11 is repeated until DTSA> STC (step SP705). When a DTSA satisfying DTSA> STC is read, the control device 16 reads a new STC (step SP710), waits until DTSA = STC (step SP711), and then instructs the audio decoder 11 to release the decoding pause. Is sent (step SP712).

  When the automatic count up of the system clock STC is off, the following processing is performed for the audio decoder. That is, it is determined whether the DTSV has already been read in the synchronization start process of the video decoder 8 in FIG. 18 (step SP706). If it has already been read, the DTSV is taken into the synchronous start process of the audio decoder 11 (step SP707). Subsequently, the control device 16 compares the fetched DTSV and DTSA (step SP708), and repeats the DTSA search instruction to the audio decoder 11 until DTSA> DTSV (step SP709). When DTSA> DTSV is satisfied, as described above, in the synchronous start processing of the video decoder 8 in FIG. 18, the STC count-up circuit 24 is operated to turn on the automatic count-up of the system clock STC. Thus, the value of the system clock STC can be read in the synchronization start process of the audio decoder 11 (step SP710). After that, the control device 16 waits until STC = DTSA (step SP711), and at the time when STC = DTSA, sends a decoding temporary stop release command to the audio decoder 11 to start decoding the audio data (step SP712). . When the above processing ends, the control device 16 shifts to a steady reproduction state.

(3-7) Video Only Synchronization Start State FIG. 20 shows a processing flow of the control device 16 in the video only synchronization start state. When transitioning to the video-only synchronization start state, the control device 16 performs a process of starting only video data in synchronization with the vertical synchronization signal. The processing of the control device 16 in the video-only synchronization start state is basically the same as that of the audio video synchronization start, and differs only in that DTSV and DTSA are compared, that is, there is no step SP610 in FIG. Therefore, detailed description is omitted. First, similarly to the audio video synchronization start, the control device 16 instructs the video decoder 8 to temporarily stop decoding and perform an I-picture header search (step SP800).

  Next, after confirming that the video code buffer 6 is not in an underflow state (step SP801), when the video decoder 8 detects an I-picture, that is, when a DTSV can be read (step SP802), the system clock STC is further restored. Is turned off (step SP803), the control device 16 waits until the video code buffer 6 has enough data. That is, similarly to the audio video synchronization start, the detected DTSV is compared with the latest SCR read from the demultiplexer 5, and if DTSV = <SCR, or if the video code buffer 6, audio code buffer 9, and subtitle code buffer 12 It waits until a signal indicating overflow is received from any of them (step SP806, step SP807, step SP808).

  As for the audio data, no processing is performed when the audio decoder 11 is already in the decoding start state, and when the audio decoder 11 is not in the decoding start state, the output to the audio decoder 11 is performed. And a DTSA search command to wait for the audio data to be sent from the demultiplexer 5 to the audio code buffer 9.

  The following processing is further performed on video data. When the automatic count-up of the STC is on, the same processing as that for the video decoder when the automatic count-up of the STC is on at the start of audio video synchronization is performed (steps SP804, SP805, SP814, and SP814). SP815, SP816, SP817, SP818). At this time, nothing is performed for the audio decoder.

  When the automatic count-up of the system clock STC is off, the same processing as the processing when the automatic count-up of the system clock STC at the start of audio video synchronization is off is performed. In this process, however, the process related to the audio decoder, that is, the process of starting the decoding of the video data, waiting until DTSA = STC, and sending the decode temporary stop release instruction to the audio decoder 11 is not performed.

  When the above processing is completed, the control device 16 sends a decoding start command to the subtitle decoder, and shifts to a steady reproduction state. If the control unit 16 receives a signal indicating that DTSA has been detected from the DTSA detector 10 after the reproduction is started in the video-only synchronization start state and the transition to the reproduction steady state, the audio-only synchronization shown in FIG. The processing shifts to the processing after step 804 in the start state.

(3-8) Synchronous Start State of Audio Only FIG. 21 shows a processing flow of the control device 16 in a synchronous start state of audio only. When only the audio is shifted to the synchronous start state, the control device 16 performs a process of starting only the audio data in synchronization with the system clock STC. No processing is performed on the video data when the video decoder 8 is already in the decoding start state. Send a picture search command.

  When only the audio is shifted to the synchronous start state, the control device 16 sends a command to mute the output and a DTSA search command to the audio decoder 11 (step SP900). Upon receiving the DTSA search command, the audio decoder 11 sends a code request to the audio code buffer 9 to start decoding, and a signal indicating that a DTSA signal has been detected is sent from the DTSA detector 10. Wait for. However, in this state, since the audio decoder 11 has received the mute command, it does not actually output the decoded data. The control device 16 monitors the underflow of the audio code buffer 9 (step SP901). Since the underflow of the audio code buffer 9 means that there is no data to be sent out in the audio code buffer 9, the control device 16 temporarily stops sending data from the audio code buffer 9 when detecting this. Then, when the underflow is resolved, data transmission is permitted again. When the audio decoder 11 receives a signal indicating the detection of a DTSA signal from the DTSA detector 10, it temporarily stops decoding. At this time, the control device 16 can read the DTSA detected from the DTSA detector 10 (step SP902). The pause state of the audio decoder 11 can be released by the control device 16 as described later.

  Next, control device 16 determines the operation state of system clock STC (step SP903). When the automatic count up of the system clock STC is on, the audio decoder 11 performs the following processing. That is, the DTSA is compared with the latest STC read from the STC register 23 and the DTSA detector 10 (step SP904), and the DTSA search instruction to the audio decoder 11 is repeated until DTSA> STC (step SP905). When a DTSA satisfying DTSA> STC is read, the control device 16 reads a new STC (step SP913), waits until DTSA = STC (step SP914), and then instructs the audio decoder 11 to release the decoding temporary stop. Is sent (step SP911).

  When the automatic count-up of the system clock STC is off, when the DTSA is detected by the DTSA detector 10, the controller 16 waits until sufficient data is accumulated in the audio code buffer 9. That is, the controller 16 reads the latest SCR from the demultiplexer 5 (step SP906), and the SCR and the already read DTSA, similarly to the process of waiting until sufficient data is stored in the video code buffer 6 described above. (Step SP907), until DTSA = <SCR, or until a signal indicating overflow is received from any of the video code buffer 6, audio code buffer 9, and subtitle code buffer 12. It waits (step SP908). Next, when the automatic count-up of the system clock STC is off, the control device 16 starts the automatic count-up of the system clock STC at the same time as the start of the decoding of the audio decoder. That is, when detecting that sufficient data has accumulated in the audio code buffer 9, the control device 16 sets the DTSA detected from the DTSA detector 10 in the STC register 23 (step SP909), and the STC count-up circuit 24. To turn on the automatic count-up of the STC (step SP910). At the same time as activating the STC count-up circuit 24, the control device 16 sends a pause release command to the audio decoder 11 to start decoding audio data (step SP911).

  When the above processing is completed, the control device 16 sends a decoding start command to the subtitle decoder 14 (step SP912), and shifts to a steady reproduction state. When only the audio data starts to be reproduced in the synchronous start state, and after the transition to the reproduction steady state, the control device 16 receives a signal indicating that the DTSV is detected from the DTSV detector 7, the above-described video of FIG. Only the process proceeds to the process after step SP804 in the synchronous start state.

(3-9) Subtitle Only Synchronous Start State FIG. 22 shows a processing flow of the control device 16 in the subtitle only synchronous start state. When the subtitle transitions to the synchronous start state, the control device 16 performs a process of synchronously starting only the subtitle data with the system clock STC.

  The subtitle data is a kind of video data, but the video data handled by the video decoder 8 of the present apparatus is one video data such as a normal television video signal or video data encoded by ISO11172 (MPEG1) or ISO13818 (MPEG2). While the display time of the screen is about 25 / sec to about 1/30 sec, the subtitle data handled by this device is 1 second such as subtitles to be synthesized or superimposed on a movie or TV. The image data is characterized by being image data that is continuously displayed on the same screen for a relatively long period of time.

  Since the subtitle data has the above characteristics, the subtitle data for one screen is recorded at a low transfer rate in the data in which the video data, audio data, and subtitle data recorded in the DSM1 are multiplexed. Keep it. In the present apparatus that reproduces the data recorded in such a manner, the subtitle decoder 14 reads the subtitle data transmitted at a low transfer rate through the subtitle code buffer 12 and the DTSS detector 13, and decodes the data by the subtitle decoder 14. , To the post-processor 15.

  In the subtitle-only synchronous start, no processing is performed on the video data when the video decoder 8 is already in the decoding start state, and when the video decoder 8 is not in the decoding start state, the video data is not processed. An I-picture header search instruction is sent to the decoder 8 to wait for video data to be sent from the demultiplexer 5 to the video code buffer 6.

  As for the audio data, no processing is performed when the audio decoder 11 is already in the decoding start state, and when the audio decoder 11 is not in the decoding start state, the output to the audio decoder 11 is performed. And a DTSA search command to wait for the audio data to be sent from the demultiplexer 5 to the audio code buffer 9.

  Regarding the caption data, when the automatic count up of the system clock STC is turned on, the caption is displayed in the same processing procedure as the caption display method in the steady reproduction state described later. In the subtitle-only synchronous start, control device 16 first determines whether or not the count-up of system clock STC is on (step SP1000). When the automatic count up of the system clock STC is off, the following processing is performed, and then the subtitles are displayed in the same processing procedure as the subtitle display method in the steady reproduction state described later. When the automatic count up of the system clock STC is off, the control device 16 sends a DTSS search command to the subtitle decoder 14 (step SP1001), and waits for the DTSS detector 13 to detect DTSS (step SP1001). Step SP1002). Next, when DTSS is detected, it is read (step SP1003). At this time, the system clock STC has not started, the decoding start command is not issued to the subtitle decoder 14, and the subtitle code buffer 12 overflows. Therefore, the control device 16 sends a signal indicating overflow from the subtitle code buffer 12 to the subtitle decoder 14. At the time of receiving (step SP1004), the DTSS read from the DTSS detector 13 is set in the STC register 23 (step SP1005), and the control waits for the vertical synchronization signal from the vertical synchronization signal generation circuit 22 (step SP1006). The STC count up circuit 24 is operated (step SP1007), and the subtitle decoder 14 is started (step SP1008). When the above processing ends, the control device 16 shifts to a steady reproduction state.

  When only the subtitle data starts to be reproduced in the synchronous start state and the control device 16 receives a signal indicating that the DTSV is detected from the DTSV detector 7 after transition to the reproduction steady state, the video only synchronous start state The process moves to step SP804. When only the subtitle data is started to be reproduced in the synchronous start state and the control device 16 receives a signal indicating that DTSA is detected from the DTSA detector 10 after the transition to the reproduction steady state, only the audio is in the synchronous start state. The process moves to step SP904. Further, only the subtitle data starts to be reproduced in the synchronous start state, and after transition to the steady reproduction state, the control device 16 simultaneously receives signals indicating that DTSV and DTSA have been detected from the DTSV detector 7 and the DTSA detector 10. In this case, the process proceeds to steps SP604 and SP704 in the audio video synchronization start state.

(3-10) Steady state of reproduction When the state shifts to the steady state of reproduction, the control device 16 detects a video synchronization deviation, detects and corrects an audio synchronization deviation, detects an error, controls a subtitle decoder, and confirms a reproduction program. I do.

(3-11) Detection of Synchronization Misalignment When both the video decoder 8 and the audio decoder 11 are in the decoding state, the difference between the decoding start times of the video data and the audio data, that is, the synchronization misalignment between the display image and the output audio, which is called a Lip Sync, is detected. A means to detect and correct is needed.

  There are two possible synchronization deviations: a deviation of the video decoding start time DTSV with respect to the system clock STC, and a deviation of the audio decoding start time DTSA with respect to the system clock STC. Two methods are conceivable for detecting a synchronization shift. First, both of the above two synchronization errors are detected, and a policy of correcting the synchronization errors so that both of them are close to zero is adopted. The other is to consider one of the above two synchronization errors as a reference. It is a policy to detect only the remaining value of the synchronization deviation and take a means of correcting the synchronization deviation.

  The former policy is to make all the deviations equal to a certain reference STC value to eliminate the synchronization deviation between the video data and the audio data. If the latter policy is based on, for example, a shift of the video decoding start time DTSV with respect to the system clock STC, the system clock STC is initialized with the DTSV periodically or at a fixed time interval, and the video decode start time DTSV with respect to the system clock STC. Is calculated to be zero.

  By this processing, the value of the deviation of the audio decoding start time DTSA with respect to the system clock STC becomes a value obtained by adding the value of the deviation of the original DTSV to each of the original values. Is close to zero, thereby relatively reducing the synchronization deviation between video data, audio data, and subtitle data to zero.

  The detection of the value of the DTSV / DTSA synchronization deviation with respect to the system clock STC in the former method of detecting the synchronization deviation is performed as follows. FIG. 23 shows a processing flow of the control device 16 in the former video out-of-synchronization detection. That is, upon receiving a signal indicating that an I-picture header has been detected from the video decoder 8 (step SP2000), the control device 16 reads the latest DTSV from the DTSV detector 7 and the STC from the STC register 23 (step SP2001, step SP2002). ), The difference between DTSV and STC, that is, (DTSV-STC) is calculated (step SP2003), and the value is stored in the storage device 20 (step SP2004).

  FIG. 24 shows a processing flow of the control device 16 in the former detection of audio synchronization deviation. When receiving a signal indicating that DTSA has been detected from the DTSA detector 10 (step SP3000), the control device 16 reads the latest DTSA from the DTSA detector 10 and the STC from the STC register 23 (step SP3001, step SP3002). Next, the difference between DTSA and STC, that is, (DTSA-STC) is calculated (step SP3003), and the value is stored in the storage device 20 (step SP3004).

FIG. 25 shows a processing flow of the control device 16 in the latter detection of video out-of-sync. That is, upon receiving a signal indicating that an I-picture header has been detected from the video decoder 8 (step SP4000), the control device 16 reads the latest DTSV from the DTSV detector 7 and the STC from the STC register 23 (steps SP4001, SP4002). , DTSV and STC, that is, | DTSV-STC |, is calculated (step SP4003). Next, | DTSV-STC | is compared with a fixed value (step SP4004). If | DTSV-STC | is equal to or smaller than the fixed value, the value of DTSV is set in the STC register 23 (step SP4005). When | DTSV-STC | exceeds a certain value, it is determined that a serious out-of-sync has occurred, and it is determined that DTSV cannot be used as a reference, and the video code buffer 6 and the audio code buffer 9 are cleared. The state shifts to the audio video synchronization start state (step SP4007). If | DTSV-STC | is equal to or less than the fixed value, a value of 0 is recorded in the storage device 20 as (DTSV-STC) (step SP4006).
FIG. 24 shows the processing flow of the control device 16 in the latter detection of audio synchronization deviation, as in the former case. That is, when receiving a signal indicating that DTSA has been detected from the DTSA detector 10, the control device 16 reads the latest DTSA from the DTSA detector 10 and the STC from the STC register 23. Next, the difference between DTSA and STC, that is, (DTSA-STC) is calculated, and the value is stored in the storage device 20.

  In the case where it takes a long time to calculate (DTSV-STC), (DTSA-STC) and | DTSV-STC | by the software in the control device 16 as described above, It is also conceivable to provide an adder, a subtractor, and a comparator by hardware, set the values of STC, DTSV, and DTSA by the control device 16 and read out the calculation result by the control device 16.

(3-12) Correction of Synchronization Misalignment Next, a description will be given of the correction of synchronization deviation for DTSV and DTSA, which is used through the former and latter synchronization detection policies. FIG. 26 shows a processing flow of the control device in correcting the synchronization deviation with respect to DTSV. When a new (DTSV-STC) is stored in the storage device 20 (step SP5000), the control device 16 reads the value (step SP5001). If the value of (DTSV-STC) is zero, no countermeasures are taken against the video decoder 8 for synchronization deviation (step SP5002).

  Next, control device 16 compares the absolute value of (DTSV-STC) with a constant value (step SP5003). When the absolute value of (DTSV-STC) becomes a large value exceeding a certain value, it is determined that a serious synchronization error has occurred, and the control device 16 clears the video code buffer 6 and the audio code buffer 9 (step S1). (SP5004), after displaying a warning (step SP5005), shifts to the audio video synchronization start state.

  If the absolute value of (DTSV-STC) does not exceed a predetermined value, the sign of DTSV is determined (step SP5006). If (DTSV-STC)> 0, the decoding of video data proceeds to the system clock STC. In this case, the control device 16 instructs the video decoder 8 to temporarily stop decoding for the number of pictures corresponding to the magnitude of | DTSV-STC | and to repeatedly display the same pictures (step SP5007). If (DTSV-STC) <0, it means that video data decoding is behind the STC, and the control device skips the number of picture data according to the magnitude of | DTSV-STC |. It instructs the video decoder 8 (step SP5008).

  At this time, if the I-picture and P-picture data are skipped, since the image is compressed using the inter-frame correlation in ISO11172 (MPEG1) or ISO13818 (MPEG2), the picture data cannot be decoded normally until the next I-picture. In spite of skipping, the video decoder 8 is instructed to skip only B pictures which are not used as reference pictures for decoding pictures thereafter.

  FIG. 27 shows a processing flow of the control device in correcting the synchronization deviation with respect to the DTSA. When a new (DTSA-STC) is stored in the storage device 20 (step SP6000), the control device 16 reads the value (step SP6001). If the value of (DTSA-STC) is zero, no countermeasure against synchronization deviation is taken for the audio decoder 11 (step SP6002). Next, control device 16 compares the absolute value of (DTSA-STC) with a constant value (step SP6003). When the absolute value of (DTSA-STC) becomes a large value exceeding a certain value, it is determined that a serious synchronization error has occurred, and the control device 16 clears the video code buffer 6 and the audio code buffer 9 (step (SP6004), after displaying a warning (step SP6005), shift to the audio video synchronization start state.

  If the absolute value of (DTSA-STC) does not exceed a certain value, it is determined whether DTSA is positive or negative (step SP6006). If (DTSA-STC)> 0, the decoding of audio data proceeds to the system clock STC. In this case, the control device 16 instructs the audio decoder 11 to temporarily stop decoding or repeat decoding of audio data for a fixed time according to the magnitude of | DTSA-STC | (step SP6007). If (DTSA-STC) <0, it means that the decoding of the audio data is delayed with respect to the system clock STC. Therefore, the control device operates for a certain period of time according to the magnitude of | DTSA-STC | The audio decoder 11 instructs the audio decoder 11 to skip the audio data (step SP6008).

  In each of the cases where it is determined that a serious out-of-sync has occurred during the detection of the out-of-sync and countermeasures, the control device 16 instructs the information display device 19 and the post-processor 15 to output a considerable amount of video data. It is conceivable to turn on a lamp or the like indicating that there is a possibility that the image data has been lost over the amount, and display a screen to that effect (step SP5006, step SP6005).

(3-13) Error Detection The data read from the DSM 1 is subjected to an error correction process by the error correction device 3, but data containing a large amount of error data is not completely corrected without error correction. In some cases, the data is sent to the video decoder 8, the audio decoder 11, or the subtitle decoder 14 via the demultiplexer 5. In this case, since an error flag is attached to the error data, the video decoder 8, the audio decoder 11, and the subtitle decoder 14 can detect the error data.

  Also, since both the video decoder 8 and the audio decoder 11 decode video data or audio data conforming to ISO 11172 (MPEG1) or ISO13818 (MPEG2), data that does not conform to the respective grammar can be detected as an error. In any case, when the video decoder 8, the audio decoder 11, and the subtitle decoder 14 detect an error, the video decoder 8, the control unit 16 sends a signal to notify the presence of the error.

  When a decoding error is detected from the video decoder 8 or the audio decoder 11, loss of video data or audio data may be considered. Therefore, if reproduction is continued as it is, there is a possibility that a synchronization shift between a display image and output audio may occur. A countermeasure against this synchronization error is taken by the means for detecting and correcting the synchronization error. In addition to the countermeasure for the synchronization deviation, the control device 16 can count the frequency of occurrence of the error and grasp the error occurrence status of the disk. As a result, the error correction algorithm of the error correction device 3 can be corrected, and the user can be notified of the error occurrence situation.

  The controller 16 counts the number of times a signal indicating the presence of an error is received, thereby calculating the frequency of an error that has occurred in the disk or its track or a predetermined time in the past. Specifically, the storage device 20 is provided with an area for storing three types of error occurrence times, an error number storage area in disk, an error number storage area in track error, and an error number storage area within 3 seconds, and these are operated as counters. . FIGS. 28, 29, and 30 show the error detection processing flow of the control device using each counter. The error count storage area in the disk has an error within 3 seconds when shifting from the stop state to the playback preparation state, the error count storage area in the track shifts from the stop state to the playback preparation state, and when shifting to playback of a new track. The number-of-times storage area is reset when shifting from the stop state to the reproduction preparation state and every three seconds (steps SP7000 and SP7003, SP8000, SP8003 and SP8004, and SP9000, SP9003 and SP9004).

  When the controller 16 receives an error signal from the video decoder 8, the audio decoder 11, or the subtitle decoder 14 (steps SP7001, SP8001, SP9001), the disk error count storage area, track error count storage area, and 3 seconds One is added to each of the values stored in the three areas of the within-error number storage area (steps SP7002, SP8002, and SP9002).

  As a result of the addition, if the value stored in the in-disk error count storage area exceeds a predetermined threshold value, the control device 16 determines that the currently reproduced DSM1 has many defects (step SP7004). Then, it shifts to the stop state.

  If the value stored in the error count storage area within the track error exceeds a predetermined threshold value (step SP8005), it is determined that the track has many defects, and the reproduction of the currently reproduced track is interrupted. Then, the next track is reproduced (step SP8006, step SP8007). However, if it is found from the TOC data that the next track does not exist, the reproduction is interrupted and the operation is shifted to the stop state.

  If the value stored in the error count storage area within 3 seconds exceeds a predetermined threshold (step SP9005), the control device 16 stops displaying the screen on the video decoder 8 and the subtitle decoder 14 for the next 3 seconds. Is temporarily instructed to the audio decoder 11 (step SP9006).

(3-14) Confirmation of Reproduced Track When the controller 16 receives a signal indicating that the sector number has been detected from the demultiplexer 5 in the steady reproduction state, the controller 16 reads the sector number data from the demultiplexer 5. By comparing the read sector number data with the start and end sector numbers of each track of the TOC data shown in FIG. 5, it is detected whether or not the sector number read from the demultiplexer 5 belongs to that track. If the track is different from the track that has been reproduced up to this point, the control device 16 instructs the information display device 19 and the post processor 15 to turn on a lamp or the like indicating that the reproduced track has changed and / or the number of the reproduced track. And display it on the screen.

  When it is detected that the reproduction of the last track is completed, the control device 16 sends a command to the demultiplexer 5 to stop the demultiplexing. Thereafter, the control unit 16 waits for an underflow error indicating that the video code buffer 8, the audio code buffer 11, and the subtitle code buffer 12 are all empty to the control unit 16, and shifts to a stop state.

  The controller 16 reads the subcode data from the subcode decoder 21 in the steady reproduction state in the same manner as reading the sector number data from the demultiplexer 5. Similarly to the sector number data read from the demultiplexer 5, the subcode data is compared with the start and end sector numbers of each track of the TOC data shown in FIG. If the track number to which the data belongs is specified and it is different from the track that has been reproduced up to now, and if the user has specified the reproduction in the discontinuous order of the track numbers, the discontinuous track to be reproduced next is specified. To the reproduction preparation state in order to reproduce.

  When the control device 16 receives a stop command from the user input device 18 or the external interface 17 in the steady reproduction state, the control device 16 shifts to the stop state. When the control device 16 receives a search command according to a command from the user input device 18 or the external interface 17 in the steady reproduction state, the control device 16 shifts to the search state. Further, when the control device 16 receives a temporary stop command by a command from the user input device 18 or the external interface 17 in the steady reproduction state, the control device 16 shifts to a temporary stop state.

(3-15) Control of Subtitle Decoder The subtitle data is encoded for each screen, and the subtitle data header added to the head data of the data of each subtitle screen includes DTSS indicating the decoding start time of the subtitle screen, and At the head of the subtitle screen in each subtitle data, a duration_time indicating how long the subtitle screen is displayed is recorded. This DTSS is not recorded in the subtitle data header other than the head of the data of each subtitle screen. Therefore, by performing the DTSS search, it is possible to search for the head data of the subtitle screen.

  FIG. 31 shows a processing flow of the control device 16 relating to the control of the subtitle decoder in the steady reproduction state. When the control device 16 receives a DTSS detection signal from the DTSS detector 25 (step SP31) based on a DTSS search command (step SP31) in the steady reproduction state, it checks the decoding start time. First, the DTSS is read from the DTSS detector 25 and the value of the STC at that time is read from the STC register 23 (step SP33, step SP34). Next, the read DTSS is compared with the STC (step SP35). If DTSS <STC, it is determined that the decoding timing has already been missed, and the subtitle code buffer is cleared (step SP43). Is issued to the subtitle decoder 14 (step SP30). Further, it waits for a DTSS detection signal from the DTSS detector 25 again (step SP31), and when it is detected, checks the decoding start time of the next subtitle screen.

  When DTSS = STC, it is determined that the decoding start timing is reached, and immediately, when DTSS> STC, it is determined that the decoding start timing has not yet been reached, and when DTSS = STC, the caption is reached. A decoding instruction for one screen is issued to the decoder (steps SP36, SP37, SP38, SP39). Upon receiving the decoding instruction for one screen, the subtitle decoder 14 decodes the one-screen subtitle data from the subtitle code buffer 12 through the DTSS detector 25, stores it in the internal frame memory, and starts outputting to the post-processor 15. I do.

  Further, the control device 16 waits until DTSS + duration_time> STC (steps SP40 and SP41). While waiting, the subtitle screen is displayed. When DTSS + duration_time> STC, a display stop command is issued to the subtitle decoder 14 (step SP42), and the display of the subtitle screen is ended. While the control device 16 waits for DTSS + duration_time> STC, the DTSS corresponding to the head of the next subtitle screen data may be detected. However, the display of the subtitle screen ends as DTSS + duration_time> STC. Until, no special processing is performed.

  After the display of the subtitle screen is completed, while waiting for DTSS + duration_time> STC, if the DTSS corresponding to the head of the next subtitle screen data is detected, the DTSS of the next subtitle screen is changed to DTSS. The data is read from the detector 25 and the decoding start time is checked.

  When the control device 16 reads the DTSS, determines that DTSS> STC, and waits for DTSS = STC, as described above, when an I-picture detection signal is transmitted from the video decoder 8, Since the STC register is reset by the DTSV corresponding to the I-picture, the count-up of the system clock STC becomes discontinuous. As a result, DTSS <STC. There can be.

  Therefore, when DTSS> STC is determined and DTSS = STC is waited, DTSS <STC is satisfied (step SP37). If (STC-DTSS) is smaller than a threshold value, for example, duration_time, this subtitle screen is still present. Is to be displayed, so that the subtitle decoder 14 can start decoding for one screen. However, when (STC-DTSS) is large, it is determined that a serious synchronization error has occurred, and the control device 16 issues a DTSS search command to the subtitle decoder 14 and the DTSS detector 25 (step SP30). When DTSS is detected, the decoding start time of the subtitle screen is checked.

(3-16) Search state The search state is achieved by reproducing only I-picture data appearing at regular intervals in video data, and skipping P-pictures and B-pictures between I-pictures without reproducing them. , The video data recorded on the DSM1 is reproduced in a shorter time than the time required for normal reproduction. A case where only the I picture is selectively displayed in the same direction as the normal reproduction is called a forward search, and the I picture is selected in a direction opposite to the normal reproduction, that is, in a direction in which the reproduction time becomes progressively older. Displaying while displaying is called a reverse search.

  FIG. 32 shows a processing flow of the control device 16 in the search state. When entering the search state, the control device 16 sends a signal to the video decoder 8 indicating that it has entered the search state (step SP50). When the video decoder 8 receives the signal indicating that it has entered the search state, it decodes only the I-picture data of the video data read from the DTSV detector 7, and the other P-picture and B-picture data are Perform the operation of discarding without decoding. The decoded I-picture is displayed immediately after the decoding is completed.

  Further, the audio decoder 11 instructs the audio decoder 11 to stop decoding and set the output volume to zero, and instructs the subtitle decoder to stop decoding and temporarily stop decoding output (steps SP51 and SP52). As a result, audio data and subtitle data are not reproduced during the search.

  When entering the search state, the control device 16 issues a forward track jump command to the drive unit 2 in the case of a forward search, and issues a backward track jump command to the drive unit 2 in the case of a reverse search (step SP53). In response to the forward or backward track jump command, the drive unit 2 moves the pickup, and moves to the current pickup position with a larger sector number in the case of the forward track jump command and a reverse track track. In the case of a jump instruction, data with a small sector number can be read.

  The movement amount of the pickup in the track jump may not be specified accurately. In other words, unlike the case where a seek command is issued by strictly specifying the destination sector number, when performing a high-speed jump with a large moving amount, the DSM1 which can specify only the moving direction and the approximate moving amount can be specified. In the case of the combination of the drive units 2, it is not necessary to know the exact value of the jump amount.

  When the movement of the pickup is completed and the data at the movement destination of the pickup is read by the error correction device, the subcode decoder 21 reads the subcode data in the format shown in FIG. The control device 16 reads the sector number data and the reproduction inhibition flag from the subcode decoder read by the subcode decoder 21 (step SP54).

  If the read reproduction inhibition flag is set (step SP55), that is, it indicates that reproduction is prohibited, the control unit 16 determines that the track jump results in that the pickup is set to the lead-in area (LEAD IN AREA) in FIG. It is determined that the player has entered either the out area (LEAD OUTAREA) or the TOC area, and shifts to the stop state. If the reproduction inhibition flag of the subcode data is not set, the multiplexed data is supplied to the video decoder 8, the audio decoder 11, and the subtitle decoder 14 from the sector number read after the track jump.

  Since the video decoder 8 has entered the search state, it performs an I-picture header search to reproduce only I-pictures. When the I-picture header is detected, the video decoder 8 sends a signal to the control unit 16 informing that the I-picture header has been detected, immediately decodes the I-picture, and outputs immediately after the decoding is completed. Next, when a P-picture header or a B-picture header is detected, the controller 16 is notified of the detection, the P-picture data and the B-picture data are not decoded, and the next I-picture header search is started.

  When the control device 16 enters the search state, it waits for a signal notifying the detection of the I-picture header from the video decoder 8 (step SP56). Upon receiving the I-picture header detection signal, the control waits for the next P-picture header detection signal or B-picture header detection signal (step SP58). When receiving the detection signal of the P or B picture header, the control unit 16 determines that the decoding of the I picture has been completed, and again the control unit 16 issues a forward track jump command of the pickup to the drive unit 2 in the case of a forward search. In the case of reverse search, a reverse track jump command is issued, and the above search state is repeated (step SP53).

  In the search state, the audio data and the subtitle data are read into the audio code buffer 9 and the subtitle code buffer 12, respectively. However, since the audio decoder 11 and the subtitle decoder 14 stop decoding, the audio code buffer 9, The caption code buffer 12 or both will overflow and the demultiplexer 5 will not be able to send data to the video code buffer 6, audio code buffer 9 and DTSS detector 25.

  Therefore, in the search state, the control device 16 periodically clears the audio code buffer 9 and the subtitle code buffer 12. For example, the audio code buffer 9 and the subtitle code buffer 12 are cleared each time a detection signal of an I or P or B picture header is received from the video decoder 8 (steps SP57 and SP59). In the search state, when the control device 16 receives a search operation cancel command in response to a command from the user input device 18 or the external interface 17, the control device 16 shifts to a synchronous start method determination state. In the search state, when receiving a stop command from the user input device 18 or the external interface 17, the control device 16 shifts to the stop state.

(3-17) Suspended state FIG. 33 shows a processing flow of the control device 16 in the suspended state. When the control device 16 shifts to the pause state, it waits for a vertical synchronization signal from the vertical synchronization signal generation circuit 22 (step SP70). When the vertical synchronizing signal is detected, a temporary stop command is issued to the video decoder 8 and a decode stop command is issued to the audio decoder 11, and at the same time, the STC count up circuit is instructed to stop the automatic counter up of the STC (steps S71, S72, S73). ).

  Upon receiving the pause instruction, the video decoder 8 suspends the decoding and continues to display the last decoded screen. If the image being decoded at this time is an interlaced image that composes one screen with two fields with a time difference, the video decoder 8 selects either the odd field or one of the even fields, and By displaying the image of the field at the time of displaying both the odd field and the even field, flickering of the screen is suppressed. Upon receiving the decode stop instruction, the audio decoder 11 immediately stops decoding.

  In the processing for the subtitle screen in the pause state, if the subtitle screen is displayed at the moment of transition from the normal reproduction state to the pause state, the display of the screen is continued. If the subtitle screen has not been displayed, the subtitle screen is not displayed. In the pause state, when receiving a pause release command by a command from the user input device 18 or the external interface 17, the control device 16 waits for a vertical synchronization signal from the vertical synchronization signal generation circuit 22 (step SP74). , SP75). When the vertical synchronizing signal is detected, a pause release command is issued to the video decoder 8 and a decode start command is issued to the audio decoder 11, and at the same time, the STC count-up circuit is instructed to start the automatic counter up of the STC (steps SP76, SP77, SP78). ). Thereafter, the control device 16 shifts to the normal reproduction state.

  In the temporary stop state, when the control device 16 receives a frame feed command according to a command from the user input device 18 or the external interface 17, the control device 16 shifts to the frame feed state. FIG. 34 shows a processing flow of the control device 16 in the frame advancing state. When shifting to the frame feed state, the control device 16 first instructs the audio code buffer 9 to clear the audio code buffer (step SP90). This is to prevent an underflow error of the audio code buffer from occurring at the time of decoding one screen by the video decoder.

  Next, the video decoder 8 is made to decode only one frame. That is, the CPU waits for a vertical synchronization signal from the vertical synchronization signal generation circuit 22 (step SP91), sends a decoding start instruction to the video decoder 8 with the next vertical synchronization signal (step SP92), and pauses with the next vertical synchronization signal. Is sent (steps SP93 and SP94). Next, the system clock STC is advanced by one frame (step SP95). That is, the control device 16 reads the STC from the STC register 23, adds the display time of one frame to the STC, and resets the value in the STC register 23 again. Next, the control device 16 determines whether or not there is a command to cancel frame advance from the user input device 18 or the external interface 17 (step SP96), and if not, repeats the above processing.

  At this time, the following processing is performed on the subtitle screen as in the normal playback state. That is, when the current subtitle screen is displayed, when DTSS + duration_time> STC is satisfied for the currently displayed subtitle screen, a display stop command is issued to the subtitle decoder 14 to terminate the display of the subtitle screen. In addition, when the subtitle screen is not currently displayed, the subtitle decoder 14 is instructed to decode and display the subtitle screen to the subtitle decoder 14 when DTSS <STC holds for the next subtitle screen DTSS. When the above processing is completed, the control device 16 shifts from the frame feed state to the temporary stop state.

  As described above, according to the present invention, a data reproducing apparatus and a data recording apparatus for synchronously reproducing video data, audio data, and subtitle data multiplexed at a variable rate and realizing various functions are provided. A medium can be realized.

The data recording medium of the present invention can be used for a digital video disk (DVD) on which a bit stream compressed using MPEG is recorded. Further, the data reproducing apparatus of the present invention can be used for a reproducing apparatus for reproducing the DVD.

FIG. 1 is a block diagram showing a configuration of a data reproducing device according to the present invention. FIG. 3 is a schematic diagram for explaining a sector format of reproduced data in a data reproducing apparatus. FIG. 3 is a schematic diagram used for describing a configuration of a DSM reproduced by a data reproducing device. FIG. 4 is a schematic diagram for explaining a configuration of a DSM reproduced by a data reproducing device instead of the DSM of FIG. 3; FIG. 4 is a schematic diagram used to explain the structure of TOC data in DSM. FIG. 6 is a schematic diagram illustrating the structure of TOC data in a DSM instead of the TOC data of FIG. 5; FIG. 3 is a schematic diagram for explaining the structure of a multiplexed bit stream input to a demultiplexer and the structure of a bit stream output to each code buffer; FIG. 8 is a schematic diagram illustrating the structure of a system header in the bit stream of FIG. 7. FIG. 8 is a schematic diagram for explaining the structure of a video data header, an audio data header, and a caption data header in the bit stream of FIG. 7. FIG. 4 is a schematic diagram used to explain the format of subcode data. 5 is a flowchart for explaining a state transition of a control device as an operation of the data reproducing device. FIG. 3 is a block diagram illustrating a configuration of an error correction device 3. 5 is a flowchart illustrating a process of the control device 16 in an initial setting state. 4 is a flowchart illustrating a process of the control device 16 in a TOC reading state. It is a flowchart which shows the process of the control apparatus 16 in a stop state. 5 is a flowchart showing a process of the control device 16 in a reproduction preparation state. 6 is a flowchart illustrating a process of the control device 16 in an initial start method determination state. 9 is a flowchart illustrating a process related to video of the control device 16 in an audio video synchronization start state. 9 is a flowchart showing a process related to audio of the control device 16 in an audio video synchronization start state. 6 is a flowchart illustrating a process of the control device 16 in a video-only synchronization start state. 6 is a flowchart showing a process of the control device 16 in a synchronization start state of only audio. It is a flowchart which shows the process of the control apparatus 16 in a subtitle only synchronous start state. 5 is a flowchart illustrating a process performed by a control device 16 in detecting a video synchronization shift. 6 is a flowchart illustrating a process performed by the control device 16 in detecting a synchronization shift regarding audio. 11 is a flowchart illustrating another process of the control device 16 in detecting a video synchronization shift. 9 is a flowchart illustrating a process performed by the control device 16 in correcting a video synchronization error. 9 is a flowchart illustrating a process performed by the control device 16 in correcting a synchronization error relating to audio. 6 is a flowchart illustrating a process of the control device 16 in error detection. 11 is a flowchart illustrating another process of the control device 16 in error detection. 11 is a flowchart illustrating another process of the control device 16 in error detection. 9 is a flowchart showing processing of the control device 16 relating to subtitles. 6 is a flowchart illustrating a process of the control device 16 in a search state. It is a flowchart which shows the process of the control apparatus 16 in a pause state. 6 is a flowchart illustrating a process of the control device 16 in a frame-feed state. FIG. 11 is a block diagram showing a configuration of a conventional data reproducing device. FIG. 36 is a schematic diagram used for describing a track jump in the data reproducing apparatus of FIG. 35.

Explanation of reference numerals

1 DSM 2 Drive unit 3 Error correction device 4 Ring buffer 5 Demultiplexer 6 Video code buffer 7 Video decoding time stamp (DTSV) detector , 8 video code decoder, 9 audio code buffer, 10 audio decoding time stamp (DTSA) detector, 11 audio code decoder, 12 subtitle code buffer, 13 subtitle decoding time Stamp (DTSS) detector, 14 Caption code decoder, 15 Postprocessor, 16 Control device, 17 External interface, 18 User input device, 19 Information display device, 20 , A storage device, 21 a subcode decoder, 22 a vertical synchronizing signal generation circuit, 3 ...... system clock (STC) register, 24 ...... system clock (STC) counter up-circuit.

Claims (8)

A data recording medium on which multiplexed data in which at least two types of data are multiplexed is recorded for each track, and content content information having track information for each of the tracks is recorded. Is a reproducing apparatus for reproducing a data recording medium including a multiplex flag indicating whether or not each of the at least two types of data is included and a valid flag indicating whether the multiplex flag is valid. ,
Reading means for reading data including the multiplexed data from the data recording medium;
Data reproducing means for reproducing data read from the data recording medium;
A plurality of decoding means for decoding the multiplexed data;
Control means for judging a multiplexing state of a predetermined data unit and controlling the plurality of decoding means in accordance with the multiplexing state, wherein the valid flag for each of the at least two types of data is When the multiplexing flag indicates that the multiplexing flag is valid, the multiplexing state of the predetermined data unit is determined based on the multiplexing flag. 2. The data reproducing apparatus according to claim 1, wherein the control unit determines the multiplexing state according to whether or not decoding start information corresponding to each data unit is detected in a predetermined period. . The control means selects a reproduction start procedure of the predetermined data unit according to whether or not video data, audio data, and subtitle data are multiplexed in the predetermined data unit. Item 2. The data reproducing device according to item 1. A reference clock counting a predetermined clock;
The plurality of decoding means includes a video decoder for decoding video data, and an audio decoder for decoding audio data,
The control means, when only the video data is included in the predetermined data unit, operates the reference clock to cause only the video decoder to start decoding, and after the video decoder starts decoding. The data reproducing apparatus according to claim 3, wherein, when the audio data is detected, decoding of the audio data is started in synchronization with the reference clock. A reference clock counting a predetermined clock;
The plurality of decoding means includes a video decoder for decoding video data, and an audio decoder for decoding audio data,
The control means, when only the audio data is included in the predetermined data unit, operates the reference clock to start decoding only the audio decoder, and after the audio decoder starts decoding. 4. The data reproducing apparatus according to claim 3, wherein when the video data is detected, decoding of the video data is started in synchronization with the reference clock. A reference clock counting a predetermined clock;
The plurality of decoding means includes a video decoder for decoding video data, and a subtitle decoder for decoding subtitle data,
The control means, when only the subtitle data is included in the predetermined data unit, operates the reference clock to start decoding only the subtitle decoder, and after the subtitle decoder starts decoding 4. The data reproducing apparatus according to claim 3, wherein when the video data is detected, decoding of the video data is started in synchronization with the reference clock. A reference clock counting a predetermined clock;
The plurality of decoding means includes an audio decoder for decoding audio data, and a subtitle decoder for decoding subtitle data,
The control means, when only the subtitle data is included in the predetermined data unit, operates the reference clock to start decoding only the subtitle decoder, and after the subtitle decoder starts decoding The data reproducing apparatus according to claim 3, wherein, when the audio data is detected, decoding of the audio data is started in synchronization with the reference clock. Recording of information by converging and irradiating a light beam, and an optical recording medium for reading recorded information,
A lead-in area in which information about data content recorded on the disc is arranged;
A multiplexed data recording area in which multiplexed data in which at least two types of data are multiplexed is arranged for each track;
In the lead-in area, a track information recording area for each track on which the multiplexed data is recorded is provided for each track,
In the track information recording area, a multiplex flag indicating whether or not each of the at least two types of data is included in a track and a valid flag indicating whether the multiplex flag is valid are arranged. A data recording medium characterized by the above-mentioned.

Images