JP2004350029A - Broadcasting reception device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a broadcasting reception device capable of increasing the speed of seek operation. <P>SOLUTION: A signal detection circuit 6a decides whether the intensity of a broadcasting reception signal is equal to or higher than a prescribed level or not, and the levels of SD terminals 6b and 7a are switched in accordance with the decision result. The levels of SD terminals 6b and 7a are inputted to a variable amplifier 4, and the amplification degree is increased when the intensity of the broadcasting reception signal gets equal to or higher than the prescribed level from a level lower than the prescribed level. Thus the occurrence of repetitive level variance (chattering) of SD terminals 6b and 7a can be suppressed. Consequently, the waiting time spent till subsidence of chattering can be eliminated or reduced to increase the seek operation speed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a broadcast receiving apparatus having a seek function for automatically detecting a broadcast signal transmitted from a broadcasting station by radio waves.
[0002]
[Prior art]
[0003]
FIG. 2 shows a configuration example of a conventional broadcast receiving apparatus. A broadcast signal transmitted from a broadcast station by radio waves is caught by an antenna 1 and input to a tuner / front end 2. The tuner front end 2 includes an RF amplifier 2a, a mixer 2b, and a voltage controlled oscillator (VCO) 2c. The broadcast signal input to the tuner front end 2 is amplified at a high frequency by the RF amplifier 2a and mixed with the output signal of the voltage controlled oscillator 2c by the mixer 2b to become an intermediate frequency (IF) signal.
[0004]
The IF signal output from the tuner 2 enters the IFAMP first stage 13 via the IF filter 3 and is amplified with a predetermined gain.
[0005]
The IFAMP first stage 13 includes a resistor R1, resistors R10 to R12, and an NPN transistor Q3. The input terminal of the IFAMP first stage 13 is connected to the base of the transistor Q3, grounded via a resistor R1, and connected to a DC power supply + B via a resistor R11. The collector of transistor Q3 is connected to DC power supply + B via resistor R12. The DC power supply + B is grounded via a bypass capacitor C2. Note that the connection node between the collector of the transistor Q3 and the resistor R12 is the output terminal of the IFAMP first stage 13. The emitter of the transistor Q3 is grounded via the resistor R10.
[0006]
The signal output from the IFAMP first stage 13 enters the intermediate frequency amplifying / demodulating unit 6 via the IF filter 5 and is IF-amplified to a predetermined level in the intermediate frequency amplifying / demodulating unit 6 and then demodulated (detected) The signal is then output as a demodulated output signal S1 from the intermediate frequency amplification / demodulation unit 6. Note that the demodulated output signal S1 includes an audio signal, a composite signal, and a data signal.
[0007]
The intermediate frequency amplification / demodulation unit 6 includes a signal detection circuit 6a, an SD terminal 6b, an NPN transistor Tr1 having a base connected to the output side of the signal detection circuit 6a, a collector connected to the SD terminal 6b, and an emitter grounded. have. The SD terminal 6b is directly connected to the SD terminal 7a of the microcomputer 7 (hereinafter, referred to as the microcomputer 7), and is connected to the DC power supply + B via the resistor R9. The signal detection circuit 6a determines, based on the demodulated output signal, whether the received signal strength (antenna input level) of the broadcast radio wave input from the antenna 1 is equal to or higher than a predetermined level. If the antenna input level is lower than the predetermined level, the signal detection circuit 6a turns off the transistor Tr1. At this time, since the SD terminal 6b is connected to the DC power supply + B via the resistor R9, the SD terminal 6b becomes High level, and accordingly, the SD terminal 7a also becomes High level. On the other hand, if the antenna input level is equal to or higher than the predetermined level, the signal detection circuit 6a turns on the transistor Tr1, so that the SD terminal 6b is grounded and becomes low level, and accordingly, the SD terminal 7a also becomes low level. .
[0008]
When the user presses a seek button (not shown) provided on the broadcast receiving apparatus, a seek command signal S2 is input to the microcomputer 7. When receiving the seek command signal S2, the microcomputer 7 controls a PLL (Phase Locked Loop) including a voltage controlled oscillator 2c, a reference voltage source 9, a phase comparator 10, a low-pass filter (LPF) 11, and a frequency divider 12. Then, the seek operation is started by scanning (increasing or decreasing) the oscillation frequency of the voltage controlled oscillator 2c. During the scanning of the oscillation frequency of the voltage controlled oscillator 2c, the microcomputer 7 monitors the level of the SD terminal 7a, and stops the scanning of the oscillation frequency of the voltage controlled oscillator 2c at that point when the SD terminal 7a changes from the high level to the low level. . Then, after a lapse of a predetermined period (for example, 50 milliseconds) from the moment when the SD terminal 7a changes from the High level to the Low level, the microcomputer 7 reads the level of the SD terminal 7a, and as a result, the SD terminal 7a changes to the Low level. If it is, the oscillation frequency of the voltage controlled oscillator 2c is fixed and the seek operation is terminated. If the SD terminal 7a is at the High level, scanning of the oscillation frequency of the voltage controlled oscillator 2c is restarted and the seek operation is continued.
[0009]
Further, the microcomputer 7 outputs information such as the reception frequency of the seeked broadcast signal to the display device 8 as display data. The display device 8 displays information including character data such as characters, numbers, and symbols based on display data output from the microcomputer 7.
[0010]
The reason why the microcomputer 7 reads the level of the SD terminal 7a after a lapse of a predetermined period (for example, 50 milliseconds) from the moment when the SD terminal 7a changes from the High level to the Low level as described above will be described below. In the reception state where the broadcast radio wave is relatively strong, as shown in the level time chart of the SD terminal 7a shown in FIG. 3A, when the broadcast radio wave is received and the SD terminal 7a changes from the High level to the Low level, the signal remains at the Low level thereafter. Since the stability is stabilized, even if the microcomputer 7 reads the level of the SD terminal 7a immediately after the SD terminal 7a changes from the high level to the low level, the microcomputer 7 can accurately recognize that the broadcast wave is being received. it can. On the other hand, in the reception state where the broadcast radio wave is relatively weak, that is, when the received signal strength of the broadcast radio wave is near a predetermined level (the threshold level at which the level of the SD terminal 7a switches), the SD terminal 7a shown in FIG. As shown in the level time chart, after the broadcast radio wave is received and the SD terminal 7a changes from the high level to the low level, repetition (chattering) of the level fluctuation of the SD terminal 7a occurs. If the microcomputer 7 reads the level of the SD terminal 7a during chattering, the microcomputer 7 may erroneously recognize (determine that a broadcasting station actually exists but does not exist). Since the chattering is generally settled until a predetermined period elapses from the moment when the SD terminal 7a changes from the High level to the Low level, the SD terminal 7a is prevented from preventing erroneous recognition of the microcomputer 7 and eliminating omission of channel selection. The microcomputer 7 reads the level of the SD terminal 7a after a lapse of a predetermined period (wait time uniformly set for each step of each reception frequency) from the moment when the signal goes from the High level to the Low level (time t1). I'm going to go.
[0011]
[Patent Document 1]
JP-A-10-200435
[Problems to be solved by the invention]
However, the chattering may not be stopped even after a predetermined period (a waiting time uniformly set for each step of each reception frequency) elapses from the moment when the SD terminal 7a changes from the High level to the Low level. In this case, the microcomputer 7 goes to read the level of the SD terminal 7a in a state where it is not determined whether the SD terminal 7a is at the high level or the low level. Therefore, as shown in the level time chart of the SD terminal 7a shown in FIG. If the microcomputer 7 goes to read the level of the SD terminal 7a (time t2) and the SD terminal 7a is at the high level, the microcomputer 7 misrecognizes (the broadcast station actually exists but it is determined that it does not exist). There was a problem of doing it. Also, the microcomputer 7 reads the level of the SD terminal 7a from the moment when the SD terminal 7a changes from the high level to the low level until a predetermined period (a waiting time uniformly set for each step of each reception frequency) elapses. Waiting, the speed of the seek operation was hindered.
[0013]
Note that the radio receiver disclosed in Patent Literature 1 causes only a broadcast station having good reception quality without adjacent interference or the like during a seek operation, that is, intentional omission of channel selection.
[0014]
The present invention has been made in view of the above problems, and has as its object to provide a broadcast receiving apparatus capable of reducing tuning omission in a seek operation. Another object of the present invention is to provide a broadcast receiving apparatus capable of speeding up a seek operation in view of the above problems.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, in a broadcast receiving apparatus according to the present invention, a variable gain amplifying unit that amplifies a signal based on a broadcast reception signal, and a broadcast reception signal based on an output signal from the variable gain amplification unit. A configuration is provided that includes a determination unit that determines whether the intensity is equal to or higher than a predetermined level, and a control unit that controls an amplification degree of the variable gain amplification unit according to a determination result of the determination unit. Further, the broadcast receiving device according to the present invention has a seek function. For example, there is provided a tuner means for converting the broadcast reception signal into an intermediate frequency signal, the variable gain amplifying means amplifying the intermediate frequency signal, and the control means or a second control means different from the control means is provided with the tuner means. The seek operation may be performed by increasing or decreasing the local oscillation frequency.
[0016]
According to such a configuration, for example, when the intensity of the broadcast reception signal goes from a level lower than a predetermined level to a level higher than a predetermined level, the control unit increases the amplification degree of the variable gain amplifying unit. , The occurrence of chattering can be suppressed. If chattering is less likely to occur, the broadcast receiving apparatus determines whether a broadcast station exists in a state where chattering does not subside, and the possibility that the broadcast station actually exists but does not exist is reduced. Channel omission in operation can be reduced. Further, if chattering is less likely to occur, the waiting time until the broadcast receiving apparatus determines whether or not a broadcast station exists from the moment when the intensity of the broadcast reception signal becomes lower than the predetermined level or higher than the predetermined level is reduced or Therefore, the seek operation can be speeded up.
[0017]
Further, when the intensity of the broadcast reception signal falls from the predetermined level or more to less than the predetermined level and remains below the predetermined level for a certain period thereafter, the control unit increases the amplification degree of the variable gain amplifying unit. When the intensity of the broadcast reception signal is reduced from the predetermined level or more to less than the predetermined level and then returned to the predetermined level or more before the predetermined period elapses, the control means controls the variable gain amplifying means. May not be reduced.
[0018]
In this case, even if the intensity of the broadcast reception signal falls from a predetermined level or more to less than the predetermined level due to noise or the like, if the intensity of the broadcast reception signal does not remain below the predetermined level for a certain period thereafter, the control unit Does not reduce the amplification of the variable gain amplifying means. Thereby, occurrence of chattering due to noise or the like can be suppressed.
[0019]
The variable gain amplifying means includes a dual-gate field-effect transistor for amplifying a signal based on a broadcast reception signal input to a first gate and outputting the amplified signal from a drain, and the control means includes a dual-gate field-effect transistor. The amplification of the variable gain amplifying means may be controlled by varying the DC bias voltage applied to the second gate.
[0020]
The use of the dual-gate field-effect transistor produces the following effects. Since the dual gate field effect transistor has a first gate and a second gate separated from each other, a signal line can be connected to the first gate and a DC bias for control can be applied to the second gate. There is. In the case of a single-gate field-effect transistor, the operation is likely to be unstable as a result of the superposition of the signal and the DC bias. Further, since the dual-gate field-effect transistor has a smaller inverse transfer coefficient than the single-gate field-effect transistor, stable operation is possible without any risk of oscillation or the like. Further, since the dual-gate field-effect transistor is of a voltage control type, the circuit configuration can be simplified as compared with a current control type transistor. When a current-controlled transistor is used, one more switching transistor must be added. Further, in the variable gain amplifying means, it is desired that the peripheral circuits and signals are not adversely affected. However, since the field effect transistor has a large input / output impedance, there is almost no influence on the peripheral.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a configuration example of a broadcast receiving apparatus according to the present invention. In FIG. 1, the same portions as those in FIG. 2 are denoted by the same reference numerals, and detailed description will be omitted.
[0022]
The broadcast receiving device of FIG. 1 has a configuration in which the IFAMP first stage 13 provided in the broadcast receiving device of FIG. The variable gain amplifier 4 includes a variable amplification stage and a control circuit. The variable amplification stage includes a dual-gate field-effect transistor Q1, bias and load resistors R1 to R5, and a bypass capacitor C1. The control circuit includes a PNP switching transistor Q2, a diode D1, resistors R6 to R9, and capacitors C3 and C4.
[0023]
The first gate G1 of the dual gate field effect transistor Q1 is grounded via the resistor R1. A connection node between the first gate G1 of the dual-gate field effect transistor Q1 and the resistor R1 serves as an input terminal of the variable gain amplifier 4. The drain D of the dual gate field effect transistor Q1 is connected to a DC power supply + B via a resistor R5. The connection node between the drain D of the dual gate field effect transistor Q1 and the resistor R5 becomes the output terminal of the variable gain amplifier 4. The source S of the dual gate field effect transistor Q1 is grounded via the resistor R4. The second gate of the dual-gate field effect transistor Q1 is grounded via a resistor R2, grounded via a bypass capacitor C1, and connected to the collector of the switching transistor Q2 via a resistor R3.
[0024]
The emitter of switching transistor Q2 is connected to DC power supply + B. One end of a resistor R8 and the negative side of the capacitor C4 are connected to the collector of the switching transistor Q2, the other end of the resistor R8 is directly connected to the emitter of the switching transistor Q2, and the positive side of the capacitor C4 is connected via a resistor R9. Connected. The base of the switching transistor Q2 is connected to the anode of the diode D1 and one end of the resistor R7 via the resistor R6. The other end of the resistor R7 is grounded via the capacitor C3, and the cathode of the diode D1 is connected to a connection node between the SD terminal 6b, the SD terminal 7a, and the resistor R9.
[0025]
Next, the operation of the variable gain amplifier 4 will be described. The IF signal enters the first gate G1 of the dual gate field effect transistor Q1, is amplified, and is output from the drain D. The amplification of the dual-gate field-effect transistor Q1 is a product of the mutual conductance of the dual-gate field-effect transistor Q1 and the resistance of the resistor R5. Since the dual-gate field effect transistor has a characteristic that the transconductance value increases as the DC bias voltage applied to the second gate increases, the dual-gate field effect transistor changes according to the DC bias voltage applied to the second gate G2. The amplification of the transistor Q1 changes.
[0026]
At the start of the seek operation, the SD terminal 7a is at the high level, and the capacitors C3 and Q4 are charged, so that the transistor Q2 is off and no current flows through the resistor R9. Thus, the DC bias voltage applied to the second gate G2 of the dual-gate field effect transistor Q1 is obtained by dividing the DC voltage output from the DC power supply + B by the resistor R2 and the series combined resistor of the resistors R3 and R8. Become something. The DC bias voltage applied to the second gate G2 of the dual-gate field effect transistor Q1 at this time is called "standard DC bias voltage". The amplification of the dual-gate field-effect transistor Q1 when the standard DC bias voltage is applied to the second gate G2 is referred to as “standard gain”.
[0027]
When the SD terminal 7a changes from the high level to the low level during the seek operation, the transistor Tr1 is turned on instantaneously, and the base current of the transistor Q2 is changed from the DC power supply + B to the earth ground via the resistor R6, the diode D1, and the transistor Tr1. , The transistor Q2 is turned on, and the resistor R8 is short-circuited by the transistor Q2. As a result, the DC bias voltage applied to the second gate G2 of the dual-gate field effect transistor Q1 is obtained by dividing the DC voltage output from the DC power supply + B by the resistor R2 and the resistor R3. Becomes larger than the bias voltage. Therefore, when the SD terminal 7a changes from the high level to the low level during the seek operation, the amplification of the dual gate field effect transistor Q1 immediately becomes larger than the standard gain. If the amplification of the dual-gate field-effect transistor Q1 immediately becomes larger than the standard gain, it becomes equivalent to the reception signal strength of the broadcast radio wave becoming equal to or higher than a predetermined level (the threshold level at which the level of the SD terminal 7a switches), and chattering is reduced. Less likely to occur.
[0028]
Since chattering is less likely to occur, it is determined whether or not a broadcasting station exists in a state where chattering does not subside, and the possibility that it is determined that the broadcasting station actually exists but does not exist is reduced. Can be reduced. Further, since chattering is less likely to occur, the waiting time from the moment when the SD terminal 7a changes from the High level to the Low level to the determination as to whether or not there is a broadcast station can be reduced or reduced. Can be achieved.
[0029]
When the SD terminal 7a goes low, the capacitors C3 and C4 are discharged almost immediately, as described later. Then, even if the SD terminal 7a goes from the low level to the high level for a moment due to some cause (for example, noise), the base current of the transistor Q2 simultaneously changes from the DC power supply + B to the resistor R6, Since the transistor Q2 flows into the earth ground via the resistor R7 and the capacitor C3, the transistor Q2 is not immediately turned off, and remains on while the charging current flows into the capacitor C3 via the resistors R6 and R7. Has been left. As a result, the state where the amplification degree of the dual gate field effect transistor Q1 is larger than the standard gain continues. The diode D1 prevents the charging current from flowing into the capacitor C3 from the SD terminal side when the SD terminal 7a is at a high level. When the charging of the capacitor C3 is completed and the charging current becomes zero, the transistor Q2 is turned off, but this time from the DC power supply + B to the earth ground via the resistor R9, the capacitor C4, the resistor R3, and the resistor R2. A current flows through the line, and a charging current flows through the capacitor C4. While the charging current of the capacitor C4 is flowing, if the value of the resistor R9 is selected to be small, the resistor R8 becomes almost equivalent to a short circuit. As described above, while the charging current flows through the capacitors C3 and C4, the state where the amplification of the dual field effect transistor Q1 is larger than the standard gain continues. If the level is still High after the capacitors C3 and C4 have been charged, the amplification of the dual field effect transistor Q1 is switched from a value larger than the standard gain to the standard gain.
[0030]
The resistance values of the resistors R6 and R7 are set so that the capacitors C3 and C4 are discharged almost immediately if the SD terminal 7a goes low even once after the capacitors C3 and C4 are charged. That is, the resistance value of the resistor R6 is made sufficiently large with respect to the resistance value of the resistor R7 so that the discharging time becomes sufficiently shorter than the charging time. Further, the resistance value of the resistor R9 is made as small as possible within a range where the discharge current of the capacitor C4 does not damage the transistor Q2. The capacitor C3 is discharged via the resistor R7, the diode D1, and the transistor Tr1 when the transistor Tr1 is on, and the capacitor C4 is discharged via the resistor R9 and the transistor Q2 when the transistor Q2 is on.
[0031]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, in the seek operation | movement of a broadcast receiving apparatus, the selection omission can be reduced. Further, according to the present invention, the speed of the seek operation in the broadcast receiving device can be increased.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration example of a broadcast receiving device according to the present invention.
FIG. 2 is a diagram illustrating a configuration example of a conventional broadcast receiving apparatus.
FIG. 3 is a level time chart of an SD terminal when a broadcast wave is received.
[Explanation of symbols]
Reference Signs List 1 antenna 2 tuner front end 4 variable gain amplifier 6 intermediate frequency amplifying / demodulating unit 7 microcomputer 6b, 7a SD terminal C3, C4 capacitor Q1 dual-gate electric field transistor Q2 switching transistor

Claims (4)

Variable gain amplification means for amplifying a signal based on a broadcast reception signal,
Determining means for determining whether or not the intensity of the broadcast reception signal is equal to or higher than a predetermined level based on an output signal from the variable gain amplifying means,
Control means for controlling the degree of amplification of the variable gain amplification means according to the determination result of the determination means,
A broadcast receiving apparatus comprising: 2. The broadcast receiving apparatus according to claim 1, wherein when the intensity of the broadcast reception signal changes from less than the predetermined level to more than the predetermined level, the control means increases the amplification of the variable gain amplifying means. When the intensity of the broadcast reception signal falls from the predetermined level or more to less than the predetermined level and remains below the predetermined level for a certain period of time, the control unit decreases the amplification degree of the variable gain amplifying unit. ,
When the intensity of the broadcast reception signal falls from the predetermined level or more to less than the predetermined level and then returns to the predetermined level or more before the predetermined period elapses, the control unit controls the amplification degree of the variable gain amplifying unit. The broadcast receiving apparatus according to claim 2, wherein the broadcast reception is not reduced. The variable gain amplifying means includes a dual gate field effect transistor for amplifying a signal based on a broadcast reception signal input to the first gate and outputting the amplified signal from a drain,
4. The broadcast wave according to claim 1, wherein the control unit controls an amplification degree of the variable gain amplifying unit by changing a DC bias voltage applied to a second gate of the dual gate field effect transistor. 5. Receiver.

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