JP2004343046A - Compliant substrate for heteroepitaxy, heteroepitaxial structure, and compliant-substrate fabricating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compliant substrate for heteroepitaxies, a heteroepitaxial structure, and a compliant substrate fabricating method. <P>SOLUTION: The compliant substrate 1 includes a carrier substrate 2, a buried layer 3, and a single crystal top layer. The buried layer 3 is present between the carrier substrate 2 and the single crystal top layer 4, and the region of the top layer and /or the interface between the buried layer and the top layer or a region 5 of the vicinity thereof are weakened. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a compliant substrate for heteroepitaxy, a heteroepitaxial structure, and a method of manufacturing a compliant substrate for heteroepitaxy.

  A compliant substrate is a type of substrate that is designed to accommodate strain due to heteroepitaxial growth of a material with a different lattice constant than the substrate.

  WO 99/39377 discloses a compliant substrate consisting of a silicon wafer having a layer of microcavities generated by hydrogen ion implantation into the silicon wafer at a very shallow depth of the wafer. Has been described. A thin silicon layer formed over the implanted region serves as a compliant layer upon which a heteroepitaxial layer can be deposited.

WO 99/39377 further mentions the prior art which uses a silicon-on-insulator (SOI) structure to provide a compliance effect on the heteroepitaxy on top of the SOI structure. Since in order to achieve adequate compliance SOI substrate, it is necessary to some further process steps, such as injection of boron or phosphor of the heat treatment and / or SOI substrate SiO ₂ layer at a high temperature, SOI Obviously, the use of the structure as a compliant substrate is not recommended. In particular, heat treatment is often incompatible with the epitaxial layer and cannot provide sufficient compliance.

  Neither of the above approaches can provide sufficient compliance to produce low stress, high quality heteroepitaxial layers on individual substrates.

  Accordingly, it is an object of the present invention to provide a compliant substrate, a heteroepitaxial structure and a method for providing a compliant substrate that allows a heteroepitaxial layer to be placed on a compliant substrate with a high defect rate with a significantly reduced defect rate. And to provide.

  The above object is solved by a compliant substrate for heteroepitaxy, wherein the compliant substrate includes a carrier substrate, a buried layer, and a single crystal top layer, wherein the buried layer is formed between the carrier substrate and the top layer. In between, the region at or near the interface between the buried layer and the top layer and / or the region of the top layer is weakened.

  The substrate of the present invention has a very good slip between the top layer and the buried layer due to the weakened area at or near said interface, and a good gap from the carrier substrate by the buried layer in between. And excellent separability. This allows highly efficient growth of the epitaxial layer on the compliant substrate with low stress. The substrate of the present invention allows for the production of a heteroepitaxial structure with a relatively thick and relaxed (relaxed) heteroepitaxial layer on top of the top layer.

  In contrast to the prior art, the compliant substrate of the present invention offers a new property of stress matching. In particular, it has been found that the area at or near the interface between the buried layer and the top layer can be very weakened so that the weakened layer can provide a very high compliance effect.

  The above effect is further achieved or improved by weakening the top layer region. This weakened region can be provided very close to the top of the compliant substrate, which can have a better effect on the quality of the heteroepitaxial layer on top of the compliant substrate. Nearly complete growth of a heteroepitaxial layer on a compliant substrate can be achieved when the uppermost weakened region acts in addition to the weakened region at or near the interface.

  According to one embodiment of the invention, the weakened region includes implanted species. These species can cause damage and micro-cavities in the area in a simple manner that give good sliding properties between the buried layer and the top layer. The species are sufficiently gettered, especially at or near the interface, and the region containing such species can be made very thin, so that the compliant substrate and the heteroepitaxial layer on top of this substrate Can improve the compliance effect.

  In a preferred embodiment of the invention, the implanted species is selected from the group comprising hydrogen or a noble gas. The rare gas is an element of the eighth main group element of the periodic table of the elements, and includes, for example, helium. These species can be implanted with high efficiency and precision, thus predetermining the depth and amount of damage at and / or near the interface between the buried layer and the top layer and / or damage to the top layer. It becomes possible.

  According to a preferred embodiment of the present invention, the buried layer is an amorphous and / or porous layer, which reduces the adhesion between the buried layer and the top layer, resulting in a slippage between them. Enhance the nature.

  In a variant of the invention, the buried layer comprises silicon dioxide. This material can be efficiently provided on the carrier substrate, and can also be provided with good isolation properties for the top layer, including for example silicon.

  Optionally, the top layer has a thickness of less than about 20 nm. This thin layer is particularly suitable for relaxed growth of a heteroepitaxial layer on top of the top layer.

  The object of the invention is further solved by a heteroepitaxial structure. The heteroepitaxial structure includes at least one compliant substrate according to any one of claims 1 to 6, and a second single crystal epitaxial layer on the uppermost layer, wherein the second layer has a lattice constant of the uppermost layer and / or Or, it is different from the lattice constant of the region of the uppermost layer.

  The heteroepitaxial structure provides a uniform, low stress epitaxial layer over the top layer, wherein the heteroepitaxial layer is relatively thick relative to the top layer. The weakened region between the third layer and the top layer provides good slippage at the interface between the buried layer and the top layer, allowing the second epitaxial layer to grow with almost no defects. it can. This results in the heteroepitaxial structure having very good electronic properties, which can be produced in a relatively simple and efficient manner.

  Furthermore, the object of the present invention is achieved by a method for producing a compliant substrate for heteroepitaxy, which produces a basic structure having a buried layer between a carrier substrate and a single crystal top layer. And weakening the region at or near the interface between the buried layer and the top layer and / or the region of the top layer.

  By the method of the present invention, it is possible to produce a compliant substrate capable of providing a good slip property at or near the interface between the buried layer and the top layer and / or in the weakened region of the top layer, and as a result As a result, the heteroepitaxial layer grows on the uppermost layer with a small stress. The method has the following advantages. That is, a simple structure having a carrier substrate, a buried layer and a single crystal top layer can be used, followed by an easy weakening step, resulting in a high quality compliant substrate for heteroepitaxial use. It can be manufactured at high production rates.

  According to certain embodiments, the weakening step includes implanting a seed at or near an interface between the buried layer and the top layer and / or in a region of the top layer. In this way, the area (s) can be weakened very accurately and efficiently. In particular, microcavities can be created by the above steps in a predefinable manner, which results in a particularly good weakening effect. A very good effect of this method is that, in particular, species implanted in the area near the interface between the buried layer and the top layer are gettered out in a relatively thin area at or near said interface, As a result, the compliance of the manufactured compliant substrate is improved.

  In a further preferred embodiment of the present invention, the implanted species in the implanting step is such that a maximum concentration of the implanted species is substantially at or near an interface between the buried layer and the top layer. Energy and / or depth is adjusted. In this way, in particular, the interface between the buried layer and the top layer is weakened, and consequently the sliding effect between the buried layer and the top layer is enhanced.

In a specific embodiment of the invention, the dose of the implanted species is about 3 × 10 ¹⁶ cm ⁻² . Such a dose prevents swelling of the implanted structure while having the effect of favorably weakening.

  As a variant of the invention, the implantation step is performed through the thick top layer, and the method further comprises the step of thinning the top layer. The step of implanting through the thick top layer may be targeted within a defined area so that the implantation step is particularly seeded at the interface between the buried layer and the top layer. The thinning step performed after the implantation step results in a thin top layer that can slide better on the buried layer, resulting in better lattice mismatch between the top layer and the heteroepitaxial layer. Is absorbed by

  Advantageously, the step of thinning comprises oxidation and / or etching of said top layer. By this method, the thickness of the uppermost layer can be reduced with little effect on the weakened region at or near the interface between the buried layer and the uppermost layer.

  Preferably, prior to said weakening step, at least one auxiliary layer is provided on the top layer. This achieves the step of precisely weakening the region at or near the interface between the buried layer and the top layer, even if the thickness of the top layer is small. The auxiliary layer has the advantage that it can be selected for easy removal from the top layer.

  According to a particular embodiment of the invention, providing the auxiliary layer comprises depositing a silicon dioxide layer. The silicon dioxide layer can be easily brought to the top layer and can be easily removed. In particular, the step of implanting through this layer is facilitated, allowing a step of precisely weakening the region at or near the interface between the buried layer and the top layer.

  The step of fabricating the basic structure may include fabricating a silicon-on-insulator structure. This structure has an interface between the silicon and the insulator layer, which interface can be easily fabricated, for example by an implantation step, so that a compliant substrate based on the silicon structure can be produced on the insulator in a very efficient manner. Can be weakened.

  In an advantageous embodiment of the invention, the method further comprises the step of providing a second single-crystal epitaxial layer on the top layer, wherein the lattice constant of the deposited second layer is equal to the lattice constant of the top layer. Instead, the result is a heteroepitaxial structure. Such a heteroepitaxial structure can be manufactured with a second epitaxial layer having few defects on the top layer, the second layer having a relatively large thickness in an efficient and easily reproduced manner. Can be produced.

  Also, after the weakening step at or near the interface between the buried layer and the top layer and / or to the top layer region, a second single crystal epitaxial layer is formed on the top layer. It is more effective to be provided. Using this sequence of steps, the second single crystal epitaxial layer is formed with almost no defects, resulting in a high quality heteroepitaxial structure.

  In a further embodiment of the invention, the method further comprises annealing the heteroepitaxial structure. Thereby, the epitaxial layer of the second crystal is favorably relaxed on the compliant substrate.

  Preferred embodiments of the present invention are shown in the figures of the drawings and are described below.

  FIG. 1 schematically shows a side view of a compliant substrate 1 according to an embodiment of the present invention. The compliant substrate 1 includes a carrier substrate 2, which is made of, for example, silicon and has a thickness of several micrometers to several hundred micrometers. Instead of silicon, any other material known in the art may be used as the carrier substrate material.

The carrier substrate 2 is covered with a buried layer 3. Desirably, the buried layer 3 is an amorphous and / or porous layer such as an insulator layer. In the embodiment shown, the buried layer 3 is made of silicon dioxide and has a thickness of approximately several tens to several hundreds of nanometers. In a further embodiment (not shown) of the invention, the buried layer 3 is formed of Si ₃ N ₄ , Al ₂ O ₃ , HFO ₂ or SrTiO ₃ , in addition to or instead of SiO ₂ , or of these materials. At least two types of combinations may be used.

Above the buried layer 3 is the top layer 4 of single crystal. In FIG. 1, the top layer 4 of the single crystal is a thin silicon layer. In another non-illustrated example of the present invention, the top layer 4 is in addition to or instead of silicon, GeSi, sapphire, A _III B _V -materials such as GaAs, InP or GaN, or any of the above materials. It may be made of another material such as a combination of at least two types. Desirably, the silicon layer 4 is an ultra-thin layer having a thickness of about several tens of nanometers or less. Referring to FIG. 1, the thickness of the silicon layer 4 is less than 20 nm. Instead of silicon, any other material different from the material of the buried layer 3 may be used as the single crystal top layer 4.

  There is an interface 6 between the top layer 4 and the buried layer 3. In the region 5 at the interface 6 or in the region 5 in the vicinity thereof, the material is weakened. As shown in FIG. 1 by regions 13 between the dashed lines, in addition to or instead of regions 5, regions 13 may be weakened by implanting seeds in said regions.

  In the illustrated embodiment, the weakened region 5 preferably includes a layer of damage or microcavities created by implanted species (not shown) contained in the region 5. The implanted species may be composed of hydrogen or a rare gas such as helium.

  Although not explicitly shown, region 5 and / or region 13 may be vulnerable in any available manner suitable to affect the stability of this region (or these regions). May be used.

  The uppermost layer 4 has a different material property between the uppermost layer 4 and the buried layer 4, as well as a weakened region 5 that enhances the slipping effect between the uppermost layer 4 and the buried layer 3. Sliding or sliding can occur on the buried layer 3.

  FIG. 2 schematically shows a side view of the heteroepitaxial structure 7 according to the embodiment of the present invention. Heteroepitaxial structure 7 includes compliant substrate 1 such as compliant substrate 1 of FIG. As described in detail with respect to FIG. 1, the compliant substrate 1 includes a carrier substrate 2, a buried layer 3, and a single-crystal top layer 4. Comprises a weakened area 5 at or near the interface 6 between the buried layer 3 and the top layer 4. The features of these layers and regions are the same as those described with reference to FIG.

In FIG. 2, a second single-crystal epitaxial layer 8 is provided above the uppermost layer 4. The second single crystal epitaxial layer 8 has a lattice constant different from the lattice constant of the uppermost layer 4. For example, the second layer 8 may be a GeSi layer such as 60% of the GeSi layer germanium concentration is from about 20%, even _A III _{B V} semiconductor layer, such as GaAs and InP and GaN Good. The thickness of the second layer 8 may be several hundred nanometers.

  3 to 5 schematically show a typical process flow of the method of the present invention according to the first embodiment of the method of the present invention. According to the first step shown in FIG. 3, a silicon-on-insulator structure 10 or SOI structure is manufactured. The manufacture of the silicon-on-insulator structure 10 may be made, for example, by SIMOX or by the Smart Cut ™ technology, resulting in a substrate comprising, for example, a silicon carrier substrate 2, Is covered by a buried layer 3 of silicon dioxide with a silicon single crystal top layer 4 on top. As shown in FIG. 1, the uppermost layer 4 and the buried layer 3 form an interface 6 therebetween.

  FIG. 4 shows the silicon-on-insulator structure of FIG. 3 after a further step in which an auxiliary layer 9, such as a layer of silicon dioxide, is deposited on the top layer 4. As the auxiliary layer 9, instead of silicon dioxide, any other material known in the art that can be easily deposited and subsequently removed from the top layer 4 may be used.

  FIG. 5 shows the structure of FIG. 4 during a further step of the method of the invention. In this step, species 11, such as accelerated hydrogen ions, pass through auxiliary layer 9 and top layer 4 to region 5 at or near interface 6 between top layer 4 and buried layer 3. Is injected. The species 11 capable of forming a layer of damage or microcavities in the region 5 results in weakening of the region 5.

  In said step, the implantation energy and / or the implantation depth is adjusted so that the highest value of the implanted species, ie the peak, is at or near the interface between the top layer 4 and the buried layer 3.

For example, it is desirable that the implantation dose be in the range of about 3 × 10 ¹⁶ H ⁺ atoms / cm ² or less so that the implanted surface does not bulge during the subsequent heat treatment.

  Implantation may be performed along with heat treatment of the implanted structure, for example, at a temperature of about 300C to about 1100C for approximately one hour.

  6 to 8 schematically show a typical processing flow of the second embodiment of the method of the present invention.

  FIG. 6 schematically shows a side view of the silicon-on-insulator structure 10a manufactured in the first step. The manufacture of the silicon-on-insulator structure may be made, for example, by SIMOX or by the Smart Cut ™ technology, so that a silicon dioxide with a top layer 4a of a thick silicon single crystal with a thickness of about 500 nm on top Resulting from a carrier substrate 2 such as a silicon substrate covered by a buried layer 3. Preferably, the thick single crystal top layer 4 is approximately several hundred nanometers thick. An interface 6 is formed between the uppermost layer 4a and the buried layer 3.

FIG. 7 shows the silicon-on-insulator structure 10a of FIG. 6 during the implantation step, in which the seed 11 passes through the thick top layer 4a at the interface 6 between the thick top layer 4a and the buried layer 3. At or near the relatively thin region 5. Implanted species 11 is, for example, hydrogen ions with a dose of accelerated about 3 × ^{10 16} pieces of ^H + / cm ² at an energy of about ^{64 × 10 -19 J (40keV)} . The implanted species 11 concentrates in the thin area and causes damage or microcavities in the area 5 and consequently weakens the material in the area 5.

  The region 5, in particular the interface 6 between the top layer 4a and the buried layer 3, is used to getter the implanted species 11 with a getter. Thus, the damaged implanted portions are concentrated throughout the thin thickness of the region 5, which improves the compliance of the resulting compliant substrate.

  FIG. 8 shows the structure of FIG. 7 after the thinning step. In the thinning step, the thick top layer 4a is thinned to a few tens of nanometers. For example, the thick top layer 4a of FIG. 7 can be oxidized, and the oxidized portion of the thick top layer 4a can be removed in an etching step between the thinning steps. In another variant of the invention, the thick top layer 4a may be thinned using chemical mechanical polishing or may be thinned using a combination of polishing and etching methods.

Reference is made to FIG. 9 where the structure of FIGS. 5 and 8 is visible. A second single crystal epitaxial layer 8 is grown, resulting in a heteroepitaxial structure 7, such as structure 7 of FIG. The material of the second layer 8 has a lattice constant different from the lattice constant of the uppermost layer 4 or 4a. For example, the second layer, such as Ge concentration of about 20% to 60% of the GeSi layer may be a GeSi _layer, it may be _A III _{B V} semiconductor layer. Since the slip effect at the interface 6 between the uppermost layers 4 and 4a and the buried layer 3 is increased, the second layer 8 is epitaxially grown on the uppermost layers 4 and 4a with a small stress. As a result, the second epitaxial layer 8 grows on the uppermost layers 4 and 4a with almost no defects. In this way, the second layer 8 can be grown with high quality up to several hundred nanometers in thickness.

  As indicated by the arrow 12 in FIG. 9, the heteroepitaxial structure 7 is thermally treated after the growth of the second single-crystal layer 8, so that the second layer 8 is very well relaxed.

  In the above example, the second epitaxial layer 8 grows on the compliant substrate 1 after the implantation of the regions 5 and / or 13. In a further embodiment of the invention, the deposition and growth of the second epitaxial layer 8 may be performed on a non-implanted substrate, such as on the structure 10 shown in FIG. Followed by an implantation step into the region 5 at or near the top layer 4 and / or interface 6 through the epitaxial layer 8. In this case, the implantation may be performed through the overall thickness of the second layer 8 or during the growth of the second layer 8 or as an intermediate step between several growth steps. Good.

  Preferably, each structure is annealed after the implantation step.

FIG. 4 schematically shows a side view of a compliant substrate according to the embodiment of the present invention. FIG. 4 schematically shows a side view of a heteroepitaxial structure according to the embodiment of the present invention. FIG. 2 schematically illustrates one state in an exemplary process flow according to a first embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 2 schematically illustrates one state in an exemplary process flow according to a first embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 2 schematically illustrates one state in an exemplary process flow according to a first embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 2 schematically illustrates one state in an exemplary process flow according to a second embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 2 schematically illustrates one state in an exemplary process flow according to a second embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 2 schematically illustrates one state in an exemplary process flow according to a second embodiment of the method of the present invention for manufacturing the compliant substrate shown in FIG. 1. FIG. 3 schematically illustrates the growth and annealing of a second heteroepitaxial layer on a compliant substrate resulting in the heteroepitaxial structure shown in FIG. 2.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 Compliant board | substrate 2 Carrier board | substrate 3 Buried layer 4 Single crystal top layer 5 The area | region of the interface or its vicinity 6 Interface 13 Top layer area

Claims (19)

A compliant substrate (1) for heteroepitaxy,
A carrier substrate (2);
A buried layer (3);
A top layer of a single crystal (4),
The buried layer (3) is between the carrier substrate (2) and the top layer (4) and at an interface (6) between the buried layer (3) and the top layer (4). The substrate, wherein the region (5) at or near and / or the region (13) of the top layer (4) is weakened.   The substrate according to claim 1, wherein the weakened area comprises implanted species (11).   The substrate according to claim 2, wherein the implanted species (11) is selected from the group comprising hydrogen or a noble gas.   4. The substrate according to claim 1, wherein the buried layer is an amorphous and / or porous layer. 5.   The substrate according to any of the preceding claims, wherein said buried layer (3) comprises silicon dioxide.   The substrate according to any of the preceding claims, wherein said top layer (4) has a thickness of less than about 20 nm. A heteroepitaxial structure (7),
A compliant substrate (1) according to any one of claims 1 to 6,
A second single crystal epitaxial layer (8) provided on the uppermost layer (4),
A heteroepitaxial structure, wherein the lattice constant of the second layer (8) is different from the lattice constant of the uppermost layer (4). A method for producing a compliant substrate (1) for heteroepitaxy, comprising:
Manufacturing a basic structure having a buried layer (3) between a carrier substrate (2) and a single-crystal top layer (4);
A region (5) at or near the interface (6) between the buried layer (3) and the top layer (4) and / or a region (13) of the top layer (4) is fragile. The steps of:   9. The method according to claim 8, wherein the weakening comprises implanting a seed (11) into the area (5) and / or the area (13).   Implanting such that a maximum concentration of the implanted species (11) is substantially at or near the interface (6) between the buried layer (3) and the top layer (4). The method according to claim 9, wherein the energy and / or depth of the species implanted in is adjusted. The method according to any one of claims 9-10, wherein the dose of implanted species (11) is about 3 × ¹⁰ 16 ^{cm -2.}   13. The method according to any one of claims 9 to 12, wherein the implanting step is performed through a thick top layer (4a) and the method further comprises the step of thinning the top layer (4a). The described method.   13. The method according to claim 12, wherein the thinning comprises oxidizing and / or etching the top layer (4).   14. The method according to any of claims 8 to 13, wherein at least one auxiliary layer (9) is provided on the top layer (4) prior to the weakening step.   The method of claim 14, wherein providing the auxiliary layer (9) comprises depositing a silicon dioxide layer.   16. The method according to any one of claims 8 to 15, wherein fabricating the basic structure comprises fabricating a silicon-on-insulator structure (10, 10a). Providing a second single crystal epitaxial layer (8) on the top layer (4);
17. The structure according to claim 8, wherein the lattice constant of the deposited second layer is different from that of the top layer, resulting in a heteroepitaxial structure. A method according to any one of the preceding claims.   The second monocrystalline epitaxial layer (8) is provided on the uppermost layer (4) after the weakening step on the region (5) and / or the region (13). Item 18. The method according to Item 17.   Method according to claim 17 or 18, further comprising the step of annealing the heteroepitaxial structure (7).

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