JP2004342995A - Semiconductor radiation detector - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor radiation detector that can improve its detection sensitivity without complicating the structure of a device and increasing cost. <P>SOLUTION: A p-n joint part between a p-type diffusion layer 2 and an n-type silicon substrate 1 is formed in an element formation area divided by an element isolation area 5 on the surface of a semiconductor substrate 1, and a radiation sensitive area is formed by the p-n joint part. An aluminum electrode 3 for signal detection is in ohmic-contact with the sensitive area and it is extended to the opposite-side area of the sensitive area adjoining to the element isolation area 5. Then, a silicon oxide film 4 is formed between the aluminum electrode 3 and the silicon substrate 1 in areas other than the sensitive area, and a MOS structure is formed of the aluminum electrode 3, the silicon oxide film 4 and the silicon substrate 1. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【００３７】
上部アルミニウム電極３を−５０Ｖに保持して、エネルギー１ＭｅＶのアルファ線が半導体検出器の中央に垂直方向に入射した状況を、シミュレーションにより解析した。その結果、ＭＯＳ構造を有する本発明の実施例のデバイス構造では、従来のＭＯＳ構造を有しない場合に比較して信号強度である電荷量が２０％多いという結果を得た。このシミュレーション例では、有感領域の開口部の面積に対し、ＭＯＳ構造の領域は３６％を占めるが、実際の半導体放射線検出器の面積は、この例よりも大きく、１％程度の面積の増加でも、２０％程度の信号増強効果が得られる。
【００３８】
【発明の効果】
以上詳述したように、本発明によれば、デバイス構造を複雑にすることなく、また製造コストを上昇させることなく、放射線の検出感度を著しく高感度にすることができる。
【図面の簡単な説明】
【図１】本発明の第１の実施形態に係る半導体放射線検出器を示す断面図である。
【図２】本発明の動作原理を説明するためのシミュレーションに関するＭＯＳ構造を示す断面図である。
【図３】本発明の動作原理を説明するためのシミュレーションに関する印加電圧を示すグラフ図である。
【図４】本発明の第２の実施形態に係る半導体放射線検出器を示す断面図である。
【図５】本発明の半導体放射線検出器の各層の平面レイアウト形状の一例を示す模式図である。
【図６】本発明の半導体放射線検出器の各層の平面レイアウト形状の他の例を示す模式図である。
【図７】従来の半導体放射線検出器を示す断面図である。
【符号の説明】
１、２１、３１、６１；ｎ型シリコン基板
２、２２、３２；ｐ型拡散層
３、２３、３３、６３；上部アルミニウム電極
４、２４、３４、６２；シリコン酸化膜
５、２５；チャネルストッパー
６、７、２６、３６、３７；空乏層
８、２７、３８、６４；下部アルミニウム電極
３５；フィールドプレート
４１、５１；有感領域
４２、５２；素子分離領域
４３、５３；上部アルミニウム電極成膜領域
４４、５４；ＭＯＳ構造形成領域
７１；シミュレーションで上部電極に印加した電圧[0001]
TECHNICAL FIELD OF THE INVENTION
TECHNICAL FIELD The present invention relates to a semiconductor radiation detector having a radiation sensitive part composed of a pn junction or a Schottky junction.
[0002]
[Prior art]
FIG. 7 is a sectional view showing a conventional semiconductor radiation detector. In the conventional semiconductor detector, for example, a p-type diffusion layer 22 is formed on the surface of an n-type silicon substrate 21, and a silicon oxide film 24 is formed on the substrate surface excluding a portion above the p-type diffusion layer 22. Is formed. Then, an upper aluminum electrode 23 is formed on the silicon oxide film 24 and the silicon substrate 21, so that the upper aluminum electrode 23 is in ohmic contact with the diffusion layer 22. In this case, a portion where the upper aluminum electrode 23 is connected to the diffusion layer 22 corresponds to a radiation sensitive region. The portion on the silicon substrate 21 other than the sensitive region is covered with the silicon oxide film 24, and the upper aluminum electrode 23 is insulated from the silicon substrate 21 by the silicon oxide film 24 in the portion other than the sensitive region (diffusion layer 22). Have been. An n-type diffusion layer having a higher concentration than the silicon substrate 21 is formed as a channel stopper 25 on the outer periphery of the diffusion layer 22. On the lower surface of the silicon substrate 21, an aluminum electrode 27 is formed.
[0003]
In the semiconductor radiation detector configured as described above, when a voltage that causes the aluminum electrode 23 to be negative is applied between the aluminum electrode 23 and the aluminum electrode 27, the n-type silicon substrate 21 connected to the aluminum electrode 27 And a reverse bias is applied between the p-type diffusion layer 22 and the p-type diffusion layer 22 ohmically connected to the aluminum electrode 23, and the depletion layer 26 spreads below the p-type diffusion layer 22. When radiation enters the depletion layer 26, the radiation generates carriers (charges) of electron-hole pairs in the depletion layer 26, and the generated electron-hole pairs are separated by the electric field of the depletion layer 26, and A current flows through the electrodes 23 and 27 and is detected.
[0004]
Although the above description is for the case where the silicon substrate 21 is n-type, the polarity of the diffusion layer 22 and the channel stopper 25 (n-type diffusion layer) and the polarity of the applied voltage are changed even when the silicon substrate 21 is p-type. Thus, a semiconductor radiation detector having a similar function can be obtained.
[0005]
[Problems to be solved by the invention]
In semiconductor radiation detectors as described above, the number of electron-hole pairs generated with the incidence of radiation is determined by the energy of the incident radiation. Effectively controls the width of the depletion layer or the electric field to efficiently separate the generated electron-hole pairs, and reduces recombination and trapping to defects to prevent annihilation of the electron-hole pairs. It is necessary to. However, these countermeasures have limitations, and countermeasures close to these limits have already been taken.
[0006]
On the other hand, as a method of increasing the detection signal, generated electrons and holes are accelerated by a high electric field, and as a result, electrons and holes having sufficiently high energy collide with Si atoms, thereby generating new electrons and holes. The generation of hole pairs has also been devised, but is not desirable from the viewpoint of signal level stability and long-term reliability.
[0007]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor radiation detector that can increase detection sensitivity without complicating a device structure and without increasing costs. Aim.
[0008]
[Means for Solving the Problems]
The semiconductor radiation detector according to the present invention includes a radiation sensitive region including a pn junction or a Schottky junction formed in an element formation region defined by an element isolation region on a surface of a semiconductor substrate; The contacted signal detection electrode, a wiring electrode formed in a region opposite to the sensitive region adjacent to the element isolation region and electrically connected to the signal detection electrode, An insulating film provided between the semiconductor substrate and the wiring substrate, wherein a MOS structure is formed from the wiring electrode, the insulating film, and the semiconductor substrate.
[0009]
In this semiconductor radiation detector, it is preferable that the wiring electrode is formed in the same step as the signal detection electrode.
[0010]
Further, the element isolation region is, for example, a channel stopper of the same conductivity type as the semiconductor substrate and a diffusion layer having a higher concentration than the semiconductor substrate, or is insulated from the semiconductor substrate via an insulating film, This is a field plate to which the same potential as that of the semiconductor substrate is applied. However, in the present invention, the element isolation method is not limited to the above-described embodiment, and various embodiments are possible.
[0011]
Note that the fact that the element formation region is partitioned by the element isolation region does not mean that the element formation region is surrounded by the element isolation region. That is, the device molecule region does not necessarily surround the sensitive region, and the device isolation region may not be provided in a direction in which device isolation is not required, for example, a depletion layer does not extend. However, it is necessary to provide an element isolation region between the MOS structure and the sensitive region.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings. FIG. 1 is a sectional view showing a semiconductor radiation detector according to an embodiment of the present invention. A p-type diffusion layer 2 is provided on the surface of an n-type silicon substrate 1, and a silicon oxide film 4 is formed on the surface of the silicon substrate 1 except for the upper part of the p-type diffusion layer 2. The upper aluminum electrode 3 is formed on the silicon oxide film 4 and the silicon substrate 1, and the upper aluminum electrode 3 is formed on the diffusion layer 2 because the silicon oxide film 4 is not formed on the diffusion layer 2. On the other hand, ohmic contact is made. In this case, a portion where the upper aluminum electrode 3 is in ohmic contact with the diffusion layer 2 corresponds to a radiation sensitive region. Therefore, the silicon substrate 1 other than the sensitive region is covered with the silicon oxide film 4, and the upper aluminum electrode 3 is insulated from the silicon substrate 1 by the silicon oxide film 4 in the portion other than the sensitive region. I have.
[0013]
An n-type diffusion layer having a higher concentration than the silicon substrate 1 is formed as a channel stopper 5 so as to surround the diffusion layer 2. The region surrounded by the channel stopper 5 is an element formation region where elements are separated by the channel stopper 5. The aluminum electrode 3 is formed to extend outside the channel stopper 5 on the surface of the silicon substrate 1, that is, to a region on the opposite side of the diffusion layer 2, and is formed in a region adjacent to the channel stopper 5 in the silicon substrate 1. It is formed up to the top. As a result, a MOS structure including the upper aluminum electrode 3, the silicon oxide film 4, and the silicon substrate 1 is formed in a region outside the channel stopper 5. A lower aluminum electrode 8 is formed on the lower surface of the silicon substrate.
[0014]
Next, the operation of the semiconductor radiation detector of the present embodiment configured as described above will be described. When a reverse bias is applied between the n-type silicon substrate 1 in contact with the lower aluminum electrode 8 and the p-type diffusion layer 2, the depletion layer 6 expands below the diffusion layer 2. At this time, the voltage applied to the upper aluminum electrode 3 is a negative voltage when the lower aluminum electrode 8 is grounded and the silicon substrate 1 is grounded (set to 0 V). When the radiation is incident on the depletion layer 6, the radiation generates carriers (charges) of electron-hole pairs in the depletion layer 6, and the generated electron-hole pairs are separated by the electric field of the depletion layer 6, A current flows between the aluminum electrodes 3 and 8 to generate a detection signal.
[0015]
As described above, when the above-mentioned reverse bias voltage is applied to operate the semiconductor detector, when the MOS structure including the upper aluminum electrode 3, the silicon oxide film 4, and the silicon substrate 1 is surrounded by the channel stopper 5, The depletion layer 7 also spreads on the surface of the silicon substrate 1 outside the element formation region. When the applied voltage of the upper aluminum electrode 3 exceeds the threshold voltage of the MOS structure, that is, when the absolute value of the applied voltage is larger than the absolute value of the threshold voltage, an inversion layer is formed on the surface of the depletion layer 7. Even if a voltage is further applied (the absolute value is increased), the depletion layer 7 does not spread any further.
[0016]
Next, a description will be given of the operation principle that the semiconductor radiation detector of the present invention can improve the radiation detection sensitivity as described above. The basic principle of a semiconductor radiation detector in which electron-hole pairs generated by radiation incident on a sensitive region of a semiconductor generate a detection signal is the same as in the prior art. However, in the present invention, the function of the MOS structure provided in a region adjacent to the channel stopper 5 which is an element isolation region for partitioning a radiation sensitive region is added.
[0017]
Numerical analysis of the electrical characteristics of a semiconductor element is performed by a semiconductor device simulation technique (for example, "Process and Device Simulation Technology", edited by Danyo, published by Sangyo Tosho Co., Ltd.). The results of analysis performed by the present inventors using a device simulator in this device simulation method will be described with reference to FIGS. The device structure used for the analysis is as follows. A silicon oxide film 62 having a thickness of 400 nm is formed on a surface of an n-type silicon substrate 61 having a thickness of 500 μm and a resistivity of 250 Ω · cm, and an aluminum electrode 63 is formed on the silicon oxide film 62. Is formed. An aluminum electrode 64 is in ohmic contact with the lower surface of the silicon substrate 61.
[0018]
Then, a voltage 71 is applied to the upper aluminum electrode 63 having the MOS structure as shown in FIG. At this time, the lower aluminum electrode 64 is set to zero potential (ground). The voltage 71 applied to the upper aluminum electrode 63 is -50 V, -49.9 V at time zero (0), 1 nano (1 n) seconds, 2 nano (2 n) seconds, 3 nano (3 n) seconds and thereafter. , -49.9 V, and -50 V, and a transient analysis was performed using a semiconductor simulator. This transient analysis was performed up to 10 microseconds as a time sufficient to return to a steady state when the applied voltage 71 of FIG. 3 was applied. As a result, the charge obtained by integrating the current flowing through the upper electrode 63 with time is about 24 pico C / cm 2 (pico is 10 −12) per unit area of the surface area in plan view of the device. Then, the current flowed out of the MOS structure to the outside. However, the direction of the current is not constant, but changes from the direction in which the current flows into the MOS structure from the upper electrode to the direction in which the current flows out. When the current was integrated over time, the electric charge flowing out of the MOS structure to the outside through the upper electrode 63 was superior. Further, in general, the signal detector of the semiconductor radiation detector has a configuration in which a resistor and a capacitor (capacitor) are connected in parallel. However, since this capacitance component acts as a low-pass filter, a high-frequency component of the signal is used. Is attenuated, and the current component flowing from the upper electrode into the MOS structure contains a higher frequency component, so that the current component flowing from the upper electrode into the MOS structure has a smaller contribution to the detection signal, and as a result, The current component flowing out of the MOS structure contributes to the detection signal and acts more effectively.
[0019]
The above description describes the operation of the MOS structure itself. Next, the operation of the semiconductor radiation detector of the present invention provided with this MOS structure will be described. In the semiconductor radiation detector of this embodiment shown in FIG. 1, when the n-type silicon substrate 1 is grounded and, for example, -50 V is applied to the upper aluminum electrode 3, the depletion layer 6 expands. When radiation such as alpha rays is incident on the depletion layer 6, electron-hole pairs are generated, separated by the electric field of the depletion layer 6, and the generated holes pass through the p-type diffusion layer 2 and the upper aluminum electrode 3 Leaked to On the other hand, the generated electrons flow out of the aluminum electrode 8 on the lower surface of the substrate. Since the generated electrons flow out from the lower surface of the substrate, the current flows from the aluminum electrode 8 to the aluminum electrode 3 in a direction opposite to the electrons. Due to this current, the voltage at the top of the silicon substrate 1 is lower than that at the bottom (0 V) of the substrate. That is, the potential becomes negative. If the voltage of the upper aluminum electrode 3 is fixed to -50 V, a MOS structure composed of the upper aluminum electrode 3 / silicon oxide film 4 / silicon substrate 1 will be described with reference to FIGS. As described above, the pulse voltage is applied to the upper electrode 3 in the same direction as the voltage 71 shown in FIG. Further, generally, a voltage is applied to the upper aluminum electrode 3 via a resistor. When a fixed voltage of -50 V is applied to the outside of the resistor, the current flowing out causes the upper electrode 3 to have a voltage shallower than -50 V (a negative voltage whose absolute value is smaller than 50). 3 corresponds to the application of a pulse voltage in the same direction as the applied voltage 71. Therefore, the same phenomenon as that described with reference to FIGS. 2 and 3 occurs in the MOS structure composed of the upper aluminum electrode 3 / silicon oxide film 4 / silicon substrate 1 in FIG. The shape of the pulse voltage (time, height of the pulse voltage) is expected to be different from the simulations performed in FIGS. 2 and 3, but the aluminum electrode 3 in FIG. The displacement signal in the same direction is added to the current from the MOS structure, and the radiation signal detected from the upper aluminum electrode is enhanced.
[0020]
As described above, in the present embodiment, since the depletion layer 6 is formed in the element formation region and the depletion layer 7 is formed outside the element formation region, the radiation detection current is amplified and the detection sensitivity is reduced. Can be enhanced.
[0021]
In the first embodiment, the silicon substrate 1 is n-type. However, even if the silicon substrate 1 is p-type, the polarity of the diffusion layer 2 and the channel stopper 5 (n-type diffusion layer) and the applied voltage By changing the polarity of the semiconductor radiation detector, a semiconductor radiation detector having the same function can be obtained.
[0022]
Further, in the first embodiment, the upper electrode 3 is an aluminum wiring, but is not limited to this, and may be any wiring material that can make ohmic contact with the diffusion layer 2.
[0023]
In the first embodiment, the entire surface of the diffusion layer 2 is covered with the upper aluminum electrode 3. However, as long as the diffusion layer 2 can be electrically connected to the diffusion layer 2, the upper aluminum electrode 3 covers not all but part of the diffusion layer 2. , An aluminum electrode 3 may be formed.
[0024]
In the first embodiment, a pn junction is provided as a means for forming a depletion layer in a sensitive portion. However, the present invention is not limited to this, and a Schottky junction may be provided. Specifically, a Schottky junction can be formed by using gold or the like as the upper electrode in the case of an n-type silicon substrate and using aluminum or the like as the upper electrode in the case of a p-type silicon substrate.
[0025]
In the first embodiment, the wiring above the depletion layer 7 is formed at the same time as the upper aluminum electrode 3 that is in ohmic contact with the diffusion layer 2. It is not necessary to form them, and they may be electrically connected after they are formed in different steps. However, from the viewpoint of manufacturing cost, it is preferable to use a wiring formed at the same time as the upper aluminum electrode 3 in ohmic contact with the diffusion layer 2 as the wiring above the depletion layer 7.
[0026]
In the first embodiment, a silicon oxide film is used as the insulating film 4. However, the insulating film 4 is not limited to the silicon oxide film as long as it has electrical insulating properties. Alternatively, a stacked film of a plurality of insulators may be used. However, the insulating film in contact with the surface of the silicon substrate is preferably a thermally oxidized silicon oxide film because it is necessary to suppress the defect density at the interface.
[0027]
Next, a second embodiment of the present invention will be described with reference to FIG. This embodiment is different from the embodiment shown in FIG. 1 in that a field plate is used as an element isolation region instead of the channel stopper (diffusion layer) in FIG. The configuration other than the element isolation region is the same as that of the first embodiment in FIG.
[0028]
A p-type diffusion layer 32 is formed on the surface of n-type silicon substrate 31, and a silicon oxide film 34 is formed on the surface of silicon substrate 31 excluding an ohmic contact region between p-type diffusion layer 32 and aluminum electrode 33. Is formed. In the silicon oxide film 34, a field plate 35 as an element isolation region is formed at a position surrounding the diffusion layer 32 in plan view. The field plate 35 is usually formed of aluminum, but is not limited to aluminum as long as it is a wiring material, and can be formed of various materials. Note that the aluminum electrode 33 extends from an ohmic contact region with the diffusion layer 32 to a region on the opposite side of the diffusion layer 32 beyond the field plate 35. An aluminum electrode 38 is also formed on the lower surface of the silicon substrate 31.
[0029]
In the present embodiment, by applying a voltage having the same potential as that of the silicon substrate 31 to the field plate 35, the field plate 35 exhibits a function of element isolation. Then, by applying a reverse bias voltage to the aluminum electrode 34, a depletion layer 36 is formed in the element region separated by the field plate 35. When radiation enters the depletion layer 36, electrons and holes are generated. A pair is generated and a detection current flows to the aluminum electrode 34. In this case, since the aluminum electrode 33 is formed outside the element region partitioned by the field plate 35, the depletion layer 37 is also formed in the MOS structure formed in this region.
[0030]
As described above, since the aluminum electrode 33 is formed to extend outside the field plate 35, also in the present embodiment, the signal current due to the holes generated by the radiation is applied to the signal current from the MOS structure in the same direction by the above-described operation. The signal of the displacement current is added, so that the detection current can be amplified, and extremely high radiation detection accuracy can be obtained.
[0031]
In order for the field plate 35 to function as an element molecule, a voltage of the same potential as that of the silicon substrate 31 is normally applied to the field plate 35, but a potential that does not invert the silicon substrate 31 immediately below the field plate 35 is applied. In this case, the potential does not necessarily need to be the same as that of the silicon substrate 31. The voltage of the upper aluminum electrode 33 for inverting the silicon substrate 31 is practically a function of the concentration of the silicon substrate 31, the dielectric constant and thickness of the insulating film (silicon oxide film 34), and the work function of the upper aluminum electrode 33. Can be predicted with no problematic accuracy. The polarity of the conductivity type, the type of junction for forming the depletion layer, and the materials of the upper electrode and the insulator are the same as those in the first embodiment.
[0032]
In the above embodiment, a silicon substrate is used as the semiconductor substrate. However, the present invention is not limited to this silicon substrate, and a semiconductor substrate such as diamond or SiC may be used.
[0033]
Next, an example of a planar layout pattern of each layer of the semiconductor radiation detector of the present invention will be described with reference to FIG. In the example of FIG. 5, the circular region 41 is an opening without a silicon oxide film, and is a sensitive region. In regions other than the sensitive region 41, a silicon oxide film is provided on a silicon substrate. The annular area 42 surrounding the sensitive area 41 is an element isolation area. An aluminum electrode is provided on the entire surface surrounded by the thick frame 43. An annular region 44 adjacent to the annular region 42 is provided outside the annular region 42, and the annular region 44 has a MOS structure. Although the layout pattern shown in FIG. 5 is circular, the present invention is not limited to this. If the layout pattern is arranged outside the annular element isolation region 44 surrounding the sensitive region 41 so as to be adjacent thereto, other shapes such as a rectangle may be used. May be configured.
[0034]
Another example of the planar layout pattern of each layer of the semiconductor radiation detector of the present invention will be described with reference to FIG. The region 51 to be a sensitive region is rectangular and is an opening provided in an insulating film (silicon oxide film). In a region other than the region 51, a silicon oxide film is provided on a silicon substrate. An aluminum electrode is provided on the entire surface of the region 53 surrounded by the thick frame, and the region provided with the aluminum electrode extends in one direction from one side of the sensitive region 51. An element isolation region 52 is provided between the extension region and the sensitive region 51. A MOS structure is provided in a region 54 extending outside the element isolation region 52. As shown in FIG. 6, the element isolation region 52 and the MOS structure need not necessarily surround the sensitive region 51.
[0035]
【Example】
Hereinafter, a result of a simulation of the effect of the embodiment falling within the scope of the present invention will be described. The structure of the semiconductor radiation detector used in this simulation is shown in FIG. This semiconductor simulation was performed under the conditions shown in Table 1 below. The plane layout of each layer is a concentric circle shown in FIG.
[0036]
[Table 1]

[0037]
With the upper aluminum electrode 3 held at -50 V, the situation where alpha rays having an energy of 1 MeV were vertically incident on the center of the semiconductor detector was analyzed by simulation. As a result, in the device structure according to the embodiment of the present invention having the MOS structure, the charge amount as the signal intensity was increased by 20% as compared with the case where the device had no conventional MOS structure. In this simulation example, the area of the MOS structure occupies 36% of the area of the opening of the sensitive area. However, a signal enhancement effect of about 20% can be obtained.
[0038]
【The invention's effect】
As described above in detail, according to the present invention, the radiation detection sensitivity can be significantly increased without complicating the device structure and increasing the manufacturing cost.
[Brief description of the drawings]
FIG. 1 is a sectional view showing a semiconductor radiation detector according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a MOS structure related to a simulation for explaining the operation principle of the present invention.
FIG. 3 is a graph showing applied voltages for a simulation for explaining the operation principle of the present invention.
FIG. 4 is a sectional view showing a semiconductor radiation detector according to a second embodiment of the present invention.
FIG. 5 is a schematic diagram showing an example of a planar layout shape of each layer of the semiconductor radiation detector of the present invention.
FIG. 6 is a schematic diagram showing another example of a planar layout shape of each layer of the semiconductor radiation detector of the present invention.
FIG. 7 is a sectional view showing a conventional semiconductor radiation detector.
[Explanation of symbols]
1, 21, 31, 61; n-type silicon substrates 2, 22, 32; p-type diffusion layers 3, 23, 33, 63; upper aluminum electrodes 4, 24, 34, 62; silicon oxide films 5, 25; 6, 7, 26, 36, 37; depletion layers 8, 27, 38, 64; lower aluminum electrode 35; field plates 41, 51; sensitive regions 42, 52; element isolation regions 43, 53; Regions 44 and 54; MOS structure formation region 71; Voltage applied to upper electrode in simulation

Claims (4)

A radiation sensitive region formed of a pn junction or a Schottky junction formed in an element formation region defined by an element isolation region on the surface of the semiconductor substrate; a signal detection electrode in contact with the radiation sensitive region; A wiring electrode formed in a region opposite to the sensitive region adjacent to the element isolation region and electrically connected to the signal detection electrode; and an insulation provided between the wiring electrode and the semiconductor substrate. And a film, wherein a MOS structure is formed from the wiring electrode, the insulating film, and the semiconductor substrate. 2. The semiconductor radiation detector according to claim 1, wherein the wiring electrode is formed in the same process as the signal detection electrode. 3. The semiconductor radiation detector according to claim 1, wherein the element isolation region is a channel stopper having the same conductivity type as the semiconductor substrate and a diffusion layer having a higher concentration than the semiconductor substrate. 4. 3. The semiconductor radiation detector according to claim 1, wherein the element isolation region is a field plate that is insulated from the semiconductor substrate via an insulating film, and is applied with the same potential as the semiconductor substrate. 4. .

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