JP2004328413A - Half-bridge form output circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a half-bridge form output circuit suitable for a class D power amplifier circuit. <P>SOLUTION: The half-bridge form output circuit 10 outputs a pulse signal V<SB>OUT</SB>by alternatively switching power MOSFETs XX1, XX2 by high-side/low-side gate driving circuits 1, 2 which amplifies a pluse input signal Vs. The high-side/low-side gate driving circuits are provided with a dead time setting driving means for performing driving control of NPN transistors Q6, Q4 and PNP transistors Q3, Q1 of complementary connection in which charging time t1 of the XX1, XX2 becomes circuit impedance slower than discharging time t2 by NPN transistors Q2, Q5 for control which are ON/OFF controlled by the pulse input signal Vs and the high-side gate driving circuit 1 is a rapid discharging means by which the XX1 is turned OFF by a bootstrap power source V<SB>BS</SB>using charging voltage of a capacitor C3 charged when the XX2 is ON as voltage for charging the XX1 and a PNP transistor Q7 in Darlington configuration. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a half-bridge type output circuit applied to a class D power amplifier circuit (digital amplifier) or the like of audio equipment.
[0002]
[Prior art]
A half-bridge type output circuit applied to a class D power amplifier (digital amplifier) or the like of a conventional audio device generally has a configuration using a gate driving IC manufactured using a high voltage MOSIC manufacturing process. Has become.
[0003]
For example, the block circuit diagram of the half-bridge type output circuit 20 shown in FIG. 4 includes a high-side gate drive circuit 7 and a low-side gate drive circuit which are connected to a first power supply V1 and amplify a pulse input signal Vs such as a PWM signal. The circuit 8 charges / discharges the gates G1 and G2 of the two high-side and low-side power MOSFETs XX1 and XX2 connected in series to the second power supply V2, and alternately turns ON / OFF. A half-bridge type output circuit that outputs a pulse signal _VOUT having an amplitude of the second power supply V2 to a connection point M between the power MOSFETs XX1 and XX2, and outputs the LPF as a load L1 to the output pulse signal _VOUT. (Low-pass filter), the output of which is equal to the pulse width of the pulse input signal Vs (PWM signal, etc.) Response analog signal is obtained.
[0004]
A block 9 surrounded by a dotted line frame in FIG. 4 is integrated as one to three gate drive ICs, and this gate drive IC is applied to a high output half-bridge type output circuit. Has become indispensable.
[0005]
As a known technical document of the above-described conventional half-bridge type output circuit, there is one applied to a level shift circuit and an inverter device described in the following [Patent Document 1].
[0006]
[Patent Document 1] Japanese Patent Application Laid-Open No. 2000-286687 [Problems to be Solved by the Invention]
However, the gate drive-dedicated IC manufactured by using the high breakdown voltage MOSIC manufacturing process is expensive for consumer use.
[0007]
The dead time setting (both OFF) for preventing the output power MOSFETs XX1 and XX2 from being simultaneously turned on and causing an excessive current to be destroyed is logically configured as a dedicated safety circuit. This complicates the entire circuit and contributes to the high price of the gate drive IC.
[0008]
The present invention has been made mainly in view of the above circumstances, and is configured with an inexpensive discrete general-purpose bipolar transistor or other single element main body without using an expensive dedicated gate drive IC and setting a dead time without a dedicated circuit. It is an object of the present invention to provide a low-cost half-bridge type output circuit which has a circuit configuration capable of controlling a high-side gate drive circuit with a small current.
[0009]
[Means for Solving the Problems]
The present invention provides a high-side gate drive circuit 1 and a low-side gate drive circuit 2, which are connected to a first power supply V1 and amplify a pulse input signal Vs, and are connected in series to a second power supply V2. The gates G1 and G2 of the two power MOSFETs XX1 and XX2 are charged and discharged alternately to switch ON / OFF, and the second power supply V2 is connected to a connection point M between the two power MOSFETs XX1 and XX2. In the half-bridge type output circuit that outputs a pulse signal _VOUT having an amplitude of, the high-side gate drive circuit 1 and the low-side gate drive circuit 2 (hereinafter, elements and locations on the low-side gate drive circuit 2 side are shown in parentheses. ) Is charging of the gate G1 (G2) of XX1 (XX2) of each power MOSFET at the time of switching. The control NPN bipolar transistor Q2 () turns ON / OFF the complementary connection NPN bipolar transistor Q6 (Q4) and PNP bipolar transistor Q3 (Q1) in which the time t1 has a circuit impedance slower than the discharge time t2 by the pulse input signal VS. Q5), the high-side gate drive circuit 1 includes a capacitor C3 charged from the first power supply V1 through the diode D1 when the low-side power MOSFET XX2 is ON. a bootstrap supply _{V BS} power MOSFETXX1 of the high-side charge voltage to the gate G1 charging voltage for ON of, PNP bipolar transistor Q3 and 2-stage Darlington configuration of the complementary connecting And a rapid discharge means for accelerating the discharge of the gate G1 when the XX1 of the high-side power MOSFET is turned off by the PNP bipolar transistor Q7. Achieve the above tasks.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of a half-bridge type output circuit according to the present invention will be described with reference to the drawings.
[0011]
FIG. 1 is a circuit diagram of a half-bridge type output circuit according to the present invention.
[0012]
FIG. 2 is a simplified equivalent circuit diagram at the time of charging and discharging the gate of the power MOSFET by the half-bridge type output circuit according to the present invention.
[0013]
FIG. 3 is a diagram showing the relationship between the drive waveform of the gate voltage of the power MOSFET and the ON / OFF drive timing in the half-bridge type output circuit according to the present invention.
[0014]
First, in the present invention, it is assumed that a half-bridge type output circuit is mainly composed of a discrete general-purpose bipolar transistor, some resistors, a diode, an inverter element, and a power MOSFET without using a gate driving IC. Elements and locations that are the same as those of the conventional circuit of FIG.
[0015]
In FIG. 1, a half-bridge type output circuit 10 is connected to a first power supply V1 and includes a high-side gate drive circuit 1 and a low-side gate drive circuit 2 surrounded by a dotted frame for amplifying a pulse input signal Vs. The gates G1 and G2 of the two high-side and low-side power MOSFETs XX1 and XX2 connected in series to the second power supply V2 are charged / discharged and alternately turned on / off to switch between the two power MOSFETs. This is a circuit configuration for outputting a pulse signal _VOUT having an amplitude of the second power supply V2 to a connection point M between XX1 and XX2. In particular, the high-side gate drive circuit 1 and the low-side gate drive circuit 2 (hereinafter, referred to as the text) Elements and locations on the low-side gate drive circuit 2 side are shown in parentheses.) As shown in FIG. A complementary connection NPN bipolar transistor Q6 (Q4) and a PNP bipolar transistor Q3 (Q1) in which the charging time t1 of the gate G1 (G2) of the power MOSFET XX1 (XX2) is slower than the discharging time t2 (t1> t2) and has a circuit impedance. ) Is controlled by a control NPN bipolar transistor Q2 (Q5) that is turned on / off by the pulse input signal Vs, and the high-side gate drive circuit 1 is provided with the low-side power MOSFET. a bootstrap supply _{V BS} which XX2 of the gate G1 charging voltage for ON XX1 of the power MOSFET of the high-side of the charging voltage of the capacitor C3 is charged through the diode D1 from the at ON first power supply V1 ,Previous And a rapid discharge means for accelerating the discharge of the gate G1 when the high-side power MOSFET XX1 is turned off by the complementary-connected PNP bipolar transistor Q3 and the two-stage Darlington-configured PNP bipolar transistor Q7. I do.
[0016]
In the above circuit configuration, each of the high-side gate drive circuit 1 and the low-side gate drive circuit 2 of the power MOSFETs XX1 and XX2 can be constituted by a general-purpose small-signal bipolar transistor. The dead time T _dead (the time both are OFF) for preventing the power MOSFETs XX1 and XX2 from turning on at the same time and causing an excessive current to flow can be configured without a dedicated circuit. Further, by adding the bipolar transistor Q7 of the high-side gate drive circuit 1, the operation of the transistor Q2 having a large voltage amplitude can be controlled with a small current of several mA, and an inexpensive general-purpose small signal / high breakdown voltage bipolar transistor suitable for high-speed switching is provided for Q2. It can be used.
[0017]
Hereinafter, a case in which the outline of the operation of the present half-bridge output circuit 10 is applied to a class D power amplifier (digital amplifier) of an audio device will be described.
[0018]
A logic level PWM signal is input to the pulse input signal Vs. The power MOSFETs XXl and XX2 alternately repeat ON / OFF depending on the level (high or zero) of the PWM signal, and the PWM output voltage _VOUT having a voltage amplitude determined by the second power supply V2 is applied to the load L1. The load L1 is an LPF (low-pass filter), the output of which provides an analog signal corresponding to the pulse width of the PWM signal, and drives a speaker (not shown).
(1) When the PWM input signal Vs is at a high level (+5 V), the output of the inverter A1 is low → the NPN transistor Q5 is OFF → the voltage of the first power supply V1 is the NPN transistor Q4 Since the gate G2 of XX2 of the power MOSFET is charged through R2, XX2 is turned on. XX1 of the high-side power MOSFET is OFF. Therefore, _VOUT is zero, and the applied voltage of the load L1 is zero.
[0019]
At this time, the voltage of the first power supply V1 is also charged to the capacitor C3 through the diode D1 because the drain of the XX2 goes to the GND level at the same time. This, XXl the next power MOSFET gate charge for serving as a power source at the time of ON (because of the diode Dl, the voltage across the capacitor C3 becomes bootstrap supply _{V BS.).}
(2) When the PWM input VS is at the low level (0 V), the output of the inverter A1 is high → the NPN transistor Q5 is ON → the gate charge of the XX2 is discharged through the resistor R2 and the PNP transistor Ql. Turn off.
[0020]
At this time, XXl the high side of the power MOSFET, the voltage _{V BS} which NPN transistor Q2 is also OFF → PNP transistor Q7 has been charged in the OFF → capacitor C3 is charged to the gate G1 of XXl through NPN transistor Q6, resistor R4, XXl turns ON. Then, the voltage of the second power supply V2 is applied to the load L1.
(3) Next, when the PWM input Vs becomes high level (+5 V), the NPN transistor Q2 is not turned on and a predetermined current flows. This current value can be determined by including the transient characteristics of the resistor R5, the capacitor C1, the resistor R18, the diode D4, the resistor R9, the resistor R7, and the diode D2. Requires a very small current of about several mA. That is, for rapidly discharging the gate charge of XXl of the power MOSFET, the base current required for the PNP transistor Q7 can be extremely small by the two-stage Darlington configuration using the PNP transistors Q3 and Q7. Therefore, a high-speed transistor having a small chip area can be used as the NPN transistor Q2, and the switching speed required for the circuit can be secured.
[0021]
In this way, after the XXl of the high-side power MOSFET is rapidly turned off, the process returns to (1) and the XX2 of the low-side power MOSFET is turned on.
(4) As described above, the high-side and low-side power MOSFETs XX1 and XX2 are alternately turned ON / OFF alternately to provide a half-bridge type output circuit in which the PWM signal output _VOUT is obtained at the load L1.
(5) Here, at the moment of ON / OFF switching, it is necessary that there is a time (dead time) in which both XXl and XX2 are OFF. If both of them are turned on, an excessive through current flows and XXl and XX2 are destroyed. Hereinafter, the dead time setting driving means of the present circuit will be described.
[0022]
FIG. 2A shows a simplified equivalent circuit when the gate G2 of the power MOSFET XX2 is charged, and FIG. 2B shows a simplified equivalent circuit when the gate G2 of the XX2 is discharged.
[0023]
In (a), the circuit impedance at the time of charging is R12 / (β of Q4) + base-emitter operating resistance of Q4 + R2. By appropriately selecting the resistance value of the resistor R12 (denoted as R12), the circuit impedance at the time of discharging is obtained. The value can be set to a sufficiently large value.
[0024]
In (b), the circuit impedance at the time of discharging is the base-emitter operating resistance of Q1 + R2. (The ON resistance of the transistor Q5 that drives the base of Ql can be ignored.)
The above description is for the low-side power MOSFET (XX2), but the same applies to the high-side power MOSFET (XX1).
[0025]
As a result, it is possible to perform a switching operation in which the charge of each gate G1 or G2 of the power MOSFETs XX1 and XX2 is slow and the discharge is fast.
[0026]
Therefore, as can be seen from FIG. 3 showing the relationship between the gate drive waveform and the ON / OFF timing of the FET, the predetermined dead time T _dead can be set only by adjusting the circuit impedance without using a dedicated circuit.
[0027]
【The invention's effect】
Since the half-bridge type output circuit according to the present invention is configured as described above,
(1) An extremely inexpensive and simple D-class power amplifier can be realized with only general-purpose discrete components without a dedicated IC.
(2) The gate drive circuit of the power MOSFET can be constituted by an inexpensive general-purpose small-signal bipolar transistor.
(3) The dead time can be set without using a dedicated circuit so that an excessive current does not flow through the output power MOSFET and the output power MOSFET is not broken.
(4) As a circuit configuration capable of controlling the high-side gate drive circuit with a small current, it is possible to use an inexpensive small-signal, high-voltage bipolar transistor capable of high-speed switching.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a half-bridge type output circuit according to the present invention.
FIG. 2A is a simplified equivalent circuit at the time of gate charging of a power MOSFET of a half-bridge output circuit according to the present invention, and FIG.
FIG. 3 is a diagram showing the relationship between the driving waveform of the gate of the power MOSFET and the ON / OFF timing of the FET in the half-bridge type output circuit according to the present invention. FIG. 4 is a diagram showing the half-bridge type output using a conventional gate drive IC. It is a block circuit diagram of a circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 High side gate drive circuit 2 Low side gate drive circuit 7 High side gate drive circuit 8 Low side gate drive circuit 9 IC for exclusive use of gate drive
10, 20 Half-bridge type output circuit V1 First power supply V2 Second power supply Vs Pulse input signal (PWM signal)
XX1 High-side power MOSFET
XX2 Low-side power MOSFET
G1, G2 Gate M Connection point V _OUT pulse signal output t1 Charge time t2 Discharge time T _dead dead time Q6, Q4 NPN bipolar transistors Q3, Q1, Q7 PNP bipolar transistors Q2, Q5 Control NPN bipolar transistors D1, D2,. diode C1, C2, ·· capacitor _{V BS} bootstrap power supply

Claims (1)

Each gate of two high-side and low-side power MOSFETs connected in series to the second power supply by a high-side gate drive circuit and a low-side gate drive circuit connected to the first power supply and amplifying the pulse input signal A half-bridge type output circuit that alternately switches ON / OFF by charging and discharging, and outputs a pulse signal having an amplitude of the second power supply to a connection point of the two power MOSFETs.
The high-side gate drive circuit and the low-side gate drive circuit,
A complementary NPN bipolar transistor and a PNP bipolar transistor that have a circuit impedance at the time of switching whose gate charging time is slower than a discharging time during switching are driven by a control NPN bipolar transistor that is turned on / off by the pulse input signal. Equipped with dead time setting drive means for controlling
In addition, the high-side gate drive circuit includes:
A bootstrap power supply that sets a charging voltage of a capacitor charged from the first power supply through a diode when the low-side power MOSFET is turned on to a gate charging voltage when the high-side power MOSFET is turned on; A half-bridge type output circuit comprising: a PNP bipolar transistor and a rapid discharging means for speeding up discharge of a gate when the high-side power MOSFET is turned off by a two-stage Darlington PNP bipolar transistor.

Images