JP2004303954A - Teg pattern of semiconductor device and inspection method of pattern deviation using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a TEG pattern which allows an electrical detection of a positional deviation in a semiconductor device wherein a conductive film is processed by two-time photolithographic processes. <P>SOLUTION: In a thin film having a conductivity which is formed on top of a semiconductor substrate, a first pattern 3 is formed by a first photolithographic process, and then second patterns 4a and 4b are formed by a second photolithographic process. The first pattern 3 consists of rectangular pads 2a and 2b and a coupling portion 2c. By forming the second patterns 4a and 4b, gauges 5a and 5b are formed. When an electric current is caused to flow between the pads 2a and 2b, an amount of electric current corresponding to an amount of positional deviation flows and amounts of positional deviations can be obtained as different resistance values. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a TEG pattern of a semiconductor device capable of detecting a shift in a pattern shift in a semiconductor manufacturing process and a pattern shift inspection method using the TEG pattern.
[0002]
[Problems to be solved by the invention]
In a wafer process for manufacturing a semiconductor device, a number of photolithography processes are generally performed. In these photolithography processes, alignment of a mask pattern is performed so that a deviation from an underlying pattern is within an allowable range. I'm trying to do it.
[0003]
In these, a pattern portion for alignment called a TEG pattern is usually formed in a wafer or for each chip, and the position is finely adjusted so as to come to a predetermined position in this portion. Then, at the stage of performing the inspection after the processing, it is usual to check whether or not the positional deviation is within an allowable range by an appearance inspection.
[0004]
However, even if the deviation is within the allowable range in the appearance inspection, the electrical characteristics of the finished product may be out of the allowable range or may be defective. Further, in some cases, the occurrence of a defect due to a position shift in the photolithography process cannot be detected unless the product that appears in the electrical characteristics is a large one that is abnormal.
[0005]
Furthermore, regarding the electrical characteristics, even if there is no problem in the early stage of the manufactured product, it is necessary to detect small deviations because problems may occur during use depending on how they are displaced. It has been. In addition, although a small deviation can usually be checked by an appearance inspection, it cannot be said that a human error does not occur because of a person.
[0006]
Therefore, in order to avoid the above-mentioned problem, it has been demanded that even a small deviation can be detected by an electrical inspection. However, this is not the case in all photolithographic processing conditions.
[0007]
The present invention has been made in view of the above circumstances, and has as its object to include a manufacturing process of processing a conductive film formed on a substrate by performing at least a first and a second photolithography process. Provided is a TEG pattern of a semiconductor device, wherein a TEG pattern of the semiconductor device can be electrically detected in a second photolithography processing step, and a pattern deviation inspection using the TEG pattern is provided. It is to provide a method.
[0008]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, in the invention of claim 1, after forming a conductive film on a substrate, at least a first and a second photolithography processing steps are performed to perform a manufacturing step of processing the same. A first pattern portion formed in a first photolithography process and a part of the first pattern portion formed in a second photolithography process are intended for a TEG pattern formed in a semiconductor device including the same. A second pattern portion is formed by forming a gauge portion by removing the gauge portion. If the formation position of the second pattern portion is displaced from the reference position with respect to the first pattern portion, the gauge portion is displaced. It was configured to be provided as a pattern set so that the resistance value changes according to the amount.
[0009]
Thus, after the formation of the second pattern portion, the resistance value of the gauge portion is measured, and the amount of change in the resistance value according to the amount of deviation from the reference position is obtained. The amount of deviation from the reference position can be detected. In addition, this makes it possible to determine the appropriateness of the deviation amount with an accuracy that could not be determined by visual appearance inspection.
[0010]
According to the second aspect of the present invention, in the above invention, when forming the second pattern portion, the width dimension of the current path is changed according to the amount of deviation when the second pattern portion is formed, so that the resistance value is changed. Therefore, it is possible to easily measure the resistance value from the difference in the current value according to the amount of deviation, so that it is possible to provide a simple and inexpensive determination function without using a special measuring device. become able to.
[0011]
According to the third aspect of the present invention, in each of the above aspects, the first and second pattern portions are formed in a state where at least two of the first and second pattern portions are arranged in a direction in which the resistance value changes according to the shift amount. Since one of the gauge portions is set so that the resistance value increases and the other decreases, the displacement can be handled equally in any direction from a predetermined reference position.
[0012]
According to the fourth aspect of the present invention, in each of the above inventions, at least two sets of the first and second pattern portions are formed, and the directions in which the resistance values change in accordance with the amount of displacement are set so as to intersect each other. Since the displacement from the reference position can be detected in each set direction, it is possible to detect the displacement in accordance with the two-dimensional displacement amount.
[0013]
According to the fifth aspect of the present invention, in the first and second aspects of the invention, the first and second pattern portions are set symmetrical with respect to two directions orthogonal to each other, and the gauge portion is formed as an annular pattern. Then, the gauge portion is formed as a bridge connection of the four resistors between the electrode portions taken out from the four sides, and the formation position of the second pattern portion is shifted, so that the resistance values of the four resistors are shifted. Since the setting is made so as to change in accordance with the direction and the shift amount, a value corresponding to the position shift at the time of forming the second pattern portion can be detected as the potential difference of the bridge-connected resistor.
[0014]
According to the sixth aspect of the invention, in the invention of the fifth aspect, the first and second patterns are set to be circular and the gauge portion is set to be formed in an annular shape. The width dimension of the gauge portion can be isotropically handled irrespective of the direction of the displacement with respect to the displacement at the time of forming. As a result, it is possible to set the detection target in any direction, depending on how the electrodes are set in the case of the bridge connection.
[0015]
According to a seventh aspect of the present invention, in the fifth and sixth aspects of the present invention, at least two sets of the first and second pattern portions are formed such that the electrode portions are inclined with respect to each other. Since it is arranged and formed, it is possible to set a detection direction that can be detected by the bridge connection formed by one gauge part and a different direction with the other one, thereby performing an arithmetic operation based on the detection outputs of both. , Detection directions can be handled two-dimensionally.
[0016]
According to the invention of claim 8, in the invention of claim 7, at least two sets forming the first and second pattern portions are arranged in a state where the arrangement direction of the electrode portions is inclined by 45 degrees. The output of the two bridge-connected resistors can be handled as a detection signal having a phase shift of 90 degrees, which makes it easy to handle data such as the amount of shift and the direction of the shift. Thus, detection can be performed with high accuracy.
[0017]
According to the ninth aspect of the present invention, when inspecting a pattern shift using the TEG pattern of the semiconductor device according to the first to fourth aspects, a resistance value or a resistance value obtained by electrically measuring a gauge portion. Is determined to be within an allowable range when the formation position of the second pattern portion is within a predetermined range with respect to the value when the formation position of the second pattern portion is at the reference position. This makes it possible to easily determine the positional deviation by using this.
[0018]
According to the tenth aspect of the present invention, in the method for inspecting a pattern shift using the TEG pattern of the semiconductor device according to the fifth aspect, the portion formed as a bridge-connected resistor pair in the gauge portion. Then, by applying a voltage and detecting the offset voltage, the amount of displacement of the second pattern is detected, so that the amount of displacement in the detection direction can be obtained as an output of the offset voltage.
[0019]
According to an eleventh aspect of the present invention, in the method for inspecting a pattern shift using the TEG pattern of the semiconductor device according to the eighth aspect, the offset voltages output from the two sets of gauge units are respectively set to the first and the second sets. When the second offset voltage is used, the sum of the squares of the absolute values of the first and second offset voltages is obtained as the square of the amplitude value, and the displacement of the formation position at the time of forming the second pattern is calculated from the amplitude value. The step of calculating the amount and the step of calculating the direction of deviation from the values and signs of the first and second offset voltages are performed. Therefore, by using two sets of TEG patterns, the direction of deviation depends on the direction of deviation. It is possible to obtain information on the amount of deviation under the condition that no deviation occurs.
[0020]
According to a twelfth aspect of the present invention, in the eleventh aspect of the present invention, the calculation of the amplitude value of the offset voltage and the step of calculating the direction of deviation from the first and second offset voltage values and the sign are performed. Therefore, by using two sets of TEG patterns, it is also possible to obtain information on the shift direction.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. Prior to the description of the TEG pattern as a main part, the properties of the semiconductor device handled in this embodiment will be described briefly. This is the property of the object which is the premise of the present invention.
[0022]
Although not shown, this semiconductor device includes a step of forming a ferromagnetic thin film for MRE such as aluminum, polycrystalline silicon, NiFe, NiCo or the like as a conductive film on a semiconductor substrate. The manufacturing process includes performing a photolithography process twice on the formed thin film to form a pattern. The conductive thin film to be formed can be applied other than those described above.
[0023]
Normally, in a semiconductor substrate manufacturing process, a semiconductor device is handled in a wafer state, and a large number of semiconductor device chips are formed in the wafer, and a TEG pattern according to the present invention is formed in a part of the semiconductor device. In the photolithography process step of the manufacturing process, the alignment of the mask is performed using this TEG pattern.
[0024]
FIG. 1 is a schematic diagram showing the appearance of the TEG pattern 1 and a part of the measurement system. The outer shape of the TEG pattern 1 obtained by processing a conductive thin film formed on a semiconductor substrate is connected to rectangular pads 2a and 2b provided on the left and right and connected to connect them. 2c. This outer shape is formed as the first pattern portion 3. Further, rectangular windows 4a, 4b as second pattern portions are formed at predetermined positions near the center inside the pads 2a, 2b.
[0025]
The first pattern portion 3 including the pad portions 2a and 2b and the connecting portion 2c is obtained by removing an outer shape by etching in a first photolithography process (see FIG. 2A). The windows 4a and 4b are formed in the second photolithography process (see FIG. 2B). By forming the windows 4a and 4b, the gauges 5a and 5b are formed between the windows 4a and 4b.
[0026]
Thus, the TEG pattern 1 is formed by patterning the conductive thin film through the first and second photolithography processing steps. In the formed TEG pattern 1, the DC power supply 6 and the ammeter 7 are connected between the two pad portions 2a and 2b, and the resistance value R between the two pad portions 2a and 2b can be obtained from the current value. The resistance values of the respective resistance components formed on the gauge portions 4a and 4b of the pad portions 2a and 2b are defined as r1 and r2.
[0027]
The resistance value R obtained by measuring the TEG pattern 1 varies depending on the amount of misalignment of the mask in the second photolithography process in which the second pattern portions 4a and 4b are patterned. As shown in FIG. 3, it is assumed that, for example, the position is shifted rightward in the figure by Δw.
[0028]
As a result, the resistance value r1 of the gauge portion 4a formed on the pad portion 2a side is increased by reducing the current path portion by Δw, and the gauge portion 4b formed on the pad portion 2b side is connected to the current path. Is increased by Δw, the resistance value r2 decreases.
[0029]
Here, since the magnitude of the resistance value R is obtained as a series resistance of the resistance values r1 and r2, a change in one of the resistance values r1 and r2 and a decrease in the other value are offset by those changes. However, when .DELTA.w increases and the current paths of the gauge portions 4a and 4b become very narrow, the resistance values r1 and r2 increase rapidly, so that the resistance value R as a whole also increases rapidly. To increase.
[0030]
An example of this situation is shown in FIG. In this figure, the resistance value R is set to increase rapidly when the pattern shift amount exceeds 2.2 μm. Therefore, by setting the first and second pattern portions so that the portion where the resistance value R sharply rises is within the allowable range of the pattern shift, it is easy to perform the electrical measurement. Inspection of a pattern shift can be performed at a time.
[0031]
According to the first embodiment, when the TEG pattern 1 is provided, when the first and second photolithography processing steps cause a positional shift between the two, this is electrically measured. Thus, it is possible to determine whether or not the deviation is within the allowable range, so that it is possible to make a reliable determination while using a simple and inexpensive method.
[0032]
(Second embodiment)
FIG. 5 shows a second embodiment of the present invention. The difference from the first embodiment is that the shift detection directions correspond to two orthogonal directions, and have the same configuration as the TEG pattern 1. The TEG patterns 8 are provided at positions orthogonal to each other, and the pad portions 2a are connected to each other by a pad portion 9.
[0033]
By adopting the above configuration, assuming that the shift detection direction by the TEG pattern 1 is the direction indicated by the arrow A in the drawing, the shift detection direction by the other TEG pattern 8 can be the orthogonal shift detection direction B. This makes it possible to inspect the amount of displacement in both directions orthogonal to each other in the plane of the wafer.
[0034]
(Third embodiment)
FIGS. 6 to 12 show a third embodiment of the present invention. Hereinafter, portions different from the first embodiment will be described. The TEG pattern 10 described in this embodiment is formed through first and second photolithography processing steps, as in the first embodiment.
[0035]
The TEG pattern 10 is composed of an annular gauge portion 11 and four electrode portions 12a to 12d formed in a state of being connected vertically and horizontally. The electrode portions 12a to 12d are used as terminals Vcc, V1, GND, and V2, respectively, as described later. A DC power supply 13 is connected to the electrode 12a (terminal Vcc), and the electrode 12c (terminal GND) is connected to ground. The electrode portions 12b and 12d (terminals FV1 and V2) are configured to detect the potential difference between them as output terminals.
[0036]
The gauge 11 acts as a resistor, and the portions between the electrodes 12a to 12d function as resistors Ra, Rb, Rc, and Rd, respectively. With this configuration, the four resistors Ra to Rd can be regarded as resistors in a state of full bridge connection.
[0037]
FIG. 8 shows a state in which a TEG pattern 10 is formed in the order of the manufacturing process. The formed conductive film is processed by a first photolithography process to form a first pattern as shown in FIG. 14 are formed and then processed by a second photolithography process to form a second pattern 15 as shown in FIG. 6B, thereby obtaining the configuration shown in FIG.
[0038]
FIG. 7 shows an electrical equivalent circuit of the TEG pattern 10. The configuration is such that the resistors Ra to Rd are connected in a full bridge, and an output according to a change in the resistance value can be obtained between the terminals V1 and V2.
[0039]
Next, the operation of the above configuration will be described with reference to FIGS.
The state shown in FIG. 9 shows the state of the TEG pattern 10 when the formation position of the second pattern 15 is shifted rightward in the figure with respect to the formation position of the first pattern 14. In the figure, the center position P2 of the second pattern 15 is shifted to the right in the direction connecting the electrode portions 12b and 12d with respect to the center position P1 of the first pattern 14.
[0040]
In this state, the width of the gauge portion 11 changes due to the displacement of the second pattern 15, and in the figure, the resistances Ra and Rb are equal and the width is widened, so that the resistance value decreases, and the resistances Rc and Rd are changed. The resistance value increases as the width decreases. When this state is represented by an equivalent circuit, as shown in FIG. 10, the resistances of the resistors Ra, Rb, Rc, and Rd increase and decrease as indicated by arrows.
[0041]
Due to the nature of the bridge circuit, when Ra = Rb and Rc = Rd, the output voltages V1 and V2 do not change, and therefore, the offset voltage Voff (= V1-V2), which is the voltage of the difference between V1 and V2. Is also zero, which is exactly the same as when the second pattern 15 is formed at the reference position. This is exactly the same when the shift direction is the left direction in the figure, and even when the shift direction is vertical, the offset voltage Voff becomes zero.
[0042]
Therefore, the direction of the electrodes 12a and 12c (vertical direction in the figure) and the direction of the electrodes 12b and 12d (horizontal direction in the figure) are both detected even if the formation position of the second pattern 15 is shifted. It is a direction that can not be done.
[0043]
On the other hand, when the shift direction is an oblique direction in the figure as shown in FIG. 11 (the center of the second pattern 15 becomes the illustrated position P3 with respect to the center position P1 of the first pattern 14). In this case, the rate of decrease in the resistance values Ra and Rb is different, and the rate of increase in the resistance values Rc and Rd is also different, so that the offset voltage Voff according to the shift amount can be obtained. Become.
[0044]
When the value of the offset voltage Voff is determined by simulation using the deviation angle θ in the deviation direction as a variable while keeping the deviation amount constant, the result shown in FIG. 12 is obtained. In this case, the first pattern 14 has a diameter of 200 μm, the second pattern 15 has a diameter of 190 μm, the shift amount is, for example, 3 μm (thick solid line), and the shift amount is smaller (thin solid line). The voltage applied to the terminal Vcc is 2.4V.
[0045]
As can be seen from this result, the change in the offset voltage Voff has a sine curve with a shift angle θ of 180 degrees. It can be seen that the offset voltage Voff has the largest absolute value when the shift angle θ is 45 degrees or 135 degrees. In other words, the largest offset voltage Voff is obtained in a direction inclined by 45 degrees with respect to the direction of the electrode portions 12a and 12c, which is the horizontal direction, and the direction of the electrode portions 12b, 12d, which is the vertical direction. Also, it can be seen that the amplitude changes according to the amount of displacement.
[0046]
In other words, when the shift direction to be detected is known in advance, if the TEG pattern 10 is formed so that the offset voltage Voff is greatest in the shift direction, the offset voltage Voff can be detected. Thus, the displacement of the second pattern 15 can be detected with high accuracy.
[0047]
Therefore, as shown in the above results, when the shift direction is determined, the setting is made so that the TEG pattern 10 is formed in accordance with the shift direction, so that the shift amount can be detected. become.
[0048]
(Fourth embodiment)
FIGS. 13 to 15 show a fourth embodiment of the present invention. The difference from the third embodiment is that two sets of TEG patterns 10 and 16 are provided. In consideration of this, it is possible to detect a shift amount independent of the shift direction. Hereinafter, differences from the third embodiment will be described.
[0049]
In this embodiment, the first TEG pattern 10 is formed in the same manner as described above, but the second TEG pattern 16 is formed in the direction inclined by 45 degrees instead of being formed at the positions of the electrode portions 12a to 12d. The electrode portions 17a to 17d are formed. The position where the electrode portion is formed is set such that the offset voltage Voff, which is the detected value of the amount of deviation, outputs a peak value in a direction in which the first TEG pattern 10 cannot detect the electrode portion.
[0050]
In the above configuration, the electrode portions 12b and 12d of the first TEG pattern 10 are terminals V1a and V2a, and an offset voltage appearing between both terminals is Voffa. The electrode portions 17b and 17d of the second TEG pattern 16 are set to terminals V1b and V2b, and the offset voltage is set to Voffb.
[0051]
Now, when the displacement amount of the displacement during the formation of the second pattern 15 is fixed and the displacement angle θ indicating the displacement direction is changed as a variable, the offset voltages Voffa (= V1a−V2a) and Voffb (= V1b). -V2b) shows a change as shown in FIG. This is the value indicated by the trigonometric function. Further, since the period is 180 degrees as described above, when this is expressed by an equation, the following equations (1) and (2) are obtained.
[0052]
Voffa (θ) = Vo · sin (2θ) (1)
Voffb (θ) = Vo · cos (2θ) (2)
Here, Vo in the formula is a peak value, that is, an amplitude value. Since the TEG patterns 10 and 16 are etched under the same conditions, they should have the same shape and the same etching amount. Are equal, the amplitude values are also equal.
[0053]
Furthermore, when Equations (1) and (2) are squared on both sides and added together, the value on the right side becomes the square of Vo as shown in the following Equation (3). This value Vo is a value corresponding to the deviation amount.
[0054]
Voffa (θ) ² + Voffb (θ) ² = Vo ² (3)
As a result, the shift amount can be detected as Vo regardless of the shift direction.
[0055]
By substituting the result into equations (4) and (5) derived from equations (1) and (2), the shift angle θ can be obtained.
[0056]
θ = sin ^-1 (Voffa (θ) / Vo) / 2 (4)
θ = cos ^-1 (Voffb (θ) / Vo) / 2 (5)
In this case, since the offset voltages Voffa (θ) and Voffb (θ) are either positive or negative, the shift angle θ can be calculated by a combination thereof. For example, in the case of the shift angle θ1 as shown in FIG. 14, Voffa (θ1) has a positive value and Voffb (θ1) has a negative value. Therefore, the shift angle θ1 can be obtained from these values. is there.
[0057]
The voltage Vo as the amplitude value is a value determined by the amount of deviation, but is a value that also changes by the amount of side etching as described above. That is, since the first and second photolithography processes are performed when forming the first and second patterns 14 and 15 on a thin film having conductivity, side etching occurs in the etching process in an actual process. There is. As a result, the pattern is not formed with the dimensions according to the mask, but the width dimension itself of the gauge portion 11 is formed in a state of being narrowed over all portions due to occurrence of side etching. .
[0058]
As a result, when the detection voltage Vo is obtained as described above, the detection voltage Vo is obtained as a detection voltage higher than the detection voltage Vo obtained when no side etching occurs by the error voltage ΔVo by the thinner gauge section 11. Will be. This relationship is shown in FIG. However, since the side etch amount is not a value that is known in advance, the detected value of the shift amount has a width as the detection error Δd by the amount of occurrence of the side etch.
[0059]
In the drawing, for example, the range of the detection error due to the side etch amount when the detection target of the shift amount is 1.5 μm is shown. It has been found that when the side etch amount is 1.0 μm, a detection error of a maximum shift amount of 0.25 μm occurs. The level of the detection error is a sufficiently practical level.
[0060]
(Other embodiments)
The present invention is not limited to the above embodiment, but can be modified or expanded as follows.
The first and second photolithography processes need not necessarily be performed continuously, and another photolithography process step may be provided on the way.
[0061]
In the first and second embodiments, the pad portion having a rectangular shape is provided. However, the present invention is not limited to this, and a circular pattern or another pattern can be adopted.
[0062]
In the second embodiment, two TEG patterns 1 and 8 are provided in the direction orthogonal to each other. However, the present invention is not limited to this, and any other direction can be set. A configuration in which the direction is arranged in the direction in which the direction is desired to be detected may be employed.
[0063]
In the third and fourth embodiments, the first and second pattern portions 14 and 15 having a circular shape are provided. However, the shape may be set to a rectangular shape or a rhombic shape. You can also.
[Brief description of the drawings]
FIG. 1 is a plan view showing a first embodiment of the present invention.
FIG. 2 is a plan view showing first and second patterns in a manufacturing process.
FIG. 3 is a diagram corresponding to FIG. 1 of a TEG pattern when a displacement occurs.
FIG. 4 is a diagram showing a result of a change in resistance value with respect to a shift amount obtained by simulation;
FIG. 5 is a view corresponding to FIG. 1, showing a second embodiment of the present invention;
FIG. 6 is a view corresponding to FIG. 1, showing a third embodiment of the present invention.
FIG. 7 is an equivalent circuit diagram.
FIG. 8 is a diagram corresponding to FIG. 2 (part 1);
FIG. 9 is a diagram corresponding to FIG. 3;
FIG. 10 is an equivalent circuit diagram corresponding to the case of FIG. 9;
FIG. 11 is a diagram corresponding to FIG. 2 (part 2);
FIG. 12 is a diagram showing a result of a simulation of an offset voltage value with respect to a shift angle;
FIG. 13 is a view corresponding to FIG. 1, showing a fourth embodiment of the present invention;
FIG. 14 is a diagram corresponding to FIG. 12;
FIG. 15 is a diagram showing a relationship between a shift amount and a detection error.
[Explanation of symbols]
1, 8, 10, 16 are TEG patterns, 2a, 2b, 9 are bad portions, 2c is a connection portion, 3, 14 are first pattern portions, 4a, 4b, 15 are second pattern portions, 5a, 5b. , 11 are gauge parts, 6 is a DC power supply, 7 is an ammeter, and 12a to 12d and 17a to 17d are electrode parts.

Claims (12)

In a TEG pattern of a semiconductor device including a manufacturing process of performing at least a first and a second photolithography process steps on a conductive film formed on a substrate,
A first pattern portion formed in the first photolithography processing step;
A second pattern portion that forms a gauge portion by removing a part of the first pattern portion in the second photolithography processing step;
The gauge section is a pattern set so that when the formation position of the second pattern section is displaced from the reference position with respect to the first pattern section, the resistance value is changed according to the displacement amount. A TEG pattern of a semiconductor device, comprising: The TEG pattern of the semiconductor device according to claim 1,
The TEG of a semiconductor device is characterized in that the gauge section is set such that when forming the second pattern section, the width of the current path changes according to the amount of displacement and the resistance value changes. pattern. The TEG pattern of the semiconductor device according to claim 1 or 2,
The first and second pattern portions are formed in a state where at least two of them are arranged in a direction in which the resistance value changes according to the shift amount, and one of the gauge portions increases in resistance value according to the shift amount. A TEG pattern of a semiconductor device, wherein the other is set to decrease. The TEG pattern of the semiconductor device according to claim 1,
The TEG pattern of a semiconductor device, wherein at least two sets of the first and second pattern portions are formed, and directions in which resistance values change in accordance with a shift amount are set in directions intersecting each other. The TEG pattern of the semiconductor device according to claim 1 or 2,
The first and second pattern portions are set to be symmetrical with respect to two orthogonal directions, and the gauge portion is set to be formed as an annular pattern,
The gauge portion is formed as a bridge connection of four resistors between electrode portions taken out from four sides. When the formation position of the second pattern portion is shifted, the resistance values of the four resistors are shifted in the respective directions. A TEG pattern of the semiconductor device, wherein the TEG pattern is set so as to change in accordance with the deviation amount. The TEG pattern of the semiconductor device according to claim 5,
The TEG pattern of a semiconductor device, wherein the first and second patterns have a circular shape, and are set so that the gauge portion is formed in an annular shape. The TEG pattern of the semiconductor device according to claim 5,
The TEG pattern of a semiconductor device, wherein at least two sets of the first and second pattern portions are formed, and the sets are arranged so that the electrode portions are inclined with respect to each other. The TEG pattern of the semiconductor device according to claim 7,
The TEG pattern of a semiconductor device, wherein at least two sets forming the first and second pattern units are arranged in a state where the arrangement direction of the electrode units is inclined by 45 degrees. A method for inspecting a pattern shift using a TEG pattern of the semiconductor device according to claim 1,
When the resistance value obtained by electrically measuring the gauge portion or a value corresponding to the resistance value is within a predetermined range with respect to the value when the formation position of the second pattern portion is at the reference position. A pattern shift inspection method using a TEG pattern, characterized in that it is determined that the pattern shift is within an allowable range. A method for inspecting a pattern shift using a TEG pattern of the semiconductor device according to claim 5,
A TEG pattern, wherein a voltage is applied to a portion formed as a bridge-connected resistor pair in the gauge portion to detect an offset voltage thereof, thereby detecting an amount of displacement of the second pattern. Inspection method for pattern deviation using. A method for inspecting a pattern shift using a TEG pattern of the semiconductor device according to claim 8,
When the offset voltages output from the two sets of gauge units are respectively defined as first and second offset voltages, the sum of the squares of the first and second offset voltages is obtained as the square value of the amplitude value. A method of calculating a positional deviation amount of a formation position at the time of forming the second pattern from a value, the method for inspecting a pattern deviation using a TEG pattern. A method for inspecting a pattern shift using a TEG pattern of a semiconductor device according to claim 11,
A method for inspecting a pattern shift using a TEG pattern, comprising calculating a shift direction from the amplitude value of the offset voltage and the values of the first and second offset voltages and the sign.

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