JP2004300522A - Chromium-plated component and its manufacturing method - Google Patents

Chromium-plated component and its manufacturing method Download PDF

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JP2004300522A
JP2004300522A JP2003095091A JP2003095091A JP2004300522A JP 2004300522 A JP2004300522 A JP 2004300522A JP 2003095091 A JP2003095091 A JP 2003095091A JP 2003095091 A JP2003095091 A JP 2003095091A JP 2004300522 A JP2004300522 A JP 2004300522A
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chromium
chromium layer
residual stress
plated component
manufacturing
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JP4206798B2 (en
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Yuichi Kobayashi
裕一 小林
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Tokico Ltd
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Tokico Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a chromium-plated component which is excellent in corrosion resistance, even when subjected to an extensive thermal history, and to provide a manufacturing method which easily and stably yields the chromium-plated component. <P>SOLUTION: Plating treatment is performed by adjusting the maximum and minimum current densities of a pulsed current, the retention time of the maximum and minimum current densities, the temperature of a plating bath, etc. to deposit a crack-free chromium layer having a compressive residual stress, preferably of ≥100 MPa, on the work surface. Here, the microscopic lattice distortion of the chromium layer is adjusted to 0-3×10<SP>-3</SP>, preferably 0-1×10<SP>-3</SP>. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、表面に硬質のクロム層を析出させたクロムめっき部品およびその製造方法に関する。
【0002】
【従来の技術】
ワーク表面に硬質のクロム層を析出させる汎用の硬質クロムめっき処理によれば、得られるクロム層に金属素地に達するクラックが多数存在し、そのままでは、腐食原因となる媒体が金属素地に到達して、耐食性に劣るものとなる。そこで従来、腐食環境で使用される部品に対しては、一般に前処理としてニッケルめっきや銅めっきを施してクロムめっき層と同程度の膜厚の下地を形成し、この下地の上に硬質クロムめっきを施すようにしていた。しかし、このような対策によれば、めっき処理を工程を変えて2回行わなければならないため、工程増加による製造コストの上昇が避けられないようになる。
【0003】
一方、パルス電流を利用して、いわゆるパルスめっき処理を行うことで、クラックのないクロム層を形成できることが既に確認されており(例えば、特許文献1、特許文献2等参照)、この方法によれば、耐食性に優れたクロムめっき部品を1工程処理で得ることができるようになる。しかしながら、このパルスめっき処理によれば、熱履歴を受けるとクロム層に大きなクラック(マクロクラック)が発生し易いという問題があり、熱履歴を受ける部品への適用は断念せざるを得ないものとなっていた。
そこで、本発明者等は、上記マクロクラック発生について鋭意検討した結果、クロム層に100MPa以上の圧縮残留応力を付与することで、200℃×2hの熱履歴においてもクラック発生を防止できることを見出し、既に特許文献3で明らかにしている。
【0004】
【特許文献1】
特公昭43−20082号公報
【特許文献2】
特開平3−207884号公報
【特許文献3】
特願2000−199095号公報
【0005】
【発明が解決しようとする課題】
しかし、この圧縮残留応力を付与したクロムめっき部品について、その後さらに追加実験をしてみると、100MPaより小さい圧縮残留応力(例えば、−10MPaの残留応力)を有しているにもかかわらず、めっき処理条件によっては200℃×2hの熱履歴でもマクロクラックが発生しないものがあることが判った。
本発明は、上記した技術的背景に鑑みてなされたもので、その目的とするところは、広範な熱履歴を経る場合にも優れた耐食性を発揮するクロムめっき部品を提供すると共に、該クロムめっき部品を容易かつ安定して得ることができる製造方法を提供することにある。
【0006】
【課題を解決するための手段】
熱履歴が与えられた際にクラックが生ずるのは、クロム層が収縮するためであり、この収縮は、クロム層の結晶粒界に多く存在する格子欠陥の総量と微視的な格子ひずみとに影響される。本発明者等は、前記クロム層の微視的な格子ひずみに着目し、この微視的な格子ひずみを小さくすることで熱履歴によるクロム層の収縮を抑制できることを見出した。
したがって、上記目的を達成するための本発明に係るクロムめっき部品は、圧縮残留応力を有する、クラックのないクロム層を有するクロムめっき部品において、前記クロム層の微視的な格子ひずみが0〜1×10−3の範囲にあることを特徴とする。
また、本発明に係るクロムめっき部品は、100MPa以上の圧縮残留応力を有する、クラックのないクロム層を有するクロムめっき部品において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲にあることを特徴とする。
上記のように構成したクロムめっき部品においては、クロム層の微視的な格子ひずみが小さいため、熱履歴を与えられてもひずみの解放にともなって生ずるクロム層の収縮が抑制され、結果として熱履歴に起因するクラック発生が防止される。
上記した前記クロム層の格子ひずみは、めっき処理を行う際のパルス電流の条件、めっき浴の温度に大きく影響される。
したがって、上記目的を達成するための本発明に係るクロムめっき部品の製造方法の一つは、パルス電流を調整してめっき処理を行い、ワーク表面に圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜1×10−3の範囲となるようにパルス電流を調整することを特徴とする。
また、本製造方法の他の一つは、パルス電流を調整してめっき処理を行い、ワーク表面に100MPa以上の圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲となるようにパルス電流を調整することを特徴とする。
さらに、本製造方法の他の一つは、パルス電流を調整してめっき処理を行い、ワーク表面に100MPa以上の圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲となるようにめっき浴の温度を調整することを特徴とする。
【0007】
【発明の実施の形態】
以下、本発明の実施の形態を説明する。
【0008】
本発明に係るクロムめっき部品を得るには、パルス電流を利用した、いわゆるパルスめっき処理を行うが、このパルスめっき処理に際しては、めっき浴として、図1に示すような有機スルフォン酸を含むものを用いるのが望ましい。このめっき浴は、特公昭63−32874号公報に記載されたものと同じ成分組成を有しており、クロム酸と硫酸根とをベースとして有機スルフォン酸を1〜18g/L 好適には1.5〜12g/L含んでいる。
なお、有機スルフォン酸を含まない、クロム酸−硫酸浴(サージェント浴)や珪弗化物(SiF)を含む混合触媒浴を用いてもよい。
【0009】
また、パルスめっき処理に際して印加するパルス電流の波形としては、図2に示すように最大電流密度Iと最小電流密度Iとの間を交番し、かつ最大電流密度Iと最小電流密度Iとに所定時間T、T保持する形態となっている。最小電流密度Iは、ここではゼロ(オフ)に設定しているが、最大電流密度IUとゼロとの間の任意の値に設定してもよいことはもちろんである。また、保持時間TおよびTについては、同一の値に設定しても異なる値に設定してもよい。
【0010】
ここで、温度上昇によるクロム層の応力変化はクロム層の熱収縮に起因する現象であり、その応力変化量は、図3に示すようにクロム層の微視的格子ひずみεおよび雰囲気温度と相関する。微視的格子ひずみεは、X線回折法による回折X線のプロファイルの広がりを半価幅として測定することで、下記のHallの式(1)から求めることができる。
β・cosθ/λ=1/D+ε・sinθ/λ (1)
この式(1)において、βは半価幅、Dは結晶子の大きさ、λはX線の波長であり、半価幅βの測定は、同一方向の格子面である{110}と{220}で行う。
図3に示す結果より、加熱によるクロム層の応力変化量は微視的歪εが小さいほど小さく、熱的に安定する。また、応力変化量は、時間と共に変化するが、時間の経過により次第に安定してその変化は小さくなる。常温では1ケ月程度で安定し、150℃では1日程度で、200℃では2h程度でそれぞれ安定する。
【0011】
このようにして製造されたクロムめっき部品は、クラックのないクロム層に圧縮残留応力が付与され、しかも、クロム層の微視的な格子ひずみが小さいので、広範な熱履歴を経てもクラック発生が防止され、結果として、優れた耐食性を維持するものとなる。
【0012】
【実施例】
実施例1
JIS S45Cからなる鋼棒(直径20mm)を供試材とし、めっき浴としてクロム酸252 g/L 、硫酸根3.1 g/L 、有機スルフォン酸3.5 g/L の成分組成のものを用い、浴温61℃、最大電流密度(ピーク電流密度)I=60,80,100,120,140,160,180,200 A/dm 、最小電流密度I=0 A/dm(図1のパターン)、最大電流密度Iにおける保持時間(オンタイム)T =1.0 ms、最小電流密度Iにおける保持時間(オフタイム)T =0.5 msの条件でパルスめっき処理を行い、ワーク表面に厚さ約10μmのクロム層を有しかつ初期残留応力が異なる8種類の試料を得た。
そして、上記のように得た各試料について、X線回折試験を行って半価幅βおよび結晶子の大きさDを求め、これらの値を上記Hallの式(1)に代入してクロム層の微視的な格子ひずみεを求めるとともに、X線応力測定試験を行ってクロム層の残留応力を求めた。なお、初期残留応力の測定は、日本非破壊検査協会編「非破壊検査」第37巻第8号636〜642頁に記載される「X線応力測定法」を用いて行った。以下、クロム層の残留応力の測定には本法を用いた。
図4は、上記X線回折試験およびX線応力測定試験の結果を示したものである。同図に示す結果より、クロム層の残留応力はピーク電流密度の上昇とともに圧縮側に増加し、微視的な格子ひずみεはピーク電流密度の上昇とともに増加している。なお、何れの試料とも、クロム層にはクラックは認められなかった。
【0013】
実施例2
実施例1と同様の供試材およびめっき浴を用い、浴温56,59,61,63,65.5℃、最大電流密度I=120 A/dm 、最小電流密度I=0 A/dm(図1のパターン)、最大電流密度IにおけるオンタイムT =1.0 ms、最小電流密度IにおけるオフタイムT =0.5 msの条件でパルスめっき処理を行い、ワーク表面に厚さ約10μmのクロム層を有しかつ初期残留応力が異なる5種類の試料を得た。そして、上記のように得た各試料について、実施例1と同様にX線回折試験およびX線応力測定試験を行い、クロム層の微視的な格子ひずみεおよび残留応力を求めた。
図5は、上記X線回折試験およびX線応力測定試験の結果を示したものである。同図に示す結果より、クロム層の残留応力は浴温度の上昇とともに圧縮側に増加し、微視的な格子ひずみεは浴温度の上昇とともに減少している。なお、何れの試料とも、クロム層にはクラックは認められなかった。
【0014】
実施例3
実施例1と同様の供試材およびめっき浴を用い、浴温61℃、最大電流密度I=120 A/dm 、最小電流密度I=0 A/dm(図1のパターン)、最大電流密度IにおけるオンタイムT =0.8,1.2,1.6 ms、最小電流密度IにおけるオフタイムT =0.2,0.3,0.4,0.5,0.6,0.7,0.8 msの条件でパルスめっき処理を行い、ワーク表面に厚さ約10μmのクロム層を有しかつ初期残留応力が異なる19種類の試料を得た。
そして、上記のように得た各試料について、実施例1と同様にX線応力測定試験を行い、クロム層の残留応力を求めた。
図6は、上記X線応力測定試験の結果を示したものである。同図に示す結果より、クロム層の残留応力は、あるオフタイムで最小(圧縮応力最大)となり、その最小となるオフタイムは、オンタイムの延長とともに長オフタイム側へずれている。なお、図6の□および△は、クロム層中にクロム水素化物(CrH)が混在したことを表している。
【0015】
実施例4
実施例1および実施例2で得られた各試料に200℃×2hの熱処理を施し、熱処理後、各試料について上記X線応力測定試験を行って残留応力を求めた。その結果、何れの試料とも、熱処理によりクロム層の残留応力は引張方向に変化していることが確認できた。次に、前記した熱処理後の残留応力から熱処理前の残留応力を減算し、その値を熱処理による残留応力値の変化量として、この変化量と上記実施例1および実施例2で得られた微視的な格子ひずみとの相関を調査した。なお、何れの試料とも、クロム層にはクラックは認められなかった。
図7は、上記調査結果を示したもので、熱処理による残留応力値の変化量と微視的な格子ひずみεとは密接に相関し、熱処理による残留応力値の変化量は微視的な格子ひずみεとともに直線的に増加している。このことは、微視的な格子ひずみεが小さいほど熱的に安定していることを意味し、200℃×2hの熱履歴にも十分に耐えるものとするには、微視的格子ひずみを3×10−3望ましくは1×10−3の範囲とするのよいことが判った。
【0016】
【発明の効果】
上記したように、本発明に係るクロムめっき部品およびその製造方法によれば、常温付近においてはもちろん、広範な熱履歴を経る場合にも優れた耐食性を発揮するクロムめっき部品を安定して得ることができる。
【図面の簡単な説明】
【図1】パルスめっき処理に用いるめっき浴の成分組成の一例を示す図表である。
【図2】パルスめっき処理におけるパルス波形の一例を示すグラフである。
【図3】加熱による応力変化量に及ぼす微視的な格子ひずみおよび加熱温度の影響を示すグラフである。
【図4】本発明の実施例1におけるX線回折試験およびX線応力測定試験の結果を示したもので、残留応力および微視的格子ひずみに及ぼすパルスのピーク電流密度の影響を示すグラフである。
【図5】本発明の実施例2におけるX線回折試験およびX線応力測定試験の結果を示したもので、残留応力および微視的格子ひずみに及ぼすめっき浴の温度の影響を示すグラフである。
【図6】本発明の実施例3におけるX線応力測定試験の結果を示したもので、残留応力に及ぼすパルス電流のオンタイムおよびオフタイムの影響を示すグラフである。
【図7】本発明の実施例4における熱履歴試験の結果を示したもので、熱処理による残留応力値の変化量に及ぼす微視的な格子ひずみの影響を示すグラフである。
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a chromium-plated component having a hard chromium layer deposited on a surface and a method for producing the same.
[0002]
[Prior art]
According to the general-purpose hard chromium plating process of depositing a hard chromium layer on the work surface, there are many cracks reaching the metal base in the obtained chromium layer, and as it is, the medium causing corrosion reaches the metal base. Inferior in corrosion resistance. Conventionally, for components used in corrosive environments, nickel plating or copper plating is generally applied as a pretreatment to form an underlayer with a thickness similar to that of the chromium plating layer. Was to be applied. However, according to such a countermeasure, the plating process must be performed twice by changing the process, so that an increase in manufacturing cost due to an increase in the number of processes is inevitable.
[0003]
On the other hand, it has been already confirmed that a so-called pulse plating process using a pulse current can form a chromium layer without cracks (for example, see Patent Documents 1 and 2). If this is the case, a chromium-plated part having excellent corrosion resistance can be obtained by one-step processing. However, according to the pulse plating process, there is a problem that large cracks (macrocracks) are likely to occur in the chromium layer when subjected to a heat history, and the application to components subjected to the heat history must be abandoned. Had become.
Therefore, the present inventors have conducted intensive studies on the occurrence of macrocracks and found that by applying a compressive residual stress of 100 MPa or more to the chromium layer, cracks can be prevented even at a heat history of 200 ° C. × 2 hours. This has already been disclosed in Patent Document 3.
[0004]
[Patent Document 1]
JP-B-43-20082 [Patent Document 2]
Japanese Patent Application Laid-Open No. 3-207888 [Patent Document 3]
Japanese Patent Application No. 2000-199095
[Problems to be solved by the invention]
However, when the chromium-plated part to which the compressive residual stress is applied is further subjected to additional experiments, it is found that the chromium-plated part has a compressive residual stress of less than 100 MPa (for example, −10 MPa residual stress). It was found that macrocracks did not occur even at a heat history of 200 ° C. × 2 hours depending on the processing conditions.
The present invention has been made in view of the above technical background, and an object of the present invention is to provide a chromium-plated part that exhibits excellent corrosion resistance even after extensive heat histories, An object of the present invention is to provide a manufacturing method capable of easily and stably obtaining parts.
[0006]
[Means for Solving the Problems]
Cracks occur when the thermal history is given, because the chromium layer shrinks, and this shrinkage is caused by the total amount of lattice defects and microscopic lattice strain that are often present at the crystal grain boundaries of the chromium layer. Affected. The present inventors have paid attention to the microscopic lattice distortion of the chromium layer, and have found that shrinking of the chromium layer due to thermal history can be suppressed by reducing the microscopic lattice distortion.
Therefore, a chromium-plated component according to the present invention for achieving the above object has a compressive residual stress, and in a chromium-plated component having a chrome layer without cracks, a microscopic lattice strain of the chromium layer is 0 to 1; It is characterized by being in the range of × 10 -3 .
Further, the chromium-plated component according to the present invention is a chromium-plated component having a crack-free chromium layer having a compressive residual stress of 100 MPa or more, wherein the chromium layer has a microscopic lattice strain of 0 to 3 × 10 −3. In the range.
In the chrome-plated component configured as described above, since the microscopic lattice distortion of the chromium layer is small, even if a thermal history is given, the chrome layer contraction caused by the release of the strain is suppressed, and as a result, the heat The occurrence of cracks due to the history is prevented.
The lattice strain of the chromium layer described above is greatly affected by the conditions of the pulse current and the temperature of the plating bath when performing the plating process.
Therefore, one of the methods of manufacturing a chromium-plated component according to the present invention for achieving the above object is to perform a plating process by adjusting a pulse current, to provide a crack-free chromium layer having a compressive residual stress on the work surface. In the method of manufacturing a chromium-plated component to be deposited, the pulse current is adjusted such that the microscopic lattice strain of the chromium layer is in the range of 0 to 1 × 10 −3 .
Another one of the production methods is a method for producing a chromium-plated component in which a plating process is performed by adjusting a pulse current, and a chromium layer without a crack having a compressive residual stress of 100 MPa or more is deposited on a work surface. The pulse current is adjusted so that the microscopic lattice distortion of the chromium layer is in the range of 0 to 3 × 10 −3 .
Furthermore, another one of the present manufacturing methods is a method of manufacturing a chromium-plated component in which a plating process is performed by adjusting a pulse current to deposit a chromium layer having no compressive residual stress of 100 MPa or more on a work surface and having no crack. The temperature of the plating bath is adjusted so that the microscopic lattice strain of the chromium layer is in the range of 0 to 3 × 10 −3 .
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described.
[0008]
In order to obtain the chromium-plated component according to the present invention, a so-called pulse plating process using a pulse current is performed. In this pulse plating process, a plating bath containing an organic sulfonic acid as shown in FIG. 1 is used. It is desirable to use. This plating bath has the same composition as that described in JP-B-63-32874, and contains 1 to 18 g / L of organic sulfonic acid based on chromic acid and sulfate group. It contains 5 to 12 g / L.
Incidentally, no organic sulfonic acid, chromic acid - may be used mixed catalyst bath containing sulfuric acid bath (Sargent bath) and silicofluoric product (SiF 6).
[0009]
As the waveform of the pulse current applied during pulse plating process, alternating between a maximum current density I U and the minimum current density I L as shown in FIG. 2, and the maximum current density I U and the minimum current density I L and the predetermined time T 1 and T 2 are held. Although the minimum current density IL is set to zero (off) here, it is needless to say that the minimum current density IL may be set to any value between the maximum current density IU and zero. Further, the holding time T 1 and T 2 may be set to be set to the same value different values.
[0010]
Here, the stress change of the chromium layer due to the temperature rise is a phenomenon caused by the thermal shrinkage of the chromium layer, and the amount of the stress change is correlated with the microscopic lattice strain ε of the chromium layer and the ambient temperature as shown in FIG. I do. The microscopic lattice strain ε can be obtained from the following Hall equation (1) by measuring the spread of the X-ray diffraction profile obtained by the X-ray diffraction method as a half width.
β · cos θ / λ = 1 / D + ε · sin θ / λ (1)
In this equation (1), β is the half width, D is the size of the crystallite, λ is the wavelength of the X-ray, and the half width β is measured by measuring the lattice planes {110} and {in the same direction. Perform at 220 °.
From the results shown in FIG. 3, the amount of change in the stress of the chromium layer due to heating is smaller as the microscopic strain ε is smaller, and is thermally stable. Further, the amount of change in stress changes with time, and the change gradually becomes smaller as time elapses. It stabilizes in about one month at room temperature, about one day at 150 ° C, and about 2 hours at 200 ° C.
[0011]
In the chromium-plated component manufactured in this manner, a compressive residual stress is applied to a crack-free chromium layer, and the microscopic lattice strain of the chromium layer is small. Is prevented and, as a result, excellent corrosion resistance is maintained.
[0012]
【Example】
Example 1
A steel rod (diameter 20 mm) made of JIS S45C was used as a test material, and a plating bath having a composition of chromic acid 252 g / L, sulfate group 3.1 g / L, and organic sulfonic acid 3.5 g / L was used. Bath temperature 61 ° C., maximum current density (peak current density) I U = 60, 80, 100, 120, 140, 160, 180, 200 A / dm 2 , minimum current density I L = 0 A / dm 2 ( 1), pulse plating under the conditions of holding time (on time) T 1 = 1.0 ms at maximum current density I U and holding time (off time) T 2 = 0.5 ms at minimum current density I L By performing the treatment, eight types of samples having a chromium layer having a thickness of about 10 μm on the work surface and having different initial residual stresses were obtained.
Then, for each sample obtained as described above, an X-ray diffraction test is performed to determine the half-value width β and the crystallite size D, and these values are substituted into the above-mentioned Hall equation (1) to substitute for the chromium layer. And the residual stress of the chromium layer was determined by performing an X-ray stress measurement test. The measurement of the initial residual stress was performed by using the “X-ray stress measurement method” described in “Non-Destructive Inspection”, Vol. Hereinafter, the present method was used for measuring the residual stress of the chromium layer.
FIG. 4 shows the results of the X-ray diffraction test and the X-ray stress measurement test. From the results shown in the figure, the residual stress of the chromium layer increases toward the compression side as the peak current density increases, and the microscopic lattice strain ε increases as the peak current density increases. Note that no crack was observed in the chromium layer in any of the samples.
[0013]
Example 2
Using the same test material and plating bath as in Example 1, bath temperature 56, 59, 61, 63, 65.5 ° C., maximum current density I U = 120 A / dm 2 , minimum current density I L = 0 A / dm 2 (pattern of FIG. 1), the pulse plating with a maximum current density I U on time T 1 = 1.0 ms at a minimum current density I L off time T 2 = 0.5 ms of conditions in, Five types of samples having a chromium layer having a thickness of about 10 μm on the work surface and having different initial residual stress were obtained. Then, an X-ray diffraction test and an X-ray stress measurement test were performed on each sample obtained as described above in the same manner as in Example 1, and the microscopic lattice strain ε and residual stress of the chromium layer were determined.
FIG. 5 shows the results of the X-ray diffraction test and the X-ray stress measurement test. From the results shown in the figure, the residual stress of the chromium layer increases toward the compression side as the bath temperature increases, and the microscopic lattice strain ε decreases as the bath temperature increases. Note that no crack was observed in the chromium layer in any of the samples.
[0014]
Example 3
Using the same test material and plating bath as in Example 1, bath temperature 61 ° C., maximum current density I U = 120 A / dm 2 , minimum current density I L = 0 A / dm 2 (pattern of FIG. 1), On time T 1 = 0.8, 1.2, 1.6 ms at the maximum current density I U and off time T 2 = 0.2, 0.3, 0.4, 0.5 at the minimum current density I L , 0.6, 0.7, and 0.8 ms, and 19 types of samples having a chromium layer having a thickness of about 10 μm on the surface of the work and having different initial residual stresses were obtained.
Then, an X-ray stress measurement test was performed on each of the samples obtained as described above in the same manner as in Example 1 to determine the residual stress of the chromium layer.
FIG. 6 shows the results of the X-ray stress measurement test. From the results shown in the figure, the residual stress of the chromium layer has a minimum (maximum compressive stress) at a certain off-time, and the minimum off-time shifts to the long off-time side with the extension of the on-time. Note that □ and Δ in FIG. 6 indicate that chromium hydride (CrH) was mixed in the chromium layer.
[0015]
Example 4
Each sample obtained in Example 1 and Example 2 was subjected to a heat treatment at 200 ° C. × 2 h, and after the heat treatment, each sample was subjected to the X-ray stress measurement test to determine the residual stress. As a result, it was confirmed that the residual stress of the chromium layer was changed in the tensile direction by the heat treatment in each of the samples. Next, the residual stress before the heat treatment is subtracted from the residual stress after the heat treatment, and the resulting value is regarded as the amount of change in the residual stress value due to the heat treatment. The correlation with the visual lattice strain was investigated. Note that no crack was observed in the chromium layer in any of the samples.
FIG. 7 shows the results of the above investigation, in which the change in the residual stress value due to the heat treatment is closely correlated with the microscopic lattice strain ε, and the change in the residual stress value due to the heat treatment is It increases linearly with the strain ε. This means that the smaller the microscopic lattice strain ε is, the more stable it is thermally. In order to sufficiently withstand the heat history of 200 ° C. × 2 h, the microscopic lattice strain must be reduced. It was found that the range was preferably 3 × 10 −3, more preferably 1 × 10 −3 .
[0016]
【The invention's effect】
As described above, according to the chromium-plated component and the method of manufacturing the same according to the present invention, it is possible to stably obtain a chromium-plated component exhibiting excellent corrosion resistance not only at around normal temperature but also after extensive heat history. Can be.
[Brief description of the drawings]
FIG. 1 is a chart showing an example of a component composition of a plating bath used for a pulse plating process.
FIG. 2 is a graph showing an example of a pulse waveform in a pulse plating process.
FIG. 3 is a graph showing the effects of microscopic lattice strain and heating temperature on the amount of stress change due to heating.
FIG. 4 is a graph showing the results of an X-ray diffraction test and an X-ray stress measurement test in Example 1 of the present invention, and is a graph showing an influence of a peak current density of a pulse on a residual stress and a microscopic lattice strain. is there.
FIG. 5 is a graph showing the results of an X-ray diffraction test and an X-ray stress measurement test in Example 2 of the present invention, and is a graph showing the effect of plating bath temperature on residual stress and microscopic lattice strain. .
FIG. 6 is a graph showing the results of an X-ray stress measurement test in Example 3 of the present invention, and is a graph showing the influence of the on-time and off-time of the pulse current on the residual stress.
FIG. 7 is a graph showing the results of a thermal hysteresis test in Example 4 of the present invention, and is a graph showing the effect of microscopic lattice strain on the amount of change in residual stress value due to heat treatment.

Claims (8)

圧縮残留応力を有する、クラックのないクロム層を有するクロムめっき部品において、前記クロム層の微視的な格子ひずみが0〜1×10−3の範囲にあることを特徴とするクロムめっき部品。A chromium-plated component having a crack-free chromium layer having a compressive residual stress, wherein the microscopic lattice strain of the chromium layer is in a range of 0 to 1 × 10 −3 . 100MPa以上の圧縮残留応力を有する、クラックのないクロム層を有するクロムめっき部品において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲にあることを特徴とするクロムめっき部品。A chromium-plated component having a crack-free chromium layer having a compressive residual stress of 100 MPa or more, wherein the chromium layer has a microscopic lattice strain in the range of 0 to 3 × 10 −3. parts. パルス電流を調整してめっき処理を行い、ワーク表面に圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜1×10−3の範囲となるようにパルス電流を調整することを特徴とするクロムめっき部品の製造方法。In a method of manufacturing a chromium-plated component in which a plating process is performed by adjusting a pulse current and a crack-free chromium layer having a compressive residual stress on a work surface is deposited, the chromium layer has a microscopic lattice strain of 0 to 1; A method for manufacturing a chrome-plated component, comprising adjusting a pulse current so as to be in a range of × 10 −3 . パルス電流を調整してめっき処理を行い、ワーク表面に100MPa以上の圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲となるようにパルス電流を調整することを特徴とするクロムめっき部品の製造方法。In a method of manufacturing a chrome-plated component that performs a plating process by adjusting a pulse current and has a compressive residual stress of 100 MPa or more on a work surface and deposits a chromium layer without cracks, the microscopic lattice strain of the chromium layer is A method for producing a chrome-plated component, comprising adjusting a pulse current so as to fall within a range of 0 to 3 × 10 −3 . 請求項3または4に記載のクロムめっき部品の製造方法において、パルス電流の最大電流密度および最小電流密度の大きさを調整することを特徴とするクロムめっき部品の製造方法。5. The method for producing a chromium-plated component according to claim 3, wherein the maximum current density and the minimum current density of the pulse current are adjusted. 請求項3乃至5のいずれか1項に記載のクロムめっき部品の製造方法において、パルス電流の最大電流密度および最小電流密度の保持時間を調整することを特徴とするクロムめっき部品の製造方法。The method for manufacturing a chrome-plated component according to any one of claims 3 to 5, wherein the holding time of the maximum current density and the minimum current density of the pulse current is adjusted. パルス電流を調整してめっき処理を行い、ワーク表面に圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜1×10−3の範囲となるようにめっき浴の温度を調整することを特徴とするクロムめっき部品の製造方法。In a method of manufacturing a chromium-plated component in which a plating process is performed by adjusting a pulse current and a crack-free chromium layer having a compressive residual stress on a work surface is deposited, the chromium layer has a microscopic lattice strain of 0 to 1; A method for producing a chromium-plated part, comprising adjusting the temperature of a plating bath so as to be in the range of 10-3 . パルス電流を調整してめっき処理を行い、ワーク表面に100MPa以上の圧縮残留応力を有する、クラックのないクロム層を析出させるクロムめっき部品の製造方法において、前記クロム層の微視的な格子ひずみが0〜3×10−3の範囲となるようにめっき浴の温度を調整することを特徴とするクロムめっき部品の製造方法。In a method of manufacturing a chrome-plated component that performs a plating process by adjusting a pulse current and has a compressive residual stress of 100 MPa or more on a work surface and deposits a chromium layer without cracks, the microscopic lattice strain of the chromium layer is A method for producing a chromium-plated part, comprising adjusting the temperature of a plating bath so as to fall within a range of 0 to 3 × 10 −3 .
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008138247A (en) * 2006-11-30 2008-06-19 Hitachi Ltd Chrome plating apparatus
KR20180005180A (en) 2015-05-12 2018-01-15 히다치 오토모티브 시스템즈 가부시키가이샤 METHOD OF MANUFACTURING CHROME PLATED PARTS AND CHROME PLATING DEVICE
KR20220043575A (en) 2020-09-29 2022-04-05 주식회사 원탑플레이팅 A method for producing a chromium plated part and achromium plating apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008138247A (en) * 2006-11-30 2008-06-19 Hitachi Ltd Chrome plating apparatus
KR20180005180A (en) 2015-05-12 2018-01-15 히다치 오토모티브 시스템즈 가부시키가이샤 METHOD OF MANUFACTURING CHROME PLATED PARTS AND CHROME PLATING DEVICE
US10851464B1 (en) 2015-05-12 2020-12-01 Hitachi Automotive Systems, Ltd. Method for producing chromium plated parts, and chromium plating apparatus
KR20220043575A (en) 2020-09-29 2022-04-05 주식회사 원탑플레이팅 A method for producing a chromium plated part and achromium plating apparatus

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