JP2004288857A - Method for manufacturing semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress work hours and manufacturing costs which increase with the increase of the number of semiconductor elements to be manufactured. <P>SOLUTION: A semiconductor substrate 12 yet to be cut and separated into elements, a lead frame 54 which is an integration of a plurality of terminals 64 formed over a plurality of elements and coupling portions 62 for coupling the plurality of terminals 64, and an insulating plate 52, are stuck to each other for cutting and separating into individual elements along dividing lines L. In the separation into the individual elements, the terminals 64 are divided into individual terminals 58, 60 with the cutting of the coupling portions 62. Thus, the terminals 58, 60 are electrically separated. The number of processes required for forming the terminals is not proportional to the number of elements, but to the number of the dividing lines L, i.e. a square root of the number of elements. Therefore, work hours and manufacturing costs which increase with the increase of the number of elements can be suppressed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor.
[0002]
[Prior art]
With the recent increase in the density of wiring on printed wiring boards, the miniaturization of semiconductor elements mounted on printed wiring boards has been progressing. Among them, a chip size package in which a chip and a lead frame (insulating substrate) have the same size has been devised. (For example, see Patent Documents 1 and 2)
This chip size package can cut and separate each semiconductor element after bonding a plurality of uncut chips and a plurality of lead frames, so that the separated chips are mounted one by one on the lead frame. There is an advantage that a placing step is unnecessary.
[0003]
However, conventionally, since the terminals of the lead frame are individually formed for each semiconductor element, there has been a problem that work time and manufacturing cost increase in proportion to the number of semiconductor elements to be manufactured.
[0004]
[Patent Document 1]
JP 2002-329850 A [Patent Document 2]
Japanese Patent Application Laid-Open No. 2002-198463
[Problems to be solved by the invention]
The present invention has been made in view of the above facts, and in a manufacturing method of cutting and separating each semiconductor element after bonding a semiconductor substrate and an insulating substrate, a work time associated with an increase in the number of semiconductor elements to be manufactured, An object is to suppress an increase in manufacturing cost.
[0006]
[Means for Solving the Problems]
The semiconductor manufacturing method according to claim 1, wherein the semiconductor substrate is provided with a plurality of semiconductor films formed in a predetermined pattern and a plurality of electrodes respectively connected to the semiconductor film, and the semiconductor film is connected to a printed wiring board. The semiconductor film, the electrode, and a plurality of terminals for causing an insulating substrate provided at a location corresponding to the electrode to be bonded to each other by providing a conductive adhesive layer between the electrode and the terminal. And a semiconductor manufacturing method for cutting and separating the semiconductor element configured by the terminal, wherein the terminal of the insulating substrate is formed over a cutting line of the semiconductor element, and when cutting and separating each semiconductor element, The terminal is divided into each semiconductor element.
[0007]
The semiconductor manufacturing method according to claim 1, wherein the semiconductor substrate and the insulating substrate before being cut and separated into the semiconductor element including the semiconductor film, the electrode, and the terminal are separated by a conductive adhesive layer between the electrode and the terminal. Are provided and bonded, and then cut and separated along a cutting line of each semiconductor element. At this time, a terminal formed over the cutting line is divided into each semiconductor element.
[0008]
Here, when terminals are individually formed on each semiconductor element, the number of terminals is proportional to the number of elements. However, since the number of terminals is reduced by forming the terminals over the cutting line, the labor required for the continuity test is reduced. Further, the manufacture of the mask becomes easy. Therefore, even if the number of semiconductor elements to be manufactured increases, an increase in the manufacturing cost of the insulating substrate due to the increase in the number of semiconductor elements can be suppressed.
[0009]
The semiconductor manufacturing method according to claim 2 is the semiconductor manufacturing method according to claim 1, wherein at least one of the semiconductor substrate and the insulating substrate is formed of a light-transmitting material, and the semiconductor film is formed of III-. It is a group V compound semiconductor film.
[0010]
In the semiconductor device manufactured by the semiconductor manufacturing method according to the second aspect, the semiconductor substrate or the insulating substrate transmits light and makes the light enter the III-V compound semiconductor film. Thus, the semiconductor element can function as a light emitting element or a light receiving element.
[0011]
A semiconductor manufacturing method according to a third aspect is the semiconductor manufacturing method according to the first or second aspect, wherein the semiconductor substrate and the insulating substrate are attached to each other and fixed on a fixing member. A first step of cutting along the cutting line with a tool, a second step of injecting and curing a molten resin into a cutting groove, and a fine-blade cutting tool for thinning the solid resin in which the molten resin is hardened than the cutting groove And a third step of separating each semiconductor element and forming a protective film on the side surface of each semiconductor element.
[0012]
In the semiconductor manufacturing method according to the third aspect, in the first step, after the semiconductor substrate and the insulative substrate are bonded and fixed on the fixing member, each semiconductor element is cut along the cutting line with a thick blade cutting tool. To divide. Next, in a second step, a molten resin is injected into a cut groove between the semiconductor elements formed by cutting each semiconductor element, and is cured.
[0013]
Then, in a third step, the solid resin in which the molten resin is cured is cut by a fine-blade cutting tool smaller than the cutting groove to separate each semiconductor element and to form a protective film on a side surface of each semiconductor element.
[0014]
This protective film reinforces the adhesive strength between the semiconductor substrate and the insulating substrate. In the case where the semiconductor element is a light emitting element or a light receiving element, the use of an opaque resin material prevents light from entering from the side surface and improves optical characteristics. Furthermore, compared with the method of separately coating the side surface of the semiconductor element, the protective film can be reliably applied only to the side surface without blocking the optical path with the resin.
[0015]
According to a fourth aspect of the present invention, there is provided the semiconductor manufacturing method according to any one of the first to third aspects, wherein the conductive adhesive layer is formed of a conductive paste.
[0016]
In a semiconductor manufacturing method according to a fourth aspect, a conductive adhesive layer for connecting an electrode and a terminal is formed of a conductive paste. Therefore, a complicated operation of connecting with a bonding wire is not required. Further, since the conductive paste can be applied all at once by screen printing or the like, workability is improved.
[0017]
A semiconductor manufacturing method according to a fifth aspect is the semiconductor manufacturing method according to any one of the first to fourth aspects, wherein the insulating substrate connects a plurality of the semiconductor terminals and cuts and separates each semiconductor element. When the connecting portion cut from the terminal and the terminal are integrally formed of a conductive material with a lead frame, the terminal of the lead frame is surrounded by the terminal and the connecting portion, and when each semiconductor element is cut and separated. And an insulating plate divided into each semiconductor element.
[0018]
In the semiconductor manufacturing method according to the fifth aspect, a lead frame in which a plurality of terminals are connected by a connecting portion, an insulating plate surrounded by the terminals of the lead frame and the connecting portion are attached to the semiconductor substrate, and the semiconductor film is insulated. Insulated and protected by a plate.
[0019]
As described above, since all the terminals are integrally formed and each terminal functions independently for the first time when each semiconductor element is cut and separated, the steps required for forming the terminals include etching of the lead frame and the like. And a step of dividing the lead frame into each element.
[0020]
Here, the step of forming the lead frame is performed in one process regardless of the number of semiconductor elements, and the number of working steps in the step of dividing the lead frame is proportional to the number of cutting lines dividing each semiconductor element.
[0021]
That is, in the step of forming the terminal, there is no so-called O (n) step which is proportional to the number of semiconductor elements to be manufactured, and there is no so-called O (n ^0.5 ) step which is proportional to the square root of the number of semiconductor elements. (Details will be described later). Therefore, even if the number of semiconductor elements to be manufactured increases, it is possible to suppress an increase in work time and manufacturing cost accompanying the increase in the number of semiconductor elements.
[0022]
The semiconductor manufacturing method according to claim 6 is the semiconductor manufacturing method according to claim 5, wherein the insulating plate flows molten resin between the terminal of the lead frame and the connecting portion, and is cured. It is characterized by forming by making it.
[0023]
7. The semiconductor manufacturing method according to claim 6, wherein a molten resin is poured between a terminal of the lead frame and the connecting portion, and is cured to form an insulating plate. For this reason, it is possible to form an optical condensing means and the like which will be described later when the molten resin is cured. Also, the step of attaching the insulating plate can be reduced, and the working efficiency is improved.
[0024]
A semiconductor manufacturing method according to a seventh aspect is the semiconductor manufacturing method according to the fifth or sixth aspect, wherein an optical means is provided as the insulating plate.
[0025]
This eliminates the need to provide a mounting portion for mounting a new optical means, and does not hinder miniaturization of the semiconductor element.
[0026]
In addition, the optical means here is a condensing function such as a lens that converges light, a scattering function such as a scattering plate that scatters light, a dimming function such as reducing light, and a reflection plate. A means for realizing a reflection function of reflecting light or a refraction function of refracting light, such as a prism, is not limited thereto, as long as it is a means for realizing an optical function.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a first embodiment will be described with reference to the drawings.
[0028]
The III-V compound semiconductor device (hereinafter, referred to as a semiconductor device) 10 according to the first embodiment shown in FIGS. 1A and 1B includes, as shown in FIGS. After laminating the semiconductor substrate 12 and the insulating substrate 14 before being cut and separated, each semiconductor element 10 is obtained by cutting and separating at the cutting line L (shown by a two-dot chain line in FIGS. 2 and 3). .
[0029]
As shown in FIGS. 1A and 1B, a semiconductor element 10 is configured by bonding a chip 16 cut and separated from a semiconductor substrate 12 and a base 18 cut and separated from an insulating substrate 14. I have.
[0030]
The substrate 20 of the chip 16 is a glass substrate that transmits light. A transparent electrode 22 such as ITO is deposited on the bonding surface of the substrate 20 with the base 18 by sputtering, and a III-V compound semiconductor film (hereinafter, referred to as a semiconductor film) such as gallium nitride (GaN) is formed on the transparent electrode 22. 24) are formed.
[0031]
The transparent electrode 22 is not deposited on one corner 20A of the substrate 20 and the substrate 20 is exposed. The gold electrode 26 extends to the upper surface of the semiconductor film 24 along the end of the corner 20A.
[0032]
Further, a gold electrode 28 is formed in a corner 20B which is covered with the transparent electrode 22 and is adjacent to the corner 20A. Thus, the semiconductor film 24 can be electrically connected to the outside via the transparent electrode 22 and the gold electrodes 26 and 28.
[0033]
The base 18 that conducts the semiconductor film 24 to the printed wiring board and protects and insulates the semiconductor film 24 is made of glass epoxy resin. The base 18 is formed with a fan-shaped through hole 18A having a central angle of about 90 ° corresponding to the gold electrodes 26 and 28, from the surface joined with the gold electrodes 26 and 28 to the wall surface of the through hole 18A, and A copper foil is coated over the back surface to be joined to a land (not shown) of the printed wiring board to form a through-hole terminal 30. The gold electrodes 26 and 28 and the through-hole terminals 30 are conductively bonded by a conductive paste 32 (see FIG. 2). As a result, conduction between the chip 16 and the printed wiring board can be established.
[0034]
Further, since both the substrate 20 and the base 18 are formed of a light transmissive material, light can be incident on the semiconductor film 24 from both directions on the surface side of the semiconductor element 10 and on the printed wiring board side.
[0035]
The side surface of the semiconductor element 10 is covered with a protective film 34 formed of an opaque epoxy resin. The side surface of the semiconductor element 10 is shielded from light by the protective film 34, and the optical function of the light emitting element or the light receiving element is improved. Further, the adhesion between the chip 16 and the base 18 is reinforced by the protective film 34.
[0036]
In the case where the semiconductor element 10 is a light emitting element, if the refractive index of light of the protective film 34 is large and the refractive index of light of the chip 16 and the base 18 is large, light may be reflected and scattered on the side surface. Occur. For this reason, when the semiconductor element 10 is a light emitting element, the protective film 34 is formed of a material in which fine particles that absorb light such as carbon are dispersed in a transparent resin having a small difference in the refractive index of light between the chip 16 and the base 18. Is preferred.
[0037]
Now, a method for manufacturing the semiconductor element 10 will be described.
[0038]
As shown in FIG. 2, the chips 16 are arranged on the semiconductor substrate 12 in the same direction in each row in the direction of arrow A in the figure, and the directions of the columns in the direction of arrow B in the figure are inverted by 180 degrees. Then, the gold electrodes 26 and 28 are densely arranged around the intersection P of the cutting line L, and are formed as one gold electrode 36 straddling the cutting line L.
[0039]
The base 18 is arranged on the insulating substrate 14 so that the through-hole terminals 30 are densely arranged at the intersection P of the cutting line L. 38.
[0040]
Then, a conductive paste 32 which is a thermosetting resin is applied to a portion of the through-hole terminal 38 facing the gold electrode 36 by a method such as screen printing or stamping, and the side surfaces of the semiconductor substrate 12 and the insulating substrate 14 are aligned. Paste and temporarily fix. Then, the conductive paste 32 is cured by heating at 160 ° C. for 30 minutes.
[0041]
Next, as shown in FIG. 3 and FIG. 4A, the semiconductor substrate 12 and the insulating substrate 14 are fixed by sticking the insulating substrate 14 side to a dicing tape 40, and cut along a cutting line L by a thick blade cutting tool 42. Each semiconductor element 10 is cut and separated. At this time, the circular through-hole terminal 38 formed over the plurality of semiconductor elements 10 is divided into the respective semiconductor elements 10 to form the fan-shaped through-hole terminals 30.
[0042]
Here, when the through-hole terminals 38 are individually formed in the respective semiconductor elements 10, the number of the through-hole terminals 38 is a so-called O (n) that is proportional to the number of the semiconductor elements 10. However, by forming the through-hole terminals 38 over the cutting line L, the number of the through-hole terminals 38 can be reduced. Therefore, even if the number of manufactured semiconductor elements 10 increases, it is possible to suppress an increase in manufacturing costs due to the increase in the number of manufactured semiconductor elements.
[0043]
Next, as shown in FIG. 4B, a molten resin 46 such as epoxy is filled in a cutting groove 44 formed between the semiconductor elements 10 by cutting each semiconductor element 10 with a thick blade cutting tool 42. Inject and cure. Then, as shown in FIG. 4C, the central portion of the solid resin 47 in which the molten resin 46 is hardened is cut by a thin blade cutting tool 48 smaller than the cutting groove 44.
[0044]
As a result, as shown in FIG. 4D, each semiconductor element 10 is cut and divided, and the solid resin 47 remains on the side surface of each semiconductor element 10 as the protective film 34. Therefore, in comparison with the method of separately coating the side surface of the semiconductor element 10 with a protective film by spraying or the like, it is possible to reliably coat the side surface of each semiconductor element 10 with the protective film 34 without blocking the optical path with the solid resin 47. Then, as shown in FIG. 4E, when the separated semiconductor elements 10 are peeled off from the dicing tape 40, the semiconductor element 10 shown in FIG. 1 is obtained.
[0045]
Next, a second embodiment will be described. The same components as those in the first embodiment are denoted by the same reference numerals.
[0046]
The group III-V compound semiconductor device (hereinafter, referred to as a semiconductor device) 50 shown in FIGS. 5A and 5B is a semiconductor device in which each semiconductor device 50 is not cut and separated as shown in FIGS. After bonding the substrate 12, the insulating plate 52, and the lead frame 54, the semiconductor element is obtained by cutting and separating each semiconductor element along a cutting line L (shown by a two-dot chain line in FIGS. 2, 6, and 7).
[0047]
As shown in FIGS. 5A and 5B, the semiconductor element 50 has a chip 16 cut and separated from the semiconductor substrate 12, a window material 56 cut and separated from the insulating plate 52, and a lead frame 54. The separated terminals 58 and 60 are bonded together.
[0048]
The terminal 58 is provided facing the gold electrode 26, and the terminal 60 is provided facing the gold electrode 28, and is conductively bonded by the conductive paste 32 (see FIG. 6). Although a cut piece 62A of the connecting portion 62 described later protrudes from the terminal 60, the cut piece 62A is not in contact with the gold electrode 26, and the gold electrode 26 and the gold electrode 28 do not directly conduct.
[0049]
Further, a window material 56 is fitted between the terminals 58 and 60 and the protective film 34 to insulate and protect the semiconductor film 24. The window material 56 is formed of a material such as a glass epoxy resin that transmits light, and allows light to enter the semiconductor film 24 from both sides of the surface of the semiconductor element 50 and the printed wiring board.
[0050]
Now, a method for manufacturing the semiconductor element 50 will be described.
[0051]
As shown in FIG. 6, the terminals 58 and 60 are densely arranged at the intersection P of the cutting line L on the lead frame 54, and are formed as one terminal 64 extending over the cutting line L. Then, the terminals 64 arranged in the direction of arrow A in the figure are connected by the connecting portion 62, and further, they are connected by the frame 68. The terminals 58 and 60 are also formed on the frame 68. The lead frame 54 is formed by etching or pressing a conductive material such as a copper plate or a brass plate.
[0052]
Further, two rows of window members 56 are arranged on the insulating plate 52 in the direction of arrow B and an arbitrary number of windows 56 are arranged in the direction of arrow A.
[0053]
Then, the conductive paste 32 is applied to the terminals 64 of the lead frame 54 by a method such as screen printing or stamping, and the insulating plate 52 is fitted into the space 54A of the lead frame 54 as shown in FIG. The insulating plate 52 is bonded to the surface of the chip 16 on which the semiconductor film 24 is formed. Then, the conductive paste 32 is cured by heating at 160 ° C. for 30 minutes.
[0054]
At this time, if the difference in the coefficient of thermal expansion between the semiconductor substrate 12 and the lead frame 54 is large, the bonding position shifts due to the thermal expansion. Therefore, the difference in the coefficient of thermal expansion between the semiconductor substrate 12 and the lead frame 54 is as small as possible. Is preferred. If the difference in the coefficient of thermal expansion between the semiconductor substrate 12 and the lead frame 54 cannot be reduced, this problem can be solved by using a non-thermosetting conductive paste.
[0055]
The insulating plate 52 may be formed such that a transparent molten resin is poured into the space 54A of the lead frame 54 bonded to the chip 16 without molding before bonding.
[0056]
Then, each semiconductor element 50 is cut and separated by the thick blade cutting tool 42. At this time, the terminal 64 formed over the four semiconductor elements 50 is divided into the terminals 58 and 60. Further, the connecting portion 62 is cut.
[0057]
Here, since the connecting portion 62 is inclined with respect to the cutting line L, when the connecting portion 62 is cut by the thick blade cutting tool, it is completely separated, and the terminal 58 and the terminal 60 are electrically separated. Then, by forming the protective film 34 on the side surface of the semiconductor element 50 in the same manner as in the first embodiment, the semiconductor element 50 is obtained.
[0058]
As described above, all the terminals 58 and 60 are integrally formed, and when the semiconductor elements 50 are cut and separated, the terminals 58 and 60 are electrically separated from each other. The only work steps required are a step of etching a copper plate or the like irrespective of the number of semiconductor elements 50 and a step of cutting along the cutting line L together with the chip 14 and the insulating plate 52.
[0059]
Here, the number of cutting lines L of the 36 semiconductor elements 50 shown in the figure is 14, and the number of the cutting lines L is the number of steps required for the step of cutting and separating the semiconductor elements 50. If the number (n) of the semiconductor elements 50 is 4, 9,..., 144, 169, the number of cutting lines L is as shown in the table of FIG. It can be seen from the table of FIG. 8 that the ratio between the square root of the number of elements (n ^0.5 ) and the number of cutting lines L is substantially constant (about 2.36).
[0060]
That is, the number L of the cutting lines is proportional to the square root (n ^0.5 ) of the number of elements, and the number of working steps required to form the terminals 58 and 60 is O (n ^0.5 ). Therefore, it is possible to suppress an increase in the operation time and manufacturing cost associated with an increase in the number of elements (n).
[0061]
Next, a third embodiment will be described. The same components as those in the first and second embodiments are denoted by the same reference numerals.
[0062]
As shown in FIGS. 10 and 11, a III-V compound semiconductor device (hereinafter, referred to as a semiconductor device) 70 shown in FIG. 9 has a semiconductor substrate 12 and a prism plate 72 before each semiconductor device 70 is cut and separated. , And the lead frame 54 are bonded, and each semiconductor element 70 is obtained by cutting and separating the semiconductor element 70 along a cutting line L (shown by two-dot chain lines in FIGS. 10 and 11). The semiconductor device 50 of the second embodiment is different from the semiconductor device 50 of the second embodiment only in that the window member 56 is changed to a prism 74. Only this difference will be described.
[0063]
As shown in FIG. 9, the prism 74 has an inclined surface protruding from the surface of the chip 16 on which the semiconductor film 24 is formed. The prism 74 is formed of quartz glass, CYTOP (trade name: manufactured by Asahi Glass), polyethylene, or the like that transmits ultraviolet light, and refracts light incident obliquely on the prism 74 to the light receiving surface of the gold electrode 26. Make it incident.
[0064]
Now, a method for manufacturing the semiconductor element 70 will be described.
[0065]
As shown in FIG. 10, on the prism plate 72, the prisms 74 are arranged in two rows in the width direction of the space 54A of the lead frame 54 and continuously arranged in an arbitrary number in the longitudinal direction of the space 54A.
[0066]
Then, as shown in FIG. 11, the prism plate 72 is fitted into the space 54A of the lead frame 54, and each semiconductor element 70 is cut and separated at the cutting line L by the thick blade cutting tool 42. At this time, the prism 74 is divided into the semiconductor elements 70.
[0067]
In this embodiment, the prism plate 72 is formed before bonding. However, when a transparent resin is poured into the space 54A of the lead frame 54 and the resin is cured, the resin is processed into the shape of the prism 74. You may do so.
[0068]
In the present embodiment, the prism 74 has been described. However, a lens, a diffusion plate, or the like may be used instead.
[0069]
As described above, in the first to third embodiments, the group III-V compound semiconductor device has been described as an example. However, the present invention can be applied to a semiconductor device of another chip size package.
[0070]
【The invention's effect】
Since the present invention is configured as described above, in a manufacturing method of cutting and separating each semiconductor element after bonding a semiconductor substrate and an insulating substrate, it is possible to suppress an increase in work time and an increase in manufacturing cost due to an increase in the number of semiconductor elements to be manufactured. Can be.
[Brief description of the drawings]
FIG. 1A is a plan view showing a semiconductor device according to a first embodiment.
(B) It is BB sectional drawing of (A).
FIG. 2 is a perspective view illustrating the method for manufacturing the semiconductor device according to the first embodiment.
FIG. 3 is a perspective view illustrating a method for manufacturing a semiconductor device according to the first embodiment. FIG. 4A is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to the first embodiment.
FIG. 3B is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment;
FIG. 2C is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment.
FIG. 3D is a sectional view illustrating the method for manufacturing the semiconductor element according to the first embodiment.
FIG. 5E is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment;
FIG. 5A is a plan view showing a semiconductor device according to a second embodiment.
(B) It is BB sectional drawing of (A).
FIG. 6 is a perspective view illustrating a method for manufacturing a semiconductor device according to a second embodiment. FIG. 7 is a perspective view illustrating a method for manufacturing a semiconductor device according to a second embodiment. 10 is a table showing a relationship between the number of elements and the number of cutting lines in the method for manufacturing a semiconductor element according to the embodiment.
FIG. 9 is a cross-sectional view illustrating a semiconductor device according to a third embodiment.
FIG. 10 is a perspective view illustrating a method for manufacturing a semiconductor device according to a third embodiment.
FIG. 11 is a perspective view illustrating a method for manufacturing a semiconductor device according to a third embodiment.
[Explanation of symbols]
Reference Signs List 10 semiconductor element 12 semiconductor substrate 14 insulating substrate 24 semiconductor film 32 conductive paste (conductive adhesive layer)
34 Protective film 36 Gold electrode (electrode)
38 Gold electrode (electrode)
40 Dicing tape (fixing member)
42 Thick blade cutting tool 44 Cutting groove 46 Molten resin 47 Solid resin 48 Fine blade cutting tool 50 Semiconductor element 52 Insulating plate 54 Lead frame 62 Connecting part 64 Terminal 68 Frame (connecting part)
70 semiconductor element 72 prism plate (insulating plate)
74 prism (optical means)

Claims (7)

A semiconductor substrate formed with a plurality of semiconductor films formed in a predetermined pattern and a plurality of electrodes respectively conducting to the semiconductor film, and a plurality of terminals for conducting the semiconductor film to a printed wiring board correspond to the electrodes. A conductive adhesive layer provided between the electrode and the terminal, and bonding the insulating substrate provided at the position to be cut into a semiconductor element including the semiconductor film, the electrode, and the terminal. A semiconductor manufacturing method for separating,
A method of manufacturing a semiconductor device, comprising: forming the terminal of the insulating substrate over a cutting line of each semiconductor element; and dividing the semiconductor element when cutting and separating each semiconductor element. 2. The method according to claim 1, wherein at least one of the semiconductor substrate and the insulating substrate is formed of a translucent material, and the semiconductor film is a III-V compound semiconductor film. After bonding the semiconductor substrate and the insulating substrate and fixing them on a fixed member, a first step of cutting along the cutting line with a thick blade cutting tool,
A second step of injecting molten resin into the cut grooves and curing the resin;
A third step of cutting the solid resin obtained by curing the molten resin with a fine-blade cutting tool smaller than the cutting groove, separating each semiconductor element, and forming a protective film on a side surface of each semiconductor element;
The method for manufacturing a semiconductor according to claim 1, further comprising: 4. The method according to claim 1, wherein the conductive adhesive layer is formed of a conductive paste. The insulating substrate,
When connecting the plurality of semiconductor terminals and cutting and separating each semiconductor element, a connection portion cut from the terminal and the terminal and a lead frame formed integrally with a conductive material,
An insulating plate that is surrounded by the terminals and the connecting portion of the lead frame and is divided into the respective semiconductor elements when the respective semiconductor elements are cut and separated,
5. The semiconductor manufacturing method according to claim 1, wherein: The method according to claim 5, wherein the insulating plate is formed by pouring a molten resin between the terminal of the lead frame and the connecting portion and curing the molten resin. 7. The method according to claim 5, wherein an optical means is provided as the insulating plate.

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