JP2004286607A - Power source voltage detecting circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To restrain detection precision of a power source voltage from getting low owing to dispersion of circuit elements. <P>SOLUTION: This circuit is provided with: current source circuits Tn2, Tn3 for outputting a current based on a voltage level of a power source V1; a resistance R4 connected between the current source circuits Tn2, Tn3 and a power source V2; current mirror circuits Tp2, Tp3 operated based on the output currents from the current source circuits Tn2, Tn3; and a logical gate 1 for determining a logic of a connection node N2 for the current mirror circuits Tp2, Tp3 and the current source circuits Tn2, Tn3. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power supply voltage detection circuit that detects a power supply voltage supplied to a semiconductor device and generates a power-on reset signal and the like.
[0002]
A portable electronic device that operates using a battery as a power supply is equipped with a power supply voltage detection circuit that generates a power-on reset signal based on a normal supply of a power supply voltage when the power is turned on. In such a power supply voltage detection circuit, it is necessary to ensure the accuracy of the voltage detection operation regardless of the fluctuation of the power supply voltage.
[0003]
[Prior art]
FIG. 6 shows an example of a conventional power supply voltage detection circuit. The high-potential power supply V1 is supplied to the anode of the diode D, and the cathode of the diode D is connected to the low-potential power supply V2 via the resistor R1.
[0004]
The cathode of diode D is connected to P-channel MOS transistor Tp1 and N-channel MOS transistor Tn1. The high-potential-side power supply V1 is supplied to the source of the transistor Tp1, and the low-potential-side power supply V2 is supplied to the source of the transistor Tn1.
[0005]
Then, an output signal OUT is output from the drains of the transistors Tp1 and Tn1.
In the power supply voltage detection circuit configured as described above, a voltage lowered by the threshold value of the diode D is supplied to the gates of the transistors Tp1 and Tn1 from the high potential side power supply V1.
[0006]
When the power is turned on, the voltage of the diode D is lowered from the high potential power supply V1 to the gates of the transistors Tp1 and Tn1 as the voltage of the high potential power supply V1 increases.
[0007]
Therefore, immediately after the power is turned on, the transistor Tp1 is turned on, and the voltage of the output signal OUT rises with the rise of the voltage of the high-potential power supply V1, and the output signal OUT is eventually turned on by the on operation of the transistor Tn1. The voltage falls to the voltage level of the power supply V2.
[0008]
Such an output signal OUT is supplied as, for example, a power-on reset signal.
The power supply voltage detection circuit as described above is disclosed in Patent Document 1.
[0009]
[Patent Document 1]
JP-A-11-272813
[0010]
[Problems to be solved by the invention]
In the power supply voltage detection circuit as described above, when the voltage of the high-potential-side power supply V1 rises until the cathode potential of the diode D becomes a potential that turns on the transistor Tn1, the output signal OUT falls.
[0011]
Therefore, the high-potential-side power supply voltage when the output signal OUT falls is determined by the threshold value of the diode D, and the variation in the threshold value greatly affects the fall timing of the output signal OUT. Exert.
[0012]
As a result, there is a problem that the detection accuracy of the power supply voltage cannot be sufficiently ensured.
Further, since a voltage lower than the voltage value of the high-potential-side power supply V1 by the threshold value of the diode D is input to the gate of the transistor Tn1, the high-potential-side power supply V1 has a voltage corresponding to the threshold value of the diode D. After that, the transistor Tn1 is turned on soon, and the output signal OUT is inverted.
[0013]
Therefore, there is a problem that the high-potential-side power supply voltage when the output signal OUT falls cannot be set to a voltage sufficiently higher than the threshold value of the diode D1.
Further, since current always flows from the high-potential-side power supply V1 to the low-potential-side power supply V2 via the diode D and the resistor R1, there is also a problem that current consumption increases.
[0014]
On the other hand, when a power-on reset signal is generated using a Schmitt trigger circuit, the voltage at which the output signal is inverted differs between when the power supply voltage rises and when it falls, due to its hysteresis characteristics. There is a problem that sufficient accuracy cannot be ensured.
[0015]
An object of the present invention is to provide a power supply voltage detection circuit capable of suppressing a decrease in power supply voltage detection accuracy due to variations in circuit elements.
[0016]
[Means for Solving the Problems]
A resistor is connected between the current source circuit that outputs a current based on the voltage level of the power source and the power source, and a current mirror circuit that operates based on the output current of the current source circuit is provided. The logic of a connection node between the current mirror circuit and the current source circuit is determined by a logic gate.
[0017]
The potential difference between the high-potential-side power supply and the low-potential-side power supply is divided by a voltage dividing circuit, and the divided voltage is input to the gates of a pair of N-channel MOS transistors. A resistor is connected between the source of the N-channel MOS transistor and a low-potential power supply, and is connected between the drain of the N-channel MOS transistor and the high-potential power supply based on the drain current of one N-channel MOS transistor. A pair of P-channel MOS transistors that perform a current mirror operation are connected. The logic of the connection node between the N-channel MOS transistor and the P-channel MOS transistor is determined by a logic gate.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
(First embodiment)
FIG. 1 shows a first embodiment of a power supply voltage detection circuit embodying the present invention. Resistors R2 and R3 are connected in series between the high-potential-side power supply V1 and the low-potential-side power supply V2 to form a voltage dividing circuit, and a node N1 which is a connection point between the resistors R2 and R3 has a high potential. A divided voltage is generated by dividing the potential difference between the side power supply V1 and the low potential side power supply V2 by the resistance values of the resistors R2 and R3.
[0019]
The node N1 is connected to the gates of N-channel MOS transistors Tn2 and Tn3, and the sources of the transistors Tn2 and Tn3 are connected to a low potential power supply V2 via a resistor R4. N-channel MOS transistors Tn2 and Tn3 operate as a current source circuit based on the potential of node N1.
[0020]
The drain of the transistor Tn2 is connected to a high-potential power supply V1 via a P-channel MOS transistor Tp2, and the drain of the transistor Tn3 is connected to a high-potential power supply V1 via a P-channel MOS transistor Tp3.
[0021]
The gates of the transistors Tp2 and Tp3 are connected to each other and to the drain of the transistor Tp2. Therefore, the transistors Tp2 and Tp3 operate as a current mirror circuit.
[0022]
The node N2, which is the drain of the transistors Tp3 and Tn3, is connected to the input terminal of the buffer circuit 1. The buffer circuit 1 is supplied with a high-potential-side power supply V1 and a low-potential-side power supply V2. The buffer circuit 1 outputs the voltage value of the low-potential-side power supply V2 as the output signal OUT when the potential of the node N2 is lower than a predetermined voltage set in advance. It operates as a logic gate that outputs the voltage value of V1 as an output signal OUT.
[0023]
Next, the operation of the power supply voltage detection circuit configured as described above will be described. When the power supply is turned on and the high potential side power supply V1 rises, the potential of the node N1 rises.
When the potential difference between the node N1 and the low-potential-side power supply V2 becomes greater than or equal to the threshold value of the transistors Tn2 and Tn3, the transistors Tn2 and Tn3 are turned on. At this time, the transistors Tp2 and Tp3 are not yet turned on, and the potential of the node N2 does not rise. Therefore, the output signal OUT of the buffer circuit 1 has the voltage value of the low-potential-side power supply V2.
[0024]
Next, when the drain potential of the transistor Tp2 decreases based on the ON operation of the transistor Tn2, the gate potentials of the transistors Tp2 and Tp3 decrease. When the potential difference between the high-potential-side power supply V1 and the gate potentials of the transistors Tp2 and Tp3 becomes larger than the threshold value of the transistors Tp2 and Tp3, the transistors Tp2 and Tp3 are turned on. Then, due to the current mirror operation of the transistors Tp2 and Tp3, the same drain current I flows as an output current to the transistors Tp2 and Tn2 and the transistors Tp3 and Tn3.
[0025]
At this time, the potential of the node N2 is expressed by the following equation, where Rn is the on-resistance of the transistors Tn2 and Tn3 and Rp is the on-resistance of the transistors Tp2 and Tp3.
[0026]
V (N2) = Rn / (Rn + Rp) I + 2I · R4
At this time, when the threshold values of the transistors Tn2 and Tn3 are Vtn and the gate-source voltage is Vgs, the drain current I is proportional to (Vgs-Vtn) ² .
[0027]
With such an operation, when the potential of the high potential side power supply V1 rises and the potential of the node N1 rises, the drain current I increases and the potential of the node N2 rises.
When the potential of the node N2 exceeds the threshold value VB set in the buffer circuit 1, the voltage value of the high-potential-side power supply V1 is output from the buffer circuit 1 as an output signal OUT, as shown in FIG. .
[0028]
With the power supply voltage detection circuit configured as described above, the following operational effects can be obtained.
(1) When the high-potential power supply V1 rises to a predetermined voltage, the voltage value of the high-potential power supply V1 can be output as the output signal OUT.
(2) The potential of the node N2 is determined based on the on-resistance of the transistors Tp3 and Tn3 and the resistance R4. Therefore, the potential of the node N2 is not determined only by the on-resistance of the transistors Tp3 and Tn3 or only by the resistor R4, so that the influence of the variation of each element on the potential of the node N2 is reduced.
(3) As shown in FIG. 4, by changing the resistance value of the resistor R4, the gradient of the change in the potential of the node N2 can be changed. By increasing the resistance value of the resistor R4 and steeply changing the potential of the node N2, the voltage region Vca1 where the output signal OUT of the buffer circuit 1 is inverted can be reduced as compared with the same Vca2. Therefore, the accuracy of the voltage value of the high-potential-side power supply V1 at which the output signal OUT is inverted can be improved, and the influence of the variation in the characteristics of the transistors Tp2 and Tp3 can be reduced.
(4) Since the transistors Tp2 and Tp3 perform a current mirror operation, it is possible to reduce the influence of variations in the characteristics of the transistors Tn2 and Tn3.
(5) The potential of the node N1 is generated by dividing the high-potential-side power supply V1 by the voltage dividing ratio of the resistors R2 and R3, and the potential of the node N2 is generated as described above based on the ON operation of the transistors Tp3 and Tn3. You. The potential of the node N2 with respect to the high-potential-side power supply V1 can be set based on the resistance values of the resistors R2 and R3 and the on-resistances of the transistors Tp3 and Tn3 and the resistance value of the resistor R4. Accordingly, by appropriately shifting the potential of the node N2, the voltage value of the high-potential-side power supply V1 at which the output signal OUT is inverted can be appropriately set.
(Second embodiment)
FIG. 2 shows a second embodiment. In this embodiment, P-channel MOS transistors Tp4 and Tp5 are connected in series between the transistor Tp3 and the node N2 of the first embodiment, and the other configuration is the same as that of the first embodiment. Is the same as
[0029]
The gates of the transistors Tp4 and Tp5 are connected to the respective drains and are diode-connected.
In the power supply voltage detection circuit thus configured, the transistors Tp4 and Tp5 operate as a level shift circuit, and the potential of the node N2 is equal to the threshold value of the transistors Tp4 and Tp5 as compared with the first embodiment. descend.
[0030]
Therefore, the high-potential-side power supply voltage at which the output signal OUT of the buffer circuit 1 is inverted can be set to a higher voltage value than in the first embodiment.
(Third embodiment)
FIG. 3 shows a third embodiment. In this embodiment, a switch circuit SW1 is interposed between the resistor R2 of the first embodiment and the high-potential power supply V1, and a switch circuit SW2 is interposed between the resistor R4 and the low-potential power supply V2. The switch circuit SW3 is interposed between the node N2 and the high-potential-side power supply V1. Other configurations are the same as those of the first embodiment.
[0031]
The switch circuits SW1 and SW2 are controlled to be non-conductive when the operation of the power supply voltage detection circuit is not required, and the switch circuit SW3 is controlled to be conductive when the operation of the power supply voltage detection circuit is not required.
[0032]
With such a configuration, when the switch circuit SW1 becomes non-conductive, the current flowing from the high-potential power supply V1 to the low-potential power supply V2 via the resistors R2 and R3 can be cut off.
[0033]
When the switch circuit SW2 is turned off, leakage current flowing from the high-potential power supply V1 to the low-potential power supply V2 from the transistors Tp2 and Tn2 or from Tp3 and Tn3 via the resistor R4 can be cut off.
[0034]
When the switch circuit SW3 is turned on, the node N2 is clamped at the level of the high-potential power supply V1.
With such an operation, when the operation of the power supply voltage detection circuit is not required, the power consumption can be reduced and the node N2 can be prevented from being in an undefined state.
[0035]
The above embodiment can be modified as follows.
-You may combine the structure of 2nd Embodiment and 3rd Embodiment.
(Supplementary Note 1) a current source circuit that outputs a current based on a voltage level of a power supply;
A resistor connected between the current source circuit and a power supply,
A current mirror circuit that operates based on an output current of the current source circuit;
A power supply voltage detection circuit, comprising: a logic gate for determining a logic of a connection node between the current mirror circuit and the current source circuit. (1)
(Supplementary Note 2) A voltage dividing circuit that generates a divided voltage by dividing a potential difference between the high potential side power supply and the low potential side power supply,
A pair of N-channel MOS transistors to which the divided voltage is input to a gate;
A resistor connected between the source of the N-channel MOS transistor and a low-potential-side power supply;
A pair of P-channel MOS transistors connected between the drain of the N-channel MOS transistor and the high-potential-side power supply and performing a current mirror operation based on the drain current of one of the N-channel MOS transistors;
A power supply voltage detection circuit, comprising: a logic gate for determining a logic of a connection node between the N-channel MOS transistor and the P-channel MOS transistor. (2)
(Supplementary note 3) The power supply voltage detection circuit according to supplementary note 2, wherein a source of the N-channel MOS transistor is connected to a low-potential-side power supply via a common resistor. (3)
(Supplementary note 4) A supplementary note 2 or 3, wherein a level shift circuit for shifting the potential of the connection node to a lower potential side is provided between the connection node and the drain of the P-channel MOS transistor. Power supply voltage detection circuit. (4)
(Supplementary Note 5) A switch circuit that is non-conductive when no operation is required is provided between the voltage dividing circuit and at least one of the high potential side power supply and the low potential side power supply. The power supply voltage detection circuit according to any one of the above. (5)
(Supplementary note 6) The power supply according to any one of Supplementary notes 2 to 5, wherein a switch circuit that conducts when no operation is required is provided between the connection node and the high potential side power supply or the low potential side power supply. Voltage detection circuit.
(Supplementary note 7) The power supply voltage detection circuit according to any one of supplementary notes 4 to 6, wherein the level shift circuit is configured by a P-channel MOS transistor connected in diode.
[0036]
【The invention's effect】
As described in detail above, the present invention can provide a power supply voltage detection circuit capable of suppressing a decrease in power supply voltage detection accuracy due to variations in circuit elements.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a first embodiment.
FIG. 2 is a circuit diagram showing a second embodiment.
FIG. 3 is a circuit diagram showing a third embodiment.
FIG. 4 is an explanatory diagram showing an operation of the first embodiment.
FIG. 5 is an explanatory diagram showing an operation of the first embodiment.
FIG. 6 is a circuit diagram showing a conventional example.
[Explanation of symbols]
1 logic gate (buffer circuit)
Tn2, Tn3 current source circuit (N-channel MOS transistor)
R4 Resistance Tp2, Tp3 Current mirror circuit

Claims (5)

A current source circuit that outputs a current based on the voltage level of the power supply;
A resistor connected between the current source circuit and a power supply,
A current mirror circuit that operates based on an output current of the current source circuit;
A power supply voltage detection circuit, comprising: a logic gate for determining a logic of a connection node between the current mirror circuit and the current source circuit. A voltage dividing circuit that generates a divided voltage obtained by dividing a potential difference between the high potential side power supply and the low potential side power supply,
A pair of N-channel MOS transistors to which the divided voltage is input to a gate;
A resistor connected between the source of the N-channel MOS transistor and a low-potential-side power supply;
A pair of P-channel MOS transistors connected between the drain of the N-channel MOS transistor and the high-potential-side power supply and performing a current mirror operation based on the drain current of one of the N-channel MOS transistors;
A power supply voltage detection circuit, comprising: a logic gate for determining a logic of a connection node between the N-channel MOS transistor and the P-channel MOS transistor. 3. The power supply voltage detection circuit according to claim 2, wherein a source of said N-channel MOS transistor is connected to a low potential side power supply via a common resistor. 4. The power supply voltage according to claim 2, wherein a level shift circuit for shifting a potential of the connection node to a lower potential side is provided between the connection node and a drain of the P-channel MOS transistor. Detection circuit. 5. A switch circuit, which is non-conductive when no operation is required, is provided between the voltage dividing circuit and at least one of a high-potential-side power supply and a low-potential-side power supply. Power supply voltage detection circuit as described.

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