JP2004274076A - Method for manufacturing semiconductor device and manufacturing apparatus thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method which carries out maintenance-free and particle-free CVD and etching, controlling the deposition of reaction products to the wall surface of a reaction chamber etc. <P>SOLUTION: A gas, containing a halogen compound gas, is used as a process gas in plasma etching. When etching a first inter-layer dielectric film 9, a XeF2 gas is used; when patterning a bit line 10 composed of a silicide film, a BrF3 is used; and when forming a storage node 12 composed of a polysilicon film, a BrCl gas is used. A non-volatile protective film is formed on a substrate surface via plasma, to make the figure of an opening proper. On the wall surface of the reaction chamber, to which an effect of plasma is very small, the deposition of the reaction product is controlled, by changing the deposition seed to a volatile substance(SiF4 etc). The same effect can be attained, if a halogen compound gas is used as an added gas to a main gas for carrying out CVD. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to an improvement in an apparatus for manufacturing a semiconductor device in which a process gas is formed into a plasma state and a CVD film is formed on a semiconductor substrate or dry etching is performed.

  The inventor of the present invention has disclosed that, in an etching apparatus in which at least one pair of electrodes connected to a high-frequency power supply is provided in a chamber, a part of a silicon oxide film formed on a semiconductor substrate is reacted with a reactive gas. As a dry etching method for removing by a reaction, a semiconductor substrate is placed in a chamber, at least an interhalogen compound gas and a carbon fluoride gas are introduced into the chamber, and then a high-frequency voltage is applied from a high-frequency power source to the electrode. Has been proposed for a dry etching method in which is applied. This is a technique that utilizes the etching action of the interhalogen compound in a non-plasma state to suppress the decomposition of a reaction gas and the generation of deposits due to polymerization, thereby performing maintenance-free and particle-free dry etching.

  In addition, a dry etching apparatus suitable for performing the above dry etching method has been proposed. As shown in FIG. 10, a chamber 51 for installing a semiconductor substrate X1 and performing etching with a gas, gas supply devices 56 and 57 for supplying a reactive gas to the chamber 51, and a gas supply device are provided in the chamber. At least one pair of electrodes 52a, 52b provided, a high-frequency power supply 53 for applying a high-frequency voltage between the electrodes 52a, 52b, and gas supply devices 56, 57 connected via gas pipes, A first gas outlet 54a having a large number of pores for blowing gas from a gas supply device 56, 57 is connected to a gas supply device 56, 57 via a gas pipe, and has a large number of pores for blowing gas from the side of the chamber. And a discharge pipe 55 for discharging gas from the chamber 51. This aims at prolonging the period in which the chamber can be used continuously, by paying attention to the fact that when the flow rate of the gas blown out from the pores is high, deposits are hardly generated.

  However, the dry etching method and the dry etching apparatus according to the above invention have the following problems.

  First, even when an oxide film or the like is formed by a chemical vapor deposition method, that is, a CVD method, control for removing a reaction product adhered to a chamber wall surface is required, and a smooth progress of the CVD process is required. Hindering. However, in the above-mentioned prior invention, no solution has been taken on how to suppress the adhesion of the reaction product in the CVD method or the like. A first object of the present invention is to provide a method capable of suppressing the generation of deposits generated in the manufacture of a semiconductor device such as a CVD method using a process gas.

  On the other hand, when a conductive film such as a polysilicon film is to be etched using a ClF3 gas or the like disclosed in the above-mentioned publication, there are the following problems. That is, in the etching of a conductive film such as a polysilicon film, since the base is generally an SiO2 based film such as a gate oxide film or an interlayer insulating film, the etching rate ratio between the polysilicon film and the SiO2 based film is generally high. That is, it is necessary to increase the selection ratio. However, when a large number of F atoms are present in the gas, the etching of the SiO2 based film is promoted, so that it is difficult to increase the selectivity. Therefore, even if the above-mentioned conventional dry etching technique is applied to a conductive film as it is, there is a possibility that the effect cannot be obtained. A second object of the present invention is to provide a means for suppressing the formation of deposits while maintaining a high selectivity with respect to an underlying SiO2 based film when etching a conductive member such as a wiring member. .

  Further, in the apparatus of FIG. 10 shown in the above-mentioned invention, although a high-speed gas is supplied from the ceiling side and the side inside the chamber, there is a problem that a portion where the gas does not sufficiently flow around occurs at a corner portion. (See the arrow in the figure). A third object of the present invention is to configure a chamber as a device for performing a chemical treatment such as etching so that a high-speed gas flow can be distributed throughout the chamber, thereby further reducing the amount of deposits on the inner wall of the chamber. It is to plan.

  In the method for manufacturing a semiconductor device according to the present invention, a double cylindrical member with a bottom including an inner wall member having a large number of pores on all wall surfaces and an outer wall member having a process gas inlet is provided in a chamber, and a reaction chamber and A semiconductor substrate to be processed is installed at the end of the space inside the inner wall member of the bottomed double cylindrical member, and through the respective pores of the inner wall member of the bottomed double cylindrical member, the semiconductor substrate required in a plasma state is formed. While introducing a process gas that contributes to the formation of a film and generates a volatile substance with an activation energy of a predetermined value or less with respect to the deposit species generated in the chamber in a non-plasma state and contributes to suppression of the film formation, In this method, the process gas is brought into a plasma state in a space near the surface to perform a chemical treatment on the semiconductor substrate.

  Thereby, when the process gas is introduced into the semiconductor substrate in the space inside the inner wall member of the double cylindrical member with the bottom constituting the reaction chamber in the chamber, through the pores from all directions facing the semiconductor substrate. Process gas is blown out. Therefore, the process gas flows over the entire wall surface of the reaction chamber, the adhesion of the reaction product to each part of the wall surface of the reaction chamber is suppressed, and the time during which the chamber can be used continuously until maintenance for removing the adhered substance is performed. Expands.

  A first semiconductor device manufacturing apparatus of the present invention is directed to a semiconductor manufacturing apparatus for performing a chemical treatment on a semiconductor substrate. And a chamber for processing the semiconductor substrate in a predetermined atmosphere, and an activation energy of not more than a predetermined value with respect to a deposition species generated in the chamber in a non-plasma state while contributing to formation of a necessary film in a plasma state. A gas supply means for supplying a process gas that generates volatile substances and suppresses film formation to the chamber, and an outer wall member and an inner wall member arranged in the chamber and defining a common space. A bottomed double cylindrical member, provided in a cylindrical space surrounded by the bottomed double cylindrical member, a substrate mounting portion for installing a substrate, and a bottom portion of the outer wall member of the bottomed double cylindrical member. A gas inlet for introducing the process gas into the chamber, and a semiconductive gas formed over the bottom and side surfaces of the inner wall member and introduced from the gas inlet; Provided with a large number of pores for blowing out toward the substrate, a discharge port for discharging gas from the inside of the chamber, and a discharge means for sucking and discharging the process gas in the chamber to the outside It is.

  Thereby, when the process gas is introduced into the semiconductor substrate in the space inside the inner wall member of the double cylindrical member with the bottom constituting the reaction chamber in the chamber, through the pores from all directions facing the semiconductor substrate. Process gas is blown out. Therefore, the process gas flows over the entire wall surface of the reaction chamber, the adhesion of the reaction product to each part of the wall surface of the reaction chamber is suppressed, and the time during which the chamber can be used continuously until maintenance for removing the adhered substance is performed. Expands.

  It is preferable that the process gas contains an interhalogen compound gas, and the process gas contains at least one of XeF2 gas and diluted F2 gas. In the case of a process gas containing an interhalogen compound gas, a Xe gas, or the like, the effect of suppressing the adhesion of the reaction product by the generation of volatile substances on the wall surface of the reaction chamber where the plasma is extremely small during the chemical treatment is large. Therefore, the effect of suppressing the adhesion of the reaction product to the wall surface of the reaction chamber becomes remarkable in combination with the above-described operation.

  By making the diameter of the pores on the side surface of the inner wall member of the double cylinder member with the bottom larger than the diameter of the pores on the bottom surface of the inner wall member, the flow rate of the process gas in each pore as a whole becomes uniform, Adhesion of reaction products to each part of the reaction chamber wall surface is reliably suppressed.

  It is preferable that the pores of each part of the inner wall member are formed such that the larger the distance from the discharge means, the smaller the aperture ratio. The shorter the distance from the exhaust means in each pore, the lower the flow rate of the process gas may be, but the opening ratio of the pores increases according to the distance from the exhaust means. And the action of suppressing the adhesion of the reaction product is ensured.

  By providing the above-described inlet at only one location substantially at the center of the outer wall member of the bottomed cylindrical member, the inlets are concentrated at one location, simplifying the structure and ensuring uniform flow velocity. Is obtained.

  The apparatus for manufacturing a semiconductor device is a parallel plate type RIE in which an upper electrode and a lower electrode are arranged in a chamber, and the inner wall member of the double cylindrical member with the bottom is formed of an insulating film with a conductive member constituting the upper electrode. By coating and configuring, the structure is simplified, the process gas flows without stagnation, and the manufacturing cost is reduced.

  The apparatus for manufacturing a semiconductor device is an RIE in which an upper electrode and a lower electrode are arranged in a chamber, and the chamber is an upper unit in which the bottomed double cylindrical member and the upper electrode are arranged; By dividing the upper unit into a lower unit and a lower unit having a substrate mounting portion, the structure is simplified and the process gas flows without stagnation. The manufacturing cost is reduced.

  It is preferable that the semiconductor device manufacturing apparatus is a dry etching apparatus, and at least the surface of the upper electrode is made of carbon. When a carbon electrode is used in a conventionally used silicon electrode apparatus, although the selectivity of dry etching is high, the etching characteristics change with time or the characteristics tend to deteriorate due to a high adhesion rate of a product. There is. However, with this configuration, the formation of deposits is suppressed by the presence of the interhalogen compound gas or the like, so that a high selectivity can be obtained and etching can be performed without a change over time in etching or deterioration in characteristics.

  Inside the bottomed double cylindrical member, a gas flow resistance plate having a resistance function against the flow of the process gas is provided between the bottom surface of the inner wall member and the bottom surface of the outer wall member, so that the gas flows from the inlet. Even if the process gas flows directly into the reaction chamber from the pores at the bottom of the inner wall member, the inflow is hindered directly by the resistance plate, and flows into the pores at the bottom through the gap between the resistance plate and the inner wall member. Therefore, the flow rate of the process gas from each of the pores on the side and bottom of the inner wall member is made uniform, and the adhesion of the reaction product is suppressed on each part of the wall surface of the reaction chamber.

  Cleaning gas supply means for supplying a cleaning gas which contributes to suppression of film formation by generating a volatile substance with an activation energy of a predetermined value or less for a depot species generated in the reaction chamber in a non-plasma state, and a tip of the discharge port And a cleaning pipe attached to the opening side of the discharge pipe, the cleaning gas being supplied from the cleaning gas supply means into the discharge pipe. The attachment of the reaction product prevents the reaction product from adhering to the wall surface of the discharge pipe.

  A second apparatus for manufacturing a semiconductor device according to the present invention includes a reaction section for processing a semiconductor substrate in a predetermined atmosphere, a process gas supply means for supplying a process gas to the reaction section, and a reaction chamber in a non-plasma state. Cleaning gas supply means for supplying a cleaning gas contributing to suppression of film formation by generating a volatile substance with an activation energy equal to or less than a predetermined value with respect to the depot species generated in the above, and for discharging a process gas from the inside of the reaction chamber A cleaning member attached to the opening forming portion of the discharge tube, a cleaning member for flowing the cleaning gas from the cleaning gas supply means into the discharging tube, and a cleaning member attached to the opening forming portion of the discharging tube. And a cleaning member for flowing the cleaning gas into the discharge pipe.

  This suppresses the reaction products from adhering to the wall surface of the discharge pipe in all devices used for plasma etching, CVD, and the like.

  A third apparatus for manufacturing a semiconductor device according to the present invention includes a chamber constituting a reaction chamber, an upper electrode and a lower electrode which are installed in the chamber and to which a high-frequency power is applied, and which is required for the chamber in a plasma state. A gas introducing means for introducing a process gas which contributes to the formation of a film and generates a volatile substance with an activation energy of a predetermined value or less for a depot species generated in the chamber in a non-plasma state and contributes to suppression of film formation; And at least the surface of the upper electrode is made of carbon.

  When a carbon electrode is used in a conventionally used silicon electrode apparatus, although the selectivity of dry etching is high, the etching characteristics change with time or the characteristics tend to deteriorate due to a high adhesion rate of a product. There is. However, with this configuration, the formation of deposits is suppressed due to the presence of the interhalogen compound gas or the like, so that a high selectivity can be obtained and etching can be performed without time-dependent changes in the etching or deterioration in characteristics.

  ADVANTAGE OF THE INVENTION According to this invention, adhesion of a reaction product can be suppressed by increasing the flow velocity of a process gas in all the wall surfaces of a reaction chamber, and therefore, the time which can use a chamber continuously can be extended.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(1st Embodiment)
First, a first embodiment will be described with reference to FIGS. 1 and 2A to 2E. FIG. 1 shows a configuration of a semiconductor device manufacturing apparatus according to the first embodiment. The apparatus for manufacturing a semiconductor device includes a chamber 20 for performing a chemical process such as etching a semiconductor substrate X1 in a predetermined atmosphere to form a CVD film, a high-frequency power supply 31, a matching capacitor 32, and a first capacitor. A gas supply device 33, a second gas supply device 34, an exhaust pump 35, and a scrubber 36 for adsorbing toxic gas to be exhausted are provided. Here, the casing of the chamber 20 is divided into a lower casing 21b and an upper casing 21a, and the upper casing 21a is configured to be detachable from the lower casing 21b.

  The upper casing 21a is provided with a double cylindrical member 24 with a bottom composed of an outer wall member 22 and an inner wall member 23. The outer wall member 22 of the double cylindrical member 24 with a bottom has a bottomed cylindrical shape in which the lower end side of the cylindrical portion 22a is open and the upper bottom portion 22b is provided on the upper end side of the cylindrical portion 22a. The lower end is formed with an edge that comes into contact with the lower casing 21b via a seal member. In addition, an introduction port 25 for introducing a process gas from the first gas supply device 33 and the second gas supply device 34 is provided at the center of the upper bottom portion of the outer wall member 22. On the other hand, the inner wall member 23 has a bottomed cylindrical shape in which the lower end of the cylindrical portion 23a is opened and the upper bottom portion 23a is provided, and is connected to the edge of the outer wall member 23 at the lower end of the cylindrical portion 23a. . Further, a large number of pores 26 are provided in the cylindrical portion 23a and the upper bottom portion 23b of the inner wall member 23, respectively. That is, the process gas taken in from the inlet 25 is blown into the chamber at a high speed through each of the fine holes 26. In the present embodiment, the double cylindrical member 24 with the bottom is in an inverted state with the open end directed to the lower end, but the open end is directed upward and the lower end is set to the bottom, and the semiconductor substrate to be processed is placed at the top. The process gas may be flowed from below the electrode attached to the electrode.

  Here, as a feature of this embodiment, the pores 26a of the cylindrical portion 23a of the inner wall member 23 are formed to have a larger diameter than the pores 26b of the upper bottom portion 23b. That is, the process gas supplied from the upper inlet 25 is prevented from being blown out only from the fine holes 26b of the upper bottom portion 23b, and is supplied to the inside from the fine holes 26 of each portion of the inner wall member 23 at a substantially uniform wind speed. I am trying to.

  The upper bottom portion 23b of the inner wall member 23 is made of a material obtained by coating SUS or Al with alumina, and this portion functions as an upper electrode. A lower electrode 27 is disposed at the center of the lower casing 21b. The lower electrode 27 is connected to a high-frequency power supply 31 via a matching capacitor 32. A semiconductor substrate X1 to be processed is mounted on the lower electrode 27. That is, while the process gas is introduced into the chamber 20, a high-frequency power is applied between the upper electrode 23b and the lower electrode 27, and the influence of plasma is increased in the space of the semiconductor substrate X1, and A CVD film is formed or plasma etching is performed. Therefore, the cylindrical space inside the inner wall member 23 is a reaction chamber.

  A discharge port 28 for discharging a process gas is provided at the lowermost portion of the lower casing 21b, and the discharge port 28 is connected to an exhaust pump 35 and a scrubber 36 via a discharge pipe. .

  In the case of the structure of the chamber as shown in FIG. 1, there is no portion where the flow of the process gas stays as compared with the structure of the conventional chamber as shown in FIG. Can be effectively prevented from adhering to the wall surface.

  Next, FIG. 2 shows a cross-sectional structure of a DRAM memory cell manufactured in a chamber having the above structure. As shown in FIG. 2, a gate oxide film 2 is formed on a substrate body 1, and an element isolation 3 is formed on a part of the gate oxide film. A switching transistor is provided in an active region defined by the element isolation 3. The switching transistor includes a gate electrode 6 made of a polysilicon film, an upper protective film 7 made of a silicon oxide film formed on the gate electrode 6, and a silicon oxide film formed on the side of the gate electrode 6. An LDD (not shown) formed by introducing a low-concentration impurity into the side wall 8 and the substrate body 1 below the vicinity of the end of the gate electrode 6 and a high-concentration impurity in the active region beside the LDD. And a source / drain (not numbered) introduced. Above this switching transistor, a bit line 10 is formed via a first interlayer insulating film 9, and a storage node 12, a capacitor insulating film 13 and a plate electrode 14 are further formed thereon via a second interlayer insulating film 11. Is provided. The first interlayer insulating film 9 is formed of a silicon oxide film (BPSG film) doped with boron and phosphorus, the bit line 10 is formed of a two-layer film of a polysilicon film and a WSi film (so-called polycide film), and the second interlayer insulating film is formed. The film 11 is made of a silicon oxide film (BPSG film) doped with boron and phosphorus, the storage node 12 and the plate electrode 14 are made of polysilicon, and the capacitance insulating film 13 is made of a laminated film of a silicon nitride film and a silicon oxide film. . A first upper wiring 16 is formed above the above-described members via a third interlayer insulating film 15, and a second upper wiring 18 is further formed above the above members via a fourth interlayer insulating film 17. Have been. Each of the interlayer insulating films 15 is made of a BPSG film, the fourth interlayer insulating film 17 is made of a silicon oxide film, and each of the upper wirings 16 and 18 is made of an Al alloy (for example, Al to which about 5% of Si is added). A passivation film 19 for preventing various impurities such as alkali ions from entering the semiconductor substrate X1 is provided on the uppermost portion. This passivation film 19 is composed of a laminated film of a silicon nitride film and a silicon oxide film.

  FIGS. 3A to 3E are cross-sectional views showing changes in the structure in the process of forming the basic structure of the switching transistor in the process of manufacturing the DRAM memory cell having the above-described structure. First, after a silicon oxide film 2 is formed on a substrate body 1, an element isolation 3 is further formed by using a known LOCOS method. Next, a polysilicon film 4 and a silicon oxide film 7 are deposited on the substrate X1 by the CVD method (see FIG. 3B), and after a resist is applied, only a portion where a gate electrode is to be formed is removed. A covering resist mask 5 is formed (see FIG. 3C).

  Then, as shown in FIG. 3D, the polysilicon film 4 and the silicon oxide film 7 are patterned. At this time, as a feature of the present embodiment, when etching the polysilicon film 4, the first gas supply device 33 supplies a BrCl gas, and the second gas supply device 34 supplies an O 2 gas to perform plasma etching. I do. Instead of the BrCl gas, a gas obtained by adding a few percent of ClF3 gas (or BrF3 gas, BrF5 gas, etc.) to BrCl gas may be used. When the resist mask 5 is removed after this patterning, the semiconductor substrate X1 is in a state shown in FIG.

  As described above, by using a process gas containing a BrCl gas during the plasma etching of the polysilicon film 4, the polysilicon film 4 corresponding to the opening of the resist mask 5 is selectively removed, and a favorable The selectivity and the substantially straight end face shape of the gate electrode 6 can be obtained. Generally, in order to realize a good shape of a gate electrode or the like, it is necessary to protect the wall surface of the opening during etching so that anisotropic etching becomes remarkable. It is known that existence is valid. This is considered to be because a compound represented by the molecular formula SiOxBry is generated on the surface of the semiconductor substrate via plasma and adheres to the wall surface of the opening. Therefore, HBr has been conventionally used as an etching gas, but on the other hand, there is a problem that the deposited film adheres to the wall surface of the reaction chamber or the like. In that case, the depot species is considered to be a compound represented by SiBrx or SiOx Bry, and these species have low vapor pressure and low volatility. However, when BrCl, which is an interhalogen compound, is used as the etching gas as in the present embodiment, a protective film made of SiOx Bry is formed on the wall surface of the opening formed by etching, while the influence of plasma is extremely small. On the walls of the reaction chamber, the depot species are chlorinated to compounds such as SiCl4. Since these have high volatility, adhesion of reaction products to the reaction chamber wall surface and the like is suppressed.

  After the patterning of the gate electrode 6, although not described in detail, an upper surface protective film 7 and a side wall 8 of the gate electrode 6 are formed, impurity ions are implanted, and a source / drain, LDD, etc. (Omitted). Through the above steps, a basic structure of the switching transistor is formed.

  Next, FIGS. 4A to 4D are cross-sectional views illustrating a state of the semiconductor substrate X1 in a manufacturing process after forming the switching transistor. First, as shown in FIG. 4A, a first interlayer insulating film 9 made of a silicon oxide film is deposited on the entire surface of the substrate X1 by a plasma CVD method. At this time, silane gas is supplied from the first gas supply device 33 as a main gas, and ClF3 gas is supplied from the second gas supply device 34 as an additional gas. At this time, inside the chamber, the silane gas enters a plasma state on the surface of the semiconductor substrate X1, and a silicon oxide film grows by a reaction between oxygen and silicon atoms released from the silane molecules. On the other hand, since the influence of the plasma is extremely small on the reaction chamber wall and the like, the presence of ClF3 gas, which is an interhalogen compound gas having an extremely low activation energy for the reaction with the depot species, causes the following reaction formula 3Si + 6O + 4ClF3 → 3SiF4 + 3O2 + 2Cl2 to be obtained. Reaction proceeds. The products in the above reaction formula are all volatile substances. Therefore, it is possible to effectively suppress the adhesion of the reaction product to the reaction chamber wall and the like. The process gas may be XeF2 gas or F2 gas diluted with NF3 gas. In this case, there is no danger of Cl atoms entering the silicon oxide film as in the case of using ClF3 gas, so that there is an advantage that the reliability of the semiconductor device is further improved.

  Then, as shown in FIG. 4A, a contact hole for forming a bit line contact is opened in the first interlayer insulating film 9. Note that the cross section for forming the bit line contact is a portion different from the cross section shown in the same figure, and is therefore partially shown by a broken line (the same applies to the next FIG. 4B). At this time, CHF3 gas (or CH2 F2 gas, CH3 F gas, CH4 + H4 gas) is supplied from the first gas supply device 33, and XeF2 gas (or F2 gas diluted with NF3 gas) is supplied from the second gas supply device 34. To perform plasma etching. Thereby, it is possible to remove the first interlayer insulating film 9 which is the silicon oxide film and the oxide film immediately above the substrate, and to suppress the adhesion of the reaction product to the inner wall of the chamber or the like.

  Next, as shown in FIG. 4 (b), after forming a so-called polycide film in which polysilicon and WSi (tungsten silicide) are sequentially deposited (the figure is treated as one layer for easy viewing), this is patterned. To form a bit line 10. When patterning the upper WSi film of the polycide film, a first gas supply device 33 supplies a BrF3 gas (or a BrF5 gas), and a second gas supply device 34 supplies an O2 gas to perform plasma etching. . When the etching of the silicide film is completed, the polysilicon film is etched by switching from the BrF3 -O2 gas to the BrCl-O2 gas. In general, it is known that etching of a silicide film such as WSi requires F atoms, and a mixed gas of HBr-SF6-O2 has been conventionally used. However, similar to the use of HBr gas for the polysilicon film, the deposit species generated by etching with these gases has low volatility and causes reaction products to adhere to the reaction chamber walls and the like. Therefore, as in the present embodiment, by using a BrF3 -O2 gas or a BrF5 -O2 gas, a protective film such as a non-volatile substance, such as SiOx Bry, is formed on the surface of the semiconductor substrate through plasma, and a good opening is formed. Is maintained, while volatile substances (for example, WFx (WF6, etc.), SiF4, etc.) are generated on the wall of the reaction chamber where the influence of the plasma is extremely small, and the adhesion of reaction products to the wall of the reaction chamber, etc. is suppressed. . Therefore, it is possible to suppress the adhesion of the reaction product to the reaction chamber wall and the like while maintaining a good selection ratio and a good bit line shape. Further, there is an advantage that the type of gas used can be reduced.

  In the above embodiment, the case of etching the polycide film has been described. However, it is needless to say that the present invention can be applied to a case where a silicide film such as a WSi film is simply provided on a silicon oxide film. As the silicide film, a TiSi2 film, CoSi2 film, NiSi2 film or the like may be used instead of the WSi film. Even if a BrCl-O2 gas is used as the etching gas, a good shape of the opening and an effect of suppressing the adhesion of the reaction product to the wall surface of the reaction chamber can be exhibited. In particular, when a silicide film is provided on a silicon oxide film instead of a polycide film, the use of BrCl gas has the advantage that the selectivity is higher and the underlying silicon oxide film can be protected.

  Next, as shown in FIG. 4C, a second interlayer insulating film 11 made of a BPSG film is deposited on the entire surface of the semiconductor substrate X1. At that time, a mixed gas of monosilane, phosphine, and diborane is supplied as a main gas from the first gas supply device 33, and a ClF3 gas is supplied as an additional gas from the second gas supply device 34, and the plasma CVD method is performed. This makes it possible to suppress the reaction products from adhering to the reaction chamber wall and the like while forming the BPSG film. After that, a contact hole of the storage node is opened in the second interlayer insulating film 11. At this time, plasma etching is performed by supplying F2 gas diluted with NF3 from the first gas supply device 33 and supplying O2 gas from the second gas supply device 34. Thus, the same effect as that of the XeF2 gas used for the selective etching of the first interlayer insulating film 9 is obtained.

  Next, as shown in FIG. 4D, a polysilicon film is deposited and patterned to form a storage node 12. When patterning the polysilicon film, a first gas supply device 33 supplies a BrCl gas and a second gas supply device 34 supplies an O2 gas to perform plasma etching. Generally, in a DRAM memory cell, the thickness of a polysilicon film forming a storage node is very large in order to secure a large capacity. Therefore, when the polysilicon film is patterned, a large amount of reaction products adhere to the reaction chamber wall or the like in the conventional plasma etching method. On the other hand, in the present embodiment, the adhesion of the reaction product to the wall surface of the reaction chamber or the like can be effectively suppressed by the cleaning action using the halogen of the depot kind by BrCl as described above.

  Although illustration is omitted later, a capacitor insulating film 13 is formed on the storage node 12, a plate electrode 14 is formed on the capacitor insulating film 13, and a third interlayer insulating film 15 is deposited. The above-mentioned interhalogen compound gas is also supplied as an additional gas when performing plasma etching for depositing and patterning these films.

  Further, the first upper wiring 16 and the second upper wiring 18 provided on the third interlayer insulating film 15 are made of an Al alloy. When patterning the upper wirings 16 and 18, a first gas supply device 33 supplies a BrCl gas and a second gas supply device 34 supplies an O2 gas to perform plasma etching. At this time, a protective film made of a non-volatile substance (for example, AlOxBry) is formed on the surface of the semiconductor substrate via the plasma, while a volatile substance (for example, AlCl3) is deposited on a reaction chamber wall or the like where the influence of the plasma is extremely small. Instead, the adhesion of the reaction product to the reaction chamber wall or the like is suppressed. In addition, since no F atoms are present in the process gas, it is possible to prevent AlF3 from growing angularly from the substrate during plasma etching, and to exert a remarkable effect in addition to the above-mentioned cleaning action. . FIG. 5 shows the relationship between the selectivity of Al and SiO2 and the deposition rate (nm / min) of the reaction product on the wall of the reaction chamber. As shown in the figure, in the case of a conventionally used mixed gas of BCl3 and Cl2, when the selectivity is increased, the deposition rate of the reaction product on the inner wall of the chamber is also increased. The number of wafers that can be continuously processed is extremely small. On the other hand, when BrCl gas is used, the deposition rate of the reaction product on the wall surface of the reaction chamber is extremely low even when the selectivity is increased. Therefore, the conflicting demands of improving the selectivity and suppressing the adhesion of the reaction product to the inner wall surface of the chamber can be satisfied at the same time.

  In depositing the uppermost passivation film 19, a mixed gas of dichlorsilane and ammonia is supplied as a main gas, and a ClF3 gas is supplied as an additional gas to perform plasma CVD. Accordingly, when a silicon nitride film having a good property of preventing intrusion of alkali ions or the like is formed hot, there is an advantage that a reaction product can be suppressed from adhering to a reaction chamber wall or the like.

  As described above, in this embodiment, when depositing and patterning an insulating film with a silicon oxide film and a silicon nitride film, and depositing and patterning a conductive film, the deposition is performed in a non-plasma state such as an interhalogen compound gas or XeF2 gas. A gas that easily reacts with the seed is supplied as a process gas. In that case, a non-volatile film is formed on the surface of the semiconductor substrate via the plasma. This film is a silicon oxide film or the like to be formed on the substrate in the case of CVD, and is a protective film for protecting the side wall of the opening in the case of etching. On the other hand, in the non-plasma state, the reaction between these gases and the depot species occurs preferentially to form volatile compounds, and these substances are exhausted without adhering to the reaction chamber wall or piping. Therefore, it is possible to effectively suppress the adhesion of the reaction product to the inner wall surface of the chamber or the like, and it is possible to omit a great deal of labor conventionally required for removing the attached matter in the chamber or the like. Further, the time during which continuous operation can be performed is significantly increased, which can contribute to a significant reduction in the manufacturing cost of the semiconductor device.

  FIG. 6 shows the most preferable relationship between the distance from the pump 35 and the opening ratio of each of the fine holes 26 of the inner wall member 23. The larger the distance from the pump 35, the smaller the opening ratio of the fine holes. For example, when pores having a diameter of 1 mm are provided in a range of 10 mm in diameter, the aperture ratio becomes 1%. When pores having a diameter of 0.5 mm are provided in a range of a diameter of 10 mm, the aperture ratio becomes 0.25. %. By changing the aperture ratio of the pores in this way, there is an advantage that the gas flow rate in each pore is more uniform.

(2nd Embodiment)
Next, a second embodiment will be described. FIG. 7 shows a configuration of a semiconductor device manufacturing apparatus according to the second embodiment. As shown in the figure, the structure of the chamber 20 in the present embodiment is basically the same as the configuration of the chamber 20 in the first embodiment shown in FIG. In the present embodiment, a disc-shaped resistance member 29 is disposed between the upper bottom portion 23b of the inner wall member 23 and the upper bottom portion 22b of the outer wall member 22 inside the double cylindrical member 24 with a bottom. In other words, the resistance member 29 gives resistance to the flow of the process gas flowing into the pores 26b provided in the upper bottom portion 23b of the inner wall member 23. In the present embodiment, the upper electrode embedded in the upper bottom portion 23b of the inner wall member 23 is made of SUS or Al, and a carbon coating layer is provided thereon.

  In this manner, by installing the resistance member 29, even if the diameters of the side pores 26a and the upper bottom pores 26b provided on the inner wall member 23 are uniform, the side pores 26a Can be kept sufficiently high. Therefore, the manufacturing cost of the chamber is reduced.

  Further, when the upper electrode is made of Al and anodized as in the first embodiment, Al atoms are sputtered and adhere to the semiconductor substrate, which may adversely affect the semiconductor device such as leakage. . Therefore, an upper electrode made of Si is often used conventionally. On the other hand, it is known that when a carbon electrode is used with a conventional etching gas, the uniformity of etching deteriorates due to a reaction product attached to the electrode. That is, although the selectivity of dry etching is high, the etching characteristics tend to change over time or deteriorate due to an increase in the adhesion rate of the product.

  On the other hand, in the case of a gas used in the present invention, such as an interhalogen compound gas or a XeF2 gas, in the Si electrode, the etching of the electrode itself by the interhalogen compound proceeds, and the life of the electrode is shortened. However, when at least the surface of the upper electrode is made of carbon, the uniformity of etching is good, the selectivity is high, and the life of the electrode is long. Therefore, in the present embodiment, the function of properly forming the protective film on the wall surface of the opening is ensured while maintaining a high selectivity during plasma etching, and the uniformity of etching is ensured. On the other hand, the generation of the volatile substance in the non-plasma state suppresses the adhesion of the reaction product to the wall surface of the reaction chamber or the like, so that the same effect as in the first embodiment can be obtained.

  Here, the effect of improving the throughput caused by the present invention will be described. 8 (a) and 8 (b) show changes in the etching rate (E / R) with respect to the number of dry-etched semiconductor wafers. FIG. 8 (a) shows the case of conventional dry-etching that does not include an interhalogen compound gas or the like. FIG. 8B shows a case using the gas of the present invention. When only the conventional anisotropic etching gas shown in FIG. 8A is used, the etching rate is immediately reduced due to the adhesion of the reaction product to the wall of the reaction chamber or the like. Therefore, the chamber cleaning is performed at a time interval of 24 to 48 hours. Is required. On the other hand, in the case of using the gas of the present invention shown in FIG. 8B, since the reaction product hardly adheres to the reaction chamber wall and the like, the etching rate hardly decreases, and a long-time continuous operation becomes possible. .

(Third embodiment)
Next, a third embodiment will be described. As shown in FIG. 9, in the present embodiment, as a semiconductor device manufacturing apparatus, a reaction unit 41 that processes a semiconductor substrate, a process gas supply device 42 that supplies a process gas to the reaction unit 41, An exhaust pipe 43 for exhausting gas, a pump 46 as an exhaust means for sucking gas from the reaction section 41, and a scrubber 47 are provided. Further, as a feature of the present embodiment, a large number of pores are formed in a portion of the discharge pipe 43 immediately below the reaction section 41, and the pore forming section is provided for allowing the cleaning gas to flow into the discharge pipe 43. A cleaning member 44 is attached. That is, a cleaning gas such as an interhalogen compound gas (BrCl gas, ClF3 gas, etc.) is supplied from the cleaning gas supply device 45 to convert the depot species generated in the reaction section 41 into a volatile substance and discharge the same. The reaction product is prevented from adhering to the pipe wall.

  Therefore, in the present embodiment, it is possible to suppress not only the reaction chamber but also the reaction products from adhering to the discharge pipe 43 that cannot be cleaned conventionally.

  The cleaning member 44 may be attached to the discharge pipe of the chamber 20 in the first and second embodiments. In this case, the type of gas used can be reduced by using an interhalogen compound gas or a XeF3 gas, which is a part of the process gas, as the cleaning gas.

  The method for manufacturing a semiconductor device according to the present invention can be used as an apparatus for performing CVD or plasma etching in a process for manufacturing a semiconductor device such as a memory and an LSI.

FIG. 2 is a partial cross-sectional view illustrating a configuration of a semiconductor device manufacturing apparatus according to the first embodiment. FIG. 2 is a cross-sectional view illustrating a structure of a DRAM memory cell according to the embodiment. FIG. 7 is a cross-sectional view showing a change in the structure of the semiconductor device in a process up to the formation of the switching transistor in the process of manufacturing the DRAM memory cell according to the embodiment. FIG. 10 is a cross-sectional view showing a change in the structure of the semiconductor device in a step after the formation of the switching transistor in the manufacturing steps of the DRAM memory cell according to the embodiment. FIG. 6 is a diagram showing the difference between the selectivity and the reaction product deposition rate when using a BrCl gas and when using an HBr-Cl2 gas. It is a figure showing the relation between the diameter of the pore of the inner wall member in the first embodiment, and the distance from the pump. It is a partial sectional view showing the composition of the device for manufacturing a semiconductor device according to the second embodiment. FIG. 7 is a diagram showing an improvement effect of a throughput according to the present invention over a conventional etching method. FIG. 13 is a partial cross-sectional view illustrating a structure of a semiconductor device manufacturing apparatus according to a third embodiment. It is a fragmentary sectional view showing the structure of the manufacturing device of the conventional semiconductor device.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 Substrate main body 2 Gate oxide film 3 Element isolation 4 Polysilicon film 5 Resist mask 6 Gate electrode 7 Upper protective film 8 Side wall 9 First interlayer insulating film 10 Bit line 11 Second interlayer insulating film 12 Storage node 13 Capacitive insulating film 14 Plate electrode 15 Third interlayer insulating film 16 First upper wiring 17 Fourth interlayer insulating film 18 Second upper wiring 19 Passivation film 20 Chamber 21 Casing 22 Outer wall member 23 Inner wall member 24 Double cylindrical member 25 with bottom 25 Inlet 26 Pores 27 Lower electrode 28 Outlet 31 High frequency power supply 32 Matching condenser 33 First gas supply device 34 Second gas supply device 35 Pump 36 Scrubber

Claims (14)

  In the chamber, a bottomed double cylindrical member composed of an inner wall member having a large number of pores on all wall surfaces and an outer wall member having a process gas inlet is installed, and the inner wall member of the bottomed double cylindrical member serving as a reaction chamber is provided. A semiconductor substrate to be processed is placed at the end of the inner space, and through the pores of the inner wall member of the double cylindrical member with the bottom, while contributing to the formation of a film required in a plasma state, the non-plasma Introduce a process gas that contributes to suppression of film formation by generating a volatile substance with an activation energy of a predetermined value or less for the depot species generated in the chamber in the state, and plasma-treats the process gas in a space near the surface of the substrate. A method of manufacturing a semiconductor device, wherein a chemical treatment is performed on the semiconductor substrate in a state. A semiconductor manufacturing apparatus for performing a chemical treatment on a semiconductor substrate,
A chamber for processing the semiconductor substrate in a predetermined atmosphere;
The process gas that contributes to the formation of a film required in the plasma state, while generating a volatile substance with an activation energy of a predetermined value or less for the depot species generated in the chamber in the non-plasma state and contributing to the suppression of the film formation, is described above. Gas supply means for supplying to the chamber;
A bottomed double cylindrical member comprising an outer wall member and an inner wall member that are arranged in the chamber and that define a common space,
Provided in a cylindrical space surrounded by the double cylindrical member with the bottom, a substrate mounting portion for mounting a substrate,
A gas inlet attached to the bottom of the outer wall member of the double cylindrical member with the bottom, for introducing the process gas into the chamber,
Numerous pores formed over the bottom and side surfaces of the inner wall member, and for blowing out a process gas introduced from a gas introduction port toward the semiconductor substrate,
An apparatus for manufacturing a semiconductor device, comprising: a discharge port for discharging a gas from the chamber; and a discharge unit for sucking a process gas in the chamber and discharging the gas to the outside. The semiconductor device manufacturing apparatus according to claim 2,
The apparatus for manufacturing a semiconductor device, wherein the process gas includes an interhalogen compound gas. 4. The apparatus for manufacturing a semiconductor device according to claim 3,
An apparatus for manufacturing a semiconductor device, wherein the process gas contains at least one of XeF2 gas and diluted F2 gas. The semiconductor device manufacturing apparatus according to claim 2, 3 or 4,
An apparatus for manufacturing a semiconductor device, wherein a diameter of a pore on a side surface of an inner wall member of the double cylindrical member with a bottom is larger than a diameter of a pore on a bottom surface of the inner wall member. The semiconductor device manufacturing apparatus according to claim 2, 3, 4, or 5,
An apparatus for manufacturing a semiconductor device, characterized in that the pores of each part of the inner wall member are formed such that the larger the distance from the discharge means, the smaller the aperture ratio. The semiconductor device manufacturing apparatus according to claim 2, 3, 4, 5, or 6,
The apparatus for manufacturing a semiconductor device, wherein the introduction port is provided only at one position substantially at the center of the outer wall member of the bottomed cylindrical member. The semiconductor device manufacturing apparatus according to claim 2, 3, 4, 5, 6, or 7,
The semiconductor device manufacturing apparatus is a parallel plate type RIE in which an upper electrode and a lower electrode are arranged in a chamber,
An apparatus for manufacturing a semiconductor device, wherein an inner wall member of the double cylindrical member with a bottom is formed by covering a conductive member constituting an upper electrode with an insulating film. The semiconductor device manufacturing apparatus according to claim 2, 3, 4, 5, 6, 7, or 8,
The semiconductor device manufacturing apparatus is an RIE in which an upper electrode and a lower electrode are arranged in a chamber,
The chamber is divided into an upper unit in which the bottomed double cylindrical member and the upper electrode are provided, and a lower unit in which the lower electrode and the substrate mounting unit are provided,
An apparatus for manufacturing a semiconductor device, wherein an upper unit is detachably attached to a lower unit. 4. The apparatus for manufacturing a semiconductor device according to claim 3,
The semiconductor device manufacturing apparatus is a dry etching apparatus,
An apparatus for manufacturing a semiconductor device, wherein at least a surface of the upper electrode is made of carbon. The manufacturing apparatus of a semiconductor device according to claim 7,
A gas flow resistance plate having a resistance function to the flow of process gas is provided between the bottom surface of the inner wall member and the bottom surface of the outer wall member inside the bottomed double cylindrical member. Semiconductor device manufacturing apparatus. The semiconductor device manufacturing apparatus according to claim 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, or 11,
In a non-plasma state, a cleaning gas supply unit that supplies a cleaning gas that generates a volatile substance with an activation energy equal to or less than a predetermined value for a depot species generated in the reaction chamber and contributes to suppression of film formation,
A discharge pipe connected to the distal end side of the discharge port and having an opening formed in a part of a side wall; a cleaning gas from the cleaning gas supply unit attached to an opening forming portion of the discharge pipe; And a cleaning member for pouring in the semiconductor device. A reaction unit for processing the semiconductor substrate in a predetermined atmosphere,
A process gas supply unit for supplying a process gas to the reaction unit,
Cleaning gas supply means for supplying a cleaning gas that generates volatile substances with an activation energy equal to or less than a predetermined value for a depot species generated in the reaction chamber in a non-plasma state and contributes to suppression of film formation;
An exhaust pipe for exhausting the process gas from the inside of the reaction chamber,
An apparatus for manufacturing a semiconductor device, comprising: a cleaning member attached to an opening forming portion of the discharge pipe, and a cleaning member for flowing a cleaning gas from the cleaning gas supply means into the discharge pipe. A chamber constituting a reaction chamber;
An upper electrode and a lower electrode, which are installed in the chamber and to which a high-frequency power is applied,
In the above-described chamber, while contributing to the formation of a required film in a plasma state, the non-plasma state generates a volatile substance with an activation energy of a predetermined value or less for a depot species generated in the chamber, thereby contributing to suppression of film formation. A gas introduction means for introducing a process gas,
An apparatus for manufacturing a semiconductor device, wherein at least a surface of the upper electrode is made of carbon.

Images