JP2004274002A - Fabricating method of solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the slight variation of the sensitivity of a light receiving part of each pixel in a solid state imaging device. <P>SOLUTION: The solid state imaging device includes a semiconductor substrate, a photoelectron conversion part, and a signal transfer part. The photoelectric conversion part has an impurity diffusion region and generates signal charges depending on the quantity of received light. The signal transfer part transfers the signal charges to a read circuit. According to the fabricating method of the solid-state imaging device of the present invention, the impurity diffusion region is formed by performing multiple times ion implantation using the same impurity ion in the same incident direction by changing a tilt angle. Performing the ion implantation twice by changing the tilt angle increases the probability for a first beam track to be different from a second beam track. Thus, a region less irradiated by the first implantation has a large probability of being more irradiated by the second implantation. Therefore, the density of the impurity implantated can be more homogenized as compared with prior cases, further reducing the slight variation of the sensitivity of each pixel. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a solid-state imaging device. Specifically, the present invention relates to a technique for reducing variation in sensitivity of a light receiving unit for each pixel in a solid-state imaging device.
[0002]
[Prior art]
In general, a solid-state imaging device includes a large number of pixels arranged in a two-dimensional matrix and a horizontal transfer unit that transfers pixel outputs to a read amplifier. Each pixel includes a light receiving unit that generates a signal charge corresponding to the amount of received light, and a vertical transfer unit that sequentially transfers the signal charge to a horizontal transfer unit.
[0003]
The structure of the light receiving portion has, for example, a high concentration P-type layer, an N-type layer, and a P-type well layer in order from the surface side of the semiconductor substrate. The high-concentration P-type layer prevents a charge spill (dark current) generated by the interface state from reaching the N-type layer. The N-type layer is formed between the high-concentration P-type layer and the P-type layer, and accumulates signal charges generated by photoelectric conversion. The P-type well layer forms an overflow barrier. In this structure, the high-concentration P-type layer and the N-type layer are usually formed by ion implantation using the vertical transfer electrode as a mask after forming a transfer electrode (hereinafter referred to as a vertical transfer electrode) of the vertical transfer portion. That is, the shape of the vertical transfer electrode determines the opening shape of the light receiving portion.
[0004]
The vertical transfer electrode may have a constricted portion in terms of accuracy such as photolithography resolution. For this reason, when impurity ions are implanted from one direction, the impurity ions are not implanted into the region below the constricted portion. Therefore, the region under the constricted portion is not formed as a high-concentration P-type layer but becomes an impurity-unformed region. Since the impurity-unformed region exists at the time of the vertical transfer electrode, it is easily depleted when a positive voltage is applied to the vertical transfer electrode. Therefore, the impurity-unformed region tends to generate a dark current and may adversely affect the image quality in the dark.
[0005]
Therefore, Patent Document 1 proposes a method of performing ion implantation for forming a light receiving portion in multiple directions in a plurality of times. Thus, an attempt is made to form an impurity diffusion region also in the region below the constricted portion.
[Patent Document 1]
JP-A-2001-308304 (Section 2-4, Fig. 3-8)
[0006]
[Problems to be solved by the invention]
By the way, in the solid-state imaging device, it is desirable that the sensitivity of the light receiving unit for each pixel is uniform. This is because if the variation in sensitivity of the light receiving unit for each pixel is large, slight luminance unevenness may occur in the captured image. The variation in sensitivity becomes larger as the solid-state imaging device has a larger area of the light receiving portion. However, in Patent Document 1 described above, no consideration is given to variations in sensitivity of the light receiving unit.
[0007]
Accordingly, an object of the present invention is to provide a technique for reducing variation in sensitivity of a light receiving unit for each pixel in a solid-state imaging device.
[0008]
[Means for Solving the Problems]
In the first to fifth aspects of the invention, the solid-state imaging device includes a semiconductor substrate, a photoelectric conversion unit, and a signal transfer unit. The photoelectric conversion unit has an impurity diffusion region formed in the semiconductor substrate, and generates a signal charge corresponding to the amount of received light. The signal transfer unit is formed on the semiconductor substrate and transfers signal charges generated by the photoelectric conversion unit to the readout circuit.
[0009]
The method of manufacturing a solid-state imaging device according to claim 1 forms an impurity diffusion region by a plurality of implantation steps in which ion implantation is performed a plurality of times using the same impurity ions in the same incident direction and with a different tilt angle. It is characterized by doing.
The method for manufacturing a solid-state imaging device according to claim 2 is characterized in that the impurity diffusion region is formed by a plurality of implantation steps including a first step, a second step, and a third step. In the first step, ion implantation is performed on the semiconductor substrate at a first tilt angle. In the second step, after the first step, the semiconductor substrate is rotated at a predetermined angle in parallel with both surfaces of the semiconductor substrate around the central portion of the semiconductor substrate. In the third step, after the second step, ion implantation is performed at a second tilt angle different from the first tilt angle on the semiconductor substrate that has stopped rotating.
[0010]
According to a third aspect of the present invention, there is provided a method for manufacturing a solid-state imaging device, wherein the impurity diffusion region is formed by a plurality of implantation steps including a first step and a second step. In the first step, impurity ions are implanted into the semiconductor substrate by the first ion implantation apparatus. In the second step, the same impurity ions as those implanted in the first step are implanted into the semiconductor substrate by a second ion implantation device different from the first ion implantation device.
[0011]
According to a fourth aspect of the present invention, there is provided the method for manufacturing a solid-state imaging device according to any one of the first to third aspects, wherein the implantation step is performed a plurality of times under the same conditions of the dose and the acceleration voltage. .
According to a fifth aspect of the present invention, there is provided a solid-state imaging device manufacturing method according to any one of the first to fourth aspects, characterized by the following three points. First, the photoelectric conversion unit includes a first conductivity type surface region formed on the surface side of the semiconductor substrate, and a second conductivity type buried region formed adjacent to the inner side of the semiconductor substrate in the surface region. Embedded photodiode having Second, the surface region is formed by a plurality of implantation steps for implanting ions of the first conductivity type. Third, the buried region is formed by a plurality of implantation steps for implanting ions of the second conductivity type.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 shows a block diagram of a solid-state imaging device according to the present invention. This embodiment corresponds to claims 1, 4, and 5. In the figure, the solid-state imaging device 10 is composed of a large number of pixels 12 arranged in a two-dimensional matrix, a horizontal CCD 16, and a readout amplifier 18.
[0013]
Each pixel 12 includes a sensor unit 22, a read gate region 23, and a vertical CCD 24. The sensor unit 22 generates and accumulates signal charges corresponding to the amount of received light. The vertical CCD 24 sequentially transfers the signal charges (pixel output) generated by the sensor unit 22 to the horizontal CCD 16. The horizontal CCD 16 sequentially transfers signal charges transferred from the vertical CCD 24 to the read amplifier 18.
[0014]
FIG. 2 is a schematic cross-sectional view of a unit pixel of the solid-state imaging device 10 of FIG. Each pixel 12 is configured by forming each part on a P-type well region 30 formed on an N-type semiconductor substrate 28. First, the sensor unit 22 is formed as an embedded photodiode including a P-type surface region 34 and an N-type embedded region 36.
[0015]
The vertical CCD 24 includes an N-type buried channel region 40, a P-type region 42 below the N-type buried channel region 40, and a transfer electrode 46 formed above the buried channel region 40 with an insulating film 44 interposed therebetween. The transfer electrode 46 is formed by, for example, polysilicon so as to extend to the edge of the P-type surface region 34. Signal charges accumulated in the N-type buried region 36 are transferred to the buried channel region 40 via the read gate region 23.
[0016]
Further, a P-type channel stop region 54 is formed on the opposite side of the sensor portion 22 from the readout gate region 23. The upper part of the transfer electrode 46 of the vertical CCD 24 is covered with a light shielding film 58 through the insulating film 44 so that the sensor unit 22 is opened. The light shielding film 58 is made of, for example, aluminum.
The correspondence between the claims and the present embodiment will be described below. In addition, the correspondence shown below is one interpretation shown for reference, and does not limit the present invention.
[0017]
The photoelectric conversion unit described in the claims corresponds to the sensor unit 22.
The signal transfer unit described in claims corresponds to the vertical CCD 24 and the horizontal CCD 16.
The readout circuit described in the claims corresponds to the readout amplifier 18.
One of “N-type semiconductor conductivity type” and “P-type semiconductor conductivity type” corresponds to “first conductivity type” in claims, and the other corresponds to “second conductivity type” in claims. To do.
[0018]
FIG. 3 is a schematic process cross-sectional view showing the main part of the method for manufacturing the solid-state imaging device 10 described above. Hereinafter, the manufacturing method of the solid-state imaging device 10 will be described with reference to FIG.
First, the horizontal CCD 16, the vertical CCD 24, the channel stop region 54, etc. are formed by the same manufacturing process as in the prior art.
[0019]
Next, in order to form the N-type buried region 36 of the sensor unit 22, ion implantation is performed twice using an ion implantation apparatus (not shown). FIG. 3A shows this state. In these two injections, the injection condition changes only the tilt angle and does not change the incident direction and the like. As the implantation conditions, for example, the ion species is P ⁺ (phosphorus with an atomic weight of 31), the acceleration voltage is 130 keV, the dose amount is 2 × 10 ¹² cm ⁻² , the first implantation tilt angle θ1 is 12 °, and the second implantation. The tilt angle θ2 is set to 16 °.
[0020]
In this embodiment, the tilt angle (incident angle) is “an angle at which impurity ions are irradiated during ion implantation is tilted many times from a direction perpendicular to the surface of the semiconductor substrate (thickness direction of the semiconductor substrate). Means "?" In the present embodiment, the incident direction (implantation direction) is “when the ion-implanted semiconductor substrate in the state of a wafer is regarded as a clock face, from what direction (incident direction) from which impurity ions are implanted”. means.
[0021]
Next, in order to form the P-type surface region 34 of the sensor unit 22, ion implantation is performed twice while changing only the tilt angle among the implantation conditions. FIG. 3B shows this state. As the implantation conditions, for example, the ion species is B ⁺ (boron having an atomic weight of 11), the acceleration voltage is 50 keV, the dose is 5 × 10 ¹² cm ⁻² , the tilt angle θ3 of the first implantation is 7 °, and the second implantation. The tilt angle θ4 is set to 10 °. In these two injections, the incident direction is not changed.
[0022]
Next, impurity ions in each layer are activated by heat treatment. FIG. 3C shows this state. Thereafter, the same process as the conventional one is performed to form the structure shown in FIG.
Of the ionized acceptor impurities (B ^{+ in} this example) and the ionized donor impurities (P ^{+ in} this example), one corresponds to the “first conductivity type impurity ion” in the claims, and the other corresponds to This corresponds to “second conductivity type impurity ions” in the claims.
[0023]
Hereinafter, the difference between the conventional manufacturing method and the manufacturing method of this embodiment will be described. First, the reason why the sensitivity of the light receiving portion varies from pixel to pixel in the conventional manufacturing method will be described.
FIG. 4A is an explanatory diagram showing a conventional ion implantation locus on the surface of a semiconductor wafer. FIG. 4B is a schematic plan view in which a region of a one-chip solid-state imaging device is enlarged in FIG. In general, in the ion implantation process, as shown in FIG. 4A, an ion beam is irradiated on the entire surface of the wafer like a single stroke.
[0024]
The actual ion beam trajectory is dense as shown in FIG. 4B, and there is little irradiation unevenness in one-stroke irradiation from one end of the wafer to the other (opposite) end. It is controlled to become. For example, when the beam cross section is circular, in the portion where the center of the beam cross section passes, the time for receiving irradiation is longer than in other portions in one horizontal scanning (see FIG. 4A). In this case, for example, if scanning is performed so that the trajectories in the horizontal direction of the beams overlap with each other at an appropriate level, irradiation unevenness is reduced in one-stroke writing. Actually, variations in the concentration of implanted impurity ions are reduced by performing one-stroke irradiation from one end of the wafer toward the other end (opposite side) or in a reverse direction.
[0025]
However, there are still portions with a large amount of irradiation and portions with a small amount of irradiation. In the region below the portion where the irradiation amount is large, the impurity concentration is high. This variation in the impurity concentration is due to the beam trajectory, and is different for each ion implantation apparatus. Usually, the variation of the implanted impurity concentration is less than 1%, but the impurity concentration of the impurity diffusion region for photoelectric conversion varies slightly for each pixel. The inventors have clarified that this variation slightly varies the sensitivity of the light receiving unit for each pixel.
[0026]
In a semiconductor device that requires extremely uniform characteristics over the entire area of one chip, such as a solid-state imaging device, it is desirable that there is no slight variation. Therefore, in the present embodiment, a manufacturing method different from the conventional one has been proposed in order to further reduce slight variations in the impurity concentration for each pixel due to the beam trajectory unique to the ion implantation apparatus.
FIG. 5 is a schematic plan view showing a beam trajectory when ion implantation is performed twice while changing only the tilt angle as in the present embodiment. As described above, the actual beam trajectory is denser than that shown in FIG.
[0027]
As shown in FIG. 5, if ion implantation is performed twice while changing the tilt angle, there is a very high probability that the second beam trajectory is different from the first beam trajectory due to the characteristics of the ion implantation apparatus. This is because the direct-angle cross section of the ion beam changes because the tilt angle is changed. That is, in a portion where the irradiation amount is small in the first injection, there is a high possibility that the irradiation amount in the second injection is larger than that in the first injection. Therefore, the irradiation amount of the beam, that is, the concentration of implanted impurities can be made uniform over the entire area of the wafer. As a result, slight variations in the sensitivity of the sensor unit 22 for each pixel 12 due to the beam trajectory unique to the ion implantation apparatus can be further reduced.
[0028]
<Second Embodiment>
FIG. 6 shows the main part of the method for manufacturing a solid-state imaging device in the second embodiment of the present invention. This embodiment corresponds to claim 2, claim 4, and claim 5. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. The present embodiment is the same as the first embodiment except that the process of forming the P-type surface region 34 and the N-type buried region 36 of the sensor unit 22 is different.
[0029]
In the step of forming the N-type buried region 36 in this embodiment, ion implantation is performed twice while changing only the tilt angle and the incident direction among the implantation conditions. Conditions other than the incident direction in the first and second implantations may be the same as those in the first and second phosphorus implantations described in the first embodiment, for example. The incident direction of the first implantation is, for example, the orientation flat direction as shown in FIG. In the second implantation, as shown in FIG. 6B, the semiconductor substrate 28 is rotated by 120 ° around the center point of the substrate, and the incident direction is shifted by 120 ° from the first implantation.
[0030]
Similarly, in the step of forming the P-type surface region 34, ion implantation is performed twice while changing only the tilt angle and the incident direction in the implantation conditions. Conditions other than the incident direction in the first and second implantations may be the same as those in the first and second boron implantations described in the first embodiment, for example. As described above, in the second injection, the incident direction is shifted by 120 ° from the first injection.
[0031]
FIG. 7 is a schematic diagram of a result of irradiating uniform light to all the solid-state imaging elements formed on one wafer and measuring the output from each pixel. However, this measurement result is obtained by measuring the output from each pixel by irradiating the light receiving surface with uniform light after each solid-state imaging device is finally mounted. FIG. 7A corresponds to the measurement result of the solid-state imaging device manufactured by the conventional manufacturing method, and FIG. 7B shows the measurement result of the solid-state imaging device 10 manufactured by the manufacturing method of the present embodiment. Correspond.
[0032]
As is apparent from FIG. 7A, the sensitivity varies from pixel to pixel in the conventional manufacturing method. The highly sensitive region can be almost determined to be a region where the irradiation amount has increased due to the beam trajectory as in one stroke writing at the time of ion implantation. On the other hand, in the solid-state imaging device 10 according to the manufacturing method of the present embodiment, there is almost no variation in sensitivity as shown in FIG.
[0033]
As mentioned above, also in 2nd Embodiment, the effect similar to 1st Embodiment can be acquired. Furthermore, in the present embodiment, the second ion implantation is performed by changing the tilt angle from another direction shifted by 120 ° from the first time. For this reason, the beam trajectory of the second ion implantation intersects the first trajectory. Therefore, the possibility that the portion with a small amount of beam irradiation in the first injection is more likely to receive the irradiation in the second injection than in the first injection is further increased. As a result, the impurity implantation concentration over the entire area of the wafer, that is, the sensitivity of the sensor unit 22 between the pixels 12 of the solid-state imaging device 10 can be made almost uniform.
[0034]
<Third Embodiment>
FIG. 8 is a flowchart showing the main part of the method for manufacturing a solid-state imaging device in the third embodiment of the present invention. This embodiment corresponds to claims 3 to 5. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. The present embodiment is the same as the first embodiment except that the process of forming the P-type surface region 34 and the N-type buried region 36 of the sensor unit 22 is different. Hereinafter, according to the step numbers shown in FIG. 7, the manufacturing method of the solid-state image sensor in this embodiment is demonstrated.
[0035]
[Step S1]
The horizontal CCD 16, the vertical CCD 24, the channel stop region 54, etc. are formed on a number of semiconductor wafers (semiconductor substrate 28) in the same process as before. Next, these semiconductor wafers are divided into two groups of A lot and B lot.
[Step S2]
In order to form the N-type buried region 36 in the semiconductor wafer of A lot, phosphorus is implanted using an ion implantation apparatus 66A (not shown). The implantation conditions at this time may be the same as the first phosphorus implantation described in the first embodiment, for example.
[0036]
At the same time, in order to form the N-type buried region 36 in the semiconductor wafer of B lot, phosphorus is implanted using an ion implanter 66B (not shown) different from the ion implanter 66A. The injection conditions at this time are the same as those for the A lot.
[Step S3]
In order to reduce the unevenness of the impurity concentration in the N-type buried region 36, phosphorus is implanted into the semiconductor wafer of A lot using the ion implantation apparatus 66B. At the same time, phosphorus is implanted into the semiconductor wafer of B lot using the ion implantation apparatus 66A. The injection conditions at this time are both the same as in step S2.
[0037]
[Step S4]
The P-type surface region 34 is formed by the same process as Steps S2 and S3. First, boron is implanted into the A-lot semiconductor wafer using an ion implanter 66C (not shown), and boron is implanted into the B-lot semiconductor wafer using an ion implanter 66D (not shown). The ion implanters 66C and 66D are different from each other. Next, boron is implanted into the semiconductor wafer of A lot using the ion implantation apparatus 66D, and boron is implanted into the semiconductor wafer of B lot using the ion implantation apparatus 66C. The injection conditions at this time are all the same. For example, the same conditions as those for the first boron implantation described in the first embodiment may be used. Thereafter, the same process as the conventional one is carried out to form the structure shown in FIG.
[0038]
As described above, the beam trajectory is unique to the ion implantation apparatus, and the beam trajectory is slightly different even when irradiation is performed under the same conditions using two apparatuses of the same model number manufactured by the same manufacturer. This is because, for example, the shape, size, mounting position, and the like of the beam irradiation port vary slightly due to processing accuracy in manufacturing the ion implantation apparatus.
For this reason, if implantation is performed twice by two different ion implantation apparatuses as in this embodiment, the beam trajectory of the second implantation is very likely to be different from the first trajectory. Therefore, also in this embodiment, the same effect as that of the first embodiment can be obtained. In addition, a total of four ion implantations in steps S2 and S3 are performed under the same conditions, and a total of four ion implantations in step S4 are also performed under the same conditions. That is, since the same ion implantation process can be simultaneously performed using a plurality of ion implantation apparatuses, the time can be shortened.
[0039]
<Supplementary items of the present invention>
In the first and second embodiments, the example in which ion implantation for forming one impurity diffusion region is performed twice has been described. The present invention is not limited to such an embodiment. Ion implantation for forming one impurity diffusion region may be performed three or more times by changing the tilt angle each time. In this case, it is possible to further expect a uniform impurity concentration.
[0040]
In the second embodiment, the example in which the incident direction is changed by 120 ° in the first and second ion implantations has been described. The present invention is not limited to such an embodiment. The semiconductor substrate 28 may be rotated at an angle such that the first and second beam trajectories are definitely different. If the angle at which the semiconductor substrate 28 is rotated is defined in the range of 0 ° to 180 °, this rotation angle is preferably in the range of 10 ° to 170 °.
[0041]
In the second embodiment, the example in which the incident direction of the ion implantation is changed by rotating the semiconductor substrate 28 has been described. The present invention is not limited to such an embodiment. If the relative position relationship between the ion irradiation port of the ion implantation apparatus and the semiconductor substrate 28 is maintained, the incident direction of the ion implantation may be changed by changing the position (orientation) of the ion irradiation port.
[0042]
In the third embodiment, the example in which one impurity diffusion region is formed using two ion implantation apparatuses has been described. The present invention is not limited to such an embodiment. When forming one impurity diffusion region, ion implantation may be performed three times (or four times or more) using three (or four or more) ion implantation apparatuses. In this case, slight variations in the concentration of implanted impurities can be further reduced over the entire area of the wafer.
[0043]
In the third embodiment, an example in which all the implantation conditions are the same when ion implantation is performed twice using two ion implantation apparatuses in order to form one impurity diffusion region has been described. The present invention is not limited to such an embodiment. For each ion implantation apparatus, ion implantation may be performed by changing only the tilt angle or only the incident direction. Alternatively, ion implantation may be performed by changing the tilt angle and the incident direction for each ion implantation apparatus.
[0044]
In the third embodiment, an example has been described in which ion implantation is performed twice using two different ion implantation apparatuses in order to form one impurity diffusion region. The present invention is not limited to such an embodiment. For the reasons described above, two ion implanters of the same model and made by the same manufacturer may be used.
In the first to third embodiments, the example in which the P-type surface region 34 is formed after the N-type buried region 36 is formed has been described. The present invention is not limited to such an embodiment. After forming the P-type surface region 34, the N-type buried region 36 may be formed.
[0045]
【The invention's effect】
According to the method for manufacturing a solid-state imaging device of the present invention, it is possible to reduce variations in the concentration of implanted impurities due to the beam trajectory unique to the ion implantation apparatus. For this reason, the slight variation in the sensitivity of the light receiving unit for each pixel in the solid-state imaging device can be further reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram of a solid-state imaging device according to a first embodiment.
FIG. 2 is a schematic cross-sectional view of a unit pixel of the solid-state imaging device according to the first embodiment.
FIG. 3 is a schematic cross-sectional process diagram illustrating a main part of a method for manufacturing a solid-state imaging device in the first embodiment.
FIG. 4 is an explanatory diagram showing a beam locus of conventional ion implantation on the surface of a semiconductor wafer.
FIG. 5 is an explanatory diagram showing a beam trajectory when ion implantation is performed while changing the tilt angle in the first embodiment.
FIG. 6 is an explanatory diagram illustrating a main part of a method for manufacturing a solid-state imaging device according to a second embodiment.
FIG. 7 is a schematic plan view showing the result of irradiating uniform light to all the solid-state imaging devices formed on one wafer and measuring the output from each pixel.
FIG. 8 is a flowchart illustrating a method for manufacturing a solid-state imaging element according to a third embodiment.
[Explanation of symbols]
10 Solid-state image sensor 12 Pixel 16 Horizontal CCD
18 Reading Amplifier 22 Sensor Unit 23 Reading Gate Area 24 Vertical CCD
28 Semiconductor substrate 30 P-type well region 34 P-type surface region 36 N-type buried region 40 Embedded channel region 42 P-type region 44 Insulating film 46 Transfer electrode 54 Channel stop region 58 Light-shielding film 66A, 66B, 66C, 66D Ion implantation apparatus

Claims (5)

A semiconductor substrate;
A photoelectric conversion unit having an impurity diffusion region formed in the semiconductor substrate and generating a signal charge according to the amount of received light;
A method for manufacturing a solid-state imaging device, comprising: a signal transfer unit that is formed on the semiconductor substrate and that transfers a signal charge generated by the photoelectric conversion unit to a readout circuit;
Manufacturing of a solid-state imaging device, wherein the impurity diffusion region is formed by a plurality of implantation steps in which ion implantation is performed a plurality of times using the same impurity ions in the same incident direction and with a different tilt angle. Method. A semiconductor substrate;
A photoelectric conversion unit having an impurity diffusion region formed in the semiconductor substrate and generating a signal charge according to the amount of received light;
A method for manufacturing a solid-state imaging device, comprising: a signal transfer unit that is formed on the semiconductor substrate and that transfers a signal charge generated by the photoelectric conversion unit to a readout circuit;
A first step of implanting ions into the semiconductor substrate at a first tilt angle;
After the first step, a second step of rotating the semiconductor substrate by a predetermined angle in parallel with both surfaces of the semiconductor substrate around the central portion of the semiconductor substrate;
Forming the impurity diffusion region in the semiconductor substrate after rotation by a plurality of implantation steps including a third step of performing ion implantation at a second tilt angle different from the first tilt angle; A method for manufacturing a solid-state imaging device. A semiconductor substrate;
A photoelectric conversion unit having an impurity diffusion region formed in the semiconductor substrate and generating a signal charge according to the amount of received light;
A method for manufacturing a solid-state imaging device, comprising: a signal transfer unit that is formed on the semiconductor substrate and that transfers a signal charge generated by the photoelectric conversion unit to a readout circuit;
A first step of implanting impurity ions into the semiconductor substrate by a first ion implantation apparatus;
A plurality of implantation steps including a second step of implanting the same impurity ions as those implanted in the first step into the semiconductor substrate by a second ion implantation device different from the first ion implantation device; The impurity diffusion region is formed by the method described above. In the manufacturing method of the solid-state image sensing device according to any one of claims 1 to 3,
The method of manufacturing a solid-state imaging device, wherein the multiple injection step is performed under the same conditions of a dose amount and an acceleration voltage. In the manufacturing method of the solid-state image sensor of any one of Claims 1-4,
The photoelectric conversion unit includes a first conductivity type surface region formed on a surface side of the semiconductor substrate, and a second conductivity type buried region formed adjacent to the inner side of the semiconductor substrate in the surface region. Embedded photodiode having
The surface region is formed by the multiple implantation step of implanting impurity ions of the first conductivity type,
The method of manufacturing a solid-state imaging device, wherein the buried region is formed by the plurality of implantation steps of implanting second conductivity type impurity ions.

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