JP2004273998A - Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component - Google Patents

Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component Download PDF

Info

Publication number
JP2004273998A
JP2004273998A JP2003066484A JP2003066484A JP2004273998A JP 2004273998 A JP2004273998 A JP 2004273998A JP 2003066484 A JP2003066484 A JP 2003066484A JP 2003066484 A JP2003066484 A JP 2003066484A JP 2004273998 A JP2004273998 A JP 2004273998A
Authority
JP
Japan
Prior art keywords
electronic component
substrate
mounting
filler
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003066484A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Wada
義之 和田
Tadahiko Sakai
忠彦 境
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2003066484A priority Critical patent/JP2004273998A/en
Publication of JP2004273998A publication Critical patent/JP2004273998A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/29078—Plural core members being disposed next to each other, e.g. side-to-side arrangements

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of mounting an electronic component and an electronic component mounting structure of superior reliability to thermal fatigue, and to provide an adhesive material for mounting an electronic component. <P>SOLUTION: In the method for mounting an electronic component in which an electronic component 1 with a connecting electrode 4 formed on its side face, is mounted on a substrate 5 by solder-joining, a solder is supplied to a circuit electrode 6 of the substrate 5, and an adhesive material 8 containing a filler 9 whose maximum size is 30 μm or more, is applied to an electronic component mounting position, and then the electronic component 1 is mounted. By this, a bonding part 18 where the adhesive material is hardened between the electronic component 1 and the substrate, and a solder coupling part 17 where the connecting electrode 4 is coupled to the circuit electrode 6 by soldering under a condition where the electronic component 1 is separated from the substrate 5 by a filler 9, are formed, so that stand off between a bottom surface of the electronic component 1 and a top surface of the substrate 5 is secured. Reliability to thermal fatigue is improved by lowering a stress level at the time of a heat cycle. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、側面に接続用電極が形成された電子部品を半田接合により基板に実装する電子部品実装方法および電子部品実装構造ならびにこの電子部品実装方法に用いられる電子部品実装用の接着材に関するものである。
【０００２】
【従来の技術】
セラミックパッケージなどの小型基板に半導体素子を実装した構造の電子部品の種類として、外部接続用のリードを設けることなく、セラミックパッケージの側面に接続用電極を直接設けたリードレスの電子部品が知られている。このような構造の電子部品では、セラミックパッケージに実装された半導体素子の外部接続用電極が、セラミックパッケージ内部に形成された配線回路によって側面の接続用電極に接続されている。そしてこのようなリードレスの電子部品を基板に実装する際には、側面の接続用電極を基板の回路電極と半田接合することにより、セラミックパッケージを基板に固着するとともにに、接続用電極を基板の回路電極と導通させる（例えば特許文献１参照）。
【０００３】
【特許文献１】
特開２００３−８１６５号公報
【０００４】
【発明が解決しようとする課題】
ところでリードレスの電子部品を基板に半田接合した電子部品実装構造においては、通常のリード部品のように電子部品の下面と基板の上面との間に十分なスタンドオフが確保されにくく、電子部品の下面が基板の上面と殆ど密着した状態で半田接合される場合もある。このような構成の電子部品実装構造には、実装後の信頼性に関して次のような問題点があった。
【０００５】
基板の回路電極と電子部品の接続用電極とを連結して導通させる半田接合部には、実装後のヒートサイクルにおいて繰り返し熱応力が作用するが、この熱応力は半田接合部を破断させる原因となるため、実装後の応力レベルを極力低くすることが望ましい。このため、応力レベルの低下を目的として、電子部品の下面と基板上面との間にスタンドオフを確保して半田接合部の変形が許容されるような実装構造とすることや、電子部品の下面と基板上面との間にアンダーフィル樹脂を封入して応力緩和層としての機能を持たせることなどが行われる。
【０００６】
しかしながら、リードレスの電子部品を半田接合によって実装する場合には、前述のように電子部品の下面が基板の上面と殆ど密着した状態となることから、スタンドオフを確保した実装構造やアンダーフィル樹脂による応力緩和層の形成が不可能であった。このため実装後の応力レベルを低下することができず、熱疲労に対する信頼性を向上させることが困難であるという問題点があった。
【０００７】
そこで本発明は、熱疲労に対する信頼性に優れた電子部品実装方法および電子部品実装構造ならびに電子部品実装用の接着材を提供することを目的とする。
【０００８】
【課題を解決するための手段】
請求項１記載の電子部品実装方法は、側面に接続用電極が形成された電子部品を半田接合により基板に実装する電子部品実装方法であって、前記基板に形成された回路電極に半田を供給する半田供給工程と、前記基板上面の電子部品実装位置に最大サイズが３０μｍ以上のフィラーを含有する接着材を塗布する接着材塗布工程と、前記接着材が塗布された電子部品実装位置に電子部品を搭載する部品搭載工程と、搭載された電子部品の下面と基板上面との間に前記フィラーを介在させた状態で半田を溶融固化させることにより、前記電子部品の下面が基板の上面から隔てられた状態で前記接続用電極を前記回路電極に半田により連結するリフロー工程とを含む。
【０００９】
請求項２記載の電子部品実装方法は、請求項１記載の電子部品実装方法であって、前記接着材は、前記リフロー工程における前記接続用電極の前記回路電極に対するセルフアライメント動作を妨げない。
【００１０】
請求項３記載の電子部品実装方法は、請求項１記載の電子部品実装方法であって、前記接着材中の前記フィラーの含有率が、１０ｗｔ％以下である。
【００１１】
請求項４記載の電子部品実装方法は、請求項１記載の電子部品実装方法であって、前記フィラーのサイズの公差が、±２０％以下である。
【００１２】
請求項５記載の電子部品実装構造は、側面に接続用電極が形成された電子部品を半田接合により基板に実装して成る電子部品実装構造であって、最大サイズが３０μｍ以上のフィラーを含有した接着材が前記電子部品の下面と基板上面との間で硬化した接着部と、前記フィラーによって前記電子部品の下面が基板の上面から隔てられた状態で前記接続用電極を基板の上面に形成された回路電極に半田により連結する半田連結部とを有する。
【００１３】
請求項６記載の電子部品実装用の接着材は、側面に接続用電極が形成された電子部品を半田接合により基板に実装する電子部品実装方法において前記電子部品の基板への搭載に先立って基板上面の電子部品実装位置に塗布される電子部品実装用の接着材であって、最大サイズが３０μｍ以上のフィラーを含有する。
【００１４】
請求項７記載の電子部品実装用の接着材は、請求項６記載の電子部品実装用の接着材であって、前記フィラーの含有率が、１０ｗｔ％以下である。
【００１５】
請求項８記載の電子部品実装用の接着材は、請求項６記載の電子部品実装用の接着材であって、前記フィラーのサイズの公差が、±２０％以下である。
【００１６】
本発明によれば、電子部品の下面と基板上面との間にフィラーを介在させた状態で半田を溶融固化させ、電子部品の下面が基板の上面と隔てられた状態で接続用電極を回路電極に半田で連結することにより、電子部品の下面と基板上面との間のスタンドオフを確保することができ、ヒートサイクル時の応力レベルを低下させて信頼性を向上させることができる。
【００１７】
【発明の実施の形態】
次に本発明の実施の形態を図面を参照して説明する。図１は本発明の一実施の形態の電子部品実装方法の対象となる電子部品の斜視図、図２は本発明の一実施の形態の電子部品実装方法の工程説明図、図３は本発明の一実施の形態の電子部品実装用の接着材の構成説明図、図４は本発明の一実施の形態の電子部品実装方法の工程説明図、図５は本発明の一実施の形態の電子部品実装方法の対象となる電子部品の斜視図である。
【００１８】
まず図１を参照して、実装対象となる電子部品の構造について説明する。図１において電子部品１は、セラミックより成るパッケージ基板２の中央部に形成された凹部２ａ内に半導体素子３を実装した構成となっている。パッケージ基板２の側面２ｂには外部接続用電極４が形成されている。
【００１９】
外部接続用電極４は、個片に分離される前の状態のパッケージ基板２を上下に貫通するスルーホールの内面に導体金属をメッキすることにより形成され、パッケージ基板２内部の配線回路によって半導体素子３と接続されている。電子部品１を基板に実装する際には、外部接続用電極４を基板に形成された回路電極と半田接合することにより、パッケージ基板２の本体を基板に固着させるとともに、外部接続用電極４を回路電極と導通させる。
【００２０】
次に図２を参照して、電子部品１を基板に実装する電子部品実装方法について説明する。図２（ａ）に示すように、基板５の上面には回路電極６が形成されている。回路電極６の上面には、図２（ｂ）に示すように、クリーム半田７がスクリーン印刷により供給される（半田供給工程）。
【００２１】
次いで、図２（ｃ）に示すように、基板５上面の回路電極６の間（電子部品実装位置）には、接着材８が塗布される（接着材塗布工程）。この接着材塗布は、図２に示すように接着材８を複数点委塗布する塗布パターン以外に、電子部品実装位置の中央に集中して塗布する塗布パターンを用いてもよい。
【００２２】
接着材８は、図３に示すように、樹脂接着材８ａに粒子状のフィラー９を１０ｗｔ％以下の含有率で含有させた組成となっている。樹脂接着材８ａは、リフロー過程において少なくとも半田が溶融した直後までは、溶融した半田によるセルフアライメント効果を阻害しない程度の流動状態を保っているような性状のものが用いられる。
【００２３】
またフィラー９としては、シリカやアルミナなどの無機物や樹脂を所定サイズの粒子状にしたものが用いられる。ここでフィラー９の製造過程においては、粒子の最大サイズが３０μｍ以上となるように、且つ各粒子のサイズのばらつきを示す公差が±２０％以下となるように粒径管理される。
【００２４】
この後図２（ｄ）に示すように、基板５上には電子部品１が搭載され（部品搭載工程）、外部接続用電極４が回路電極６上のクリーム半田７と接触するとともに、電子部品１の下面が接着材８と接触する。そして部品搭載後の基板５はリフロー炉に送られ、ここで加熱される（リフロー工程）。これにより、クリーム半田７中の半田成分が溶融し、外部接続用電極４が回路電極６に半田接合される。このリフロー過程における電子部品１および溶融半田の挙動について、図４を参照して説明する。
【００２５】
図４（ａ）は、回路電極６上でクリーム半田７中の半田成分が溶融して流動性のある溶融半田７ａとなった状態を示している。この状態においては、前述のように接着材８中の樹脂接着材８ａは未だ完全に熱硬化しておらず流動状態にある。このため、部品搭載工程において電子部品１の搭載位置が多少位置ずれしていても、溶融半田７ａが回路電極６上で濡れ拡がる際の表面張力によるセルフアライメント効果のため、電子部品１の位置ずれが補正される。
【００２６】
この半田溶融に伴い、電子部品１は自重により、また溶融半田７ａの表面張力により、下方に変位して回路電極６に引きつけられる。このとき、接着材８に含有されるフィラー９によって電子部品１の下方への移動が妨げられる。そして図４（ｂ）に示すように、電子部品１の下面と基板５の上面との間にフィラー９を介在させた状態で溶融半田７ａが固化し、外部接続用電極４と回路電極６とを半田により連結する半田連結部１７が形成される。
【００２７】
すなわち、このリフロー工程においては、電子部品１の下面がフィラー９によって基板５の上面から隔てられた状態で、接続用電極４を回路電極６に半田により連結する。そしてこのリフロー過程での加熱により、接着材８中の樹脂接着材８ａが熱硬化し、電子部品１を基板５に固着させる。
【００２８】
このとき、電子部品１の下面と基板５の上面との間のスタンドオフ寸法ｈの下限値はフィラー９の最大サイズによって規定され、最大サイズＤｍａｘ（本実施の形態では３０μｍ以上）より小さくなることはない。すなわち、最大サイズＤｍａｘを適切に設定することにより、対象とする電子部品１に応じた所望のスタンドオフ寸法ｈを得ることができる。またフィラー９のサイズのばらつきを所定公差（ここでは±２０％以下）で収めるように粒径管理しているため、リフロー過程での電子部品１の水平方向に対する傾きを所定範囲内に収めることができる。
【００２９】
これにより、図２（ｄ）に示すように、最大サイズが３０μｍ以上のフィラー９を含有した接着材８が電子部品１の下面と基板５の上面との間で硬化した接着部１８と、フィラー９によって電子部品１の下面が基板５の上面から隔てられた状態で接続用電極４を基板５の上面に形成された回路電極６に半田により連結する半田連結部１７とを有する電子部品実装構造が実現される。
【００３０】
この電子部品実装構造においては、電子部品１の下面と基板５の上面との間にスタンドオフが確保されていることから、実装後のヒートサイクルにおいて繰り返し熱応力が作用する際に、電子部品１と基板５との熱膨張係数の差に起因する水平方向の相対変位が、半田連結部１７によって吸収されやすくなる。したがって実装後に半田接合部を破断させる原因となる熱応力レベルを極力低くすることができる。
【００３１】
また電子部品１の下面と基板２との間には接着材８が熱硬化した接着部１８が形成されることから、この接着部１８に上述の熱応力を軽減させる応力緩和層としての機能を持たせることができる。このようにして熱応力レベルを低下させることにより、熱疲労に対する信頼性に優れた電子部品実装構造が実現される。
【００３２】
なお上記実施の形態では、スルーホール内面にメッキにより形成された外部接続用電極４を回路電極６に半田により連結する例を示したが、本発明はこの例に限定されるものではなく、例えば図５に示すような電子部品に対しても適用可能である。すなわち、図５では、パッケージ基板１２に半導体素子１３を実装した構成の電子部品１１において、パッケージ基板１２の側面１２ｂから外部接続用電極としての端子電極１４を短い張出寸法で横方向に延出させた構造となっている。
【００３３】
このような電子部品１１を対象とする場合にあっても、前述の接着材８を用いた電子部品実装方法を適用することにより、電子部品１１の下面と基板との間にスタンドオフを確保した状態で端子電極１４を基板の回路電極と半田によって連結することができ、上述の例と同様の効果を得る。
【００３４】
【発明の効果】
本発明によれば、電子部品の下面と基板上面との間にフィラーを介在させた状態で半田を溶融固化させ、電子部品の下面が基板の上面と隔てられた状態で接続用電極を回路電極に半田により連結する構成としたので、電子部品の下面と基板上面との間のスタンドオフを確保することができ、ヒートサイクル時の応力レベルを低下させて信頼性を向上させることができる。
【図面の簡単な説明】
【図１】本発明の一実施の形態の電子部品実装方法の対象となる電子部品の斜視図
【図２】本発明の一実施の形態の電子部品実装方法の工程説明図
【図３】本発明の一実施の形態の電子部品実装用の接着材の構成説明図
【図４】本発明の一実施の形態の電子部品実装方法の工程説明図
【図５】本発明の一実施の形態の電子部品実装方法の対象となる電子部品の斜視図
【符号の説明】
１ 電子部品
２ パッケージ基板
３ 半導体素子
４ 外部接続用電極
５ 基板
６ 回路電極
７ クリーム半田
８ 接着材
８ａ 樹脂接着材
９ フィラー
１７ 半田連結部
１８ 接着部[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electronic component mounting method and an electronic component mounting structure for mounting an electronic component having a connection electrode formed on a side surface to a substrate by soldering, and an adhesive for mounting an electronic component used in the electronic component mounting method. It is.
[0002]
[Prior art]
As a type of electronic component having a structure in which a semiconductor element is mounted on a small substrate such as a ceramic package, a leadless electronic component in which connection electrodes are directly provided on the side surface of the ceramic package without providing external connection leads is known. ing. In an electronic component having such a structure, an external connection electrode of a semiconductor element mounted on a ceramic package is connected to a connection electrode on a side surface by a wiring circuit formed inside the ceramic package. When such a leadless electronic component is mounted on a board, the ceramic package is fixed to the board by soldering the connection electrodes on the side surfaces to the circuit electrodes on the board, and the connection electrodes are mounted on the board. (For example, see Patent Document 1).
[0003]
[Patent Document 1]
JP-A-2003-8165
[Problems to be solved by the invention]
By the way, in an electronic component mounting structure in which a leadless electronic component is solder-bonded to a substrate, it is difficult to secure a sufficient stand-off between the lower surface of the electronic component and the upper surface of the substrate as in a normal lead component, and thus the In some cases, the lower surface may be soldered in a state in which the lower surface is almost in close contact with the upper surface of the substrate. The electronic component mounting structure having such a configuration has the following problems regarding reliability after mounting.
[0005]
The solder joint that connects the circuit electrode of the board and the connection electrode of the electronic component and conducts electricity is repeatedly subjected to thermal stress in the heat cycle after mounting, and this thermal stress causes the solder joint to break. Therefore, it is desirable to reduce the stress level after mounting as much as possible. For this reason, for the purpose of lowering the stress level, a stand-off is secured between the lower surface of the electronic component and the upper surface of the substrate to provide a mounting structure that allows deformation of the solder joint, or the lower surface of the electronic component. For example, an underfill resin is sealed between the substrate and the upper surface of the substrate to provide a function as a stress relaxation layer.
[0006]
However, when a leadless electronic component is mounted by soldering, the lower surface of the electronic component is almost in close contact with the upper surface of the substrate as described above. Cannot form a stress relaxation layer. For this reason, the stress level after mounting cannot be reduced, and it is difficult to improve the reliability against thermal fatigue.
[0007]
Therefore, an object of the present invention is to provide an electronic component mounting method, an electronic component mounting structure, and an adhesive for mounting electronic components, which are excellent in reliability against thermal fatigue.
[0008]
[Means for Solving the Problems]
2. The electronic component mounting method according to claim 1, wherein the electronic component having a connection electrode formed on a side surface is mounted on a board by soldering, and the solder is supplied to a circuit electrode formed on the board. Solder supplying step, an adhesive applying step of applying an adhesive containing a filler having a maximum size of 30 μm or more to an electronic component mounting position on the upper surface of the substrate, and an electronic component at an electronic component mounting position where the adhesive is applied. A component mounting step of mounting, and by melting and solidifying the solder in a state where the filler is interposed between the lower surface of the mounted electronic component and the upper surface of the substrate, the lower surface of the electronic component is separated from the upper surface of the substrate. And a reflow step of connecting the connection electrode to the circuit electrode by soldering in a state where the connection electrode is connected.
[0009]
An electronic component mounting method according to a second aspect is the electronic component mounting method according to the first aspect, wherein the adhesive does not hinder a self-alignment operation of the connection electrode with respect to the circuit electrode in the reflow step.
[0010]
An electronic component mounting method according to a third aspect is the electronic component mounting method according to the first aspect, wherein the content of the filler in the adhesive is 10 wt% or less.
[0011]
An electronic component mounting method according to a fourth aspect is the electronic component mounting method according to the first aspect, wherein the size tolerance of the filler is ± 20% or less.
[0012]
The electronic component mounting structure according to claim 5 is an electronic component mounting structure in which an electronic component having a connection electrode formed on a side surface is mounted on a substrate by soldering, and contains a filler having a maximum size of 30 μm or more. An adhesive portion in which an adhesive is cured between the lower surface of the electronic component and the upper surface of the substrate, and the connection electrode is formed on the upper surface of the substrate with the lower surface of the electronic component separated from the upper surface of the substrate by the filler. And a solder connection part connected to the circuit electrode by soldering.
[0013]
7. The electronic component mounting method according to claim 6, wherein the electronic component having the connection electrode formed on the side surface is mounted on the substrate by soldering before the electronic component is mounted on the substrate. An adhesive for electronic component mounting applied to the electronic component mounting position on the upper surface, containing a filler having a maximum size of 30 μm or more.
[0014]
The adhesive for mounting electronic components according to claim 7 is the adhesive for mounting electronic components according to claim 6, wherein the content of the filler is 10 wt% or less.
[0015]
The adhesive for mounting electronic components according to claim 8 is the adhesive for mounting electronic components according to claim 6, wherein a tolerance of the size of the filler is ± 20% or less.
[0016]
According to the present invention, the solder is melted and solidified in a state where a filler is interposed between the lower surface of the electronic component and the upper surface of the substrate, and the connection electrode is connected to the circuit electrode in a state where the lower surface of the electronic component is separated from the upper surface of the substrate. By soldering, the stand-off between the lower surface of the electronic component and the upper surface of the substrate can be ensured, and the stress level during a heat cycle can be reduced to improve reliability.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of an electronic component to which an electronic component mounting method according to an embodiment of the present invention is applied, FIG. 2 is a process explanatory view of an electronic component mounting method according to an embodiment of the present invention, and FIG. FIG. 4 is an explanatory diagram of a configuration of an adhesive for mounting an electronic component according to one embodiment of the present invention, FIG. 4 is a process explanatory diagram of an electronic component mounting method according to one embodiment of the present invention, and FIG. It is a perspective view of the electronic component used as a component mounting method.
[0018]
First, the structure of an electronic component to be mounted will be described with reference to FIG. In FIG. 1, an electronic component 1 has a configuration in which a semiconductor element 3 is mounted in a concave portion 2a formed in a central portion of a package substrate 2 made of ceramic. An external connection electrode 4 is formed on a side surface 2 b of the package substrate 2.
[0019]
The external connection electrode 4 is formed by plating a conductive metal on an inner surface of a through hole vertically penetrating the package substrate 2 before being separated into individual pieces, and a semiconductor element is formed by a wiring circuit inside the package substrate 2. 3 is connected. When the electronic component 1 is mounted on a substrate, the external connection electrode 4 is soldered to a circuit electrode formed on the substrate, so that the body of the package substrate 2 is fixed to the substrate. Conductivity with circuit electrodes.
[0020]
Next, an electronic component mounting method for mounting the electronic component 1 on a substrate will be described with reference to FIG. As shown in FIG. 2A, a circuit electrode 6 is formed on the upper surface of the substrate 5. As shown in FIG. 2B, cream solder 7 is supplied by screen printing to the upper surface of the circuit electrode 6 (solder supply step).
[0021]
Next, as shown in FIG. 2C, an adhesive 8 is applied between the circuit electrodes 6 on the upper surface of the substrate 5 (electronic component mounting position) (adhesive applying step). The application of the adhesive may be performed by applying the adhesive 8 in a concentrated manner at the center of the electronic component mounting position in addition to the application pattern of applying the adhesive 8 at a plurality of points as shown in FIG.
[0022]
As shown in FIG. 3, the adhesive 8 has a composition in which the resin filler 8a contains the particulate filler 9 at a content of 10 wt% or less. The resin adhesive material 8a has such a property that it keeps a fluid state that does not hinder the self-alignment effect of the molten solder at least until immediately after the solder is melted in the reflow process.
[0023]
Further, as the filler 9, an inorganic substance such as silica or alumina or a resin formed into particles of a predetermined size is used. Here, in the manufacturing process of the filler 9, the particle size is controlled so that the maximum size of the particles is 30 μm or more and the tolerance indicating the variation in the size of each particle is ± 20% or less.
[0024]
Thereafter, as shown in FIG. 2D, the electronic component 1 is mounted on the substrate 5 (component mounting step), and the external connection electrode 4 comes into contact with the cream solder 7 on the circuit electrode 6 and the electronic component 1 The lower surface of 1 contacts the adhesive 8. Then, the substrate 5 on which the components are mounted is sent to a reflow furnace, where it is heated (reflow step). Thereby, the solder component in the cream solder 7 is melted, and the external connection electrode 4 is soldered to the circuit electrode 6. The behavior of the electronic component 1 and the molten solder in the reflow process will be described with reference to FIG.
[0025]
FIG. 4A shows a state in which the solder component in the cream solder 7 is melted on the circuit electrode 6 to become a molten solder 7a having fluidity. In this state, as described above, the resin adhesive 8a in the adhesive 8 has not been completely thermally cured yet and is in a fluid state. For this reason, even if the mounting position of the electronic component 1 is slightly displaced in the component mounting process, the position of the electronic component 1 is displaced due to the self-alignment effect due to the surface tension when the molten solder 7a spreads on the circuit electrode 6. Is corrected.
[0026]
With the melting of the solder, the electronic component 1 is displaced downward and attracted to the circuit electrode 6 by its own weight and by the surface tension of the molten solder 7a. At this time, the downward movement of the electronic component 1 is prevented by the filler 9 contained in the adhesive 8. Then, as shown in FIG. 4B, the molten solder 7a solidifies with the filler 9 interposed between the lower surface of the electronic component 1 and the upper surface of the substrate 5, and the external connection electrode 4 and the circuit electrode 6 Are formed by a solder connecting portion 17 for connecting the two by soldering.
[0027]
That is, in this reflow step, the connection electrode 4 is connected to the circuit electrode 6 by soldering in a state where the lower surface of the electronic component 1 is separated from the upper surface of the substrate 5 by the filler 9. By the heating in the reflow process, the resin adhesive 8 a in the adhesive 8 is thermoset, and the electronic component 1 is fixed to the substrate 5.
[0028]
At this time, the lower limit value of the stand-off dimension h between the lower surface of the electronic component 1 and the upper surface of the substrate 5 is defined by the maximum size of the filler 9 and is smaller than the maximum size Dmax (30 μm or more in the present embodiment). There is no. That is, by appropriately setting the maximum size Dmax, a desired standoff dimension h corresponding to the target electronic component 1 can be obtained. In addition, since the particle size is controlled so as to contain the variation in the size of the filler 9 within a predetermined tolerance (here, ± 20% or less), the inclination of the electronic component 1 in the horizontal direction during the reflow process can be kept within a predetermined range. it can.
[0029]
As a result, as shown in FIG. 2D, the adhesive 8 containing the filler 9 having a maximum size of 30 μm or more is cured between the lower surface of the electronic component 1 and the upper surface of the substrate 5, 9, an electronic component mounting structure having a solder connecting portion 17 for connecting the connection electrode 4 to the circuit electrode 6 formed on the upper surface of the substrate 5 by soldering with the lower surface of the electronic component 1 separated from the upper surface of the substrate 5 Is realized.
[0030]
In this electronic component mounting structure, since a stand-off is secured between the lower surface of the electronic component 1 and the upper surface of the substrate 5, when the thermal stress repeatedly acts in a heat cycle after mounting, the electronic component 1 The relative displacement in the horizontal direction caused by the difference in the thermal expansion coefficient between the substrate and the substrate 5 is easily absorbed by the solder connecting portion 17. Therefore, the thermal stress level that causes the solder joint to break after mounting can be minimized.
[0031]
Further, since the bonding portion 18 formed by thermosetting the adhesive 8 is formed between the lower surface of the electronic component 1 and the substrate 2, the bonding portion 18 functions as a stress relaxation layer for reducing the above-described thermal stress. You can have. By reducing the thermal stress level in this manner, an electronic component mounting structure having excellent reliability against thermal fatigue is realized.
[0032]
In the above embodiment, an example is shown in which the external connection electrode 4 formed on the inner surface of the through hole by plating is connected to the circuit electrode 6 by soldering. However, the present invention is not limited to this example. The present invention is also applicable to electronic components as shown in FIG. That is, in FIG. 5, in the electronic component 11 having the configuration in which the semiconductor element 13 is mounted on the package substrate 12, the terminal electrodes 14 as the external connection electrodes extend laterally from the side surface 12 b of the package substrate 12 with a short overhang dimension. It has a structure.
[0033]
Even when such an electronic component 11 is targeted, a stand-off is secured between the lower surface of the electronic component 11 and the substrate by applying the electronic component mounting method using the adhesive 8 described above. In this state, the terminal electrode 14 can be connected to the circuit electrode of the substrate by soldering, and the same effect as in the above-described example can be obtained.
[0034]
【The invention's effect】
According to the present invention, the solder is melted and solidified in a state where a filler is interposed between the lower surface of the electronic component and the upper surface of the substrate, and the connection electrode is connected to the circuit electrode in a state where the lower surface of the electronic component is separated from the upper surface of the substrate. The structure is such that the standoff between the lower surface of the electronic component and the upper surface of the substrate can be ensured, and the stress level during a heat cycle can be reduced to improve reliability.
[Brief description of the drawings]
FIG. 1 is a perspective view of an electronic component which is an object of an electronic component mounting method according to an embodiment of the present invention. FIG. 2 is a process explanatory view of an electronic component mounting method according to an embodiment of the present invention. FIG. 4 is a structural explanatory view of an adhesive for electronic component mounting according to one embodiment of the present invention. FIG. 4 is a process explanatory diagram of an electronic component mounting method according to one embodiment of the present invention. Perspective view of an electronic component that is the target of the electronic component mounting method.
DESCRIPTION OF SYMBOLS 1 Electronic component 2 Package board 3 Semiconductor element 4 External connection electrode 5 Substrate 6 Circuit electrode 7 Cream solder 8 Adhesive material 8a Resin adhesive material 9 Filler 17 Solder connection part 18 Adhesion part

Claims (8)

側面に接続用電極が形成された電子部品を半田接合により基板に実装する電子部品実装方法であって、前記基板に形成された回路電極に半田を供給する半田供給工程と、前記基板上面の電子部品実装位置に最大サイズが３０μｍ以上のフィラーを含有する接着材を塗布する接着材塗布工程と、前記接着材が塗布された電子部品実装位置に電子部品を搭載する部品搭載工程と、搭載された電子部品の下面と基板上面との間に前記フィラーを介在させた状態で半田を溶融固化させることにより、前記電子部品の下面が基板の上面から隔てられた状態で前記接続用電極を前記回路電極に半田により連結するリフロー工程とを含むことを特徴とする電子部品実装方法。An electronic component mounting method for mounting an electronic component having a connection electrode formed on a side surface to a substrate by soldering, comprising: a solder supply step of supplying solder to a circuit electrode formed on the substrate; An adhesive application step of applying an adhesive containing a filler having a maximum size of 30 μm or more to a component mounting position; a component mounting step of mounting an electronic component at an electronic component mounting position to which the adhesive has been applied; By melting and solidifying the solder with the filler interposed between the lower surface of the electronic component and the upper surface of the substrate, the connection electrode is connected to the circuit electrode with the lower surface of the electronic component separated from the upper surface of the substrate. And a reflow step of connecting the components by soldering. 前記接着材は、前記リフロー工程における前記接続用電極の前記回路電極に対するセルフアライメント動作を妨げないことを特徴とする請求項１記載の電子部品実装方法。2. The electronic component mounting method according to claim 1, wherein the adhesive does not prevent a self-alignment operation of the connection electrode with respect to the circuit electrode in the reflow step. 前記接着材中の前記フィラーの含有率が、１０ｗｔ％以下であることを特徴とする請求項１記載の電子部品実装方法。The electronic component mounting method according to claim 1, wherein the content of the filler in the adhesive is 10 wt% or less. 前記フィラーのサイズの公差が、±２０％以下であることを特徴とする請求項１記載の電子部品実装方法。2. The electronic component mounting method according to claim 1, wherein a tolerance of a size of the filler is ± 20% or less. 側面に接続用電極が形成された電子部品を半田接合により基板に実装して成る電子部品実装構造であって、最大サイズが３０μｍ以上のフィラーを含有した接着材が前記電子部品の下面と基板上面との間で硬化した接着部と、前記フィラーによって前記電子部品の下面が基板の上面から隔てられた状態で前記接続用電極を基板の上面に形成された回路電極に半田により連結する半田連結部とを有することを特徴とする電子部品実装構造。An electronic component mounting structure in which an electronic component having a connection electrode formed on a side surface is mounted on a substrate by soldering, and an adhesive containing a filler having a maximum size of 30 μm or more includes a lower surface of the electronic component and an upper surface of the substrate. And a solder connecting portion for connecting the connection electrode to a circuit electrode formed on the upper surface of the substrate by solder in a state where the lower surface of the electronic component is separated from the upper surface of the substrate by the filler. An electronic component mounting structure comprising: 側面に接続用電極が形成された電子部品を半田接合により基板に実装する電子部品実装方法において前記電子部品の基板への搭載に先立って基板上面の電子部品実装位置に塗布される電子部品実装用の接着材であって、最大サイズが３０μｍ以上のフィラーを含有することを特徴とする電子部品実装用の接着材。In an electronic component mounting method of mounting an electronic component having a connection electrode formed on a side surface to a substrate by soldering, the electronic component is applied to an electronic component mounting position on the upper surface of the substrate prior to mounting the electronic component on the substrate. The adhesive for mounting electronic components, characterized by containing a filler having a maximum size of 30 μm or more. 前記フィラーの含有率が、１０ｗｔ％以下であることを特徴とする請求項６記載の電子部品実装用の接着材。The adhesive for mounting electronic components according to claim 6, wherein the content of the filler is 10 wt% or less. 前記フィラーのサイズの公差が、±２０％以下であることを特徴とする請求項６記載の電子部品実装用の接着材。The adhesive for mounting electronic components according to claim 6, wherein the tolerance of the size of the filler is ± 20% or less.
JP2003066484A 2003-03-12 2003-03-12 Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component Pending JP2004273998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003066484A JP2004273998A (en) 2003-03-12 2003-03-12 Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003066484A JP2004273998A (en) 2003-03-12 2003-03-12 Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component

Publications (1)

Publication Number Publication Date
JP2004273998A true JP2004273998A (en) 2004-09-30

Family

ID=33127195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003066484A Pending JP2004273998A (en) 2003-03-12 2003-03-12 Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component

Country Status (1)

Country Link
JP (1) JP2004273998A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006041068A1 (en) * 2004-10-12 2006-04-20 Matsushita Electric Industrial Co., Ltd. Packaging method of electronic component
WO2009142240A1 (en) * 2008-05-23 2009-11-26 株式会社村田製作所 Thermoelectric conversion module and process for producing thermoelectric conversion module
WO2010001822A1 (en) * 2008-07-02 2010-01-07 株式会社村田製作所 Thermoelectric conversion module and method for manufacturing thermoelectric conversion module

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006041068A1 (en) * 2004-10-12 2006-04-20 Matsushita Electric Industrial Co., Ltd. Packaging method of electronic component
JP2006114542A (en) * 2004-10-12 2006-04-27 Matsushita Electric Ind Co Ltd Method for mounting electronic component
KR100847325B1 (en) * 2004-10-12 2008-07-21 마쯔시다덴기산교 가부시키가이샤 Packaging method of electronic component
WO2009142240A1 (en) * 2008-05-23 2009-11-26 株式会社村田製作所 Thermoelectric conversion module and process for producing thermoelectric conversion module
JPWO2009142240A1 (en) * 2008-05-23 2011-09-29 株式会社村田製作所 Thermoelectric conversion module and method for manufacturing thermoelectric conversion module
WO2010001822A1 (en) * 2008-07-02 2010-01-07 株式会社村田製作所 Thermoelectric conversion module and method for manufacturing thermoelectric conversion module
JP5158200B2 (en) * 2008-07-02 2013-03-06 株式会社村田製作所 Thermoelectric conversion module and method for manufacturing thermoelectric conversion module
US8471139B2 (en) 2008-07-02 2013-06-25 Murata Manufacturing Co., Ltd. Thermoelectric conversion module and method for manufacturing thermoelectric conversion module

Similar Documents

Publication Publication Date Title
US6262489B1 (en) Flip chip with backside electrical contact and assembly and method therefor
US7833831B2 (en) Method of manufacturing an electronic component and an electronic device
JPWO2006126361A1 (en) Solder bump forming method and semiconductor element mounting method
JP2006134982A (en) Paste for solder jointing and solder jointing method
JPH0245357B2 (en) KIBANNOSETSUZOKUKOZO
JP6492768B2 (en) Electronic device and solder mounting method
JP2006303392A (en) Printed circuit board and electronic circuit substrate and manufacturing method thereof
KR20020044577A (en) Advanced flip-chip join package
JP2008227310A (en) Hybrid substrate, electronic device having the same, and manufacturing method of hybrid substrate
JP2004273998A (en) Mounting method of electronic component, electronic component mounting structure, and adhesive material for mounting electronic component
JP2007258448A (en) Semiconductor device
JP2004200539A (en) Component-connecting terminal and electronic device
JP3705152B2 (en) Method of forming solder bump
JP2002246721A (en) Semiconductor device
JP3405136B2 (en) Electronic component, method of manufacturing electronic component, and mounting structure of electronic component
JP2008130812A (en) Surface-mounting electronic component and mounting structure of the same
JP2004014870A (en) Circuit module and its producing method
JP2003046211A (en) Electronic component mounting structure
JP3080049B2 (en) Integrated circuit chip mounting structure and method
JPH0831871A (en) Interface sealing film used for surface mount electronic device and surface mount structure
US20110174525A1 (en) Method and Electronic Assembly to Attach a Component to a Substrate
JPWO2019167102A1 (en) Semiconductor device and method of manufacturing semiconductor device
JP3450838B2 (en) Manufacturing method of electronic component package
JP3304854B2 (en) Solder bump formation method
JP4381657B2 (en) Circuit board and electronic component mounting method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041213

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20050708

A977 Report on retrieval

Effective date: 20070423

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070508

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070618

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20071009

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071126

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Effective date: 20071219

Free format text: JAPANESE INTERMEDIATE CODE: A911

A912 Removal of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20080215