JP2004273822A - GaN SEMICONDUCTOR AND ITS MANUFACTURING METHOD - Google Patents

GaN SEMICONDUCTOR AND ITS MANUFACTURING METHOD Download PDF

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JP2004273822A
JP2004273822A JP2003063478A JP2003063478A JP2004273822A JP 2004273822 A JP2004273822 A JP 2004273822A JP 2003063478 A JP2003063478 A JP 2003063478A JP 2003063478 A JP2003063478 A JP 2003063478A JP 2004273822 A JP2004273822 A JP 2004273822A
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single crystal
thickness
gan
temperature
crystal layer
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JP3967280B2 (en
Inventor
Yoshihisa Abe
芳久 阿部
Jun Komiyama
純 小宮山
Shunichi Suzuki
俊一 鈴木
Hideo Nakanishi
秀夫 中西
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Coorstek KK
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Toshiba Ceramics Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a GaN semiconductor that can be suppressed in crystal defect to such a degree that the semiconductor can be used for electronic devices. <P>SOLUTION: In the GaN semiconductor, a single-crystal c-GaN film 5 having a thickness of about 1-10 μm is formed on a single-crystal Si substrate 1 through a single-crystal c-BP layer 3 having a thickness of about 50 nm to 1 μm and a single-crystal GaP layer 4 having a thickness of about 1-10 nm in this order. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、Si(シリコン)に比べて半導体機能に優れ、Si単結晶基板上に形成された単結晶膜からなり、短波長LED(発光ダイオード)や短波長LD(レーザダイオード)等に用いられるGaN(窒化カリウム)半導体及びその製造方法に関する。
【0002】
【従来の技術】
従来、この種のGaN半導体としては、Si単結晶基板上にc−BP(立方晶リン化ホウ素)単結晶層をSiとGaNの格子不整合を緩和するバッファ層として介在してc−GaN(立方晶窒化ガリウム)単結晶膜を形成したものが開示されている(例えば、特許文献1、特許文献2参照)。
【0003】
【特許文献1】
特開2000−349335号公報
【0004】
【特許文献2】
特開2000−351692号公報
【0005】
ここで、c−BPは、その格子定数(4.538オングストローム)がSiのそれ(5.431オングストローム)と比較して16.4%もの不整合があるにも拘わらず、Si単結晶基板上に成長することが知られており、c−GaNの格子定数(4.52オングストローム)とは僅か0.6%の不整合である。
従って、c−BPをバッファ層として用いることにより、格子定数の近いc−GaN単結晶膜を成長させることが可能と考えられる。
【0006】
上記GaN半導体は、Si単結晶基板上に900〜1150℃の温度でc−BP単結晶層を5μm程度の厚さにエピタキシャル成長させた後、c−BP単結晶層上に700〜1100℃の温度でc−GaN単結晶膜を4μm程度の厚さにエピタキシャル成長させて製造されるものである。
【0007】
【発明が解決しようとする課題】
しかし、従来のGaN半導体においては、電子デバイスに使用できる程度に欠陥を抑制したc−GaN単結晶膜が得られていない。
この理由は、c−BPはイオン性が0.006と低いのに対し、c−GaNのそれが0.5と比較的高く、両者のイオン性の違い(極性不整合)によるものと考えられる。
【0008】
そこで、本発明は、電子デバイスに使用できる程度に結晶欠陥に抑制し得るGaN半導体及びその製造方法の提供を課題とする。
【0009】
【課題を解決するための手段】
前記課題を解決するため、本発明の第1のGaN半導体は、Si単結晶基板上に厚さ50nm〜1μm程度のc−BP単結晶層及び厚さ1〜10nm程度のGaP単結晶層を順に介在して厚さ1〜10μm程度のc−GaN単結晶膜が形成されていることを特徴とする。
【0010】
又、第2のGaN半導体は、第1のものにおいて、前記Si単結晶基板とc−BP単結晶層との間に厚さ2〜50nm程度のc−BPの低温成長層が介在されていることを特徴とする。
【0011】
一方、第1のGaN半導体の製造方法は、Si単結晶基板上に850〜1000℃の温度でc−BP単結晶層を50nm〜1μm程度の厚さにエピタキシャル成長させた後、c−BP単結晶層上に750〜950℃の温度でGaP単結晶層を1〜10nm程度の厚さにエピタキシャル成長させ、しかる後に、GaP単結晶層上に700〜900℃の温度でc−GaN単結晶膜を1〜10μm程度の厚さにエピタキシャル成長させることを特徴とする。
【0012】
又、第2のGaN半導体の製造方法は、第1の方法において、前記c−BP単結晶層のエピタキシャル成長の前に、Si単結晶基板上に350〜450℃の温度でc−BPの低温成長層を2〜50nm程度の厚さに堆積させることを特徴とする。
【0013】
【作用】
本発明の第1のGaN半導体及びその製造方法においては、c−BP単結晶層とc−GaN単結晶膜との間に、イオン性が0.32と比較的高いGaP(リン化ガリウム)単結晶層が介装される。
【0014】
又、第2のGaN半導体及びその製造方法においては、第1のもの及び方法による作用の他、c−BP単結晶層、ひいてはGaP単結晶層及びc−GaN単結晶膜の結晶欠陥が低減される。
【0015】
c−BP単結晶層の厚さが、50nm未満であると、Siの格子の影響を打消すことができない。一方、1μmを超えると、C−BP単結晶層の表面が荒れてしまう。
c−BP単結晶層の厚さは、80〜800nmが好ましい。
GaP単結晶層の厚さが、1nm未満であると、GaPのイオン性の効果が明瞭とならない。一方、10nmを超えると、c−GaN単結晶との格子不整合を生ずる。
GaP単結晶層の厚さは、1〜4nmが好ましい。
GaN単結晶層の厚さが、1μm未満であると、デバイスとして機能しないおそれがある。厚みは十分あってもかまわないが、10μmを超えると、製造に時間がかかる割に効果が変わらない。
又、c−BPの低温成長層(結晶成長しない温度で成膜したもの)の厚さが、2nm未満であると、結晶成長層が多結晶となる。一方、50nmを超えると、結晶成長層の結晶性が下がる。
c−BPの低温成長層の厚さは、5〜20nmが好ましい。
【0016】
一方、c−BP単結晶層のエピタキシャル成長時の温度が、850℃未満であると、C−BPは多結晶となる。一方、1000℃を超えると、立方晶ではなくなる。
c−BP単結晶層のエピタキシャル成長時の温度は、900〜950℃が好ましい。
c−BP単結晶層のエピタキシャル成長用の原料としては、B (ジボラン)とPH (ホスフィン)が用いられる。
GaP単結晶層のエピタキシャル成長時の温度が、750℃未満であると、多結晶化する。一方、950℃を超えると、多結晶化する。
GaP単結晶層のエピタキシャル成長時の温度は、780〜920℃が好ましい。
GaP単結晶層のエピタキシャル成長用の原料としては、Ga(CH (トリメチルガリウム)とPH が用いられる。
c−GaN単結晶膜のエピタキシャル成長時の温度が、700℃未満であると、多結晶となる。一方、900℃を超えると、ウルツ鉱型となる。
c−GaN単結晶膜のエピタキシャル成長時の温度は、720〜900℃が好ましい。
c−GaN単結晶膜のエピタキシャル成長用の原料としては、Ga(CH と(CH )NHNH (モノメチルヒドラジン)が用いられる。
又、c−BPの低温成長層のエピタキシャル成長時の温度が、350℃未満であると、c−BP単結晶層の表面が荒れる。一方、450℃を超えると、同様にc−BP単結晶層の表面が荒れる。
c−BPの低温成長層のエピタキシャル成長時の温度は、380〜420℃が好ましい。
【0017】
【発明の実施の形態】
以下、本発明の実施の形態について図面を参照して説明する。
図1は本発明に係るGaN半導体の実施の形態の一例を示す概念的な断面図である。
【0018】
このGaN半導体は、(100)面のSi単結晶基板1上に厚さ2〜50nm程度のc−BPの低温成長層2、厚さ50nm〜1μm程度のc−BP単結晶層3及び厚さ1〜10nm程度のGaP単結晶層4を順に介在して厚さ1〜10μm程度のc−GaN単結晶膜5が形成されているものである。
【0019】
上記GaN半導体においては、c−BP単結晶層とc−GaN単結晶膜との間に、イオン性が0.32と比較的高いGaP単結晶膜が介在されていると共に、c−BP単結晶層、ひいてはGaP単結晶層及びc−GaN単結晶膜の結晶欠陥が低減される。
【0020】
上述したGaN半導体を製造するには、先ず、(100)面のSi単結晶基板1をH (水素ガス)雰囲気中において1000℃以上の温度で加熱することにより自然酸化膜を除去した(図2(a)参照)。
次に、c−BPの低温成長層2を設けるために、350〜450℃まで降温した後、PH の分圧が1Torr以上となるようにPH を供給し、かつ、PH /B の供給比が100以上となるようにB を供給して、c−BPの低温成長層2を2〜50nm程度の厚さに堆積させた(図2(b)参照)。
次いで、一旦、B の供給を止め、c−BP単結晶の成長温度である850〜1000℃程度まで昇温した後、再びB を供給してc−BP単結晶層3を50nm〜1μm程度の厚さにエピタキシャル成長させ、しかる後に、B の供給を止めた(図2(c)参照)。
【0021】
次に、750〜950℃程度の温度に保持すると共に、Ga(CH をPH (分圧1Torr以上)と一緒に供給してGaP単結晶層4を1〜10nm程度の厚さにエピタキシャル成長させた(図2(d)参照)。
次いで、Ga(CH 及びPH の供給を停止し、c−GaN単結晶の成長温度である700〜900℃程度の温度にした後、キャリアガスの50%をN(窒素ガス)とする共に、Ga(CH と(CH )NHNH 等の有機窒素原料を供給してc−GaN単結晶膜5を1〜10μmの厚さにエピタキシャル成長させた(図2(e)参照)。
【0022】
なお、上述した実施の形態においては、Si単結晶基板とc−BP単結晶層との間にc−BPの低温成長層を介在させる場合について説明したが、これに限定されるものではなく、c−BPの低温成長層を設けることなく、c−BP単結晶層をSi単結晶基板上に直に設けるようにしてもよい。
【0023】
【発明の効果】
以上説明したように、本発明の第1のGaN半導体及びその製造方法によれば、c−BP単結晶層とc−GaN単結晶膜との間に、イオン性が0.32と比較的高いGaP単結晶層が介装されるので、Si単結晶基板とGaN単結晶膜との格子整合性のみならず、極性整合性を高めることができ、GaN半導体を電子デバイスに使用できる程度に結晶欠陥を抑制したものとすることができる。
【0024】
又、第2のGaN半導体及びその製造方法によれば、第1のもの及び方法による作用効果の他、c−BP単結晶層、ひいてはGaP単結晶層及びGaN単結晶膜の結晶欠陥が低減されるので、GaN半導体の結晶欠陥を一層抑制することができる。
【図面の簡単な説明】
【図1】本発明に係るGaN半導体の実施の形態の一例を示す概念的な断面図である。
【図2】(a)〜(e)は図1のGaN半導体の製造方法の各工程を示す説明図である。
【符号の説明】
1 Si単結晶基板
2 c−BPの低温成長層
3 c−BP単結晶層
4 GaP単結晶層
5 GaN単結晶膜
[0001]
TECHNICAL FIELD OF THE INVENTION
INDUSTRIAL APPLICABILITY The present invention is superior to a semiconductor function as compared with Si (silicon), is composed of a single crystal film formed on a Si single crystal substrate, and is used for a short wavelength LED (light emitting diode), a short wavelength LD (laser diode), and the like. The present invention relates to a GaN (potassium nitride) semiconductor and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, as a GaN semiconductor of this type, a c-BP (cubic boron phosphide) single crystal layer is interposed as a buffer layer for relaxing lattice mismatch between Si and GaN on a Si single crystal substrate. One in which a cubic gallium nitride) single crystal film is formed is disclosed (for example, see Patent Documents 1 and 2).
[0003]
[Patent Document 1]
JP 2000-349335 A
[Patent Document 2]
JP-A-2000-351592
Here, c-BP has a lattice constant (4.538 angstroms) which is mismatched by 16.4% as compared with that of Si (5.431 angstroms). And a mismatch of only 0.6% with the lattice constant of c-GaN (4.52 angstroms).
Therefore, it is considered that a c-GaN single crystal film having a close lattice constant can be grown by using c-BP as the buffer layer.
[0006]
The GaN semiconductor is obtained by epitaxially growing a c-BP single crystal layer on a Si single crystal substrate at a temperature of 900 to 1150 ° C. to a thickness of about 5 μm, and then forming a temperature of 700 to 1100 ° C. on the c-BP single crystal layer. This is manufactured by epitaxially growing a c-GaN single crystal film to a thickness of about 4 μm.
[0007]
[Problems to be solved by the invention]
However, in a conventional GaN semiconductor, a c-GaN single crystal film in which defects are suppressed to such an extent that it can be used for an electronic device has not been obtained.
The reason for this is considered to be that the ionicity of c-BP is as low as 0.006, whereas that of c-GaN is relatively high at 0.5, which is a difference (polarity mismatch) between the two. .
[0008]
Therefore, an object of the present invention is to provide a GaN semiconductor which can be suppressed to crystal defects to such an extent that it can be used for an electronic device, and a method for manufacturing the same.
[0009]
[Means for Solving the Problems]
In order to solve the above problem, the first GaN semiconductor of the present invention includes a c-BP single crystal layer having a thickness of about 50 nm to 1 μm and a GaP single crystal layer having a thickness of about 1 to 10 nm on a Si single crystal substrate in order. A c-GaN single crystal film having a thickness of about 1 to 10 μm is formed therebetween.
[0010]
In the second GaN semiconductor, the low-temperature c-BP growth layer having a thickness of about 2 to 50 nm is interposed between the Si single crystal substrate and the c-BP single crystal layer in the first GaN semiconductor. It is characterized by the following.
[0011]
On the other hand, the first method for manufacturing a GaN semiconductor is to epitaxially grow a c-BP single crystal layer to a thickness of about 50 nm to 1 μm on a Si single crystal substrate at a temperature of 850 to 1000 ° C. A GaP single crystal layer is epitaxially grown on the layer at a temperature of 750 to 950 ° C. to a thickness of about 1 to 10 nm, and thereafter, a c-GaN single crystal film is formed on the GaP single crystal layer at a temperature of 700 to 900 ° C. It is characterized by epitaxially growing to a thickness of about 10 to 10 μm.
[0012]
Further, the second method for manufacturing a GaN semiconductor is the same as the first method, except that the c-BP is grown at a temperature of 350 to 450 ° C. on the Si single crystal substrate at a low temperature before the epitaxial growth of the c-BP single crystal layer. The layer is deposited to a thickness of the order of 2 to 50 nm.
[0013]
[Action]
In the first GaN semiconductor and the method of manufacturing the same according to the present invention, GaP (gallium phosphide) single having a relatively high ionicity of 0.32 is provided between the c-BP single crystal layer and the c-GaN single crystal film. A crystal layer is interposed.
[0014]
In addition, in the second GaN semiconductor and the method of manufacturing the same, the crystal defects of the c-BP single crystal layer, and thus the GaP single crystal layer and the c-GaN single crystal film, are reduced in addition to the actions of the first one and the method. You.
[0015]
If the thickness of the c-BP single crystal layer is less than 50 nm, the influence of the lattice of Si cannot be canceled. On the other hand, if it exceeds 1 μm, the surface of the C-BP single crystal layer becomes rough.
The thickness of the c-BP single crystal layer is preferably from 80 to 800 nm.
If the thickness of the GaP single crystal layer is less than 1 nm, the ionic effect of GaP is not clear. On the other hand, if it exceeds 10 nm, a lattice mismatch with the c-GaN single crystal occurs.
The thickness of the GaP single crystal layer is preferably from 1 to 4 nm.
If the thickness of the GaN single crystal layer is less than 1 μm, it may not function as a device. The thickness may be sufficient, but if it exceeds 10 μm, the effect does not change even though the production takes time.
If the thickness of the low-temperature growth layer of c-BP (formed at a temperature at which no crystal grows) is less than 2 nm, the crystal growth layer becomes polycrystalline. On the other hand, if it exceeds 50 nm, the crystallinity of the crystal growth layer decreases.
The thickness of the low-temperature growth layer of c-BP is preferably 5 to 20 nm.
[0016]
On the other hand, if the temperature at the time of epitaxial growth of the c-BP single crystal layer is lower than 850 ° C., C-BP becomes polycrystalline. On the other hand, when the temperature exceeds 1000 ° C., it is no longer cubic.
The temperature during the epitaxial growth of the c-BP single crystal layer is preferably 900 to 950 ° C.
B 2 H 6 (diborane) and PH 3 (phosphine) are used as raw materials for epitaxial growth of the c-BP single crystal layer.
If the temperature at the time of epitaxial growth of the GaP single crystal layer is lower than 750 ° C., polycrystallization occurs. On the other hand, when the temperature exceeds 950 ° C., polycrystallization occurs.
The temperature during the epitaxial growth of the GaP single crystal layer is preferably from 780 to 920 ° C.
As raw materials for epitaxial growth of the GaP single crystal layer, Ga (CH 3 ) 3 (trimethylgallium) and PH 3 are used.
When the temperature at the time of epitaxial growth of the c-GaN single crystal film is lower than 700 ° C., the film becomes polycrystalline. On the other hand, when it exceeds 900 ° C., it becomes a wurtzite type.
The temperature during the epitaxial growth of the c-GaN single crystal film is preferably from 720 to 900C.
The raw material for the epitaxial growth of c-GaN single crystal film, Ga (CH 3) 3 and (CH 3) NHNH 2 (monomethyl hydrazine) is used.
If the temperature at the time of epitaxial growth of the low-temperature growth layer of c-BP is lower than 350 ° C., the surface of the c-BP single crystal layer becomes rough. On the other hand, when the temperature exceeds 450 ° C., the surface of the c-BP single crystal layer similarly becomes rough.
The temperature at the time of epitaxial growth of the low-temperature growth layer of c-BP is preferably 380 to 420C.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a conceptual sectional view showing an example of an embodiment of a GaN semiconductor according to the present invention.
[0018]
This GaN semiconductor is formed on a (100) Si single crystal substrate 1 at a low temperature growth layer 2 of c-BP having a thickness of about 2 to 50 nm, a c-BP single crystal layer 3 having a thickness of about 50 nm to 1 μm, and a thickness A c-GaN single crystal film 5 having a thickness of about 1 to 10 μm is formed with a GaP single crystal layer 4 of about 1 to 10 nm interposed therebetween in order.
[0019]
In the GaN semiconductor, a GaP single crystal film having a relatively high ionicity of 0.32 is interposed between the c-BP single crystal layer and the c-GaN single crystal film, and a c-BP single crystal film is formed. The crystal defects of the layers, that is, the GaP single crystal layer and the c-GaN single crystal film are reduced.
[0020]
In order to manufacture the above-described GaN semiconductor, first, the natural oxide film was removed by heating the (100) plane Si single crystal substrate 1 in an H 2 (hydrogen gas) atmosphere at a temperature of 1000 ° C. or more (FIG. 2 (a)).
Next, in order to provide a low-temperature growth layer 2 of c-BP, was lowered to 350 to 450 ° C., supplying PH 3 to the partial pressure of PH 3 is greater than or equal to 1 Torr, and, PH 3 / B 2 B 2 H 6 was supplied so that the supply ratio of H 6 became 100 or more, and the low-temperature growth layer 2 of c-BP was deposited to a thickness of about 2 to 50 nm (see FIG. 2B).
Next, the supply of B 2 H 6 is temporarily stopped, and the temperature is raised to about 850 to 1000 ° C., which is the growth temperature of the c-BP single crystal, and then B 2 H 6 is supplied again to supply the c-BP single crystal layer 3. Was epitaxially grown to a thickness of about 50 nm to 1 μm, and then supply of B 2 H 6 was stopped (see FIG. 2C).
[0021]
Next, while maintaining the temperature at about 750 to 950 ° C., Ga (CH 3 ) 3 is supplied together with PH 3 (partial pressure of 1 Torr or more) to make the GaP single crystal layer 4 to a thickness of about 1 to 10 nm. It was epitaxially grown (see FIG. 2D).
Next, the supply of Ga (CH 3 ) 3 and PH 3 is stopped, and after the temperature is increased to about 700 to 900 ° C., which is the growth temperature of the c-GaN single crystal, 50% of the carrier gas is changed to N (nitrogen gas). At the same time, an organic nitrogen raw material such as Ga (CH 3 ) 3 and (CH 3 ) NHNH 2 was supplied to epitaxially grow the c-GaN single crystal film 5 to a thickness of 1 to 10 μm (see FIG. 2E). ).
[0022]
In the above-described embodiment, the case where the low-temperature growth layer of c-BP is interposed between the Si single crystal substrate and the c-BP single crystal layer has been described. However, the present invention is not limited to this. The c-BP single crystal layer may be provided directly on the Si single crystal substrate without providing the low temperature growth layer of c-BP.
[0023]
【The invention's effect】
As described above, according to the first GaN semiconductor and the method for manufacturing the same of the present invention, the ionicity between the c-BP single crystal layer and the c-GaN single crystal film is relatively high at 0.32. Since the GaP single crystal layer is interposed, not only the lattice matching between the Si single crystal substrate and the GaN single crystal film but also the polarity matching can be improved, and the crystal defects are reduced to such an extent that the GaN semiconductor can be used for an electronic device. Can be suppressed.
[0024]
Further, according to the second GaN semiconductor and the method for manufacturing the same, in addition to the effects of the first and the second methods, the crystal defects of the c-BP single crystal layer, and eventually the GaP single crystal layer and the GaN single crystal film, are reduced. Therefore, crystal defects of the GaN semiconductor can be further suppressed.
[Brief description of the drawings]
FIG. 1 is a conceptual sectional view showing an example of an embodiment of a GaN semiconductor according to the present invention.
2 (a) to 2 (e) are explanatory views showing respective steps of a method for manufacturing the GaN semiconductor of FIG. 1.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 Si single crystal substrate 2 Low temperature growth layer of c-BP 3 c-BP single crystal layer 4 GaP single crystal layer 5 GaN single crystal film

Claims (4)

Si単結晶基板1上に厚さ50nm〜1μm程度のc−BP単結晶層及び厚さ1〜10nm程度のGaP単結晶層を順に介在して厚さ1〜10μm程度のc−GaN単結晶膜が形成されていることを特徴とするGaN半導体。A c-GaN single crystal film having a thickness of about 1 to 10 μm with a c-BP single crystal layer having a thickness of about 50 nm to 1 μm and a GaP single crystal layer having a thickness of about 1 to 10 nm interposed in this order on a Si single crystal substrate 1 A GaN semiconductor, characterized in that GaN is formed. 前記Si単結晶基板とc−BP単結晶層との間に厚さ2〜50nm程度のc−BPの低温成長層が介在されていることを特徴とする請求項1記載のGaN半導体。2. The GaN semiconductor according to claim 1, wherein a low-temperature growth layer of c-BP having a thickness of about 2 to 50 nm is interposed between the Si single crystal substrate and the c-BP single crystal layer. Si単結晶基板上に850〜1000℃の温度でc−BP単結晶層を50nm〜1μm程度の厚さにエピタキシャル成長させた後、c−BP単結晶層上に750〜950℃の温度でGaP単結晶層を1〜10nm程度の厚さにエピタキシャル成長させ、しかる後に、GaP単結晶層上に700〜900℃の温度でc−GaN単結晶膜を1〜10μm程度の厚さにエピタキシャル成長させることを特徴とするGaN半導体の製造方法。After a c-BP single crystal layer is epitaxially grown on a Si single crystal substrate at a temperature of 850 to 1000 ° C. to a thickness of about 50 nm to 1 μm, a GaP single crystal is formed on the c-BP single crystal layer at a temperature of 750 to 950 ° C. A crystal layer is epitaxially grown to a thickness of about 1 to 10 nm, and thereafter, a c-GaN single crystal film is epitaxially grown to a thickness of about 1 to 10 μm on a GaP single crystal layer at a temperature of 700 to 900 ° C. GaN semiconductor manufacturing method. 前記c−BP単結晶層のエピタキシャル成長の前に、Si単結晶基板上に350〜450℃の温度でc−BPの低温成長層を2〜50nm程度の厚さに堆積させることを特徴とする請求項3記載のGaN半導体の製造方法。Before the epitaxial growth of the c-BP single crystal layer, a low temperature growth layer of c-BP is deposited on the Si single crystal substrate at a temperature of 350 to 450 ° C. to a thickness of about 2 to 50 nm. Item 4. The method for producing a GaN semiconductor according to Item 3.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006186338A (en) * 2004-11-30 2006-07-13 Showa Denko Kk Laminated compound semiconductor structure, compound semiconductor device and lamp
JP2006303418A (en) * 2005-03-25 2006-11-02 Doshisha Laminated structure, its formation method, and semiconductor element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006186338A (en) * 2004-11-30 2006-07-13 Showa Denko Kk Laminated compound semiconductor structure, compound semiconductor device and lamp
JP2006303418A (en) * 2005-03-25 2006-11-02 Doshisha Laminated structure, its formation method, and semiconductor element

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