JP2004272272A - Contact structure and active matrix type display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate variance in the substrate gap for every substrate pair even when the film thickness of an interlayer insulating film varies in a common contact segment, and to decrease contact failure caused by a conductive spacer. <P>SOLUTION: A first substrate 101 has a first conductive film 103, an insulating film 104, an opening 111 formed in the insulating film 104, and a second conductive film 105 covering the residual insulating film 104a and the opening 111. The second conductive film 105 on the first substrate is electrically connected with a third conductive film 106 on a second substrate 102 via conductive spacers 107 disposed on the insulating film 104a, while the substrate gap G is maintained. The substrate gap G depends only on the size of the conductive spacer 107. Therefore, if the conductive spacers 107 are identical in size, the substrate gap G can be made uniform for every substrate pair even when the thickness t of the insulating film 104 varies among the substrates. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a contact structure for electrically connecting wires formed on opposing substrates via conductive spacers. In particular, the present invention relates to a contact structure applied to a common contact of an electro-optical device such as a liquid crystal display device.

  2. Description of the Related Art In recent years, liquid crystal display devices have been widely used for display units of mobile information terminals (portable devices) such as mobile computers and mobile phones (including PHS). As a liquid crystal display device, an active matrix type liquid crystal display device using a thin film transistor as a switching element is widely known.

  In a liquid crystal display device, liquid crystal is sealed in two substrates, an electric field is formed by electrodes formed on the two substrates, and display is performed by controlling the intensity of the electric field. In an active matrix type liquid crystal display device, one of the two substrates is called a TFT substrate because a thin film transistor (TFT) for controlling voltage supply to a pixel electrode is formed, and the other substrate is Since a counter electrode facing the pixel electrode is formed, it is called a counter substrate.

  In an active matrix display device, display is realized by generating an electric field between a pixel electrode on a TFT substrate and a counter electrode on a counter substrate. The potential of the pixel electrode on the TFT substrate fluctuates under the control of the thin film transistor, but the counter electrode on the counter substrate is fixed at a constant common potential. In order to fix the counter electrode to a common potential, the counter electrode is connected to a lead terminal via a common contact formed on the TFT substrate, and the lead terminal is connected to a power supply outside the substrate. With such a connection configuration, the potential of the counter electrode is fixed to the common potential by the power supply.

  Hereinafter, the structure of a common contact of a conventional active matrix display device will be briefly described with reference to FIGS.

  FIG. 12 is a top view of a TFT substrate 10. On a substrate 11, a pixel region 12 in which pixel electrodes and thin film transistors connected to the pixel electrodes are arranged in a matrix, and ON / OFF timing of the thin film transistors are controlled. Line driving circuit 13 for supplying image data to the pixel electrodes. Further, an extraction terminal 15 for supplying power or a control signal from the outside is provided, and common contact portions 16a to 16d serving as connection portions with the counter electrode are provided.

  FIG. 13 is a cross-sectional configuration diagram of the pixel region 12 and the common contact portion 16. As shown in FIG. 13, in the pixel region 12 of the TFT substrate 11, a thin film transistor 17 is formed on the substrate 11, an interlayer insulating film 18 is formed on the thin film transistor 17, and the thin film transistor 17 is formed on the interlayer insulating film 18. The pixel electrode 19 connected to the drain electrode is formed.

  In the common contact section 16, the internal wiring 21 is formed by patterning the starting film of the source / drain electrode of the thin film transistor 17. A rectangular opening is formed in the interlayer insulating film 18, and a conductive pad 22 connected to the internal wiring 21 is formed in this opening. The pixel electrode 19 and the conductive pad 22 are patterned from the same starting film.

  FIG. 14 is a top view of the common contact section 16 of the conventional example, and a dotted area inside the conductive pad 22 corresponds to an opening formed in the interlayer insulating film 18.

  As shown in FIG. 13, a counter electrode 24 made of a transparent conductive film is formed on the surface of a counter substrate 23, the counter electrode 24 faces the pixel electrode 19 in the pixel region 12, and the conductive electrode 22 opposite.

  In order to maintain the distance between the substrates 11 and 23, a spherical insulating spacer 25 is arranged in the pixel region 12, and a spherical conductive spacer 26 is arranged in the common contact portion 16. The counter electrode 24 is electrically connected to the conductive pad 22 on the TFT substrate by the conductive spacer 26. The conductive pad 22 is electrically connected to the internal wiring 21, and the internal wiring 21 is electrically connected to the extraction terminal 15. With such a connection configuration, the counter electrode 24 on the counter substrate 23 side is connected to the extraction terminal 15 on the TFT substrate 11 side.

  In the conventional liquid crystal display device, as shown in FIG. 13, an opening is formed in the interlayer insulating film 18 in the common contact portion 16, so that (cell gap Gc of the common contact portion) ≒ (cell gap of the pixel region). Gp) + (the thickness t of the interlayer insulating film 18).

  The cell gap Gp of the pixel region 12 is defined by the spacer 25. Since a standard product is used for the spacer 25, if the diameter of the spacer 25 is the same, the cell gap Gp of the pixel region 12 is substantially the same for each substrate. However, it is difficult to avoid that the cell gap Gc of the common contact portion varies from substrate to substrate.

  The cell gap Gc of the common contact portion depends only on the thickness t of the interlayer insulating film 18 because the cell gap Gp is constant from the above relationship. Therefore, in order to make the cell gap Gc constant for each substrate, it is necessary to keep the thickness t of the interlayer insulating film 18 from varying, but the thickness t of the interlayer insulating film 18 is the same for each substrate. Even if the film is formed to have a thickness t, it is inevitable that the film thickness t varies from substrate to substrate.

  Although the common contact portion of the liquid crystal display device is usually formed in 2 to 4, the thickness t of the interlayer insulating film 18 may be different depending on the location even in the same substrate. In such a case, the same substrate is used. However, the film thickness t may be different for each common contact portion.

  Due to such a variation in the thickness t of the interlayer insulating film 18, the cell gap Gc of the common contact portion varies for each substrate or each common contact portion. Further, the variation of the cell gap Gc causes the variation of the cell gap Gp of the pixel region.

  The effect of the variation of the cell gap Gc of the common contact portion on the cell gap Gp of the pixel region becomes more apparent as the area of the pixel region 12 becomes relatively smaller than the area of the common contact portion. In particular, since the projection display used for the projector or the like is an extremely high-definition small display of about 1 to 2 inches, the above-mentioned problem of the variation in the cell gap Gp of the pixel region becomes apparent.

  Also, a standard product is used for the conductive spacer 26, and the diameter thereof is determined by the diameter of the spacer 25 in the pixel region 12 and the thickness of the interlayer insulating film 18 at the time of design. However, when the thickness of the interlayer insulating film 18 is much larger than the designed value, the cell gap Gc of the common contact portion becomes very large. You will not be able to connect. In such a case, the potential of the counter electrode cannot be fixed at the common potential, and display cannot be performed.

  SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, eliminate variations in the substrate spacing between substrates even when the thickness of the interlayer insulating film varies, and reduce the occurrence of contact failures caused by conductive spacers. It is to provide a contact structure which enables the above.

In order to solve the above-mentioned problems, the configuration of the present invention is:
A contact structure for connecting conductive films respectively formed on the opposing first substrate and second substrate,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
A conductive spacer sandwiched between the first substrate and the second substrate;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening.

Further, another configuration of the present invention includes:
A contact structure for connecting conductive films respectively formed on the opposing first and second substrates,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
A conductive spacer sandwiched between the first substrate and the second substrate in a state mixed with a sealing material;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening.

Further, another configuration of the present invention includes:
A contact structure for connecting conductive films respectively formed on the opposing first substrate and second substrate,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
An anisotropic conductive film sandwiched between the first substrate and the second substrate;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The anisotropic conductive film includes a plurality of conductive spacers mixed in a sealing material, and the conductive spacer forms the second conductive film and the third conductive In contact with both conductive films.

Further, another configuration of the present invention includes:
A common contact portion for connecting the conductive film formed on the first substrate and the conductive film formed on the second substrate by conductive spacers, the first and second substrates being opposed to each other; An active matrix display device comprising:
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains at a plurality of positions in the opening. The first conductive film is connected to the second conductive film, and the conductive spacer is formed on both the second conductive film and the third conductive film on the insulating film remaining in the opening. Is characterized by being in contact with.

Further, another configuration of the present invention includes:
A conductive film formed on the first substrate and a conductive film formed on the second substrate, the first and second substrates being opposed to each other, and the conductive spacer mixed into a sealant; An active matrix display device having a common contact portion for
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains in a plurality of places in the opening. Is connected to the second conductive film, and the conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening. It is characterized by having.

Further, another configuration of the present invention includes:
A conductive film formed on the first substrate and an anisotropic conductive film having a first and a second substrate facing each other, wherein a plurality of conductive spacers are mixed in a sealing material; An active matrix display device comprising a common contact portion for connecting the conductive film formed on the active matrix display device,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains at a plurality of positions in the opening. The first conductive film is connected to the second conductive film, and the conductive spacer is formed on both the second conductive film and the third conductive film on the insulating film remaining in the opening. Is characterized by being in contact with.

  According to the common contact structure of the present invention, even if the film thickness of the interlayer insulating film varies, it is possible to eliminate the variation of the substrate interval between the substrates and to reduce the occurrence of the contact failure caused by the conductive spacer.

  That is, in the present invention, the distance between the substrates depends only on the size of the conductive spacer. Therefore, if the size of the conductive spacer is the same, the first conductive film and the second conductive film are separated. Even if the thickness of the insulating film insulated differs for each substrate, the distance between the opposing substrates can be made the same for each substrate.

Embodiment of the Invention

An embodiment of the present invention will be described with reference to FIGS.

First Embodiment FIG. 1 is a cross-sectional configuration diagram of a common contact portion according to the present embodiment, and FIG. 2 is a top view on the TFT substrate side. FIG. 1 is an enlarged cross-sectional view of the region 120 shown in FIG.

  As shown in FIG. 13, in the conventional example, the spacer of the pixel region 12 is arranged on the interlayer insulating film 18 via the pixel electrode 19, but the interlayer insulating film is provided below the conductive pad 22 of the common contact portion 16. 18 does not exist. The absence of the interlayer insulating film 18 causes the cell gap Gc of the common contact portion to depend on the thickness of the interlayer insulating film 18.

  Therefore, in the present embodiment, the cell gap Gc of the common contact portion is formed by forming an insulator under the conductive pad in the common contact portion and disposing a conductive spacer on the insulator. This embodiment does not depend on the film thickness, and the present embodiment is characterized in that an opening is formed so that the interlayer insulating film 18 is selectively left.

  In this embodiment, the first substrate 101 has a first conductive film 103, an insulating film 104 covering the first conductive film 103, and a first conductive film which is selectively opened to leave the insulating film 104. An opening 111 exposing 103 and a second conductive film 105 covering the remaining insulating film 104a and the opening 111 are respectively formed.

  A third conductive film 106 is formed over the second substrate 102, and a conductive spacer 107 is sandwiched between the first substrate 101 and the second substrate 102.

  In the case of the conventional common contact portion 16 shown in FIG. 13, the insulating film 104 is completely removed in the opening 110, but in the present embodiment, the insulating film 104a is selectively left and the opening 111 is removed. To form The opening 111 exposes the first conductive film 103, where the first conductive film 103 and the second conductive film 105 are connected.

  In addition, since the remaining insulating film 104a is closest to the second substrate 102 on the first substrate 101 side, as shown in FIG. 1, a conductive spacer is formed on the remaining insulating film 104a. Through 107, the second conductive film 105 on the first substrate and the third conductive film 106 on the second substrate 102 are electrically connected.

  Further, since the remaining insulating film 104a is closest to the second substrate in the opening 110, the conductive spacer 107 electrically connecting the second conductive film 105 and the third conductive film 106 is formed. As a result, the substrate gap G is maintained. Therefore, the substrate gap G depends only on the size of the conductive spacer 107. Therefore, if the size of the conductive spacer 107 is the same, even if the thickness t of the insulating film 104 is different for each substrate, the substrate interval G can be the same for each substrate.

  In this embodiment, it is preferable that the area of the opening 111 be sufficiently larger than the area occupied by one conductive spacer, and that the opening 111 be provided with a margin so that the conductive spacer can move freely. The reason is that the conductive spacer 107 existing in the opening 111 does not contribute to holding the gap. If there is no room for the conductive spacers to move freely in this region, a plurality of conductive spacers 107 are stacked here, and the substrate spacing G cannot be made uniform over the entire substrate.

  Furthermore, in the present embodiment, it is preferable that the area of the surface of the remaining insulating film 104a is sufficiently larger than the area occupied by one conductive spacer 107, and is a space in which the conductive spacer 107 is securely arranged. This is because if the conductive spacer 107 is not securely arranged on the insulating film 104a, electrical connection cannot be established between the first substrate and the second substrate, and a gap cannot be maintained. Because.

  In this embodiment, the opening 111 is formed as shown in FIG. 2A, but the relationship between the remaining insulating film 104a and the opening 111 is reversed as shown in FIG. 2B. You can also. Note that an enlarged cross-sectional view of a region 120 indicated by a dotted line in FIG. 2B corresponds to FIG.

  Embodiment 2 An embodiment of the present invention will be described with reference to FIGS. 1 and 2A. FIG. 1 is a cross-sectional configuration diagram of a common contact portion according to the present embodiment, and FIG. 2A is a top view on the TFT substrate side. FIG. 1 is an enlarged cross-sectional view of a region 120 indicated by a dotted line in FIG.

  In this embodiment, as in the first embodiment, an insulator is present below the conductive pad also in the common contact portion, and a conductive spacer is disposed on the insulator, so that the cell gap Gc in the common contact portion has an interlayer insulation. This does not depend on the thickness of the film 18. Therefore, the present embodiment is characterized in that an opening is formed so that the interlayer insulating film 18 is selectively left.

  That is, in the present embodiment, an insulator is formed below the conductive pad 22, and a conductive spacer is disposed on the insulator so that the cell gap Gc in the common contact portion is reduced in thickness of the interlayer insulating film 18. Not dependent.

  As shown in FIG. 1, a first conductive film 103, an insulating film 104 covering the first conductive film 103, and a first conductive film 103 formed over the insulating film 104 are formed over a first substrate 101. An opening 110 that is exposed, an insulator 104 a selectively formed on the surface of the first conductive film 103 exposed from the opening 110, and a second conductive film 105 that covers the opening 110 are formed.

  A third conductive film 106 is formed over the second substrate 102, and a conductive spacer 107 is provided between the first substrate 101 and the second substrate 102.

  FIG. 2A is a top view of the TFT substrate side and shows a state where the second conductive film 105 is not formed. In FIG. 2A, an opening 110 indicated by a dotted line corresponds to an opening for a common contact formed in the interlayer insulating film 18 of the conventional example. In this embodiment, the insulator 104a is selectively formed in the opening 110 so as to leave a portion where the first conductive film 103 is exposed.

  In the opening 110, in a region where the insulator 104a is not formed, the first conductive film 103 is exposed and connected to the second conductive film 105 formed thereover.

  On the first substrate 101 side, since the insulator 104a is closest to the second substrate in the opening 110, the conductive spacer 107 forms the insulator 104a on the insulator 104a as shown in FIG. The second conductive film 105 over the first substrate 101 and the third conductive film 106 over the second substrate 102 are electrically connected.

  Further, since the insulator 104a is closest to the second substrate 102 in the opening 110, the conductive spacer 107 electrically connects the second conductive film 105 and the third conductive film 106. The substrate gap G is maintained. Therefore, the substrate gap G depends only on the size of the conductive spacer 107. Therefore, if the size of the conductive spacer 107 is the same, even if the thickness t of the insulating film 104 differs for each substrate, the substrate interval G can be made the same for each substrate.

  In the present embodiment, it is preferable that the area of the region where the insulator 104a is not formed is sufficiently larger than the area occupied by one conductive spacer 107, so that the conductive spacer 107 has a margin so that it can move freely. The reason is that the conductive spacer 107 existing in a region where the insulator 104a is not formed does not contribute to maintaining the gap. If there is no room for the conductive spacers to move freely in this region, a plurality of the conductive spacers 107 are stacked here, and the substrate spacing G cannot be made uniform over the entire substrate.

  Furthermore, in the present embodiment, it is preferable that the surface area of the insulator 104a is sufficiently larger than the area occupied by one conductive spacer 107, and is a space in which the conductive spacer 107 is securely arranged. This is because if the conductive spacer 107 is not securely arranged on the insulator 104a, electrical connection cannot be established between the first and second substrates, and a gap cannot be maintained. is there.

  In this embodiment, the insulator 104a is formed as illustrated in FIG. 2A. However, as illustrated in FIG. 2B, a region where the insulator 104a is formed and the first conductive film 103 are formed. The relationship of the areas to be exposed can be reversed.

  In this embodiment, an example is shown in which the present invention is applied to a common contact portion of a reflection type liquid crystal display device. FIG. 3 is a top view of the TFT substrate of this embodiment, and FIG. 4 is a top view of the counter substrate.

  As shown in FIG. 3, on a TFT substrate 200, a pixel region 202 on which a pixel electrode and a thin film transistor connected to the pixel electrode are arranged in a matrix on a substrate 201, and ON / OFF timing of the thin film transistor are controlled. Line driving circuit 203 for supplying image data to the pixel electrodes is provided. Further, an extraction terminal 205 for supplying electric power and a control signal from the outside is provided, and common contact portions 206a to 206d serving as connection portions with the counter electrode are provided.

  As shown in FIG. 4, the counter substrate 250 has a structure in which a counter electrode 252 formed of a light-transmitting conductive film is formed over a substrate. The central rectangular area 253 is an area facing the pixel area 202 of the TFT substrate 200, and the four corner areas 254a to 254d are areas electrically connected to the contact sections 206a to 206d of the TFT substrate 200.

  Then, as shown in FIG. 3, conductive pads are formed on the common contact portions 206a to 206d of the TFT substrate 200, respectively. These conductive pads are electrically connected by internal wirings 207a to 207c. The internal wires 207a and 207b extend to the extraction terminal 205 and are electrically connected to the common terminals 205a and 205b.

  Hereinafter, a process for manufacturing the pixel region 202 and the common contact portion 206 of the TFT substrate will be described with reference to FIGS.

  First, a substrate 201 having an insulating surface is prepared. In this embodiment, a silicon oxide film was formed as a base film on a glass substrate. An active layer 302 made of a crystalline silicon film is formed on a substrate 201. Although only one thin film transistor is illustrated in this embodiment, actually, one million or more thin film transistors are formed in the pixel region 202.

  In this embodiment, a crystalline silicon film is obtained by thermally crystallizing an amorphous silicon film. Then, the crystalline silicon film is patterned by a normal photolithography process to obtain an active layer 302. In this embodiment, a catalyst element (nickel) that promotes crystallization is added during crystallization. This technique is described in detail in JP-A-7-130652.

  Next, a silicon oxide film 303 having a thickness of 150 nm is formed, an aluminum film (not shown) containing 0.2 wt% of scandium is formed thereon, and the aluminum film is patterned using a resist mask 304. Then, an island pattern 305 serving as a prototype of the gate electrode was formed (FIG. 5A).

  In this embodiment, the anodic oxidation technology described in Japanese Patent Application Laid-Open No. Hei 7-135318 is used here. For details, refer to the publication.

  First, anodization is performed in a 3% oxalic acid aqueous solution while leaving the resist mask 304 used for patterning on the island pattern 305. At this time, a formation current of 2 to 3 mV is passed using the platinum electrode as a cathode, and the ultimate voltage is 8 V. As a result, since the resist mask 304 exists on the upper surface, a porous anodic oxide film 306 is formed on the side surface of the island pattern 305 (FIG. 5B).

  Thereafter, after removing the resist mask 304, anodic oxidation is performed in a solution obtained by neutralizing a 3% tartaric acid solution of ethylene glycol with aqueous ammonia. At this time, the formation current may be 5 to 6 mV, and the ultimate voltage may be 100 V. Thus, a dense anodic oxide film 307 is formed.

  Then, in the anodic oxidation step, a portion of the island pattern 305 that is not anodized is defined as the gate electrode 308. Note that the internal wiring 207c connecting the common contact portions 206c and 206d is also formed at the same time as the formation of the gate electrode 308, using the aluminum film as a starting film.

Next, the silicon oxide film 303 is etched using the gate electrode 308 and the surrounding anodic oxide films 306 and 307 as a mask to form a gate insulating film 309. For the etching, a dry etching method using CF ₄ gas was employed (FIG. 5C).

  After forming the gate insulating film 309, the porous anodic oxide film 306 was removed by wet etching using aluminum mixed acid.

  Next, impurity ions imparting one conductivity type are added by an ion implantation method or a plasma doping method. P (phosphorus) ions may be added if an N-type thin film transistor is arranged in the pixel region, and B (boron) ions may be added if a P-type thin film transistor is arranged.

  In the present embodiment, the above-described step of adding the impurity ions is performed twice by using the ion implantation method. The first time was performed at a high accelerating voltage of 80 keV, and the adjustment was performed so that the peak of the impurity ion came below the end (projection) of the gate insulating film 309. The second time was performed at a low accelerating voltage of 5 keV, and the accelerating voltage was adjusted so that impurity ions were not added below the end (projection) of the gate insulating film 309.

  Thus, a source region 310, a drain region 311, low-concentration impurity regions 312 and 313, and a channel formation region 314 of the thin film transistor are formed. Note that the low-concentration impurity region 313 on the drain region 311 side is also called an LDD region (FIG. 5D).

  At this time, it is preferable to add impurity ions to the source / drain regions 310 and 311 so that a sheet resistance of 300 to 500 Ω / □ is obtained. Further, the low-concentration impurity regions 312 and 313 need to be optimized according to the performance of the thin film transistor. After completion of the impurity ion addition step, heat treatment was performed to activate the impurity ions.

  Next, a silicon oxide film having a thickness of 1 μm was formed as the first interlayer insulating film 315. The reason why the thickness of the interlayer insulating film 315 is set to 1 μm is to make the surface of the first interlayer insulating film 315 as flat as possible.

  As the first interlayer insulating film 315, a silicon nitride film or a silicon oxynitride film may be formed in addition to the silicon oxide film. Alternatively, a multilayer film of these insulating films may be used.

  After forming contact holes for the source and drain regions 310 and 311 in the first interlayer insulating film 315 and contact holes for the internal wiring 207c in the common contact portions 206c and 206d, respectively, the source and drain electrodes 316 and 317 are formed. A conductive film serving as a starting film of the internal wiring 318 is formed.

  Here, a multilayer film of a titanium (Ti) film, an aluminum (Al) film, and a titanium (Ti) film was formed as a conductive film by a sputtering method. The thickness of the titanium (Ti) film was 100 nm, and the thickness of the aluminum film was 300 nm. This multilayer film was patterned to form a source electrode 316, a drain electrode 317, and an internal wiring 318 (FIG. 5E).

  The internal wiring 318 in FIG. 5 corresponds to the internal wirings 207a and 207b in FIG. The internal wires 207a and 207b are connected to the internal wires 207c formed through the same process as the gate electrode 308 at the common contact portions 206c and 206d.

  Next, an organic resin film is formed as a second interlayer insulating film 319 to a thickness of 1 to 2 μm. As the organic resin film, polyimide, polyamide, polyimide amide, acrylic, or the like can be used. The reason for using the organic resin film is to make the surface of the second interlayer insulating film 319 flat. It is important to make the surface of the second interlayer insulating film 319 flat to make the cell gap uniform. In this embodiment, polyimide is formed to a thickness of 1 μm as the second interlayer insulating film 319.

  Next, contact holes 320 and 321 for the drain electrode 317 and the internal wiring 318 were opened in the second interlayer insulating film 319. A contact hole 321 of the internal wiring 318 has a rectangular opening of 100 μm × 100 μm in a rectangular region 110 of 1.1 mm × 1.1 mm like the opening 111 shown in FIG. At a distance of 5 × 5 in a matrix. In addition to the contact hole 321, a contact hole for connecting the internal wiring 318 (207 a, 207 b) and the common terminals 205 a, 205 b at the extraction terminal 205 is also formed.

  As will be described later, in this embodiment, since the diameter of the conductive spacer is 3.5 μm, the opening is set to 100 μm × 100 μm, and a sufficient space is provided to allow the conductive spacer disposed here to move. The conductive spacers were prevented from stacking in the sections.

  In the common contact portion, the area of the region where the second interlayer insulating film 319 remains is also set to be a sufficiently large region where the conductive spacer can move. Therefore, the conductive spacer is securely arranged in this region. be able to. Therefore, the cell gap can be reliably maintained and the electrical connection can be reliably performed by the conductive spacers arranged in this region.

  Then, a metal thin film which will later become the pixel electrode 322 and the conductive pad 323 is formed to a thickness of 100 nm to 400 nm. In this example, an aluminum film to which 1 wt% of titanium was added was formed to a thickness of 300 nm by a sputtering method as a metal thin film. Thereafter, the metal thin film was patterned to form a pixel electrode 322 and a conductive pad 323, respectively. The conductive pad 323 was formed in a 1.1 mm × 1.1 mm rectangular shape so as to cover the contact hole 321. Further, the extraction terminal 205 is also patterned. Thus, a TFT substrate is completed (FIG. 5G).

  On the other hand, as shown in FIG. 6, in the counter substrate 250, a counter electrode 252 made of an ITO film was formed on a translucent substrate 251. As the substrate 251, a glass or quartz substrate can be used.

  Next, the TFT substrate 200 and the counter substrate 250 are bonded. This bonding step may be performed according to a known method of assembling cells.

  First, a sealing material is applied to one of the TFT substrate 200 and the counter substrate 250. In this embodiment, a sealing material is applied to the counter substrate 250 side. An ultraviolet / thermosetting resin material was used as the sealing material, and the sealing material was applied linearly around the substrate using a seal dispenser device except for the liquid crystal injection port. In addition, a sealing material containing 3.0% by weight of a spherical conductive spacer 401 was applied to the regions 254a to 254d shown in FIG. The sealant in which the conductive spacer is mixed functions as an anisotropic conductive film.

  As the conductive spacer 401, a sphere made of a resin material covered with a conductive film is generally used. In this embodiment, the conductive spacer 401 coated with gold (Au) is used. The diameter of the conductive spacer 401 may be larger than the cell gap by about 0.2 μm to 1 μm. In this embodiment, the conductive spacer 401 having a diameter of 3.5 μm was used to make the cell gap 3 μm. After applying the sealing material, it is provisionally fired.

  Next, spacers 402 for maintaining a cell gap are sprayed on one of the TFT substrate 200 and the counter substrate 250. In this embodiment, the spacer 402 is sprayed on the counter substrate 250 side. In order to make the cell gap 3 μm, a spherical spacer made of a polymer material having a diameter of 3 μm was used as the spacer 402.

  Next, the TFT substrate 200 and the opposing substrate 250 were opposed to each other and pressed until the cell gap in the pixel region became equal to the diameter of the spacer 402. The sealing material is ultraviolet-cured by irradiating it with ultraviolet light for about 10 seconds in a pressed state to fix the cell gap, and then heated while applying pressure to improve the adhesive strength of the sealing material.

  Then, the liquid crystal is sealed, and the sealing opening is sealed, thereby completing the cell assembling step. As shown in FIG. 6, the counter electrode 252 of the counter substrate 250 is electrically connected to the conductive pad 323 of the TFT substrate 200 by the conductive spacer 401. On the TFT substrate side, the conductive pad 323 connects the internal wiring 318 to the common. Connected to terminal. With such a connection structure, it is possible to connect the counter electrode 252 on the counter substrate 250 side to an external power supply through the wiring on the TFT substrate side. Note that an enlarged view of the common contact portion in FIG. 6 corresponds to FIG.

  In this embodiment, in order to make the cell gap 3 μm, the diameter of the spacer 402 dispersed in the pixel region is 3 μm, and the diameter of the conductive spacer 401 is 3.5 μm. The reason for making the diameter of the conductive spacer larger than the diameter (cell gap) of the spacer 402 is to ensure the connection between the counter electrode 252 and the conductive pad 318. In the pressing step of the substrate bonding step, the conductive spacer 401 is crushed because its diameter is larger than the cell gap. By being crushed, the contact area between the opposing electrode 252 and the conductive pad 318 is increased, electrical connection is ensured, and the cell gap can be maintained the same as the pixel region.

  Further, in the present embodiment, the internal wiring 318 is formed of the starting films of the source and drain electrodes 316 and 317, but the internal wiring 318 may be a wiring lower than the pixel electrode 322. For example, when a black matrix made of a conductive film such as titanium is formed in the second interlayer insulating film 319, the internal wiring 318 can be formed using the conductive film.

  In this embodiment, in order to make the cell gap uniform, it is important that the surface of the second interlayer insulating film 319 on which the pixel electrode 322 is formed is flat, and the internal wiring 318 is formed. The flatness of the surface of the first interlayer insulating film 315 also becomes important.

  Methods for obtaining an interlayer insulating film having a flat surface include a method by increasing the thickness of the interlayer insulating film, a method by leveling using an organic resin film, a method by mechanical polishing, and a method by an etch-back technique. In this embodiment, a method based on the film thickness is used for flattening the first interlayer insulating film 315, and a leveling method using an organic resin film is used for flattening the second interlayer insulating film 319. The flattening may be performed using another method.

  In the liquid crystal display device of this embodiment, it is also possible to disperse a dichroic dye in the liquid crystal layer, provide an alignment film on the TFT substrate and the counter substrate, and provide a color filter on the counter substrate. The type of the liquid crystal layer, the orientation film, the presence or absence of the color filter, and the like may be appropriately determined by a practitioner according to the driving method, the type of the liquid crystal, and the like.

  For example, when a color filter is provided on the side of the counter substrate 250, the color filter is not formed on the common contact portion, so that a step is generated between the pixel region and the common contact portion on the counter substrate. In order to correct this step, it is necessary to increase the diameter of the conductive spacer by about the thickness of the color filter.

  Further, although this embodiment shows an example of a reflection type liquid crystal display device, a transmission type liquid crystal display device can be used. In this case, the pixel electrode and the starting film of the conductive pad have a light transmitting property. What is necessary is just to form with the ITO film etc. which have.

  In this embodiment, a coplanar thin film transistor which is a typical top gate thin film transistor is described as an example, but a bottom gate thin film transistor may be used. In addition to the thin film transistor, a thin film diode, an MIM element, a varistor element, or the like can be used.

  This embodiment is a modification of the common contact portion of the first embodiment. FIG. 7 is a cross-sectional configuration diagram of the active matrix display device of the present embodiment. 7, the configuration of the TFT substrate is the same as that of FIG. 6, and the description of reference numerals is partially omitted. 7, the same reference numerals as those in FIG. 6 denote the same members. FIG. 9 is an enlarged view of the common contact portion shown in FIG.

  In Example 1 shown in FIG. 6, since the opposing electrode 252 is made of an ITO film which is a transparent conductive film, the electric resistance between the opposing electrode 252 and the conductive spacer 401 is larger than that of the metal film. The purpose of this embodiment is to reduce the electric resistance.

  For this purpose, a metal film is formed on the counter substrate 250 side, and is patterned to form connection pads 501 made of a conductive film on the common contact portions 254a to 254d, respectively. By forming the connection pad 501, the resistance value between the counter electrode 252 and the conductive spacer 401 can be reduced. However, it is important that the conductive film forming the connection pad 501 has lower electric resistance than the conductive film used for the counter electrode 252.

  When the black matrix on the opposite substrate side is formed of a conductive film such as chromium, the connection pad 501 can be formed of this conductive film, and when the conductive film is patterned to form the black matrix, the connection pad is formed. The pad 501 may be formed.

  This embodiment is a modification of the second embodiment, and FIG. 8 is a cross-sectional configuration diagram of an active matrix display device of the present embodiment. 8, the configuration of the TFT substrate is the same as that of FIG. 6, and the description of reference numerals is partially omitted. In FIG. 8, the same reference numerals as those in FIG. 6 indicate the same members. FIG. 10 is an enlarged view of the common contact portion shown in FIG.

  In the first embodiment, since both the opposing substrate 251 and the opposing electrode 252 have a light-transmitting property, the state of distribution of the conductive spacer 401 on the common contact portion from the opposing substrate 250 side is visually observed in a state where the substrates are bonded together. I was able to. However, in the second embodiment, since the connection pads 501 made of a metal film are formed, the distribution of the conductive spacers 401 cannot be visually recognized.

  The purpose of this embodiment is to make it possible to visually recognize the distribution of the conductive spacers 401 in a state where connection pads for lowering the resistance value are provided. Therefore, an opening is selectively provided in the connection pad 601 so that the conductive spacer 401 can be seen through the opening.

  FIG. 11 is a top view of the contact portion of the present embodiment, showing a state viewed from the counter substrate side. FIG. 10 corresponds to a cross-sectional configuration diagram of a common contact portion in a region 600 surrounded by a dotted line in FIG. As shown in FIG. 11, an opening 602 is formed in the conductive pad 601. In the opening 602, only the counter substrate 251 and the counter electrode 252 are present, and both have a light-transmitting property. Therefore, the distribution of the conductive spacer 401 from the opening 602 can be checked.

  In order to maintain the cell gap, the opening 602 is preferably formed at a location where the conductive spacer 401 does not contact the counter electrode, that is, at a location facing the contact hole 321 opened in the second interlayer insulating film of the TFT substrate. Further, it is preferable that the area be slightly larger than the opening of the second interlayer insulating film by about several% to 30%. Note that the number, arrangement, shape, and the like of the openings 602 are not limited to those in FIG. 11, and can be appropriately set by a practitioner.

  The reason why the opening 602 of the connection pad 601 is formed slightly larger than the opening of the second interlayer insulating film is that the conductive pad 602 on the second interlayer insulating film 318 which contributes to electrical connection is formed. This is to make it visible.

  In the second and third embodiments, the configuration for simultaneously realizing the uniform cell gap of the common contact portion and the reduction of the connection resistance between the conductive spacer 401 and the counter electrode 252 has been described. If the main purpose is to reduce the resistance value of the counter electrode 252, the structure of the common contact portion on the TFT substrate side may be a conventional common contact portion structure as shown in FIG. In this case, the connection pads 501 and 601 shown in the second and third embodiments may be formed between the substrate 23 and the counter electrode 24 in the common contact portion 16 shown in FIG.

  In the above-described first to third embodiments, an example in which the present invention is applied to an active matrix type liquid display device has been described. However, the contact structure of the present invention employs conductive spacers formed of wirings formed on opposing substrates. The present invention can be applied to a device having a contact structure in which electrical connection is made via a connection. For example, an IC or the like formed on a different silicon wafer can be connected.

FIG. 2 is a cross-sectional configuration diagram of a common contact portion of the embodiment. FIG. 3 is a top view of the common contact unit according to the embodiment. FIG. 2 is a top view of a TFT substrate of the liquid crystal display device according to the first embodiment. FIG. 2 is a top view of a counter substrate of the liquid crystal display device according to the first embodiment. FIG. 4 is a diagram showing a manufacturing process of the TFT substrate of Example 1. FIG. 2 is a cross-sectional configuration diagram of a pixel region and a common contact portion according to the first embodiment. FIG. 9 is a cross-sectional configuration diagram of a pixel region and a common contact portion according to a second embodiment. FIG. 13 is a cross-sectional configuration diagram of a pixel region and a common contact portion according to a third embodiment. FIG. 9 is an enlarged configuration diagram of a common contact portion according to the second embodiment. FIG. 13 is a cross-sectional configuration diagram of a common contact portion according to a third embodiment. FIG. 13 is a top view of a contact portion according to the third embodiment. FIG. 5 is a top view of a conventional TFT substrate. FIG. 6 is a cross-sectional configuration diagram of a pixel region and a common contact portion of a conventional example. The top view of the common contact part of the conventional example.

Explanation of reference numerals

101 first substrate 102 second substrate 103 first conductive film 104 insulating film 105 second conductive film 106 third conductive film 107 conductive spacer 200 TFT substrate 205 extraction terminal 206 common contact portion 207 internal wiring 250 facing Substrate 252 Counter electrode 315 First interlayer insulating film 318 Internal wiring 319 Second interlayer insulating film 322 Pixel electrode 323 Conductive pad 401 Conductive spacer 402 Spacer 501, 601 Connection pad

Claims (29)

A contact structure for connecting conductive films respectively formed on the opposing first substrate and second substrate,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
A conductive spacer sandwiched between the first substrate and the second substrate;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The contact structure, wherein the conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening. A contact structure for connecting conductive films respectively formed on the opposing first and second substrates,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
A conductive spacer sandwiched between the first substrate and the second substrate in a state mixed with a sealing material;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The contact structure, wherein the conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening. A contact structure for connecting conductive films respectively formed on the opposing first substrate and second substrate,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
An anisotropic conductive film sandwiched between the first substrate and the second substrate;
Has,
An opening reaching the first conductive film is formed in the insulating film;
The insulating film partially remains in a plurality of places in the opening,
In the opening, the first conductive film and the second conductive film are connected,
The anisotropic conductive film includes a plurality of conductive spacers mixed in a sealing material, and the conductive spacer forms the second conductive film and the third conductive A contact structure in contact with both of the conductive films.   4. The contact structure according to claim 1, wherein the first conductive film is a multilayer film including a titanium film, an aluminum film, and a titanium film. 5.   5. The contact structure according to claim 1, wherein the second conductive film has a light-transmitting property. 6.   5. The contact structure according to claim 1, wherein the second conductive film is an ITO film. 6.   The contact structure according to any one of claims 1 to 6, wherein the third conductive film is a transparent conductive film.   The contact structure according to claim 1, wherein the third conductive film is an ITO film.   9. The contact according to claim 1, further comprising a fourth conductive film between the second substrate and the third conductive film, the fourth conductive film being in contact with the third conductive film. Construction.   10. The contact structure according to claim 9, wherein the second substrate and the third conductive film have a light-transmitting property, and the fourth conductive film has at least one opening. .   11. The contact structure according to claim 9, wherein the fourth conductive film has lower electric resistance than the third conductive film.   11. The contact structure according to claim 9, wherein the fourth conductive film is a chromium film. A common contact portion for connecting the conductive film formed on the first substrate and the conductive film formed on the second substrate by conductive spacers, the first and second substrates being opposed to each other; An active matrix display device comprising:
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains at a plurality of positions in the opening. The first conductive film is connected to the second conductive film, and the conductive spacer is formed on both the second conductive film and the third conductive film on the insulating film remaining in the opening. An active matrix display device which is in contact with the display device. A conductive film formed on the first substrate and a conductive film formed on the second substrate, the first and second substrates being opposed to each other, and the conductive spacer mixed into a sealant; An active matrix display device having a common contact portion for
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains in a plurality of places in the opening. Is connected to the second conductive film, and the conductive spacer is in contact with both the second conductive film and the third conductive film on the insulating film remaining in the opening. An active matrix type display device characterized in that: A conductive film formed on the first substrate and an anisotropic conductive film having a first and a second substrate facing each other, wherein a plurality of conductive spacers are mixed in a sealing material; An active matrix display device comprising a common contact portion for connecting the conductive film formed on the active matrix display device,
A first conductive film formed on the first substrate;
An insulating film formed on the first conductive film;
A second conductive film formed on the insulating film;
A third conductive film formed on the second substrate;
Has,
In the common contact portion, an opening reaching the first conductive film is formed in the insulating film, and the insulating film partially remains at a plurality of positions in the opening. The first conductive film is connected to the second conductive film, and the conductive spacer is formed on both the second conductive film and the third conductive film on the insulating film remaining in the opening. An active matrix display device which is in contact with the display device.   The active matrix display device according to claim 13, wherein the first conductive film is a multilayer film including a titanium film, an aluminum film, and a titanium film.   17. The active matrix display device according to claim 13, wherein the second conductive film has a light-transmitting property.   17. The active matrix display device according to claim 13, wherein the second conductive film is an ITO film.   19. The active matrix display device according to claim 13, wherein the third conductive film is a transparent conductive film.   19. The active matrix display device according to claim 13, wherein the third conductive film is an ITO film.   21. The semiconductor device according to claim 13, further comprising a fourth conductive film between the second substrate and the third conductive film, the fourth conductive film being in contact with the third conductive film. Active matrix display device.   22. The active matrix according to claim 21, wherein the second substrate and the third conductive film have a light-transmitting property, and the fourth conductive film has at least one opening. Type display device.   23. The active matrix display device according to claim 21, wherein the fourth conductive film has lower electric resistance than the third conductive film.   23. The active matrix display device according to claim 21, wherein the fourth conductive film is a chromium film.   25. The active matrix display device according to claim 13, wherein the first conductive film is formed on a silicon oxide film.   25. The active matrix display device according to claim 13, wherein the first conductive film is formed on a silicon nitride film.   25. The active matrix display device according to claim 13, wherein the first conductive film is formed over a silicon oxynitride film.   28. The active matrix display device according to claim 13, wherein the insulating film is an organic resin film.   29. The active matrix display device according to claim 28, wherein the organic resin film is any one of polyimide, polyamide, and acrylic.

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