JP2004241641A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device capable of removing foreign matters on a copper surface without the need of executing complicated processes. <P>SOLUTION: An object to be processed is prepared in which copper or a material whose main component is the copper occupies at least a part of a surface. The surface of the object to be processed is exposed to a gas containing steam and the anticorrosive of the copper to clean the surface. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having copper or a wiring containing copper as a main component.
[0002]
[Prior art]
One of the major technologies that embody and support the modern information society is a technology for manufacturing various electronic devices including a silicon-based semiconductor device. In these electronic devices, the thickness of various films constituting the devices is becoming increasingly thinner in order to achieve higher functions and higher speeds. .
[0003]
In order to connect the formed elements such as fine transistors, via holes are formed through the thin films. The diameter of the via hole is as small as about 0.1 μm, and the aspect ratio obtained by dividing the depth of the via hole by the diameter is about 10, which is increasing.
[0004]
As described above, in order to manufacture a high-performance electronic element, a comprehensive fine processing technique such as a high-quality thin film forming technique and a high-precision etching technique for forming a via hole in the thin film is required. As one of the techniques enabling such fine processing, there is a technique of cleaning a surface to be grown before growing various thin films. The problem imposed on this technology is to remove foreign substances and impurities present on the surface before forming various thin films and to remove oxides and the like formed on the surface to improve the cleanliness of the surface state before film formation. It is to guarantee.
[0005]
Patent Literature 1 discloses a method for removing foreign matters by infiltrating water vapor into foreign matters and converting the permeated steam into mist. When hot steam contacts the copper wiring exposed at the bottom of the via hole, the copper surface may be oxidized and further corroded. In the method described in Patent Literature 1, a copper nonconductor (copper oxide) film is formed in advance on the surface of a copper wiring to prevent corrosion of copper. The copper oxide film needs to be reduced and removed after surface cleaning. In order to remove the foreign matter, three complicated steps are required, such as making the copper surface nonconductive, removing the foreign matter, and reducing the copper nonconductive film.
[0006]
[Patent Document 1]
JP 2001-271192 A
[Problems to be solved by the invention]
An object of the present invention is to provide a method of manufacturing a semiconductor device capable of removing foreign matters on a copper surface without performing complicated steps.
[0008]
[Means for Solving the Problems]
According to one aspect of the present invention, (a) a step of preparing an object to be processed in which copper or a material containing copper as a main component occupies at least a part of the surface; and (b) water vapor and Exposing the semiconductor device to a gas containing an anticorrosive agent of copper.
[0009]
The surface of the object to be processed including the copper surface can be cleaned with the steam. Since the cleaning gas contains a corrosion inhibitor of copper, copper corrosion during cleaning can be prevented.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
As shown in FIG. 1A, a shallow trench isolation (STI) 11 is formed by forming an element isolation trench on the surface of a silicon substrate 10 and embedding an insulator such as silicon oxide. In addition, before or after the formation of the STI 11, ion implantation is performed as necessary to form a desired well region on the surface of the silicon substrate 10. A number of active regions surrounded by STI 11 are defined.
[0011]
On the surface of the active region of the silicon substrate 10, a gate electrode structure G composed of a stacked layer of a gate insulating film 14, a polycrystalline silicon gate electrode 15, and a silicide electrode 16 is formed. Sidewall spacers 17 such as silicon oxide are formed on both side walls of the gate electrode. On both sides of the gate electrode structure G, desired ion implantation is performed before and after the formation of the sidewall spacers 17, so that source / drain regions with extensions are formed. By separately forming the n-channel transistor and the p-channel transistor, a CMOS transistor circuit is formed.
[0012]
After forming a semiconductor element such as a MOS transistor, a phosphosilicate glass (PSG, phosphor glass) film 18 having a thickness of about 1.5 μm is formed at a substrate temperature of 600 ° C., for example, by chemical vapor deposition (CVD). The formed PSG film 18 has irregularities reflecting a base structure such as a gate electrode. The surface of the PSG film 18 is planarized by chemical mechanical polishing (CMP). On the flattened surface, a SiC film 19 having a thickness of about 50 nm is formed as a passivation film by plasma CVD using, for example, ESL3 (registered trademark) available from Novellus. The surface of the obtained SiC film 19 is hydrophobic. The SiC film 19 also has a copper diffusion preventing function for preventing copper atoms from being diffused downward with respect to the copper wiring formed thereon.
[0013]
A resist pattern PR1 is formed on the surface of the SiC film 19. The resist pattern PR1 has an opening for forming a via hole in an electrode extraction region of the semiconductor element. Using the resist pattern PR1 as an etching mask, the SiC film 19 and the PSG film 18 are etched to form via holes.
[0014]
As shown in FIG. 1B, a metal film such as TiN or Ta is deposited as a barrier metal by sputtering so as to cover the inner wall of the via hole, and then a tungsten (W) film is formed by CVD. An unnecessary metal film deposited on the SiC film 19 is removed by CMP. Thus, a conductive (contact) plug P having a surface substantially flush with the surface of the SiC film 19 is formed by filling the via hole.
[0015]
As shown in FIG. 1C, a low dielectric constant insulating film LK1 made of a so-called Low-K material having a thickness of about 150 nm is formed on the surface of the SiC film 19 by, for example, a registered trademark SiLK- available from Dow Chemical Company. It is formed by applying J150. The low-dielectric-constant insulating film LK1 is formed by evaporating the solvent by baking after application and curing by heat treatment. On the low dielectric constant insulating film LK1, a cap film 20 made of, for example, silicon oxide (SiO) and having a thickness of about 100 nm is formed by, for example, CVD.
[0016]
A resist pattern PR2 is formed on the surface of the cap film 20. The resist pattern PR2 has an opening corresponding to the wiring pattern of the first wiring layer. Using the resist pattern PR2 as an etching mask, the cap film 20 and the low dielectric constant insulating film LK1 are etched to form wiring grooves. After that, the resist pattern PR2 is removed.
[0017]
As shown in FIG. 2 (D), a barrier metal layer BM made of, for example, tantalum nitride (TaN) having a thickness of about 30 nm and a thickness made of copper having a thickness of about 30 nm are formed in the wiring groove exposing the head of the conductive plug P. A 30 nm seed metal layer SM is formed by sputtering.
[0018]
As shown in FIG. 2E, a copper wiring layer PM is formed on the seed metal layer SM by plating. After that, the unnecessary metal film on the surface of the cap film 20 is removed by performing CMP.
[0019]
As shown in FIG. 2F, the first-layer wiring W1 remains in the wiring groove. On the surface of the cap film 20, a copper diffusion prevention film 21 made of SiC and having a thickness of, for example, 50 nm is formed by the same plasma CVD as described above.
[0020]
As shown in FIG. 3G, a low dielectric constant insulating film LK2 having a thickness of, for example, about 400 nm is formed on the surface of the copper diffusion preventing film 21 using, for example, a registered trademark SiLK-J350 available from Dow Chemical Company. The film is formed by a coating method. After applying the liquid material, baking and heat curing are performed to form the low dielectric constant insulating film LK2. On the surface of the low dielectric constant insulating film LK2, a cap film 23 of, for example, about 100 nm in thickness made of SiO and a hard mask film 24 of about 50 nm in thickness made of silicon nitride (SiN) are formed by CVD.
[0021]
As shown in FIG. 3H, a dual damascene wiring 29 is embedded in the hard mask film 24, the cap film 23, the low dielectric constant insulating film LK2, and the copper diffusion preventing film 21. Hereinafter, steps required until a wiring 29 is formed will be described.
[0022]
After forming an opening for defining a wiring groove in the hard mask 24 using a resist mask, a via hole reaching the copper diffusion prevention film 21 is formed using another resist mask. Thereafter, using the hard mask film 24 as an etching mask, the cap film 23 and the low dielectric constant insulating film LK2 are etched to form wiring trenches. Further, the copper diffusion preventing film 21 exposed at the bottom of the via hole is etched to complete the dual damascene wiring concave portion 28. Next, the inner surface of the wiring recess 28 is cleaned.
[0023]
FIG. 5 shows a schematic diagram of the cleaning device. A processing table 71 is arranged in the cleaning container 70, and a substrate 72 to be cleaned is placed thereon. A heater 87 is attached to the processing table 71, and can heat the substrate 72 held on the processing table 71.
[0024]
The container 75 is filled with pure water 80. The container 76 is filled with a copper corrosion inhibitor 81. The pure water 80 filled in the container 75 is heated by the heater 85. The corrosion inhibitor 81 filled in the container 76 is heated by the heater 86. The heated vaporized vapor and the corrosion inhibitor are introduced into the cleaning container 70 through the pipe 77. These gases introduced into the cleaning container 70 are discharged to the outside through the exhaust port 78.
[0025]
The substrate on which the wiring recess 28 shown in FIG. 3H is formed is placed on the processing table 71 of the cleaning apparatus in FIG. The pressure in the cleaning container 70 is set to about 133 Pa, the substrate is heated to 300 ° C., and its surface is exposed to a gas in which steam and an anticorrosive agent are mixed to perform surface cleaning. As the anticorrosive, for example, 2-mercaptobenzothiazole, 2,5-mercaptobenzothiazole, benzimidazole, benzimidazole thiol, benzoxazole thiol, mercaptothiazoline and the like can be used.
[0026]
Next, as in the process described with reference to FIG. 2E, a barrier metal layer, a seed metal layer, and a plating layer are stacked, and unnecessary portions on the hard mask film 24 are removed by CMP. The second-layer wiring 29 is completed. The hard mask film 24 may be removed during the CMP.
[0027]
As shown in FIG. 3I, on the hard mask film 24, a copper diffusion prevention film 31 made of SiC and having a thickness of, for example, 50 nm is formed by plasma CVD.
As shown in FIG. 4J, a low-dielectric-constant insulating film LK3 having a thickness of about 450 nm is formed on the copper diffusion preventing film 31 by a coating method using a registered trademark SiLK-J350 by the same process as described above. . Further, on the surface of the low dielectric constant insulating film LK3, a cap film 33 made of SiO and having a thickness of about 100 nm and a hard mask film 34 made of SiN and having a thickness of about 50 nm are formed. The third wiring layer is formed through the hard mask film 34, the cap film 33, the low-dielectric-constant insulating film LK3, and the copper diffusion preventing film 31 by the same process as described above. By repeating the same steps, for example, five wiring layers are formed.
[0028]
FIG. 4K shows a configuration example of five wiring layers. A third layer wiring 39 is buried in the third interlayer insulating film, and a copper diffusion preventing film 41, a low dielectric constant insulating film LK4, a cap film 43, and a hard mask film 44 are laminated thereon. A fourth-layer wiring 49 is embedded in a fourth-layer interlayer insulating film composed of a stack of these films.
[0029]
On the fourth wiring 49, a copper diffusion prevention film 51, a low dielectric constant insulating film LK5, a cap film 53, and a hard mask film 54 are further formed. A fifth-layer wiring 59 is buried in a fifth-layer interlayer insulating film composed of a stack of these films. A cap film 60 made of, for example, SiC is formed to cover the fifth-layer wiring 59. Further, an SiO ₂ film is formed thereon to form an interlayer insulating film, and an aluminum pad is formed.
[0030]
In the above embodiment, cleaning is performed by exposing the inner surface of the wiring recess 28 shown in FIG. 3H to a gas containing water vapor and an anticorrosive agent. The foreign matter on the surface of the copper wiring W1 exposed on the bottom surface of the concave portion 28 can be removed by the action of the water vapor. Since the steam contains the corrosion inhibitor of copper, oxidation and corrosion of the surface of the copper wiring W1 can be prevented. In order to obtain a sufficient foreign matter removing effect, it is preferable that the substrate temperature during cleaning be 300 ° C. or higher.
[0031]
In order to prevent corrosion of copper, the concentration of the corrosion inhibitor in the gas is preferably set to 10 ppm or more. Further, in order to sufficiently secure the cleaning effect by steam, the concentration of the anticorrosive is preferably set to 10% by weight or less. By independently controlling the flow rate of the water vapor and the flow rate of the anticorrosive, the concentration of the anticorrosive can be set to a desired value.
[0032]
In the above embodiment, the case where the surface of the copper wiring exposed on the bottom surface of the damascene wiring concave portion was cleaned was described, but other than that, copper or a material containing copper as a main component occupies at least a part of the surface of the substrate. When performing surface cleaning, the cleaning method according to the above embodiment is effective.
[0033]
In the above embodiment, SiLK was used as the low dielectric constant insulating material, but FLAR (registered trademark of Honeywell), which is another organic insulating material, may be used. It is also possible to use porous silica having an inorganic methyl group or the like, Coral (registered trademark of Novelas) or Black Diamond (registered trademark of AMAT).
[0034]
The SiC film 19 and the copper diffusion preventing films 21 and 31 made of SiC used in the above embodiment are hydrophobic. When the low dielectric constant insulating films LK1, LK2, and LK3 are formed on such a hydrophobic film, the adhesion of the films is reduced. In order to enhance the adhesion, it is preferable to perform a surface treatment before forming the low dielectric constant insulating film on the SiC film.
Hereinafter, the surface treatment method will be described.
[0035]
A treatment liquid containing a compound having a silanol group and a functional reactive group is spin-coated on the surface of the SiC film. This treatment liquid is generated by hydrolyzing a silane coupling agent having an alkoxy group and a reactive functional group, and removing generated alcohol.
[0036]
As shown in FIG. 6A, generally, silicon atoms on the surface of the SiC film 19 formed by plasma CVD are terminated with hydrogen atoms. That is, SiH groups appear on the surface of the SiC film 19. The hydrogen atoms of this SiH and the hydrogen atoms of the silanol groups of the compound contained in the treatment liquid are eliminated, and hydrogen gas is generated.
[0037]
As shown in FIG. 6B, the —O—Si—R atomic group of the compound contained in the processing solution is bonded to silicon atoms on the surface of the SiC film 19. Here, R represents a reactive functional group in the compound contained in the treatment liquid. Although this reaction occurs even at room temperature, the reaction time can be shortened by heating. After this reaction, the surface of the SiC film 19 is washed with water and spin-dried.
[0038]
When the surface treatment of the SiC film is performed using the treatment liquid from which the silane coupling agent is hydrolyzed and the alcohol is removed, only hydrogen gas is generated at the time of the surface treatment as shown in FIG. Does not occur. This can prevent an increase in the dielectric constant and peeling of the insulating film due to the remaining alcohol.
[0039]
As a silane coupling agent before hydrolysis, for example, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri-n-propoxysilane, vinyltri-i-propoxysilane, vinyltri-n-butoxysilane, vinyltri-i-butoxysilane, Vinyltri-sec-butoxysilane, vinyltri-t-butoxysilane, divinyldimethoxysilane, divinyldiethoxysilane, divinyldi-n-propoxysilane, divinyldi-i-propoxysilane, divinyldi-n-butoxysilane, divinyldi-i-butoxysilane , Divinyl di-sec-butoxy silane, divinyl di-t-butoxy silane, trivinyl methoxy silane, trivinyl ethoxy silane, trivinyl n-propoxy silane, trivinyl i-propoxy , Trivinyl-n-butoxysilane, trivinyl-i-butoxysilane, trivinyl-sec-butoxysilane, trivinyl-t-butoxysilane, vinyltris (2-methoxyethoxy) silane, divinylbis (2-methoxyethoxy) silane, trivinyl ( 2-methoxyethoxy) silane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, vinylethyldimethoxysilane, vinylethyldiethoxysilane, vinylphenyldimethoxysilane, vinylphenyldiethoxysilane, divinylmethylmethoxysilane, divinylmethylethoxysilane, Divinylethylmethoxysilane, divinylethylethoxysilane, divinylphenylmethoxysilane, divinylphenylethoxysilane, 1,3-divinyltetramethoxy Loxane, 1,3-divinyltetraethoxysiloxane, 1,3-divinyl-1,3-dimethyldimethoxysiloxane, 1,3-divinyl-1,3-dimethyldiethoxysiloxane, vinyltriacetoxysilane, divinyldiacetoxysilane, Trivinylacetoxysilane, vinylmethyldiacetoxysilane, vinylethyldiacetoxysilane, vinylphenyldiacetoxysilane, divinylmethylacetoxysilane, divinylethylacetoxysilane, divinylphenylacetoxysilane, 1,3-divinyltetraacetoxysiloxane, 1,3 -Divinyl-1,3-dimethyldiacetoxysiloxane, (3-acryloxypropyl) dimethylmethoxysilane, (3-acryloxypropyl) dimethylethoxysilane, N-3- (acrylic) Roxy-2-hydropropyl) -3-aminopropyltrimethoxysilane, N-3- (acryloxy-2-hydropropyl) -3-aminopropyltriethoxysilane, (3-acryloxypropyl) methyldimethoxysilane, (3 -Acryloxypropyl) methyldiethoxysilane, (3-acryloxypropyl) trimethoxysilane, (3-acryloxypropyl) triethoxysilane, 3- (N-allylamino) propyltrimethoxysilane, 3- (N-allylamino ) Propyltriethoxysilane, allyldimethoxysilane, allyldiethoxysilane, ethynyltrimethoxysilane, ethynyltriethoxysilane, ethynyltri-n-propoxysilane, ethynyltri-i-propoxysilane, ethynyltri-n-butoxysilane, e Niltri-i-butoxysilane, ethynyltri-sec-butoxysilane, ethynyltri-t-butoxysilane, diethynyldimethoxysilane, diethynyldiethoxysilane, diethynyldi-n-propoxysilane, diethynyldi-i-propoxysilane, diethynyldi-n- Butoxysilane, diethynyldi-i-butoxysilane, diethynyldi-sec-butoxysilane, diethynyldi-t-butoxysilane, triethynylmethoxysilane, triethynylethoxysilane, triethynyl-n-propoxysilane, triethynyl-i-propoxysilane, triethynyl- n-butoxysilane, triethynyl-i-butoxysilane, triethynyl-sec-butoxysilane, triethynyl-t-butoxysilane, ethynyltris (2-methoxy Ethoxy) silane, diethynylbis (2-methoxyethoxy) silane, triethynyl (2-methoxyethoxy) silane, ethynylmethyldimethoxysilane, ethynylmethyldiethoxysilane, ethynylethyldimethoxysilane, ethynylethyldiethoxysilane, ethynylphenyldimethoxysilane, ethynyl Phenyldiethoxysilane, diethynylmethylmethoxysilane, diethynylmethylethoxysilane, diethynylethylmethoxysilane, diethynylethylethoxysilane, diethynylphenylmethoxysilane, diethynylphenylethoxysilane, 1,3-diethynyltetramethoxysiloxane 1,3-diethynyltetraethoxysiloxane, 1,3-diethynyl-1,3-dimethyldimethoxysiloxane, 1,3-diethynyl- 1,3-dimethyldiethoxysiloxane, ethynyltriacetoxysilane, diethynyldiacetoxysilane, triethynylacetoxysilane, ethynylmethyldiacetoxysilane, ethynylethyldiacetoxysilane, ethynylphenyldiacetoxysilane, diethynylmethylacetoxysilane, Ethynylethylacetoxysilane, diethynylphenylacetoxysilane, 1,3-diethynyltetraacetoxysiloxane, 1,3-diethynyl1,3-dimethyldiacetoxysiloxane, (phenylethynyl) trimethoxysilane, (phenylethynyl) triethoxysilane , (Phenylethynyl) tri-n-propoxysilane, (phenylethynyl) tri-i-propoxysilane, (phenylethynyl) tri-n-butoxysilane, (Nylethynyl) tri-i-butoxysilane, (phenylethynyl) tri-sec-butoxysilane, (phenylethynyl) tri-t-butoxysilane, bis (phenylethynyl) dimethoxysilane, bis (phenylethynyl) diethoxysilane, bis ( (Phenylethynyl) di-n-propoxysilane, bis (phenylethynyl) di-i-propoxysilane, bis (phenylethynyl) di-n-butoxysilane, bis (phenylethynyl) di-i-butoxysilane, bis (phenylethynyl) ) Di-sec-butoxysilane, bis (phenylethynyl) di-t-butoxysilane, tris (phenylethynyl) methoxysilane, tris (phenylethynyl) ethoxysilane, tris (phenylethynyl) -n-propoxysilane, tris (phenyl) (Ethynyl) -i-propoxysilane, tris (phenylethynyl) -n-butoxysilane, tris (phenylethynyl) -i-butoxysilane, tris (phenylethynyl) -sec-butoxysilane, tris (phenylethynyl) -t-butoxy Silane, (phenylethynyl) tris (2-methoxyethoxy) silane, bis (phenylethynyl) bis (2-methoxyethoxy) silane, tris (phenylethynyl) (2-methoxyethoxy) silane, (phenylethynyl) methyldimethoxysilane, (Phenylethynyl) methyldiethoxysilane, (phenylethynyl) ethyldimethoxysilane, (phenylethynylethyl) diethoxysilane, (phenylethynyl) phenyldimethoxysilane, (phenylethynyl) phenyldiethoxy Silane, bis (phenylethynyl) methylmethoxysilane, bis (phenylethynyl) methylethoxysilane, bis (phenylethynyl) ethylmethoxysilane, bis (phenylethynyl) ethylethoxysilane, bis (phenylethynyl) phenylmethoxysilane, bis (phenyl) (Ethynyl) phenylethoxysilane, 1,3-bis (phenylethynyl) tetramethoxysiloxane, 1,3-bis (phenylethynyl) tetraethoxysiloxane, 1,3-bis (phenylethynyl) -1,3-dimethyldimethoxysiloxane, 1,3-bis (phenylethynyl) -1,3-dimethyldiethoxysiloxane, (phenylethynyl) triacetoxysilane, bis (phenylethynyl) diacetoxysilane, tris (phenylethynyl) acetate Sisilane, (phenylethynyl) methyldiacetoxysilane, (phenylethynyl) ethyldiacetoxysilane, (phenylethynyl) phenyldiacetoxysilane, bis (phenylethynyl) methylacetoxysilane, bis (phenylethynyl) ethylacetoxysilane, bis (phenyl) (Ethynyl) phenylacetoxysilane, 1,3-bis (phenylethynyl) tetraacetoxysiloxane, 1,3-bis (phenylethynyl) -1,3-dimethyldiacetoxysiloxane, bis (trimethoxysilyl) acetylene, bis (triethoxy) (Silyl) acetylene, p-tolyltrimethoxysilane, p-tolyltriethoxysilane, p-tolyltri-n-propoxysilane, p-tolyltri-i-propoxysilane, m-tolyltrimethoxy Orchids, m- tolyl triethoxysilane, m- Torirutori -n- propoxysilane, m- Torirutori -i- propoxysilane, p- tolyl triacetoxy silane, and the like m- tolyl triacetoxy silane.
[0040]
When one molecule of the silane coupling agent contains a plurality of alkoxy groups, it is preferable to hydrolyze the silane coupling agent so that all the alkoxy groups are changed to hydroxy groups. If the alkoxy group remains, alcohol may be generated during the surface treatment of the SiC film.
[0041]
In order to convert all the alkoxy groups into hydroxy groups, it is preferable to add 1 mol or more of water to 1 mol of the alkoxy group during the hydrolysis of the silane coupling agent. For example, when vinyltrimethoxysilane is used as a silane coupling agent, one mole of the silane coupling agent contains 3 moles of methoxy groups. Therefore, it is preferable to add 3 moles or more of water to 1 mole of the silane coupling agent for hydrolysis.
[0042]
Similarly, when the silane coupling agent contains an acetoxy group, it is preferable to add one or more moles of water to one mole of the acetoxy group to perform hydrolysis.
In the above embodiment, the case where the SiC film is used as the copper diffusion preventing film has been described. However, the improvement of the adhesion can be expected also when the SiOC film is used as the copper diffusion preventing film. In addition, when an insulating material containing silicon, in which a low dielectric constant insulating film made of SiLK or the like is formed on the surface of the insulating film in which silicon atoms on the surface are terminated with hydrogen atoms, adhesion is also high. Can be expected to improve.
[0043]
Further, in the above-described embodiment, the case where the registered trademark SiLK is used as the low dielectric constant insulating film material has been described. However, the same result can be obtained by using an organic insulating material including a double bond or a triple bond between carbon atoms. Will be obtained.
[0044]
Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. For example, it will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.
[0045]
【The invention's effect】
As described above, according to the present invention, the surface of the substrate is occupied by the copper member. Can be prevented.
[Brief description of the drawings]
FIG. 1 is a sectional view (part 1) of a substrate for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a sectional view (part 2) of a substrate for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 3 is a sectional view (part 3) of a substrate for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 4 is a sectional view (part 4) of a substrate for describing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 5 is a schematic view of a cleaning device used in the embodiment.
FIG. 6 is a diagram showing a state of a chemical reaction at the time of surface treatment according to an example and a chemical structural formula on a substrate surface.
[Explanation of symbols]
10 silicon substrate 11 STI (shallow trench isolation)
18 PSG film 19 SiC film 21, 31, 41, 51 Copper diffusion prevention film 23, 33, 43, 53 Cap film 24, 34, 44, 54 Hard mask film 29, 39, 49, 59 Wiring 70 Cleaning container 71 Processing table 72 Substrate 75, 76 Container 78 Outlet 80 Pure water 81 Corrosion inhibitor 85, 86, 87 Heater

Claims (5)

(A) preparing an object to be treated in which copper or a copper-based material occupies at least a part of the surface;
(B) exposing the surface of the object to be processed to a gas containing water vapor and a corrosion inhibitor of copper. 2. The method according to claim 1, wherein in the step (b), the temperature of the object is set to 300 ° C. or higher, and the object is exposed to the gas. The method according to claim 1, wherein the anticorrosive comprises at least one selected from the group consisting of 2-mercaptobenzothiazole, 2,5-mercaptobenzothiazole, benzimidazole, benzimidazolethiol, benzoxazolethiol, and mercaptothiazoline. 4. The manufacturing method of the semiconductor device described in the above. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the concentration of the corrosion inhibitor in the gas used in the step (b) is 10 ppm to 10% by weight. 5. The step (a) comprises:
Forming an interlayer insulating film on a semiconductor substrate on which copper or a first wiring containing copper as a main component is formed;
Forming a damascene wiring recess in the interlayer insulating film such that a part of the first wiring is exposed;
5. The method of manufacturing a semiconductor device according to claim 1, further comprising, after the step (b), a step of filling a second wiring in the damascene wiring recess.

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