JP2004229496A

JP2004229496A - Controller for power circuit and drive method, and electric circuit for energy supply and indicating device equipped with the electric circuit

Info

Publication number: JP2004229496A
Application number: JP2004014898A
Authority: JP
Inventors: Rin Yun-Rin; ユン−リン・リン
Original assignee: O2Micro Inc
Current assignee: O2Micro Inc
Priority date: 2003-01-22
Filing date: 2004-01-22
Publication date: 2004-08-12
Anticipated expiration: 2024-01-22
Also published as: KR20040068014A; JP4025300B2; CN1521924A; JP2007059408A; CN1521924B

Abstract

<P>PROBLEM TO BE SOLVED: To provide a further simplified controller with a further simplified phase shift circuit technology. <P>SOLUTION: The controller for controlling at least two power circuits is provided with a pulse generator and a selecting device. The pulse generator generates a first pulse signal connected to a first power circuit of at least the two power circuits for starting the operation of the first power circuit. Thereafter. the first power circuit outputs a second pulse signal to a second power circuit of at least the two power circuits for starting the operation of the second power circuit. The selecting device generates a reference signal connected to each of at least two power circuits for indicating the number of the controlled power circuits. The controller is used for supplying control energy to the electric circuit equipped with a plurality of inverters, and further particularly for giving a phase shift to the electric circuit. Ordinarily, the electric circuit is applied to the indicating device of a liquid crystal display monitor, a liquid crystal display computer, a liquid crystal display television or the like. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

本発明は、ＣＣＦＬ（冷陰極蛍光灯：cold-cathode-fluorescent-lamp）等の複数の負荷に対して電力を供給するための電気回路に関し、特に、複数の負荷に位相シフトを提供するための電気回路に関する。通常、本電気回路は、液晶表示モニターや液晶表示コンピュータや液晶テレビなどの表示装置に使われる。 The present invention relates to an electric circuit for supplying power to a plurality of loads such as a CCFL (cold-cathode-fluorescent-lamp), and more particularly to an electric circuit for providing a phase shift to a plurality of loads. Related to electrical circuits. Usually, the electric circuit is used for a display device such as a liquid crystal display monitor, a liquid crystal display computer, and a liquid crystal television.

ＣＣＦＬ負荷は、広く、液晶ディスプレイ（ＬＣＤ）、特に背面照明型ＬＣＤモニターやＬＣＤテレビに背面照明を提供するのに使用される。しかし、そのような従来の応用範囲では、個々のＣＣＦＬを駆動するのに、分離型の直流／交流電力の電力インバータ（ＤＣ／ＡＣ電力インバータ）を必要とする。そのような応用例が、図１に示されるが、そこでは、各ＣＣＦＬ（２０，２２，…２４）は、それぞれ個々のＤＣ／ＡＣインバータ（１０，１２，…１４）によって電力を与えられ、全てのＤＣ／ＡＣインバータは同期が取れている。各ＤＣ／ＡＣインバータには、ＡＣ交換網と電力駆動回路とが含まれている。電力駆動回路には、ＣＣＦＬのための共振タンク回路が含まれていてよい。各インバータの中のＡＣ交換網は、同期してＯＮ／ＯＦＦが切り換えられる。従って、電力線上には、大きなリップルがある。交換網の中のスイッチがオンされる時に、電力源Ｖ_Ｂａｔｔから大電流が引き出され、スイッチがオフされる時に、引き出された電流が解除される。全てのインバータで同時にオンとオフがされると、電力線上に雑音が発生し、これによってシステム内の信号／雑音の状態が劣化する。 CCFL loads are widely used to provide backlighting for liquid crystal displays (LCDs), especially backlighting LCD monitors and LCD televisions. However, such conventional applications require separate DC / AC power inverters (DC / AC power inverters) to drive individual CCFLs. Such an application is shown in FIG. 1, where each CCFL (20, 22,... 24) is powered by a respective individual DC / AC inverter (10, 12,... 14), All DC / AC inverters are synchronized. Each DC / AC inverter includes an AC switching network and a power drive circuit. The power drive circuit may include a resonant tank circuit for the CCFL. The AC switching network in each inverter is switched ON / OFF synchronously. Therefore, there is a large ripple on the power line. When a switch in the switching network is turned on, a large current is drawn from the power source V _Batt, and when the switch is turned off, the drawn current is released. If all inverters are turned on and off at the same time, noise is generated on the power line, which degrades the signal / noise condition in the system.

リップルを減らす一つの方法は、電力線におけるフィルタを増やすことである。しかし、その欠点は、回路の大きさが増加して、その結果、システムの価格が増加することである。 One way to reduce ripple is to increase the filters on the power line. The disadvantage, however, is that the size of the circuit increases, and consequently, the price of the system.

図２は、複数のＣＣＦＬ負荷を駆動するための、他の従来例による回路を示しており、その回路には、複数のＤＣ／ＡＣインバータ（１０，１２，１４，…１６）とＣＣＦＬ負荷（２０，２２，２４，…２６）を駆動するための制御器（４０）が含まれている。制御器（４０）の中のクロック生成器（４２）は、位相の遅延を作るために、各ＤＣ／ＡＣインバータ（１０，１２，１４，…１６）に対して位相シフトされたクロック信号の列を生成する。全てのＤＣ／ＡＣインバータ（１０，１２，１４，…１６）のネットワーク内のスイッチは、隣り合うインバータ間で等しい位相シフトでオンとオフをするので、電力線上のリップルは、図１に示されるものの１／Ｎに減る効果がある。ここで、Ｎは、接続されるＤＣ／ＡＣインバータの数である。 FIG. 2 shows another conventional circuit for driving a plurality of CCFL loads, the circuit including a plurality of DC / AC inverters (10, 12, 14,... 16) and a CCFL load (10). , 26) are included in the controller (40). A clock generator (42) in the controller (40) includes a train of phase-shifted clock signals for each DC / AC inverter (10, 12, 14, ... 16) to create a phase delay. Generate The ripple in the power line is shown in FIG. 1 since the switches in the network of all DC / AC inverters (10, 12, 14,... 16) turn on and off with equal phase shift between adjacent inverters. It has the effect of reducing it to 1 / N. Here, N is the number of connected DC / AC inverters.

しかし、問題は、制御器（４０）は、求められる元の負荷の数に固定される、言い換えると、ＣＣＦＬ負荷の数は、制御器（４０）から各インバータ（１０，１２，１４，…１６）に位相シフトを渡すラインに等しいということである。従って、もし、ＣＣＦＬ負荷の数が変わると、制御器（４０）の構成は変わらざるを得ない。他の欠点は、制御器（４０）が、個々のＤＣ／ＡＣインバータの動作周波数のＮ倍の周波数を持つ高周波クロック信号を生成する必要があるということである。 However, the problem is that the controller (40) is fixed to the number of original loads required, in other words, the number of CCFL loads is determined by the controller (40) from each inverter (10, 12, 14,... 16). ) Is equal to the line that passes the phase shift. Therefore, if the number of CCFL loads changes, the configuration of the controller (40) must change. Another disadvantage is that the controller (40) needs to generate a high frequency clock signal having a frequency N times the operating frequency of the individual DC / AC inverter.

本発明の目的は、より簡易な位相シフト回路技術の、より簡易な制御器を提供することであり、ここで、インバータの数によって決まる、より簡易なユーザープログラマブルな数の位相が使用される、すなわち、高出力、低価格でより小さな複数のインバータのシステムを得ることができる。 It is an object of the present invention to provide a simpler controller of a simpler phase shift circuit technology, wherein a simpler user-programmable number of phases is used, determined by the number of inverters, That is, a system of a plurality of smaller inverters with high output and low price can be obtained.

本発明の他の目的は、ＣＣＦＬ負荷のような複数の負荷を駆動するために、ＤＣ／ＡＣインバータのような複数の電力回路を備えた改良型電気回路を提供することであり、これによって、電力回路中で同時にオンとオフが起こることによる瞬間的高電流リップルと雑音が減少する。 It is another object of the present invention to provide an improved electrical circuit with multiple power circuits, such as DC / AC inverters, for driving multiple loads, such as CCFL loads. Instantaneous high current ripple and noise due to simultaneous on and off in power circuits are reduced.

本発明のさらに他の目的は、ＣＣＦＬ負荷のような、少なくとも２つの負荷を備えた表示装置を提供することである。この表示装置は、ＬＣＤモニターやＬＣＤテレビやＬＣＤコンピュータであろう。 It is yet another object of the present invention to provide a display with at least two loads, such as a CCFL load. The display may be an LCD monitor, LCD television or LCD computer.

本発明のさらに他の目的は、ＣＣＦＬ負荷のような複数の負荷を駆動するための、ＤＣ／ＡＣインバータのような複数の電力回路を備えた電気回路を駆動するための方法を提供することであり、これによって、電力回路において同時にオンとオフが起こることによる瞬間的高電流リップルと雑音が減少する。 Yet another object of the present invention is to provide a method for driving an electric circuit with a plurality of power circuits, such as a DC / AC inverter, for driving a plurality of loads, such as a CCFL load. Yes, this reduces instantaneous high current ripple and noise due to simultaneous on and off in the power circuit.

まとめると、本発明の制御器は、接続されるＤＣ／ＡＣインバータの動作を始めるためのクロック信号を生成するためのパルス生成器と、接続されるＤＣ／ＡＣインバータの数を示す基準信号を生成するための位相選択器とを備える。 In summary, the controller of the present invention generates a pulse generator for generating a clock signal for starting operation of the connected DC / AC inverter and a reference signal indicating the number of connected DC / AC inverters. And a phase selector for performing the operation.

加えて、本発明による電気回路は、ＤＣ／ＡＣインバータの間でＣＣＦＬ負荷を駆動するためにオンとオフを切り換える位相シフトを提供し、ここで、位相シフトの数は、接続されるＤＣ／ＡＣインバータの数に従ってプログラムされる。本発明によると、第１ＤＣ／ＡＣインバータは、パルス生成器からのパルス信号と、位相の数を示す位相選択器からの基準信号とを受信し、第２ＤＣ／ＡＣインバータへの第２パルス信号を生成する。第２ＤＣ／ＡＣインバータは、第１ＤＣ／ＡＣインバータへの第１パルス信号入力に関する位相シフトをもった第２パルス信号を受信する。同様に、第２ＤＣ／ＡＣインバータは、第２ＤＣ／ＡＣインバータへの第２パルス信号入力に関する同量の位相シフトを持つ、第３ＤＣ／ＡＣインバータへの第３パルス信号を生成し、それによって、全てのＤＣ／ＡＣインバータは、隣り合うインバータ間で等しい位相シフトでオンとオフをする。本発明によると、電力線の上のリップルは、こうして効果的に減らされ、回路は、プログラム可能となり、かつ簡略化され、価格も減る。 In addition, the electrical circuit according to the present invention provides a phase shift that switches on and off to drive a CCFL load between DC / AC inverters, where the number of phase shifts is It is programmed according to the number of inverters. According to the present invention, the first DC / AC inverter receives the pulse signal from the pulse generator and the reference signal from the phase selector indicating the number of phases, and converts the second pulse signal to the second DC / AC inverter. Generate. The second DC / AC inverter receives a second pulse signal having a phase shift with respect to the first pulse signal input to the first DC / AC inverter. Similarly, the second DC / AC inverter generates a third pulse signal to the third DC / AC inverter having the same amount of phase shift with respect to the second pulse signal input to the second DC / AC inverter, whereby all Turn on and off with an equal phase shift between adjacent inverters. According to the invention, the ripple on the power line is thus effectively reduced, the circuit becomes programmable and simplified and the price is also reduced.

本発明とその利点をより完全に理解するために、次に、本発明の実施形態を示す図面と共に以下の説明を参照する。 For a more complete understanding of the present invention and its advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, which illustrate embodiments of the present invention.

図３ａは、光源負荷あるいはＣＣＦＬ負荷のような複数の負荷を駆動するために使用される、本発明による電気回路をブロック図である。本電気回路は、制御器（４０）と、ＤＣ／ＡＣインバータのような少なくとも２つの電力回路（１０，１２）を備える。制御器（４０）は、位相選択器（４４）のような選択器（４０）と、発振器のようなパルス生成器（４６）を備える。 FIG. 3a is a block diagram of an electrical circuit according to the invention used to drive multiple loads, such as a light source load or a CCFL load. The electric circuit comprises a controller (40) and at least two power circuits (10, 12) such as DC / AC inverters. The controller (40) includes a selector (40) such as a phase selector (44) and a pulse generator (46) such as an oscillator.

選択器（４４）は、可変入力信号に従って基準信号を生成し、この基準信号は、少なくとも２つの電力回路（１０，１２）に結合されて、制御される電力回路の数あるいはシフトする位相の数を示す。すなわち、もし接続すべき電力回路が４つあれば、選択器（４４）の出力は、可変入力信号によって接続される４つの電力回路を表す基準信号を出力するだろう。従って、制御すべき電力回路は、制御回路（４０）と電力回路（１０，１２）の回路構成を変えずに、入力信号によってプログラム可能であろう。選択器（４４）は、ディジタル−アナログ変換器であっても良いし、アナログ入力−アナログ出力回路であっても良い。 A selector (44) generates a reference signal according to the variable input signal, the reference signal being coupled to at least two power circuits (10, 12) to control the number of controlled power circuits or the number of shifted phases. Is shown. That is, if there are four power circuits to be connected, the output of the selector (44) will output a reference signal representing the four power circuits connected by the variable input signal. Accordingly, the power circuit to be controlled would be programmable by the input signal without changing the circuit configuration of the control circuit (40) and the power circuits (10, 12). The selector (44) may be a digital-analog converter or an analog input-analog output circuit.

パルス生成器（４６）は、第１パルス信号を生成し、その第１パルス信号は、少なくとも２つの電力回路（１０，１２）の第１電力回路に結合されて、少なくとも２つの電力回路（１０，１２）の第１電力回路の動作を開始する。第１電力回路（１０）は、その後、第２パルス信号を出力し、少なくとも２つの電力回路（１０，１２）の第２電力回路（１２）の動作を開始する。少なくとも２つの電力回路（１０，１２）は、負荷に電力を供給するために各々、変圧器と光源あるいはＣＣＦＬのような負荷とに結合される。 The pulse generator (46) generates a first pulse signal that is coupled to the first power circuit of the at least two power circuits (10, 12) to generate at least two power circuits (10 , 12) operation of the first power circuit is started. After that, the first power circuit (10) outputs the second pulse signal, and starts the operation of the second power circuit (12) of the at least two power circuits (10, 12). At least two power circuits (10, 12) are each coupled to a transformer and a light source or load, such as a CCFL, to power the load.

説明を簡単にするために、２つの電力回路を備えた本発明の電気回路の動作が、以下に説明される。 For the sake of simplicity, the operation of the electric circuit according to the invention with two power circuits is described below.

選択器（４４）は、最初に、制御すべき電力回路の数（この場合は、２）を示すための選択器に結合される入力信号に従って、２つの電力回路（１０，１２）へと基準信号を生成する。その後、パルス生成器（４６）は、第１電力回路（１０）へ第１パルス信号を生成して、第１電力回路の動作を開始する。第１電力回路（１０）は、光源あるいはＣＣＦＬのような第１負荷に結合される第１変圧器に結合されて、第１負荷の動作を制御する。第１電力回路（１０）は、第２パルス信号を第２電力回路（１２）へ出力して、第２電力回路の動作を開始するが、ここで、第２パルス信号は、第１電力回路（１０）に送られた第１パルス信号によって遅延する。第２電力回路（１２）は、光源あるいはＣＣＦＬのような第２負荷に結合される第２変圧器に結合されて、第２負荷の動作を制御する。同様に、第２電力回路（１２）は、第２動作サイクルのために、第３パルス信号を第１電力回路（１０）に出力する。第３パルス信号は、第２電力回路（１２）に送られる第２パルス信号によって遅延する。第１電力回路（１０）は、その後、第４パルス信号を出力し、ここで、第４パルス信号は、第１電力回路（１０）に送られた第３パルス信号によって遅延する。第１電力回路への入力パルス信号として、通常は、最後の電力回路からのパルス信号出力である。本発明によると、２つの電力回路（１０，１２）は、等しい位相シフトでオンとオフをする。従って、電力線の上のリップルは、こうして減らされ、本回路は、プログラム可能になり、かつ簡略化され、価格は減る。本発明の利点は、電力回路の数が多くなると、より一層明らかとなるだろう。 The selector (44) initially references two power circuits (10, 12) according to an input signal coupled to the selector to indicate the number of power circuits to control (in this case, two). Generate a signal. Thereafter, the pulse generator (46) generates a first pulse signal to the first power circuit (10) and starts operation of the first power circuit. A first power circuit (10) is coupled to a first transformer coupled to a first load, such as a light source or a CCFL, to control operation of the first load. The first power circuit (10) outputs a second pulse signal to the second power circuit (12) to start the operation of the second power circuit, where the second pulse signal corresponds to the first power circuit. Delay by the first pulse signal sent to (10). The second power circuit (12) is coupled to a second transformer coupled to a light source or a second load, such as a CCFL, for controlling operation of the second load. Similarly, the second power circuit (12) outputs a third pulse signal to the first power circuit (10) for a second operation cycle. The third pulse signal is delayed by the second pulse signal sent to the second power circuit (12). The first power circuit (10) then outputs a fourth pulse signal, wherein the fourth pulse signal is delayed by the third pulse signal sent to the first power circuit (10). The input pulse signal to the first power circuit is usually a pulse signal output from the last power circuit. According to the invention, the two power circuits (10, 12) turn on and off with equal phase shift. Thus, ripple on the power line is thus reduced, and the circuit becomes programmable and simplified, and the cost is reduced. The advantages of the present invention will become more apparent as the number of power circuits increases.

本発明の電気回路は、ＬＣＤモニターのような表示装置や、ＬＣＤモニターや、ＬＣＤテレビや、ＬＣＤコンピュータで適用することができよう。本表示装置は、制御器に加えて、少なくとも２つの電力回路と、少なくとも２つの変圧器と、少なくとも２つの光源と、表示パネルとを備えていてよい。 The electrical circuit of the present invention could be applied to display devices such as LCD monitors, LCD monitors, LCD televisions, and LCD computers. The display device may include, in addition to the controller, at least two power circuits, at least two transformers, at least two light sources, and a display panel.

図４は、電力回路のための入力クロックと出力クロックの信号表記である。入力クロックと出力クロックの間に、時間遅延Δｔが見られる。この遅延は、一種の位相シフト遅延であり、遅延回路によって生成されるが、これは後に説明する。 FIG. 4 is a signal notation of an input clock and an output clock for a power circuit. There is a time delay Δt between the input clock and the output clock. This delay is a kind of phase shift delay and is generated by a delay circuit, which will be described later.

図５は、選択回路（７０）の一例であり、ここで、ディジタル−アナログ変換器のような選択回路（７０）に結合される入力（６０，６２，６４，…６６）は、ディジタル信号であり、電力回路（１０，１２，…１４）に結合される出力はアナログ信号（Ｖaa）である。選択回路（７０）に結合される入力信号と、その対応する出力信号は、図６に示されている。すなわち、もし選択器（７０）の入力端子が４ならば、制御すべき電力回路は、１６までプログラムすることができる。 FIG. 5 is an example of a selection circuit (70) where the inputs (60, 62, 64,... 66) coupled to the selection circuit (70), such as a digital-to-analog converter, are digital signals. Yes, the output coupled to the power circuit (10, 12,... 14) is an analog signal (Vaa). The input signal coupled to the selection circuit (70) and its corresponding output signal are shown in FIG. That is, if the input terminal of the selector (70) is 4, the power circuits to be controlled can be programmed up to 16.

図７は、縮尺の決められたアナログ選択器のような選択回路（７２）の他の一例を示しており、ここでは、選択回路に結合された入力は、アナログ信号（Ｖain）であり、電力回路（１０，１２，…１４）に結合された出力はアナログ信号（Ｖaa）である。図８は、図７に示された選択回路（７２）の一例の図であり、ここでは、Ｖainは、選択回路（７２）のアナログ入力を表しており、Ｖaaは、選択回路（７２）のアナログ出力を表している。Ｖaaの値は、ＶainとＶrefと３つの抵抗（８０，８２，８４）の値に基づいて重ね合わせ法を用いることによって得ることができる。 FIG. 7 shows another example of a selection circuit (72), such as a scaled analog selector, where the input coupled to the selection circuit is an analog signal (Vain) and the power is The output coupled to the circuits (10, 12,... 14) is an analog signal (Vaa). FIG. 8 is a diagram of an example of the selection circuit (72) shown in FIG. 7. Here, Vain represents an analog input of the selection circuit (72), and Vaa represents an analog input of the selection circuit (72). Indicates analog output. The value of Vaa can be obtained by using the superposition method based on Vain, Vref and the values of the three resistors (80, 82, 84).

図９は、入力クロック信号と基準信号に基づいて生成されたランプ信号を備えた、電力回路の中の遅延回路の一例の図である。遅延ΔＴは、各位相間の遅延回路によって生成される。図９は、各ＣＣＦＬに順次結合された一連の信号も示しており、ここでは、最初の位置の遅延は、第１パルス信号と基準信号とに基づいてランプ生成器によって生成される。 FIG. 9 is a diagram of an example of a delay circuit in a power circuit including a ramp signal generated based on an input clock signal and a reference signal. The delay ΔT is generated by a delay circuit between each phase. FIG. 9 also shows a series of signals sequentially coupled to each CCFL, where the initial position delay is generated by the ramp generator based on the first pulse signal and the reference signal.

図１０ａは、本発明における遅延セルの図である。ここで図示されているのは、CLOCK IN信号とCLOCK OUT信号の間の遅延セルによって生成される遅延ΔＴである。図１０ｂは、図１０ａで示される遅延セル（９２）を備えた電力回路の遅延回路の一例である。遅延ΔＴは、主に、基準信号Ｖaaによって決定される。中でも、CLOCK IN信号が遅延セル（９２）と一番最初の時間に結合されると、トランジスタ（９３）は、オンして電圧Ｖcは０Ｖに落ちる。一方、CLOCK IN信号が落ちてトランジスタ（９３）をオフすると（遅延時間の始まり）、コンデンサ（９４）は、コンデンサ（９４）上の電圧がrefより高くなるまで、電流Ｉcによって充電される。コンデンサ（９４）上の電圧がＶrefより高くなると、比較器（９５）は、状態を変更し、コンデンサ（９６）を経由して次段へパルス信号（遅延時間の終わり）を生成するだろう。電流Ｉcは、ＶaaとＶccの差によって決定される。一例として、Ｖaaの値が高くなるほど、電流Ｉcは少なくなり、充電時間は多くなる。言い換えると、遅延時間が増加する。別の例では、Ｖaaの値が高くなるほど、電流Ｉcは多くなり、そうして、充電時間は少なくなる。言い換えると、遅延時間が減少する。 FIG. 10a is a diagram of a delay cell in the present invention. Shown here is the delay ΔT created by the delay cell between the CLOCK IN and CLOCK OUT signals. FIG. 10B is an example of a delay circuit of a power circuit including the delay cell (92) shown in FIG. 10A. The delay ΔT is mainly determined by the reference signal Vaa. In particular, when the CLOCK IN signal is coupled to the delay cell (92) at the very first time, the transistor (93) turns on and the voltage Vc drops to 0V. On the other hand, when the CLOCK IN signal falls and turns off transistor (93) (beginning of the delay time), capacitor (94) is charged by current Ic until the voltage on capacitor (94) becomes higher than ref. If the voltage on capacitor (94) rises above Vref, comparator (95) will change state and generate a pulse signal (end of delay) to the next stage via capacitor (96). The current Ic is determined by the difference between Vaa and Vcc. As an example, as the value of Vaa increases, the current Ic decreases and the charging time increases. In other words, the delay time increases. In another example, the higher the value of Vaa, the higher the current Ic, and thus the shorter the charging time. In other words, the delay time decreases.

図１１ａ〜図１１ｅは、本発明の電気回路を実現しているＤＣ／ＡＣインバータの例である。図１１ａは、フルブリッジＤＣ／ＡＣインバータであり、図１１ｂは、半ブリッジＤＣ／ＡＣインバータであり、図１１ｃは、フライバックフォワード（fly-back forward）ＤＣ／ＡＣインバータであり、図１１ｄは、プッシュプルＤＣ／ＡＣインバータであり、図１１ｅは、Ｄ級ＤＣ／ＡＣインバータである。 11a to 11e are examples of DC / AC inverters realizing the electric circuit of the present invention. 11a is a full-bridge DC / AC inverter, FIG. 11b is a half-bridge DC / AC inverter, FIG. 11c is a fly-back forward DC / AC inverter, and FIG. FIG. 11e shows a push-pull DC / AC inverter, and FIG. 11e shows a class D DC / AC inverter.

本発明とその利点が詳細に説明されたが、様々な変更や代用や交替は、添付の特許請求の範囲で定義したような本発明の趣旨と範囲とから逸脱することなく、ここにおいて可能であることは理解されたい。 Although the invention and its advantages have been described in detail, various changes, substitutions, and alterations can be made herein without departing from the spirit and scope of the invention as defined in the appended claims. It should be understood.

全てのＤＣ／ＡＣインバータがＣＣＦＬ負荷を駆動するのに同期している、複数のＣＣＦＬ負荷を駆動するために使用される従来の回路を描いた図である。FIG. 3 depicts a conventional circuit used to drive multiple CCFL loads, where all DC / AC inverters are synchronized to drive the CCFL load. 回路中に制御器と複数のＤＣ／ＡＣインバータが含まれ、制御器は、複数のＤＣ／ＡＣインバータへの位相遅延クロック信号の列を生成するところの、複数のＣＣＦＬ負荷を駆動するのに使用される従来の回路を描いた図である。A controller and a plurality of DC / AC inverters are included in the circuit, wherein the controller is used to drive a plurality of CCFL loads to generate a train of phase delayed clock signals to the plurality of DC / AC inverters. FIG. 2 is a diagram illustrating a conventional circuit to be used. 複数のＣＣＦＬ負荷を駆動するのに使用される、本発明による電気回路のブロック図である。FIG. 2 is a block diagram of an electrical circuit according to the present invention used to drive multiple CCFL loads. 複数のＣＣＦＬ負荷を駆動するのに使用される、本発明による電気回路のブロック図である。FIG. 2 is a block diagram of an electrical circuit according to the present invention used to drive multiple CCFL loads. ＤＣ／ＡＣインバータのための入力クロックと出力クロックの信号である。These are the input clock and output clock signals for the DC / AC inverter. 選択回路に結合される入力はディジタル信号であり、ＤＣ／ＡＣインバータに結合される出力はアナログ信号であるような、選択回路の一例の図である。FIG. 3 is an illustration of an example of a selection circuit where the input coupled to the selection circuit is a digital signal and the output coupled to the DC / AC inverter is an analog signal. 選択回路に結合される入力信号と、対応する出力信号の一例の図である。FIG. 3 is a diagram of an example of an input signal coupled to a selection circuit and a corresponding output signal. 選択回路に結合される入力はアナログ信号であり、ＤＣ／ＡＣインバータに結合される出力はアナログ信号であるような、選択回路の一例の表である。FIG. 4 is a table of an example of a selection circuit in which the input coupled to the selection circuit is an analog signal and the output coupled to the DC / AC inverter is an analog signal. 図７に示される選択回路の一例の図である。FIG. 8 is a diagram illustrating an example of a selection circuit illustrated in FIG. 7. 入力クロック信号に基づいて生成されたランプ信号を備えるＤＣ／ＡＣインバータの遅延回路の一例の図である。FIG. 4 is a diagram illustrating an example of a delay circuit of a DC / AC inverter including a ramp signal generated based on an input clock signal. 本発明中の遅延セルの図である。FIG. 3 is a diagram of a delay cell in the present invention. 本発明中の遅延セルの図である。FIG. 3 is a diagram of a delay cell in the present invention. 本発明の電気回路を実現するＤＣ／ＡＣインバータの例の図である。FIG. 2 is a diagram of an example of a DC / AC inverter that realizes the electric circuit of the present invention. 本発明の電気回路を実現するＤＣ／ＡＣインバータの例の図である。FIG. 2 is a diagram of an example of a DC / AC inverter that realizes the electric circuit of the present invention. 本発明の電気回路を実現するＤＣ／ＡＣインバータの例の図である。FIG. 2 is a diagram of an example of a DC / AC inverter that realizes the electric circuit of the present invention. 本発明の電気回路を実現するＤＣ／ＡＣインバータの例の図である。FIG. 2 is a diagram of an example of a DC / AC inverter that realizes the electric circuit of the present invention. 本発明の電気回路を実現するＤＣ／ＡＣインバータの例の図である。FIG. 2 is a diagram of an example of a DC / AC inverter that realizes the electric circuit of the present invention.

Explanation of reference numerals

１０，１２，１４，１６…ＤＣ／ＡＣ変換器
２０，２２，２４，２６…ＣＣＦＬ（冷陰極蛍光灯）
４０…制御器
４２…クロック生成器
４４…位相選択器
４６…パルス生成器
６０，６２，６４，６６…ディジタル入力
７０…ディジタル−アナログ変換器
７２…縮尺の決められたアナログ選択器
８０，８２，８４…抵抗
９２…遅延セル
９３…トランジスタ
９４，９６…コンデンサ
９５…比較器 10, 12, 14, 16 ... DC / AC converter 20, 22, 24, 26 ... CCFL (cold cathode fluorescent lamp)
Reference Signs List 40 controller 42 clock generator 44 phase selector 46 pulse generator 60, 62, 64, 66 digital input 70 digital-analog converter 72 analog switch 80, 82 84 ... resistor 92 ... delay cell 93 ... transistor 94, 96 ... capacitor 95 ... comparator

Claims

In a controller for controlling at least two power circuits,
A pulse generator for generating a pulse signal coupled to a first power circuit of the at least two power circuits to initiate operation of the at least two power circuits;
A selector for generating a reference signal coupled to each of the at least two power circuits to indicate a number of power circuits to be controlled.

The controller according to claim 1, wherein the pulse generator is an oscillator.

The controller according to claim 1, wherein the selector is a phase selector, a digital-analog converter, or an analog input / analog output circuit.

The controller of claim 1, wherein the reference signal indicates a number of phases to shift.

The selector having at least one input terminal for programming a number of power circuits to be controlled and an output for outputting a reference signal according to an input signal coupled to the at least one input terminal. The controller of claim 1, wherein

The controller according to claim 5, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

In an electric circuit for supplying energy,
A controller having a pulse generator for generating a first pulse signal and a selector for generating a reference signal;
And at least two power circuits,
The reference signal is coupled to each of at least two power circuits to indicate a number of power circuits to be controlled, and the first pulse signal is coupled to the at least two power circuits to initiate operation of the first power circuit. Coupled to a first power circuit of one of the power circuits, the first power circuit outputting a second pulse signal to a second power circuit of the at least two power circuits to initiate operation of the second power circuit. An electric circuit, wherein the second pulse signal has a delay to the first power circuit with respect to the first pulse signal.

The electric circuit according to claim 7, wherein the pulse generator is an oscillator.

The electric circuit according to claim 7, wherein the selector is a phase selector, a digital-analog converter, or an analog input analog output circuit.

The electric circuit according to claim 7, wherein the reference signal indicates the number of phases to be shifted.

The selector comprises at least one input terminal for programming the number of power circuits to be controlled and an output for outputting a reference signal to at least one input terminal according to the input signal to be coupled. The electric circuit according to claim 7, wherein

The electric circuit according to claim 11, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

The electric circuit according to claim 7, wherein the power circuit is a DC / AC converter.

The electric circuit according to claim 7, wherein the DC / AC inverter is a full-bridge inverter, a half-bridge inverter, a flyback forward inverter, a push-pull inverter, or a class D inverter.

The electric circuit according to claim 7, wherein the delay is a phase shift delay.

The electric circuit according to claim 7, wherein the power circuit further includes a transformer.

The electric circuit according to claim 16, wherein the power circuit further includes a light source.

The electric circuit according to claim 17, wherein the light source is a cold cathode fluorescent lamp.

8. The power circuit of claim 7, wherein the power circuit further comprises a ramp generator for generating a delay, the initial position of the ramp generator occurring based on the first pulse signal and the reference signal. electric circuit.

The electric circuit according to claim 7, wherein the power circuit further includes a delay circuit for generating a delay, and the amount of the delay is generated based on the first pulse signal and the reference signal.

In the display device,
A controller having a pulse generator for generating a first pulse signal, and a selector for generating a reference signal;
At least two power circuits;
At least two transformers, each coupled to at least two power circuits, respectively;
At least two light sources, each coupled to at least two transformers;
With a display panel and
The reference signal is coupled to each of at least two power circuits to indicate a number of power circuits to be controlled, and the first pulse signal is used to turn on a first light source of at least two light sources. A first power circuit coupled to a first power circuit of the at least two power circuits for initiating operation of the one power circuit, wherein the first power circuit is configured to turn on a second light source of the at least two light sources; Outputting a second pulse signal to a second power circuit of the at least two power circuits to start the operation of the second pulse circuit, wherein the second pulse signal has a delay from the first pulse signal to the first power circuit. A display device characterized by the above-mentioned.

22. The display device according to claim 21, wherein the display device is a liquid crystal display television, a liquid crystal display monitor, or a liquid crystal display computer.

The display device according to claim 21, wherein the pulse generator is an oscillator.

22. The display device according to claim 21, wherein the selector is a phase selector, a digital-analog converter, or an analog input / analog output circuit.

The display device according to claim 21, wherein the reference signal indicates the number of phases to be shifted.

The selector comprising at least one input terminal for programming a number of power circuits to be controlled, and an output for outputting a reference signal according to an input signal coupled to the at least one input terminal. The display device according to claim 21, characterized in that:

The display device according to claim 26, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

The display device according to claim 21, wherein the power circuit is a DC / AC inverter.

29. The display device according to claim 28, wherein the DC / AC inverter is a full-bridge inverter, a half-bridge inverter, a flyback forward inverter, a push-pull inverter, or a class D inverter.

22. The display device according to claim 21, wherein the delay is a phase shift delay.

22. The display device according to claim 21, wherein the light source is a cold cathode fluorescent lamp.

22. The power circuit according to claim 21, further comprising a ramp generator for generating a delay, wherein an initial position of the ramp generator is generated based on a first pulse signal and a reference signal. Display device.

22. The display device according to claim 21, wherein the power circuit further includes a delay circuit for generating a delay, and the amount of delay is generated based on the first pulse signal and the reference signal.

In a method for driving at least two power circuits,
(A) generating a reference signal from the selector;
(B) coupling a reference signal to each of the at least two power circuits to indicate a number of power circuits to be controlled;
(C) generating a first pulse signal from a pulse generator;
(D) coupling a first pulse signal to a first power circuit of at least two power circuits to initiate operation of the first power circuit;
(E) outputting a second pulse signal from the first power circuit to the second power circuit of the at least two power circuits to start operation of the second power circuit;
The method of claim 2, wherein the second pulse signal has a delay to the first power circuit relative to the first pulse signal.

The method of claim 34, wherein the reference signal of step (a) is generated according to an input signal coupled to a selector.

The method of claim 34, wherein step (d) further comprises coupling a first power circuit to a first transformer.

37. The method of claim 36, further comprising coupling the first transformer to a first light source.

The method of claim 34, wherein step (e) further comprises coupling the second power circuit to a second transformer.

39. The method of claim 38, further comprising coupling the second transformer to a second light source.

35. The method of claim 34, wherein the delay in step (e) is generated by a ramp generator, wherein the initial position of the ramp generator is based on a first pulse signal and a reference signal.

The method of claim 34, wherein the delay in step (e) is generated by a delay circuit, and the amount of delay is generated based on the first pulse signal and the reference signal.

A controller for controlling at least two cold cathode fluorescent lamp (CCFL) power circuits,
A phase shift selector for generating a reference signal;
A pulse generator for receiving a reference signal and generating a pulse signal according to the received reference signal,
The reference signal is programmed to indicate an amount of phase delay according to a number of CCFL power circuits connected;
The controller wherein the pulse signal is coupled to at least two CCFL power circuits to initiate operation of the at least two CCFL power circuits.

The phase shift selector has at least one input terminal for programming a number of connected CCFL power circuits, and an output for outputting a reference signal according to an input signal coupled to the at least one input terminal. 43. The controller of claim 42, comprising:

The controller according to claim 43, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

In an electric circuit for supplying energy to a CCFL load,
At least two CCFL power circuits, each comprising a phase delay selector for programming a phase delay of the CCFL power circuit;
A phase shift selector for generating a reference signal according to the number of connected CCFL power circuits; and a pulse generator for receiving the reference signal and generating a pulse signal according to the received reference signal. Controller and
The amount of phase delay for each CCFL power circuit increases stepwise according to the order of operation of the CCFL power circuit;
The pulse signal is coupled to the at least two CCFL power circuits to initiate operation of the at least two CCFL power circuits;
A first CCFL power circuit of the at least two CCFL power circuits is started as soon as a pulse signal is received, and a second CCFL power circuit of the at least two CCFL power circuits is started after a predetermined amount of phase delay. Electric circuit characterized by the following.

The phase shift selector has at least one input terminal for programming a number of connected CCFL power circuits, and an output that outputs a reference signal according to an input signal coupled to the at least one input terminal. The electric circuit according to claim 45, wherein:

47. The electric circuit according to claim 46, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

The electric circuit according to claim 45, further comprising a transformer.

49. The electric circuit according to claim 48, further comprising a CCFL load.

46. The electrical circuit of claim 45, wherein the CCFL power circuit further comprises a ramp generator for generating a phase delay, wherein the initial position of the ramp generator occurs based on a pulse signal.

46. The electrical circuit of claim 45, wherein the CCFL power circuit further comprises a delay circuit for generating a programmed phase delay.

In a display device having a CCFL load,
At least two CCFL power circuits, each comprising a phase delay selector for programming a phase delay of the CCFL power circuit;
A phase shift selector for generating a reference signal according to the number of connected CCFL power circuits; and a pulse generator for receiving the reference signal and generating a pulse signal according to the received reference signal. At least two transformers, each coupled to at least two CCFL power circuits;
At least two CCFL loads, each coupled to at least two transformers;
With a display panel and
The amount of phase delay for each CCFL power circuit increases stepwise according to the order of operation of the CCFL power circuit;
The pulse signal is coupled to the at least two CCFL power circuits to initiate operation of the at least two CCFL power circuits;
A first CCFL power circuit of the at least two CCFL power circuits is started as soon as a pulse signal is received to turn on a first CCFL load of the at least two CCFL loads, and a first CCFL power circuit of the at least two CCFL power circuits is turned on. The display device, wherein the second CCFL power circuit is started after a predetermined amount of phase delay to turn on a second CCFL load of the at least two CCFL loads.

The display device according to claim 52, wherein the display device is a liquid crystal display television, a liquid crystal display monitor, or a liquid crystal display computer.

The phase shift selector has at least one input terminal for programming a number of CCFL power circuits and an output for outputting a reference signal according to an input signal coupled to the at least one input terminal. 53. The display device according to claim 52, wherein:

The display device according to claim 54, wherein the input signal is an analog signal for selecting the number of phases or a digital signal for selecting the number of phases.

53. The display of claim 52, wherein the CCFL power circuit further comprises a ramp generator for generating a phase delay, wherein the initial position of the ramp generator is based on a pulse signal.

53. The display device of claim 52, wherein the CCFL power circuit further comprises a delay circuit for generating a programmed phase delay.

A method for driving at least two CCFL power circuits, comprising:
(A) generating a reference signal from a phase shift selector;
(B) coupling the reference signal to a pulse generator;
(C) generating a pulse signal from a pulse generator in response to a reference signal and coupling the pulse signal to each of at least two CCFL power circuits;
(D) starting operation of the first CCFL power circuit after receiving the pulse signal;
(E) initiating operation of the second CCFL power circuit after a predetermined amount of phase delay.

The method of claim 58, wherein the reference signal of step (a) is generated according to an input signal coupled to a phase shift selector.

The method of claim 58, wherein step (d) further comprises coupling the first CCFL power circuit to a first transformer.

61. The method of claim 60, further comprising coupling the first transformer to a first CCFL load.

The method of claim 58, wherein step (e) further comprises coupling the second CCFL power circuit to a second transformer.

63. The method of claim 62, further comprising coupling the second transformer to a second CCFL load.

59. The method of claim 58, wherein the phase delay of step (e) is generated by a ramp generator, wherein the initial position of the ramp generator is based on a pulse signal.

The method of claim 58, wherein the phase delay of step (e) is generated by a delay circuit, and the amount of phase delay is programmed by a phase delay selector of a CCFL power circuit.