JP2004221678A - Video distribution system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance an update rate of a video image at a display side by increasing the number of compressible images per unit time in the case that a plurality of video input channels are sequentially switched, video signals are compressed and the compressed signals are transmitted. <P>SOLUTION: When a plurality of video input channels are switched, a compression means sequentially applies compression processing to a video signal of each channel and the resulting signal is transmitted to a display terminal 40 via a network 31 or 32, a measurement means measures an out of synchronism in the video signal between channels, a switching sequence of the channels is decided on the basis of a measurement result, a selection means selects the video signal according to the decided sequence to increase the number of compressible frames per unit time, having only to abort the video signals by one frame at maximum sequentially switches n-sets of the video input channels, and the video signals are compression-processed and can be transmitted. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

となる。
【００４５】
この計算結果に基づいて、ＣＰＵ１０１は、ずれΔｔａｂ、Δｔａｃ、Δｔａｄの大小関係を判断する。ここで、第１の実施形態では図５よりΔｔａｄ＜Δｔａｃ＜Δｔａｂであるので、チャネルＡの垂直同期信号ＶＳａとのずれが小さい順、つまりチャネルＡ→Ｄ→Ｃ→Ｂの順にチャネル切り替えを行えば良いことが判る。
チャネル切り替え順序が決定すると、ＣＰＵ１０１は、それ以降セレクタ１１６への制御信号１１７を制御して、映像入力チャネルを切り替える順番を測定結果に基づいて決定した順番に変更する。
【００４６】
上述のようにしてチャネル切り替え順序を変更した場合の処理の流れを図６に示す。図６は、第１の実施形態におけるチャネル切り替え順序変更後のチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。図６においては、チャネルＡ→Ｄ→Ｃ→Ｂ→Ａ→…の順に映像入力チャネルが切り替えられており、フレームＡ１、Ｄ２、Ｃ３、Ｂ５、Ａ６、Ｄ７、Ｃ８、…というようにフレームが順次圧縮処理されている。
【００４７】
図７は、上記図６に示した第１の実施形態におけるチャネル切り替え順序変更後の垂直同期信号ＶＳａ〜ＶＳｄの位相関係を示す図である。
図７において、
Δｔａ’＝Δｔａｄ …（４）
Δｔｄ’＝Δｔａｃ−Δｔａｄ …（５）
Δｔｃ’＝Δｔａｂ−Δｔａｃ …（６）
Δｔｂ’＝Ｔｖ−Δｔａｂ …（７）
であるから、各チャネルを一巡するのに要する同期ずれに伴う遅延の総量は、上記式（４）〜（７）より

となる。
【００４８】
すなわち、本方式を採用すると４つの映像入力チャネルを順次切り替える場合、各チャネルの１フレーム分、合計４フレーム分の映像信号を圧縮処理して送信するためには、最大で１フレーム分の映像信号を廃棄することだけを見込めば良いことになる。
【００４９】
一般に、ｎ個（ｎは自然数）の映像入力チャネルを順次切り替えていく場合には、本方式を採用して同様に考えると、

となり、本方式を用いると最大で１フレーム分の映像信号を破棄するだけで順次入力チャネルを切り替えていくことが可能になる。
【００５０】
以上説明した動作の流れを、図８に示す。図８は、第１の実施形態におけるチャネル切り替え順序を決定するための動作を示すフローチャートである。
映像加工・出力装置１０が映像入力チャネルの切り替え順序を設定しなければならないと判断した場合（ステップＳ８０１）、まず、各チャネルより入力される映像信号の時間関係を測定・把握する必要がある。そこで、映像加工・出力装置１０内のＣＰＵ１０１は、垂直同期割込み信号間隔計測用のタイマを有効にする（作動させる）（ステップＳ８０２）。さらに、ＣＰＵ１０１は、現在切り替えている順序のまま各映像入力チャネルを順次切り替え、垂直同期割込み信号の間隔の計測を実施する（ステップＳ８０３）。
【００５１】
上記図４の説明においては、システムの起動時など映像加工・出力装置１０が各映像信号の時間関係を把握するまで、映像入力は暫定的にセレクタ１１６においてチャネルＡ→Ｂ→Ｃ→Ｄの順番でディジタル映像信号バス１１８の入力がディジタル映像信号１１９への出力として選択されるとした。しかし、ステップＳ８０３での計測実施時のチャネル切り替え順序は、上記図４にて説明した順序に限られるものではなく、以前の測定等により定められたチャネル切り替え順序がある場合にはその順序に従って切り替えられているものとする。
【００５２】
ステップＳ８０３での垂直同期割込み信号の間隔測定は、全チャネルの位相差を測定するまで繰り返される（ステップＳ８０４）。また、測定精度を上げるために測定は、ｎ回実施される（ステップＳ８０５）。
【００５３】
測定の結果、得られた測定値のばらつきが一定の許容範囲内に収まる場合には（ステップＳ８０６）、測定結果に基づいてチャネル切り替え順序が決定される（ステップＳ８０７）。ここで、チャネル切り替え順序に関してはさまざまな決め方があるが、第１の実施形態では、基準とした映像入力チャネルの垂直同期信号に対するずれが小さい順に切り替えることで、切り替え時間の最小化を図っている。上述したように第１の実施形態において示す例では、図５よりΔｔａｄ＜Δｔａｃ＜Δｔａｂであるので、チャネル切り替え順序は、基準としたチャネルＡの垂直同期信号とのずれが小さい順、チャネルＡ→Ｄ→Ｃ→Ｂの順に切り替えれば良いと判断される。
【００５４】
ステップＳ８０７において映像入力チャネル切り替え順序が決定すると、決定した順序に基づき、ＣＰＵ１０１はセレクタ制御線１１７を介してセレクタ１１６を制御してチャネル切り替えを新しい順序で行うことになる（ステップＳ８０８）。
【００５５】
なお、得られた測定値のばらつきが一定の許容範囲内に収まるか否かの判断方法も、さまざまな方法が考えられるが、ここでは、ステップＳ８０７におけるずれの時間の並べ替えに影響が出ない範囲の測定のばらつきは許容しているものとする。
また、図８において測定値のばらつきが許容範囲内に無い場合には、測定をやり直すようにしているが、測定を繰り返し行ってもばらつきが許容範囲内に収まらない場合には、チャネル切り替え順序を暫定的に決定するようにすることも可能である。
【００５６】
このようにして映像入力チャネル（入力映像信号）を切り替える順番を変更することにより、単位時間あたりに圧縮処理して送出できるフレーム数を増加させた後、映像加工・出力装置１０が圧縮処理された映像データをどのようにして表示端末４０側に送信しているかを、図１、図３、図４、図６を参照しながら説明する。
【００５７】
既に図１において説明したように、映像データが入力された画像圧縮ＩＣ１１１は、その映像データを所定の方式に基づいて圧縮処理する。圧縮処理された映像データ（「圧縮映像データ」とも称す。）は最終的に演算用ＲＡＭ１０３に格納される。圧縮映像データが演算用ＲＡＭ１０３に転送されると、ＣＰＵ１０１は、ＦｌａｓｈＲＯＭ１０４に格納されたプログラムに従って、演算用ＲＡＭ１０３から圧縮映像データを取り出して、表示端末４０に対して圧縮映像データを送信する作業を行う。
【００５８】
システムの起動時、上記図４に示したように映像入力チャネルの切り替え順序がチャネルＡ→Ｂ→Ｃ→Ｄであったとする。図４からわかるように、フレームＡ１→Ｂ３→Ｃ４→Ｄ６→Ａ８→…の順に圧縮映像データが演算用ＲＡＭ１０３に順次供給され、ＣＰＵ１０１はその順に圧縮映像データを表示端末４０に送る。
【００５９】
図３に示したように、表示端末４０側では受信したデータ順に圧縮映像データに伸長処理等を施してビューワにおける表示画像を更新していく。ここで、表示端末４０には映像撮影装置２０ａ〜２０ｄにそれぞれ対応したビューワ４１ａ〜４１ｄが存在している。表示端末４０は、映像加工・出力装置１０よりフレームＡ１→Ｂ３→Ｃ４→Ｄ６→Ａ８→…の順に圧縮映像データを受信するので、結果として表示端末４０側もチャネルＡ→Ｂ→Ｃ→Ｄ（ビューワ４１ａ→４１ｂ→４１ｃ→４１ｄ）の順に映像が更新されることになる。
【００６０】
さて、単位時間あたりに圧縮処理して送出できるフレーム数を増加するため、映像入力チャネルの切り替え順序を変更すると、システム起動時とは異なった順序で圧縮映像データが生成される可能性が高くなる。例えば、第１の実施形態の場合では、上記図６に示したようにフレームＡ１→Ｄ２→Ｃ３→Ｂ５→Ａ６→Ｄ７→Ｃ８→…という順序で圧縮映像データが演算用ＲＡＭ１０３に供給される。
【００６１】
しかし、ＣＰＵ１０１が更新された映像データの順番通りに表示端末４０側に圧縮映像データを送信した場合には、表示端末４０側で突然に映像の更新順序が変更され、ユーザが違和感を覚えるおそれがある。そこで、第１の実施形態では、ユーザの違和感をなくすために、映像入力チャネルの切り替え順序を変更しても、表示端末４０側に圧縮映像データを送信する順序は、システム起動時のまま変更しないものとする。
【００６２】
ＣＰＵ１０１は、図６に示したようにフレームＡ１→Ｄ２→Ｃ３→Ｂ５→Ａ６→…という順序で圧縮映像データが演算用ＲＡＭ１０３に供給されてきたとしても、それをチャネルＡ→Ｂ→Ｃ→Ｄの順、すなわちフレームＡ１→Ｂ５→Ｃ３→Ｄ２→Ａ６→…という順にパケット化して、表示端末４０側に送信する。これにより、表示端末４０側ではチャネルＡ→Ｂ→Ｃ→Ｄ（ビューワ４１ａ→４１ｂ→４１ｃ→４１ｄ）の順に映像が更新される状態が保たれ、ユーザに違和感を与えることがなくなる。
【００６３】
なお、第１の実施形態において、表示端末４０での映像の表示順序は、表示端末４０側が受信した映像データをそのままの順番で伸長処理するという例を用いて説明したので、上述のようにシステム起動時の切り替え順番が保たれるようにしたが、表示端末４０側で、受信した映像データを任意に並べ替えて更新順序を変更するということも可能である。
【００６４】
このようにした場合には、ＣＰＵ１０１は、チャネル切り替え順序の変更後も圧縮映像データが演算用ＲＡＭ１０３に供給されてきた順にそのまま表示端末４０に送出すれば良い。表示端末４０側は、受け取った映像データを一旦蓄え、表示端末４０側で設定した順序どおりに伸張して画像を更新表示することで映像入力チャネルの切り替え順序が変わった場合でも一定の順序で表示映像を更新することが可能になる。
【００６５】
以上、詳しく説明したように本実施形態によれば、複数の映像入力チャネルを切り替えて、各チャネルの映像信号を順次圧縮処理し、ネットワーク（公衆回線網３１もしくはＬＡＮ回線網３２）を介して表示端末４０に供給する際、各チャネル間の映像信号における同期ずれを測定・算出し、各映像入力チャネル間の同期ずれの影響が最小限になるようにチャネル切り替え順序を決定することで、最大で１フレーム分の映像信号を破棄するだけでｎ個の映像入力チャネルを順次切り替え、映像信号を圧縮処理して送信することができる。したがって、単位時間あたりでの圧縮処理可能なフレーム数が増加して表示端末４０側での映像の更新率を高めることができ、ユーザは動きが滑らかな表示映像を見ることができる。
【００６６】
（第２の実施形態）
次に、第２の実施形態について説明する。
本発明の第２の実施形態による映像配信システム、及び映像加工・出力装置の構成は、上記図１、図２に示した第１の実施形態による映像配信システム、及び映像加工・出力装置と同様である。
【００６７】
上述した第１の実施形態においては、各チャネルで行われている１フレーム分の映像信号の圧縮処理は、各チャネルの垂直同期信号の立ち下がりエッジに挟まれた期間内で終了するものとしていたが、出力映像のサイズ、被写体、及び圧縮パラメータによっては１フレーム分の映像信号の圧縮処理がその期間内で終了しない場合も考えられる。
そのような場合には、映像入力チャネルの切り替え順序を設定する際に、実際の圧縮処理に要する時間も考慮する必要がある。
【００６８】
第２の実施形態では、垂直同期割込み信号１１４及び圧縮終了割込み信号１１５の２つの信号の関係をＣＰＵ１０１において計測して、映像入力チャネルの切り替え順序を設定する方法について図１〜図３を参照しながら図９、図１０を用いて説明する。第２の実施形態においては、上記図２に示した画像圧縮ＩＣ１１１がＣＰＵ１０１に対して出力する圧縮終了割込み信号１１５が大きな意味を持つ。
【００６９】
以下、上述した第１の実施形態との差異に重点をおきながら説明する。
（１）入力される映像信号の数が変化した場合、（２）撮影されている対象物が対象物そのものの移動もしくは映像撮影装置のパン・チルト・ズームなどにより変化した場合、（３）映像撮影装置に与えられている逆光補正等のパラメータが変化した場合、（４）出力する画像サイズが変化した場合、（５）出力する画像の圧縮率が変更された場合等、圧縮処理に影響を与える内容の変更等が発生した場合には、映像データの圧縮処理に要する時間が変化する可能性がある。
【００７０】
このとき、映像加工・出力装置１０は、映像入力チャネルの切り替え順序を再設定しなければならないと判断し、映像信号の時間関係を測定・把握する作業に入る。この時点では映像入力はセレクタ１１６においてチャネルＡ→Ｂ→Ｃ→Ｄの順番でディジタル映像信号バス１１８の入力がディジタル映像信号１１９への出力として選択されることとする。
【００７１】
なお、第２の実施形態においても、第１の実施形態と同様に各チャネルから与えられる映像の単位はフレーム単位であるとし、１／３０秒毎に１枚の画像が送られ、各フレームの始まりは垂直同期信号の立ち下がりエッジで示されるとする。また、垂直同期信号の立ち下がりエッジの時間間隔Ｔｖに比べて、映像信号の有効画像領域の入力に要する時間は短く、選択された映像信号に対する１フレーム分の圧縮処理の終了は、画像圧縮ＩＣ１１１がＣＰＵ１０１に対して出力する圧縮終了割込み信号１１５の立ち下がりエッジにより示されるとする。
【００７２】
図９は、第２の実施形態における各チャネルの垂直同期信号ＶＳａ〜ＶＳｄと圧縮終了割込み信号１１５の位相関係を示す図である。ここで、垂直同期信号ＶＳａ〜ＶＳｄのそれぞれにおいて、隣接する立ち下がりエッジ間の期間Ｔｖは、Ｔｖ＝１／３０秒である。
【００７３】
また、チャネルＡの１つのフレームを圧縮処理するのに要する時間をＴｃａで表し、チャネルＡの圧縮終了割込み信号の立ち下がりとその直前のチャネルＡの垂直同期信号ＶＳａの立ち下がりエッジとの間の時間をΔｃａで表す。チャネルＢ、Ｃ、Ｄにおいても同様に、時間Ｔｃｂ、Ｔｃｃ、Ｔｃｄ、Δｃａ、Δｃｂ、Δｃｄを定義する。
【００７４】
図９に示した第２の実施形態においては、時間Ｔｃａ、Ｔｃｂ、Ｔｃｃ、Ｔｃｄは、
Ｔｃａ＝２Ｔｖ＋Δｃａ …（１０）
Ｔｃｂ＝Δｃｂ …（１１）
Ｔｃｃ＝Ｔｖ＋Δｃｃ …（１２）
Ｔｃｄ＝Δｃｄ …（１３）
のように表すことができる。
【００７５】
一方、各チャネル間の同期のずれ（Δｔａｂ、Δｔａｃ、Δｔａｄなど）は、第１の実施形態と同様にして求めることができる。
この計測をある一定の期間繰り返して行うことで、ＣＰＵ１０１は、各チャネル間同期のずれと圧縮に要する時間を見積もることができるようになる。
【００７６】
各チャネル間同期のずれと圧縮に要する時間が見積もられると、ＣＰＵ１０１は、その内容に基づいて最適のチャネル切り替え順序を探すことになる。具体的には、ＣＰＵ１０１は、チャネルｉの圧縮終了後にチャネルｊに切り替えた場合に、チャネルｉの圧縮終了割込み発生後、最初に有効なチャネルｊの垂直同期割込みが入るまでの時間Ｙｉｊを求める。なお、ｉ、ｊは、添え字であり、ｉ、ｊは、ａ、ｂ、ｃ、ｄ（チャネルＡ、Ｂ、Ｃ、Ｄにそれぞれ対応）である。
【００７７】
時間Ｙｉｊは、

で求めることができる。
その上で、チャネル切り替え順序の可能性のある組み合わせの全てについてＹｉｊを順に加算して、その切り替え順序の際に切り替えに要する時間ΣＹｉｊを算出する。
【００７８】
第２の実施形態のように４つの映像入力チャネルＡ、Ｂ、Ｃ、Ｄがある場合には、チャネルＡを基準にして考えると
ΣＹａｂｃｄ＝Ｙａｂ＋Ｙｂｃ＋Ｙｃｄ＋Ｙｄａ（１５−１：Ａ→Ｂ→Ｃ→Ｄの順の切り替え）
ΣＹａｂｄｃ＝Ｙａｂ＋Ｙｂｄ＋Ｙｄｃ＋Ｙｃａ（１５−２：Ａ→Ｂ→Ｄ→Ｃの順の切り替え）
ΣＹａｃｂｄ＝Ｙａｃ＋Ｙｃｂ＋Ｙｂｄ＋Ｙｄａ（１５−３：Ａ→Ｃ→Ｂ→Ｄの順の切り替え）
ΣＹａｃｄｂ＝Ｙａｃ＋Ｙｃｄ＋Ｙｄｂ＋Ｙｂａ（１５−４：Ａ→Ｃ→Ｄ→Ｂの順の切り替え）
ΣＹａｄｂｃ＝Ｙａｄ＋Ｙｄｂ＋Ｙｂｃ＋Ｙｃａ（１５−５：Ａ→Ｄ→Ｂ→Ｃの順の切り替え）
ΣＹａｄｃｂ＝Ｙａｄ＋Ｙｄｃ＋Ｙｃｂ＋Ｙｂａ（１５−６：Ａ→Ｄ→Ｃ→Ｂの順の切り替え）
の６通り（チャネルＡを先頭に持ってきた場合の残りのチャネルＢ、Ｃ、Ｄの並べ方の数）がある。この中から、値が最小になるものを選択すれば、それが最適のチャネル切り替え順序となる。
【００７９】
一般に、ｎ個（ｎは自然数）の映像入力チャネルがある場合には、同様に（ｎ−１）の順列の数、すなわち（ｎ−１）！の数だけ同様の値を計算することで求めることができる。ただし、
Ｘ＝Ｍｉｎ（ΣＹａｂｃｄ，ΣＹａｂｄｃ，ΣＹａｃｂｄ，ΣＹａｃｄｂ，ΣＹａｄｂｃ，ΣＹａｄｃｂ） …（１６）
とした場合のＸの値が、
ｍＴｖ＜Ｘ≦（ｍ＋１）Ｔｖ …（１７）
で表されるとき、上記式（１５−１）〜（１５−６）の値で、同様にその和が（ｍ＋１）Ｔｖ以下になるものについて、その式の表すチャネル切り替え順序を採用しても同一の効果を得ることができる。
【００８０】
よって、実際には各チャネルの映像信号の圧縮処理に要する時間にもばらつきがあったりするため、そのばらつきの誤差をなるべく吸収し、かつ上記式（１７）を満たすようなｍの範囲内にあるチャネル切り替え順序が選ばれることになる。
そのようにして求めた結果に基づいてチャネル切り替え順序を変更した後の様子を図１０に示す。この場合は、チャネルＡ→Ｃ→Ｄ→Ｂの順に切り替えることで、上記図９に示した場合よりも１Ｔｖ分だけ映像信号の切り替え周期を短くすることができる。
【００８１】
以上、説明したように第２の実施形態によれば、上述した第１の実施形態にて得られる効果に加え、選択した映像信号の実際の圧縮処理に要する時間も考慮したチャネル切り替え順序を決定することが可能になる。したがって、出力映像のサイズ、被写体、及び圧縮パラメータにより、映像信号の圧縮処理に要する時間がチャネル毎に異なる（例えば、あるチャネルでは１フレーム分に相当する時間に圧縮処理が終了しない等）場合であっても、適切なチャネル切り替え順序を決定することができる。
【００８２】
（第３の実施形態）
次に、第３の実施形態について説明する。
本発明の第３の実施形態による映像配信システムは、上記図１に示した映像配信システムと同様である。図１１は、第３の実施形態における映像デコーダ１１２及びその周辺部の詳細な構成例を示すブロック図であり、この図１１において、図２に示した構成要素等と同一の機能を有する構成要素等には同一の符号を付している。第３の実施形態では、図１１に示すように、映像信号デコーダ１１２は１系統であり、その内部で選択的に映像信号を切り替えている場合の例を示す。
【００８３】
映像信号デコーダ１１２は、複数の映像信号入力の中から１つの入力を選択的に取り出すセレクタ１１２１、セレクタ１１２１により選択された映像信号をＡ／Ｄ変換してディジタルデータ形式、例えばＹ：Ｕ：Ｖ＝４：２：２の形式に変換するＡ／Ｄコンバータ１１２２、及びそれらを制御するコントローラ１１２３などから構成される。
【００８４】
セレクタ１１２１は、入力が第１〜第４の入力までの４系統存在し、それぞれ映像入力端子２３ａ〜２３ｄにそれぞれ接続されている。映像入力端子２３ａ〜２３ｄには、映像信号ケーブル２１ａ〜２１ｄを介して、映像撮影装置２０ａ〜２０ｄがそれぞれ接続されている。
【００８５】
コントローラ１１２３は、Ａ／Ｄ制御線１０８を介してＣＰＵ１０１に接続される。第３の実施形態においては、Ａ／Ｄ制御線１０８は、例えばＩ^２Ｃバスのプロトコルに従う２線式のインタフェースにより構成される。コントローラ１１２３は、Ａ／Ｄ制御線１０８を介してＣＰＵ１０１の制御下におかれ、セレクタ１１２１においてどの入力を選択するかなどの切り替え操作を実施する。
【００８６】
また、コントローラ１１２３は、セレクタ１１２１にて選択された映像信号から垂直同期信号などの映像の同期に必要となる信号の変化を抽出する。第３の実施形態においては、コントローラ１１２３により抽出された垂直同期信号が垂直同期割込み信号１１４としてＣＰＵ１０１及び画像圧縮ＩＣ１１１に入力される。
【００８７】
なお、第３の実施形態においては、各チャネルから与えられる映像の単位はフィールド単位であるとし、偶数フィールドの画像と奇数フィールドの画像とが１／６０秒毎に１枚ずつ送られ、各フィールドの始まりは垂直同期信号の立ち下がりエッジで示されるとする。また、垂直同期信号の立ち下がりエッジの時間間隔Ｔｖ’に比べて、映像信号の有効画像領域の入力に要する時間は短く、各チャネルで行われている１フィールド分の映像信号の圧縮処理は、各チャネルの垂直同期信号の立ち下がりエッジに挟まれた期間内で終了しているとする。
【００８８】
また、チャネル切り替え後、映像デコーダ１１２の中にてＡ／Ｄコンバータ等のシステムが正しく動作するためには最大で２回の垂直同期信号の検出が必要であるとする。更に、映像加工・出力装置１０から表示端末４０側に送られる圧縮映像データは、ある１つのチャネル切り替え順序を適用している間は、チャネル毎に偶数、もしくは奇数のどちらかのフィールドのみを送信するとする。
【００８９】
第３の実施形態における映像入力チャネル切り替えの様子を図１２、図１３、図１４に示す。
図１２は、第３の実施形態における初期状態でのチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。第１の実施形態と同様に、ＣＰＵ１０１は、まず初期状態では一定の順序、チャネルＡ→Ｂ→Ｃ→Ｄの順で映像入力チャネルを切り替えて各チャネル間の同期ずれを調べる。
【００９０】
第３の実施形態では、上述したようにチャネルを切り替え、垂直同期信号を２回検出した後のフィールドを有効なフィールドとして圧縮処理する。そのため、第３の実施形態における映像加工・出力装置１０は、図１２に示すようにフィールドＡ１→Ｂ４→Ｃ７→Ｄ１０→…という順にフィールドの映像データを圧縮処理する。
【００９１】
フィールドＤ１０を圧縮処理した後、チャネルを切り替えてチャネルＡに戻った際、タイミング的にはフィールドＡ１２が圧縮可能である。しかし、映像加工・出力装置１０は、その直前で奇数フィールドＡ１を圧縮処理しているので、偶数フィールドＡ１２を圧縮処理して送信するようにしてしまうと、表示端末４０側で伸長処理され表示される映像が微妙にがたついて、非常に見苦しいものになってしまう。そこで、映像加工・出力装置１０は、偶数フィールドＡ１２をスキップして奇数フィールドＡ１３を圧縮処理した後、チャネルＢに切り替えている。
【００９２】
各チャネル間の同期ずれの測定が終了すると、ＣＰＵ１０１は、上述した第１の実施形態と同様にして、最適なチャネル切り替え順序を探す。第３の実施形態では、各チャネルで行われている１フィールド分の映像信号の圧縮処理は、各チャネルの垂直同期信号の立ち下がりエッジに挟まれた期間内で終了しているとしている。したがって、最適なチャネル切り替え順序は、第１の実施形態と同様に、チャネルＡの垂直同期信号ＶＳａと、チャネルＢ、Ｃ、Ｄの垂直同期信号ＶＳｂ、ＶＳｃ、ＶＳｄとのそれぞれのずれΔｔａｂ、Δｔａｃ、Δｔａｄの大小関係を判断して求めることができる。
【００９３】
上述のようにして求めた結果に基づいてチャネル切り替え順序を変更した後のチャネル切り替えと各チャネルの映像信号の時間関係を図１３に示す。図１３においては、チャネルＡ→Ｄ→Ｃ→Ｂ→Ａ→…の順序で映像入力チャネルが切り替えるように変更している。その結果、圧縮処理されるフィールドは、フィールドＡ１→Ｄ４→Ｃ６→Ｂ８→Ａ１１→Ｄ１４→Ｃ１６→Ｂ１８→Ａ２１→Ｄ２４→…というように遷移している。図１３に示したチャネル切り替え順序変更後でも、図１２に示したものと同様にフィールドＡ１０、Ａ２０は圧縮処理をスキップされている。これにより、Ａチャネルでは奇数フィールド、Ｂ、Ｃ、Ｄチャネルでは偶数フィールドという決まったフィールドの送出が可能になっている。
【００９４】
上記図１３に示したようにチャネル切り替え順序を変更すると、単位時間あたりに圧縮処理するフィールド数は、この条件下で最大化することができる。しかし、上記図１３に示した場合には、チャネルＡにおいてスキップするフィールドが存在し、１０フィールド入力可能な時間に対して各チャネル１フィールドずつ合計４フィールドの出力になってしまっている。
【００９５】
したがって、１０フィールドに相当する時間の間で４フィールド分の映像データを圧縮すればよいという条件下では、別の要素を考慮してチャネル切り替え順序を変更することも考え得る。例えば、第３の実施形態においても、第１の実施形態と同様に表示端末４０側での表示映像の更新順序がチャネルＡ→Ｂ→Ｃ→Ｄの順で一定であるとする。さらに、そのように圧縮映像データを送信するために、ＣＰＵ１０１は、圧縮映像データがどのような順序で演算用ＲＡＭ１０３に供給されてきたとしても、それをチャネルＡ→Ｂ→Ｃ→Ｄの順にパケット化して、表示端末４０側に送信しているとする。
【００９６】
この場合には、実際の表示順序になるべく近い順序でチャネルを切り替えることでメモリの使用率を下げ、資源（リソース）を有効利用できるようにするというポリシを採用することも可能である。そのようなポリシを付与してチャネル切り替え順序を考慮した例を図１４に示す。
【００９７】
ここでは、チャネルＡ→Ｂ→Ｄ→Ｃの順でチャネルを切り替えることにより、図１３に示した場合に比べて、表示端末４０側での映像更新順序に、より近い順序でチャネル切り替えを実現している。図１４に示した例の場合、映像加工・出力装置１０は、フィールドＡ１→Ｂ４→Ｄ７→Ｃ９→Ａ１１→Ｂ１４→Ｄ１７→Ｃ１９→…という順序で圧縮処理を行っており、図１２、図１３に示した例にて存在したスキップされるフィールドが存在しない。無駄に捨てていた１フィールド分をうまく利用して、表示端末４０側での映像更新順序に、より近い順序でチャネル切り替えを実現することができる。
【００９８】
（第４の実施形態）
次に、第４の実施形態について説明する。
上述した第１の実施形態において、圧縮映像データは表示端末４０に対して送信され、そこで表示されることにより利用されていた。一方、映像の利用に関しては表示端末４０において表示されると同時に、後で利用するために保存しておくことも考えられる。そのような場合の例を、図１を用いて簡単に説明する。
【００９９】
第１の実施形態と基本的には映像入力チャネルの切り替えに関しては同様であるのでここでは説明は省略する。異なっているのは、ＣＰＵ１０１が、ＬＡＮＩ／Ｆ１０６を介してＬＡＮ回線網３２に対して圧縮映像データを送信するのと同時に、ＰＣＭＣＩＡスロット１０７に挿入されているＦｌａｓｈＲＯＭカード１４に圧縮映像データを保存することである。ＣＰＵ１０１は、圧縮映像データにタイムスタンプと映像入力番号のタグとを付与した上でＦｌａｓｈＲＯＭカード１４に蓄積する。なお、映像蓄積媒体としてＰＣＭＣＩＡスロット１０７に挿入されているＦｌａｓｈＲＯＭカード１４を指定したが、例えば、内蔵しているＦｌａｓｈＲＯＭ１０４に蓄積することも可能である。また、ＦｌａｓｈＲＯＭカードの代わりに小型のハードディスクなどを利用することも可能であり、映像蓄積媒体の種類を本実施形態は限定するものではない。
【０１００】
第１の実施形態のようにして映像入力チャネルを切り替える順番を変更することで、第４の実施形態における映像の蓄積も、単位時間あたりに蓄積できる画像の数をより増やすことができるようになる。
【０１０１】
なお、上述した第１〜第４の実施形態においては、映像撮影装置から映像信号が入力される映像入力チャネルが４つの場合を一例として示したが、本発明はこれに限定されるものではなく、映像入力チャネルの数は任意である。
また、上述した第１〜第４の実施形態にてそれぞれ図示したチャネル切り替えと各チャネルの映像信号の時間関係、及び各チャネルの垂直同期信号の位相関係は一例であり、本発明はこれに限定されるものではない。
【０１０２】
（本発明の他の実施形態）
上述した実施形態の機能を実現するべく各種のデバイスを動作させるように、該各種デバイスと接続された装置あるいはシステム内のコンピュータに対し、上記実施形態の機能を実現するためのソフトウェアのプログラムコードを供給し、そのシステムあるいは装置のコンピュータ（ＣＰＵあるいはＭＰＵ）に格納されたプログラムに従って上記各種デバイスを動作させることによって実施したものも、本発明の範疇に含まれる。
【０１０３】
また、この場合、上記ソフトウェアのプログラムコード自体が上述した実施形態の機能を実現することになり、そのプログラムコード自体は本発明を構成する。また、そのプログラムコードをコンピュータに供給するための手段、例えばかかるプログラムコードを格納した記録媒体は本発明を構成する。かかるプログラムコードを記憶する記録媒体としては、例えばフレキシブルディスク、ハードディスク、光ディスク、光磁気ディスク、ＣＤ−ＲＯＭ、磁気テープ、不揮発性のメモリカード、ＲＯＭ等を用いることができる。
【０１０４】
また、コンピュータが供給されたプログラムコードを実行することにより、上述の実施形態の機能が実現されるだけでなく、そのプログラムコードがコンピュータにおいて稼働しているＯＳ（オペレーティングシステム）あるいは他のアプリケーションソフト等と共同して上述の実施形態の機能が実現される場合にもかかるプログラムコードは本発明の実施形態に含まれることは言うまでもない。
【０１０５】
さらに、供給されたプログラムコードがコンピュータの機能拡張ボードやコンピュータに接続された機能拡張ユニットに備わるメモリに格納された後、そのプログラムコードの指示に基づいてその機能拡張ボードや機能拡張ユニットに備わるＣＰＵ等が実際の処理の一部または全部を行い、その処理によって上述した実施形態の機能が実現される場合にも本発明に含まれることは言うまでもない。
【０１０６】
なお、上記実施形態は、何れも本発明を実施するにあたっての具体化のほんの一例を示したものに過ぎず、これらによって本発明の技術的範囲が限定的に解釈されてはならないものである。すなわち、本発明はその技術思想、またはその主要な特徴から逸脱することなく、様々な形で実施することができる。
本発明の実施態様例を以下に示す。
【０１０７】
（実施態様１）ネットワークを介して複数の映像撮影装置によりそれぞれ撮影された映像を、上記映像撮影装置とは異なる位置に設けられた表示装置に表示するための映像配信システムであって、
上記複数の映像撮影装置から入力される映像信号の中から１つの映像信号を選択する選択手段と、
上記選択手段にて選択した映像信号に圧縮処理を施す圧縮手段と、
上記圧縮手段で圧縮処理した映像信号を上記表示装置に対して送信する送信手段と、
上記複数の映像撮影装置からの各映像信号の入力タイミングの時間関係を測定する測定手段とを備え、
上記測定手段により測定された時間関係に基づいて、上記選択手段にて選択する映像信号を順次切り替えることを特徴とする映像配信システム。
（実施態様２）上記測定手段は、上記各映像信号の圧縮処理に要する時間をさらに測定し、
上記測定手段により測定された時間関係及び圧縮処理に要する時間に基づいて、上記選択手段にて選択する映像信号を順次切り替えることを特徴とする実施態様１に記載の映像配信システム。
（実施態様３）上記測定手段は、各映像信号の垂直同期信号に基づいて、映像信号の入力タイミングの時間関係を測定することを特徴とする実施態様１又は２に記載の映像配信システム。
（実施態様４）ネットワークを介して表示端末に映像信号を提供し、当該映像信号に係る映像を上記表示端末に表示させるための映像配信システムであって、
複数の映像撮影装置と、
上記複数の映像撮影装置から入力される映像信号の中から１つを選択する選択手段と、上記選択した映像信号を圧縮処理する圧縮手段と、上記圧縮処理した映像信号をネットワークに対して出力するネットワークインタフェース手段とを有する映像加工出力装置とを備え、
上記複数の映像撮影装置から入力される各映像信号の時間関係を測定し、測定した時間関係に基づいて上記映像加工出力装置にて選択する映像信号を順次切り替えることを特徴とする映像配信システム。
（実施態様５）上記映像信号の時間関係は、上記各映像信号の垂直同期信号又は上記垂直同期信号を変換して得られる信号に基づいて測定されることを特徴とする実施態様４に記載の映像配信システム。
（実施態様６）上記複数の映像撮影装置から入力される各映像信号の時間関係に加え、上記各映像信号を圧縮処理するのに要する時間をさらに測定し、測定した時間関係及び圧縮処理に要する時間に基づいて上記映像加工出力装置にて選択する映像信号を順次切り替えることを特徴とする実施態様４に記載の映像配信システム。
（実施態様７）上記映像信号の時間関係及び圧縮処理に要する時間は、上記各映像信号の垂直同期信号又は上記垂直同期信号を変換して得られる信号、及び上記圧縮手段が出力する圧縮終了信号に基づいて測定されることを特徴とする実施態様６に記載の映像配信システム。
（実施態様８）上記時間関係に基づいて選択する映像信号を切り替える際、圧縮されずに廃棄される上記映像信号に関わる時間の合計が最小になるような切り替え順序を算出し、算出した順序に基づいて選択する上記映像信号を切り替えることを特徴とする実施態様４〜７の何れか１項に記載の映像配信システム。
（実施態様９）上記時間関係の測定、及び測定結果に基づく映像信号の切り替え順序の算出は、予め定められた契機に基づいて実行されることを特徴とする実施態様４〜８の何れか１項に記載の映像配信システム。
（実施態様１０）上記予め定められた契機は、入力される映像信号数の増減、撮影されている対象物の変化、上記映像撮影装置に与えられる映像撮影パラメータの変化、圧縮パラメータの変化、及び一定時間以上の時間経過のうち、少なくとも１つが発生したときであることを特徴とする実施態様９に記載の映像配信システム。
（実施態様１１）上記映像加工出力装置にて選択する映像信号を切り替える順序にかかわらず、上記表示端末側では一定の順序で当該映像信号に係る映像が更新されることを特徴とする実施態様４〜１０の何れか１項に記載の映像配信システム。
（実施態様１２）上記圧縮処理された映像信号を映像加工出力装置内部もしくは外部に接続された記憶媒体に順次保存することを特徴とする実施態様４〜１１の何れか１項に記載の映像配信システム。
（実施態様１３）複数の映像撮影装置によりそれぞれ撮影された映像を、上記映像撮影装置とは異なる位置に設けられ、ネットワークを介して接続された表示装置に表示させるための映像処理装置であって、
上記複数の映像撮影装置から入力される映像信号の中から１つの映像信号を選択する選択手段と、
上記選択手段にて選択した映像信号に圧縮処理を施す圧縮手段と、
上記圧縮手段で圧縮処理した映像信号を上記表示装置に対して送信する送信手段と、
上記複数の映像撮影装置からの各映像信号の入力タイミングの時間関係を測定する測定手段とを備え、
上記測定手段により測定された時間関係に基づいて、上記選択手段にて選択する映像信号を順次切り替えることを特徴とする映像処理装置。
（実施態様１４）上記測定手段は、上記各映像信号の圧縮処理に要する時間をさらに測定し、
上記測定手段により測定された時間関係及び圧縮処理に要する時間に基づいて、上記選択手段にて選択する映像信号を順次切り替えることを特徴とする実施態様１３に記載の映像処理装置。
（実施態様１５）ネットワークを介して複数の映像撮影装置によりそれぞれ撮影された映像を、上記映像撮影装置とは異なる位置に設けられた表示装置に表示するための映像配信方法であって、
上記複数の映像撮影装置からの各映像信号の入力タイミングの時間関係を測定する測定ステップと、
上記複数の映像撮影装置から入力される映像信号の中から１つの映像信号を選択する選択ステップと、
上記選択手段にて選択した映像信号に圧縮処理を施す圧縮ステップと、
上記圧縮手段で圧縮処理した映像信号を上記表示装置に対して送信する送信ステップとを有し、
上記測定ステップにて測定された時間関係に基づいて、上記選択ステップにて選択する映像信号を順次切り替えることを特徴とする映像配信方法。
（実施態様１６）上記測定ステップでは、上記各映像信号の圧縮処理に要する時間をさらに測定し、
上記測定ステップにて測定された時間関係及び圧縮処理に要する時間に基づいて、上記選択ステップにて選択する映像信号を順次切り替えることを特徴とする実施態様１５に記載の映像配信方法。
（実施態様１７）複数の映像撮影装置からの各映像信号の入力タイミングの時間関係を測定する測定ステップと、
上記複数の映像撮影装置から入力される映像信号の中から、上記測定ステップにて測定された時間関係に基づいて選択する映像信号を順次切り替えて１つの映像信号を選択する選択ステップと、
上記選択手段にて選択した映像信号に圧縮処理を施す圧縮ステップと、
上記圧縮手段で圧縮処理した映像信号を、ネットワークを介して接続されているとともに上記映像撮影装置とは異なる位置に設けられた表示装置に対して送信する送信ステップとをコンピュータに実行させるためのプログラムを記録したことを特徴とするコンピュータ読み取り可能な記録媒体。
（実施態様１８）複数の映像撮影装置からの各映像信号の入力タイミングの時間関係を測定する測定ステップと、
上記複数の映像撮影装置から入力される映像信号の中から、上記測定ステップにて測定された時間関係に基づいて選択する映像信号を順次切り替えて１つの映像信号を選択する選択ステップと、
上記選択手段にて選択した映像信号に圧縮処理を施す圧縮ステップと、
上記圧縮手段で圧縮処理した映像信号を、ネットワークを介して接続されているとともに上記映像撮影装置とは異なる位置に設けられた表示装置に対して送信する送信ステップとをコンピュータに実行させるためのプログラム。
【０１０８】
【発明の効果】
以上、説明したように、本発明によれば、複数の映像入力チャネルを切り替えながら映像信号を順次圧縮処理して送信可能なシステムにて、映像入力チャネル間の同期ずれの影響が最小になる映像入力チャネルの切り替え順序を決定することにより、非同期なｎチャネル分の映像信号を切り替えながら圧縮処理を施して送信する際に、１画面分の映像信号を廃棄するだけでｎチャネルのそれぞれの映像信号を送信することができる。これにより、単位時間あたりでの圧縮処理可能な画像数を増加して、表示側にて映像の更新率を高めた動きの滑らかな表示映像を見ることができる。
【図面の簡単な説明】
【図１】第１の実施形態による映像配信システムの一構成例を示すブロック図である。
【図２】映像デコーダ及びその周辺部の詳細な構成例を示すブロック図である。
【図３】第１の実施形態による映像配信システムを用いた映像モニタリングシステムの一構成例を示すブロック図である。
【図４】第１の実施形態における初期状態でのチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。
【図５】第１の実施形態における初期状態での各チャネルの垂直同期信号の位相関係を示す図である。
【図６】第１の実施形態におけるチャネル切り替え順序変更後のチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。
【図７】第１の実施形態におけるチャネル切り替え順序変更後の垂直同期信号の位相関係を示す図である。
【図８】第１の実施形態におけるチャネル切り替え順序を決定するための動作を示すフローチャートである。
【図９】第２の実施形態における各チャネルの垂直同期信号と圧縮終了割込み信号の位相関係を示す図である。
【図１０】第２の実施形態におけるチャネル切り替え順序変更後の各チャネルの垂直同期信号と圧縮終了割込み信号の位相関係を示す図である。
【図１１】第３の実施形態における映像デコーダ及びその周辺部の詳細な構成例を示すブロック図である。
【図１２】第３の実施形態における初期状態でのチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。
【図１３】第３の実施形態におけるチャネル切り替え順序変更後のチャネル切り替えと各チャネルの映像信号の時間関係を示す図である。
【図１４】第３の実施形態におけるチャネル切り替え順序変更後のチャネル切り替えと各チャネルの映像信号の時間関係の他の例を示す図である。
【図１５】従来における各チャネルの垂直同期信号と圧縮処理される映像信号との時間関係を示す図である。
【図１６】図１５に示した各チャネルの垂直同期信号の位相関係を示す図である。
【符号の説明】
１０ 映像加工・出力装置
１３ 通信用ＰＣカード
１４ フラッシュＲＯＭカード
２０ａ〜２０ｄ 映像撮影装置（カメラ）
３１ 公衆回線網
３２ ＬＡＮ回線網
１０１ マイクロプロセッサ（ＣＰＵ）
１０２ ＣＰＵバス−画像バスブリッジ
１０３ 演算用ＲＡＭ
１０４ フラッシュＲＯＭ
１０５ カメラ制御インタフェース
１０６ ＬＡＮインタフェース
１０７ ＰＣＭＣＩＡスロット
１１０ 不揮発性ＲＡＭ（ＮＶＲＡＭ）
１１１ 画像圧縮ＩＣ
１１２ 映像信号デコーダ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a video distribution system, a video processing device, a video distribution method, a recording medium, and a program, and in particular, displays a plurality of video information on a display terminal installed at a location remote from the shooting location using a network. This is suitable for use in a video monitoring system for watching.
[0002]
[Prior art]
2. Description of the Related Art In recent years, networks such as the Internet have become widespread, and information transmission by the WWW (World Wide Web) or the like has generally been performed. Under such circumstances, a system having a function of transmitting a photographed image on a network in real time has appeared. An example of realizing video monitoring by using such a system to collect and display video information of a plurality of locations transmitted on a network on one terminal is a network camera server manufactured by Canon Inc. There is a WebView Livescope system using the VB101, a WebView Livescope MV system, and the like.
[0003]
In the system as described above, video signals respectively input from a plurality of cameras (video photographing devices) are processed by one network camera server and transmitted to a remote place, and when a video is viewed on a display terminal on the remote side, I do. At this time, if there is one compression processing system inside the network camera server that processes the input video signal, one channel is selected from a plurality of video input channels (input systems (paths) of each video signal). Is selected, and the video signal of the selected channel is processed and transmitted.
[0004]
If it is desired to simultaneously view the images related to the video signals input from a plurality of cameras, the display terminal opens a display window corresponding to each camera, and in each display window, the next image displays the latest image. It can be realized in a pseudo manner by continuing to display until it is sent. In this case, the network camera server sequentially compresses the input video signal while switching a plurality of video input channels, and transmits the compressed video signal to the display terminal on the remote site side. The higher the frequency of updating the video displayed in each display window, the smoother the motion in the displayed video is, and the less unpleasant the pseudo simultaneous display becomes.
[0005]
[Problems to be solved by the invention]
Also, when it is desired to sequentially switch the video related to the video signal input from a plurality of cameras and view it on the display terminal side, the network camera server performs a compression process on the video signal sequentially while switching a plurality of video input channels. Send. Here, the input video signal of each channel is obtained by shooting using a different camera, and therefore, it cannot be expected that the video signal of each channel is synchronized.
[0006]
FIG. 15 shows, as a conventional example, the time relationship between the vertical synchronizing signal of each channel and the video signal subjected to compression processing in the above-described operation. In FIG. 15, the input channels are four channels of A, B, C, and D, and are switched in the order of channels A → B → C → D → A →. The vertical synchronization signals VSa, VSb, VSc, and VSd serve to represent the start and end of one screen of video signal in each channel.
[0007]
In FIG. 15, first, when the compression processing of the video signal A1 of the channel A ends, the input channels are switched, and the next input channel, channel B, is selected. At this time, since the video signal B2 of the channel B is already in the middle of the video signal for one screen, the video signal B2 is discarded, and the next video signal B3 is compressed.
Thereafter, similarly, the input channels are sequentially switched, the video signal C3 of the channel C is discarded, the video signal C4 is compressed, the video signal D5 of the channel D is discarded, and the video signal D6 is compressed. When the compression processing of the video signal D6 ends, the channel A is selected again.
[0008]
If the channel switching order is fixed in advance as described above, depending on the input timing of the video signal, after the compression processing of the video signal of channel A is completed and before the compression processing of the video signal of channel B is started, There is a possibility that a time delay corresponding to a maximum of about one screen occurs.
The delay that occurs when the channel switching order is fixed in advance will be described with reference to FIG. FIG. 16 is a diagram showing the phase relationship between the vertical synchronization signals VSa to VSd of each channel shown in FIG.
[0009]
Here, it is assumed that the time required for inputting the effective image area of the video signal is shorter than a period Tv between adjacent falling edges of the vertical synchronization signals VSa to VSd (a time interval at which each vertical synchronization signal falls). In addition, it is assumed that the compression processing of the video signal for one screen, which is performed for each channel, is completed within a period between falling edges of the vertical synchronization signals VSa to VSd of each channel.
[0010]
In FIG. 16, a delay due to a shift in inter-channel synchronization when switching from channel A to channel B is represented by Δta, and similarly, a shift in inter-channel synchronization is represented by Δtb, Δtc, and Δtd. The delays Δta, Δtb, Δtc, and Δtd can be represented by the following equations (20-1) and (20-2).
0 ≦ Δta, Δtb, Δtc <Tv (20-1)
0 ≦ Δtd <(Tv−Δta) + (Tv−Δtb) + (Tv−Δtc) (20-2)
[0011]
Therefore, the delay in the case of sequentially switching the four channels A to D is given by Expressions (20-1) and (20-2).
0 ≦ Δta + Δtb + Δtc + Δtd <3Tv (20-3)
It becomes. Therefore, in order to compress and transmit the video signals of one screen of each channel, that is, the video signals of a total of four screens, the video signals of up to three screens may have to be discarded. .
[0012]
In the conventional example described above, an example in which a video signal is compressed and transmitted while switching four input channels has been described. Similarly, in a case where transmission is performed while switching n-channel inputs in a fixed channel switching order, In order to transmit the n-channel video signals for one screen each for a total of n screens, there is a possibility that a maximum of (n-1) screen video signals must be discarded.
[0013]
The present invention has been made in order to solve such a problem. When one apparatus sequentially switches a plurality of video input channels to compress and transmit a video signal, the video signal is transmitted per unit time. It is an object of the present invention to increase the number of images that can be subjected to the compression process and increase the update rate of the video on the display side.
[0014]
[Means for Solving the Problems]
The video distribution system of the present invention is a video distribution system for displaying video images respectively shot by a plurality of video shooting devices via a network on a display device provided at a different position from the video shooting device. Selecting means for selecting one video signal from among the video signals input from the plurality of video photographing apparatuses, compressing means for performing a compression process on the video signal selected by the selecting means, and compression by the compressing means. A transmitting unit for transmitting the processed video signal to the display device, and a measuring unit for measuring a time relationship between input timings of the respective video signals from the plurality of video image capturing devices, The video signal selected by the selection means is sequentially switched based on a time relationship.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(1st Embodiment)
FIG. 1 is a block diagram illustrating a configuration example of a video distribution system including a video processing / output device and a video capturing device according to a first embodiment of the present invention.
[0016]
The video distribution system includes a video processing / output device 10, an AC-DC (AC-DC) adapter 11, a commercial AC power supply 12, a communication PC card 13, a flash ROM (FlashROM) card 14, a video photographing device (camera) 20a, 20b, 20c, and 20d. Reference numeral 31 denotes a public line network, and 32 denotes a LAN (Local Area Network) line network.
[0017]
The image processing / output device 10 includes a microprocessor (CPU) 101, a CPU bus-image bus bridge 102, an arithmetic RAM 103, a flash ROM (FlashROM) 104, a camera control interface (camera control I / F) 105, and a LAN interface (LANI). / F) 106, PCMCIA (Personal Computer Memory Card International Association) slot 107, A / D (analog / digital) control line 108, CPU bus 109, nonvolatile RAM (NVRAM) 110, image compression IC 111, video signal decoder 112, It has an image bus 113 and a power supply unit 120. The video processing / output device 10 captures video signals input from the plurality of video photographing devices 20a to 20d, performs a compression process, and sends out the compressed video signals to a public line network 31 or a LAN line network 32. Hereinafter, the internal configuration and the basic operation of the image processing / output device 10 will be described in detail.
[0018]
First, video signals from the video photographing devices 20a to 20d are taken in by the video signal decoder 112 (for example, MSM7664B manufactured by Oki Electric Co.) of the video processing / output device 10 via the video signal cables 21a, 21b, 21c, and 21d, respectively. It is. At this time, the video signal flowing on the video signal cables 21a to 21d is based on an NTSC (National Television System Committee) / PAL (Phase Alternating by Line) / SECAM (Sequential Couleur a Memoire) video-based analog system. And
[0019]
The video signal decoder 112 selects one (one system) video signal from a plurality of video signals input from the video photographing apparatuses 20a to 20d, and A / D converts (analog / analog) the selected analog video signal. Digital conversion). Further, the video signal decoder 112 converts the analog video signal from analog to digital, and then converts the analog video signal into an appropriate digital data format, for example, a format of Y: U: V = 4: 2: 2, as an input to the image compression IC 111. The obtained video data is supplied to the image compression IC 111. The video signal decoder 112 is connected to the CPU 101 via the A / D control line 108, and the CPU 101 controls which video signal input from the video photographing devices 20a to 20d is selected.
[0020]
The image compression IC 111 compresses the video data supplied from the video signal decoder 112 based on a predetermined method. For example, the image compression IC 111 performs a compression process on video data based on a method based on the JPEG (Joint Photographic Experts Group) standard. In this case, ZOR36060 or the like exists as an IC that can be used as the image compression IC 111. The video data compressed by the image compression IC 111 is stored in the arithmetic RAM 103 via the image bus 113, the CPU bus-image bus bridge 102, and the CPU bus 109.
[0021]
When the video data is transferred to the arithmetic RAM 103, the CPU 101 extracts the compressed video data from the arithmetic RAM 103 in accordance with the program stored in the Flash ROM 104, and converts the video data to an appropriate size for distribution to the network. Processing such as splitting into pieces and adding a header is performed. Then, the CPU 101 transmits to another machine (terminal) connected to the public line network 31 via the communication PC card 13 (such as a modem card or an Integrated Services Digital Network (ISDN) card) inserted into the PCMCIA slot 107. Alternatively, the compressed video data is transmitted to another terminal or the like connected to the LAN network 32 via the LAN I / F 106.
[0022]
Here, since the CPU 101 is assumed to be of a built-in purpose, the LAN I / F 106 and the PCMCIA slot 107 are directly controlled by the CPU 101 without passing through the CPU bus 109. In this case, as the CPU 101, an MPC860DT manufactured by Motorola or the like can be given as an example. However, the present invention is not limited by the positions of the interfaces connected to these external networks, and these interfaces can be configured as devices connected to the CPU bus 109 or the image bus 113.
[0023]
Further, the CPU 101 can also store the video data without transmitting it on the network. For example, by inserting the FlashROM card 14 into the PCMCIA slot 107 and treating it as a hard disk, it becomes possible to record video data on the FlashROM card 14. Note that the flash ROM 104 can be selected as the storage destination of the video data.
[0024]
On the other hand, in the present video distribution system, control of the video photographing devices 20a to 20d is performed by the video processing / output device 10 via the camera control signal cables 22a, 22b, 22c, and 22d. The camera control signal cables 22a to 22d are connected to the camera control I / F 105 of the video processing / output device 10, respectively. As a protocol of the camera control I / F 105, a method conforming to the RS-232C standard, the USB (Universal Serial Bus) standard, or the IEEE 1394 standard can be adopted. Also, here, it is assumed that there is a connection cable, but this does not exclude a system that does not rely on a wire, such as a system that conforms to the IrDA (Infrared Data Association) standard.
[0025]
Note that the image processing / output device 10 receives the power converted into direct current from the commercial AC power supply 12 via the AC-DC adapter 11 at the power supply unit 120, and furthermore, it is suitable for an IC or the like inside the device to operate. The power is supplied to the entire device after being converted by the power supply unit 120 so that the voltage and the stability are obtained.
[0026]
FIG. 2 is a block diagram showing a detailed configuration example of the video decoder 112 and its peripheral parts. 2, components and the like having the same functions as the components and the like shown in FIG. 1 are denoted by the same reference numerals.
The video signal decoder 112 is actually composed of four video signal decoders 112a, 112b, 112c and 112d respectively corresponding to a plurality of video signal inputs.
[0027]
The video signal decoders 112a to 112d are supplied with video signals from the video photographing devices 20a to 20d via the video input terminals 23a to 23d and the video signal cables 21a to 21d, respectively. The video signal decoders 112a to 112d A / D convert the input video signal and further convert the input video signal into a digital data format, for example, a format of Y: U: V = 4: 2: 2, and convert the digital video signal into a digital video signal bus 118a. Output to 118b, 118c, 118d. Note that vertical synchronization signals and the like extracted from each video signal are also multiplexed on the digital video signal buses 118a to 118d.
[0028]
The video data output to the digital video signal buses 118a to 118d is input to the selector 116. One of the video data is selected by the selector 116 and supplied to the image compression IC 111 as a digital video signal 119. Further, a vertical synchronization interrupt (VSI) signal 114 is simultaneously selected by the selector 116 and input to the image compression IC 111 and the CPU 101.
[0029]
The image compression IC 111 performs compression processing on the supplied video data. Further, the image compression IC 111 notifies the CPU 101 of the end of the compression processing of the video data by the compression end interrupt signal 115.
The other components and the like are the same as the components and the like shown in FIG.
[0030]
Here, the video signal decoders 112a to 112d are connected to the CPU 101 via the A / D control line 108, and in the first embodiment, the A / D control line 108 ² It is composed of a two-wire interface according to the C bus protocol. The selector 116 is under the control of the CPU 101 via the selector control line 117, and performs a switching operation such as selecting which digital video signal input is to be selected.
[0031]
FIG. 3 is a block diagram showing a configuration example of a video monitoring system to which the present invention is applied. Here, a network is configured using four video photographing devices 20a to 20d, one video processing / output device 10, one display terminal 40, and a LAN network 32.
[0032]
The video processing / output device 10 selects one of the video signals input from each of the plurality of video photographing devices 20a to 20d, performs compression processing on the selected video signal, and transmits the selected video signal to the LAN network 32. Send to The display terminal 40 connected to the LAN line network 32 expands the compressed video data sent from the video processing / output device 10 to, for example, viewers 41a, 41b, 41c corresponding to the video photographing devices 20a to 20d. , 41d on the own screen.
It is assumed that the video image capturing apparatuses 20a to 20d capture different image capturing targets, and the video processing / output apparatus 10 transmits the video information to the display terminal 40.
[0033]
In the first embodiment, when the video distribution system as shown in FIG. 1 and FIG. 2 is operated by the method as shown in FIG. 3, the video signal input from the video photographing devices 20a to 20d is How the time relationship is measured and the channel switching process is performed based on the time relationship will be described with reference to FIGS.
[0034]
First, FIG. 1 to FIG. 3 show the operation when the video processing / output device 10 in the first embodiment measures and grasps the time relationship between the input video signals and determines the switching order of the input channels. This will be described with reference to FIGS.
Hereinafter, for convenience of explanation, the input system of each video signal from the video photographing device 20 to the digital video signal bus 118 is called “channel”, and the switching of the input system by the selector 116 is called “channel switching”.
[0035]
When the system is activated, the video processing / output device 10 first needs to measure and grasp the time relationship between video signals input from each channel. Therefore, the selector 116 tentatively sets the channels A → B → C → D → A → as shown in FIG. 4 until the video processing / output device 10 grasps the time relationship between the video signals after the system is started or the like. In this order, the input (video data) of the digital video signal bus 118 is selected and output as the digital video signal 119.
[0036]
FIG. 4 is a diagram illustrating a time relationship between the channel switching in the initial state and the video signal of each channel in the first embodiment. In FIG. 4, a frame surrounded by a solid line is a frame actually selected by the selector 116, and the time relationship of the video signal in each channel and the manner in which the video signal is selected can be seen from FIG.
[0037]
In the first embodiment, it is assumed that the unit of video provided from each channel is a frame unit, one image is transmitted every 1/30 second, and the beginning of each frame is the falling edge of the vertical synchronization signal. It is assumed that Also, the time required for inputting the effective image area of the video signal (the video signal relating to the display image) is shorter than the time interval Tv of the falling edge of the vertical synchronization signal, and is equivalent to one frame performed in each channel. It is assumed that the compression processing of the video signal has been completed within the period between the falling edges of the vertical synchronization signal of each channel.
[0038]
In FIG. 4, when the compression processing of the first frame A1 of the channel A ends, the input is switched to the channel B. However, since the frame B2 of the channel B is already in the middle of the frame at the time of the switching, the frame B2 is discarded and waits until the next falling of the vertical synchronization signal VSb is detected. Thereafter, when the falling of the vertical synchronizing signal VSb is detected and the beginning of the frame B3 is recognized, the frame B3 is compressed.
[0039]
Thereafter, similarly, frames C3 and D5 are discarded, and frames C4 and D6 are sequentially compressed and output. Then, the input returns to the channel A again, the frame A7 is discarded, and the frame A8 is compressed.
The above-described operation is repeatedly performed.
[0040]
FIG. 5 is a diagram showing the phase relationship between the vertical synchronization signals VSa to VSd of each channel in the initial state in the first embodiment shown in FIG. In each of the vertical synchronization signals VSa to VSd, a period Tv between adjacent falling edges is Tv = 1/30 second.
[0041]
In FIG. 5, a delay due to a shift in synchronization between channels when switching from channel A to channel B is represented by Δta. The delay Δta is an interval between the falling edge of the vertical synchronization signal VSa of the channel A and the falling edge of the vertical synchronization signal VSb of the channel B obtained after the channel switching.
[0042]
These falling edges are supplied to the CPU 101 as falling edges of the vertical synchronization interrupt (VSI) signal 114. The CPU 101 internally has a timer with a resolution sufficiently finer than 1/30 second, and can measure the time from time t1 'to t2 shown in FIG. 5 with a certain accuracy.
Similarly, the falling edge of the vertical synchronization signal of the selected channel is supplied to the CPU 101 as the falling edge of the vertical synchronization interrupt signal 114, and the delays Δtb, Δtc, and Δtd due to the shift in synchronization between the channels are measured. .
[0043]
When the measurement of the synchronization deviation between the channels is completed by repeatedly performing the above-described measurement operation for a certain period, the CPU 101 sets a certain channel as a reference channel and sets the vertical synchronization between the reference channel and each channel. The magnitude of the signal deviation is calculated, and the order in which the deviation is small is calculated.
[0044]
In the first embodiment, with reference to channel A, the deviation Δtab between the vertical synchronization signal VSa of channel A and the vertical synchronization signal VSb of channel B is:
Δtab = Δta (1)
It becomes. Similarly, shifts Δtac and Δtad between the vertical synchronization signal VSa of the channel A and the vertical synchronization signals VSc and VSd of the channels C and D are respectively:

It becomes.
[0045]
Based on the calculation result, the CPU 101 determines the magnitude relationship between the deviations Δtab, Δtac, and Δtad. Here, in the first embodiment, since Δtad <Δtac <Δtab from FIG. 5, channel switching is performed in the order of small deviation from the vertical synchronization signal VSa of channel A, that is, in the order of channels A → D → C → B. It turns out that it is good.
When the channel switching order is determined, the CPU 101 thereafter controls the control signal 117 to the selector 116 to change the switching order of the video input channels to the order determined based on the measurement result.
[0046]
FIG. 6 shows a processing flow when the channel switching order is changed as described above. FIG. 6 is a diagram illustrating a time relationship between the channel switching after the channel switching order is changed and the video signal of each channel in the first embodiment. In FIG. 6, the video input channels are switched in the order of channels A → D → C → B → A →..., And the frames are sequentially arranged as frames A1, D2, C3, B5, A6, D7, C8,. It has been compressed.
[0047]
FIG. 7 is a diagram showing the phase relationship between the vertical synchronization signals VSa to VSd after the channel switching order is changed in the first embodiment shown in FIG.
In FIG.
Δta ′ = Δtad (4)
Δtd ′ = Δtac−Δtad (5)
Δtc ′ = Δtab−Δtac (6)
Δtb ′ = Tv−Δtab (7)
Therefore, the total amount of delay due to the synchronization shift required to make a round of each channel is calculated from the above equations (4) to (7).

It becomes.
[0048]
That is, when this method is adopted, when four video input channels are sequentially switched, in order to compress and transmit a video signal of one frame of each channel, that is, a total of four frames, a maximum of one frame of video signal is required. It is only necessary to expect to discard.
[0049]
In general, when sequentially switching n video input channels (n is a natural number), this method is adopted,

When this method is used, it is possible to sequentially switch the input channels only by discarding the video signal for one frame at the maximum.
[0050]
FIG. 8 shows the flow of the operation described above. FIG. 8 is a flowchart illustrating an operation for determining a channel switching order in the first embodiment.
When the video processing / output device 10 determines that the switching order of the video input channels has to be set (step S801), it is necessary to first measure and understand the time relationship of the video signals input from each channel. Therefore, the CPU 101 in the video processing / output device 10 enables (actuates) a timer for measuring a vertical synchronization interrupt signal interval (step S802). Further, the CPU 101 sequentially switches the respective video input channels while keeping the current switching order, and measures the interval of the vertical synchronization interrupt signal (step S803).
[0051]
In the description of FIG. 4 described above, until the video processing / output device 10 grasps the time relationship between the video signals, such as when the system is started, the video input is temporarily provided to the selector 116 in the order of channels A → B → C → D. It is assumed that the input of the digital video signal bus 118 is selected as the output to the digital video signal 119. However, the channel switching sequence at the time of performing the measurement in step S803 is not limited to the sequence described with reference to FIG. 4, and if there is a channel switching sequence determined by previous measurement or the like, switching is performed in accordance with the sequence. It is assumed that
[0052]
The interval measurement of the vertical synchronization interrupt signal in step S803 is repeated until the phase differences of all channels are measured (step S804). The measurement is performed n times to increase the measurement accuracy (step S805).
[0053]
As a result of the measurement, if the variation of the obtained measurement value falls within a certain allowable range (step S806), the channel switching order is determined based on the measurement result (step S807). Here, there are various ways to determine the channel switching order. In the first embodiment, the switching time is minimized by switching the reference video input channel in the order of small deviation from the vertical synchronization signal. . As described above, in the example shown in the first embodiment, since Δtad <Δtac <Δtab from FIG. 5, the channel switching order is such that the deviation from the reference vertical synchronization signal of channel A is small, and channel A → It is determined that the switching should be performed in the order of D → C → B.
[0054]
When the video input channel switching order is determined in step S807, based on the determined order, the CPU 101 controls the selector 116 via the selector control line 117 to perform channel switching in a new order (step S808).
[0055]
Various methods can be considered for determining whether or not the obtained variation in the measured value falls within a certain allowable range. However, here, there is no effect on the rearrangement of the shift times in step S807. It is assumed that variation in the measurement of the range is allowed.
In addition, in FIG. 8, when the variation of the measured value is not within the allowable range, the measurement is performed again. However, when the variation does not fall within the allowable range even if the measurement is repeated, the channel switching order is changed. It is also possible to make a provisional decision.
[0056]
By changing the order of switching the video input channel (input video signal) in this manner, the number of frames that can be compressed and transmitted per unit time is increased, and then the video processing / output device 10 is compressed. How the video data is transmitted to the display terminal 40 will be described with reference to FIG. 1, FIG. 3, FIG. 4, and FIG.
[0057]
As already described with reference to FIG. 1, the image compression IC 111 to which the video data has been input compresses the video data based on a predetermined method. The compressed video data (also referred to as “compressed video data”) is finally stored in the arithmetic RAM 103. When the compressed video data is transferred to the arithmetic RAM 103, the CPU 101 takes out the compressed video data from the arithmetic RAM 103 and transmits the compressed video data to the display terminal 40 according to the program stored in the Flash ROM 104. .
[0058]
When the system is started, it is assumed that the switching order of the video input channels is channel A → B → C → D as shown in FIG. As can be seen from FIG. 4, the compressed video data is sequentially supplied to the arithmetic RAM 103 in the order of frames A1, B3, C4, D6, A8,..., And the CPU 101 sends the compressed video data to the display terminal 40 in that order.
[0059]
As shown in FIG. 3, the display terminal 40 updates the display image in the viewer by performing expansion processing and the like on the compressed video data in the order of the received data. Here, the display terminal 40 has viewers 41a to 41d corresponding to the video photographing devices 20a to 20d, respectively. Since the display terminal 40 receives the compressed video data from the video processing / output device 10 in the order of frames A1, B3, C4, D6, A8,..., As a result, the display terminal 40 also receives channels A → B → C → D ( The images are updated in the order of viewers 41a → 41b → 41c → 41d).
[0060]
By changing the video input channel switching order to increase the number of frames that can be compressed and transmitted per unit time, there is a high possibility that compressed video data will be generated in a different order from that at system startup. . For example, in the case of the first embodiment, the compressed video data is supplied to the arithmetic RAM 103 in the order of frames A1, D2, C3, B5, A6, D7, C8,.
[0061]
However, when the CPU 101 transmits the compressed video data to the display terminal 40 in the order of the updated video data, the update sequence of the video is suddenly changed on the display terminal 40 side, and the user may feel uncomfortable. is there. Therefore, in the first embodiment, in order to eliminate the user's discomfort, even if the switching order of the video input channels is changed, the order in which the compressed video data is transmitted to the display terminal 40 is not changed at the time of system startup. Shall be.
[0062]
Even if compressed video data is supplied to the arithmetic RAM 103 in the order of frames A1, D2, C3, B5, A6,... As shown in FIG. , Ie, frames A1 → B5 → C3 → D2 → A6 →... And transmitted to the display terminal 40 side. As a result, on the display terminal 40 side, the state in which the images are updated in the order of channels A → B → C → D (viewers 41a → 41b → 41c → 41d) is maintained, and the user does not feel uncomfortable.
[0063]
In the first embodiment, the display order of the video on the display terminal 40 has been described using an example in which the video data received by the display terminal 40 is decompressed in the same order. Although the switching order at the time of startup is maintained, it is also possible to arbitrarily rearrange the received video data and change the update order on the display terminal 40 side.
[0064]
In this case, the CPU 101 may send the compressed video data to the display terminal 40 in the order in which the compressed video data was supplied to the arithmetic RAM 103 even after the channel switching order was changed. The display terminal 40 temporarily stores the received video data, expands the image in the order set on the display terminal 40, and updates and displays the image, so that the image is displayed in a fixed order even when the switching order of the video input channels changes. Images can be updated.
[0065]
As described above in detail, according to the present embodiment, a plurality of video input channels are switched, video signals of each channel are sequentially compressed, and displayed via a network (the public line network 31 or the LAN line network 32). When supplying to the terminal 40, the synchronization shift in the video signal between each channel is measured and calculated, and the channel switching order is determined so that the influence of the synchronization shift between the video input channels is minimized. By simply discarding the video signal for one frame, n video input channels can be sequentially switched, and the video signal can be compressed and transmitted. Therefore, the number of frames that can be subjected to compression processing per unit time increases, so that the image update rate on the display terminal 40 side can be increased, and the user can view a display image with smooth motion.
[0066]
(Second embodiment)
Next, a second embodiment will be described.
The configurations of the video distribution system and the video processing / output device according to the second embodiment of the present invention are the same as those of the video distribution system and the video processing / output device according to the first embodiment shown in FIGS. It is.
[0067]
In the above-described first embodiment, the compression processing of the video signal for one frame performed in each channel is completed within a period between falling edges of the vertical synchronization signal of each channel. However, depending on the size of the output video, the subject, and the compression parameter, the compression processing of the video signal for one frame may not be completed within that period.
In such a case, it is necessary to consider the time required for the actual compression processing when setting the switching order of the video input channels.
[0068]
In the second embodiment, a method for measuring the relationship between the two signals of the vertical synchronization interrupt signal 114 and the compression end interrupt signal 115 in the CPU 101 and setting the video input channel switching order will be described with reference to FIGS. This will be described with reference to FIGS. 9 and 10. In the second embodiment, the compression end interrupt signal 115 output from the image compression IC 111 to the CPU 101 shown in FIG.
[0069]
Hereinafter, the description will be made with emphasis on the difference from the above-described first embodiment.
(1) When the number of input video signals changes, (2) When the object being shot changes due to movement of the object itself or pan / tilt / zoom of the image shooting device, (3) Image When parameters such as backlight correction given to the photographing apparatus change, (4) when the size of the output image changes, and (5) when the compression ratio of the output image changes, the compression processing is affected. When the content to be given changes, the time required for the compression processing of the video data may change.
[0070]
At this time, the video processing / output device 10 determines that it is necessary to reset the switching order of the video input channels, and starts the operation of measuring and grasping the time relationship of the video signals. At this time, the input of the digital video signal bus 118 is selected as the output to the digital video signal 119 by the selector 116 in the order of the channels A → B → C → D.
[0071]
In the second embodiment, as in the first embodiment, it is assumed that the unit of video provided from each channel is a frame unit, one image is sent every 1/30 second, and The beginning is assumed to be indicated by the falling edge of the vertical synchronization signal. Further, the time required for inputting the effective image area of the video signal is shorter than the time interval Tv of the falling edge of the vertical synchronization signal, and the end of the compression processing for one frame for the selected video signal is determined by the image compression IC 111. Is indicated by the falling edge of the compression end interrupt signal 115 output to the CPU 101.
[0072]
FIG. 9 is a diagram showing the phase relationship between the vertical synchronization signals VSa to VSd of each channel and the compression end interrupt signal 115 in the second embodiment. Here, in each of the vertical synchronization signals VSa to VSd, the period Tv between adjacent falling edges is Tv = 1/30 second.
[0073]
The time required to compress one frame of the channel A is represented by Tca, and the time between the falling edge of the compression end interrupt signal of the channel A and the falling edge of the vertical synchronization signal VSa of the channel A immediately before that. The time is represented by Δca. Times Tcb, Tcc, Tcd, Δca, Δcb, and Δcd are similarly defined for channels B, C, and D.
[0074]
In the second embodiment shown in FIG. 9, the times Tca, Tcb, Tcc, Tcd are:
Tca = 2Tv + Δca (10)
Tcb = Δcb (11)
Tcc = Tv + Δcc (12)
Tcd = Δcd (13)
Can be expressed as
[0075]
On the other hand, the synchronization deviation (Δtab, Δtac, Δtad, etc.) between the channels can be obtained in the same manner as in the first embodiment.
By repeatedly performing this measurement for a certain period, the CPU 101 can estimate the shift between the synchronizations between the channels and the time required for compression.
[0076]
When the synchronization between the channels and the time required for compression are estimated, the CPU 101 searches for an optimal channel switching order based on the contents. Specifically, when switching to channel j after completion of compression of channel i, CPU 101 obtains the time Yij from the occurrence of the compression end interrupt of channel i to the first input of a valid vertical synchronization interrupt of channel j. Here, i and j are suffixes, and i and j are a, b, c, and d (corresponding to channels A, B, C, and D, respectively).
[0077]
Time Yij is

Can be obtained by
Then, Yij is sequentially added for all possible combinations of the channel switching order, and the time ΔYij required for switching in the switching order is calculated.
[0078]
When there are four video input channels A, B, C, and D as in the second embodiment, the channel A is considered as a reference.
ΣYabcd = Yab + Ybc + Ycd + Yda (15-1: switching in order of A → B → C → D)
ΣYabdc = Yab + Ybd + Ydc + Yca (15-2: switching in the order of A → B → D → C)
ΣYacbd = Yac + Ycb + Ybd + Yda (15-3: Switching in order of A → C → B → D)
ΣYacdb = Yac + Ycd + Ydb + Yba (15-4: Switching of A → C → D → B)
ΣYadbc = Yad + Ydb + Ybc + Yca (15-5: Switching in order of A → D → B → C)
ΣYadcb = Yad + Ydc + Ycb + Yba (15-6: Switching in order of A → D → C → B)
(The number of remaining channels B, C, and D when channel A is brought to the top). If the one with the smallest value is selected from among them, that is the optimal channel switching order.
[0079]
Generally, when there are n (n is a natural number) video input channels, the number of (n-1) permutations, that is, (n-1)! Can be obtained by calculating the same value as the number of. However,
X = Min (ΣYabcd, ΣYabdc, ΣYacbd, ΣYacdb, ΣYadbc, ΣYadcb) (16)
When the value of X is
mTv <X ≦ (m + 1) Tv (17)
When the channel switching order represented by the equation is adopted for the values of the above equations (15-1) to (15-6) whose sum is similarly equal to or less than (m + 1) Tv, The same effect can be obtained.
[0080]
Therefore, since the time required for the compression processing of the video signal of each channel actually varies, the error of the variation is absorbed as much as possible and is within the range of m which satisfies the above equation (17). The channel switching order will be selected.
FIG. 10 shows a state after the channel switching order is changed based on the result obtained in this manner. In this case, by switching the channels in the order of A → C → D → B, the switching period of the video signal can be made shorter by 1 Tv than in the case shown in FIG.
[0081]
As described above, according to the second embodiment, in addition to the effects obtained in the above-described first embodiment, the channel switching order is determined in consideration of the time required for the actual compression processing of the selected video signal. It becomes possible to do. Therefore, depending on the size of the output video, the subject, and the compression parameter, the time required for the compression processing of the video signal differs for each channel (for example, in a certain channel, the compression processing does not end in a time corresponding to one frame). Even so, an appropriate channel switching order can be determined.
[0082]
(Third embodiment)
Next, a third embodiment will be described.
The video distribution system according to the third embodiment of the present invention is the same as the video distribution system shown in FIG. FIG. 11 is a block diagram showing a detailed configuration example of the video decoder 112 and its peripheral portion in the third embodiment. In FIG. 11, components having the same functions as those shown in FIG. Etc. are given the same reference numerals. In the third embodiment, as shown in FIG. 11, there is shown an example in which the video signal decoder 112 has one system and the video signal is selectively switched inside.
[0083]
The video signal decoder 112 selectively extracts one input from a plurality of video signal inputs. The selector 1121 performs A / D conversion of the video signal selected by the selector 1121 and converts the video signal into a digital data format, for example, Y: U: V. = 4: 2: 2, and an A / D converter 1122 for converting the format, and a controller 1123 for controlling them.
[0084]
The selector 1121 has four systems of inputs from first to fourth inputs, and is connected to the video input terminals 23a to 23d, respectively. Video input devices 23a to 23d are connected to video capturing devices 20a to 20d via video signal cables 21a to 21d, respectively.
[0085]
The controller 1123 is connected to the CPU 101 via the A / D control line 108. In the third embodiment, the A / D control line 108 is ² It is composed of a two-wire interface according to the C bus protocol. The controller 1123 is under the control of the CPU 101 via the A / D control line 108, and performs a switching operation such as selecting which input is to be selected by the selector 1121.
[0086]
In addition, the controller 1123 extracts a change in a signal required for video synchronization, such as a vertical synchronization signal, from the video signal selected by the selector 1121. In the third embodiment, the vertical synchronization signal extracted by the controller 1123 is input to the CPU 101 and the image compression IC 111 as a vertical synchronization interrupt signal 114.
[0087]
In the third embodiment, it is assumed that the unit of video provided from each channel is a field unit, and an even-field image and an odd-field image are transmitted one by one every 1/60 second. Is indicated by the falling edge of the vertical synchronization signal. Further, the time required for inputting the effective image area of the video signal is shorter than the time interval Tv ′ of the falling edge of the vertical synchronization signal, and the compression processing of the video signal for one field performed in each channel is performed as follows. It is assumed that the processing ends within a period between falling edges of the vertical synchronization signal of each channel.
[0088]
In addition, it is assumed that after the channel switching, detection of the vertical synchronization signal at a maximum of two times is necessary for a system such as an A / D converter to operate correctly in the video decoder 112. Further, the compressed video data sent from the video processing / output device 10 to the display terminal 40 transmits only either the even or the odd field for each channel while a certain channel switching order is applied. Then
[0089]
FIGS. 12, 13 and 14 show how the video input channel is switched in the third embodiment.
FIG. 12 is a diagram showing the time relationship between the channel switching in the initial state and the video signal of each channel in the third embodiment. As in the first embodiment, the CPU 101 first switches video input channels in a certain order in the initial state, that is, in the order of channels A, B, C, and D, and checks for synchronization deviation between the channels.
[0090]
In the third embodiment, the channel is switched as described above, and the field after the detection of the vertical synchronization signal twice is subjected to compression processing as a valid field. Therefore, the video processing / output device 10 according to the third embodiment compresses the video data of the fields in the order of fields A1, B4, C7, D10,... As shown in FIG.
[0091]
When the channel is switched to the channel A after the compression processing of the field D10, the field A12 can be compressed in terms of timing. However, since the video processing / output device 10 compresses the odd field A1 immediately before the transmission, if the even field A12 is compressed and transmitted, the display terminal 40 decompresses and displays the data. The video is slightly rattled and very unsightly. Therefore, the video processing / output device 10 switches to the channel B after skipping the even field A12 and compressing the odd field A13.
[0092]
When the measurement of the synchronization shift between the respective channels is completed, the CPU 101 searches for an optimal channel switching order in the same manner as in the first embodiment. In the third embodiment, it is assumed that the compression processing of the video signal for one field performed in each channel is completed within a period between falling edges of the vertical synchronization signal of each channel. Therefore, the optimal channel switching order is the difference Δtab, Δtac between the vertical synchronizing signal VSa of the channel A and the vertical synchronizing signals VSb, VSc, VSd of the channels B, C, and D, respectively, as in the first embodiment. , Δtad can be determined and determined.
[0093]
FIG. 13 shows the time relationship between the channel switching after changing the channel switching order based on the result obtained as described above and the video signal of each channel. In FIG. 13, the video input channels are changed in the order of channels A → D → C → B → A →. As a result, the fields to be subjected to the compression process transit in the order of fields A1, D4, C6, B8, A11, D14, C16, B18, A21, D24, and so on. Even after the change of the channel switching order shown in FIG. 13, the fields A10 and A20 are skipped in the compression processing as in the case shown in FIG. This makes it possible to transmit a fixed field such as an odd field in the A channel and an even field in the B, C and D channels.
[0094]
When the channel switching order is changed as shown in FIG. 13, the number of fields to be compressed per unit time can be maximized under this condition. However, in the case shown in FIG. 13, there are fields to be skipped in the channel A, and one field of each channel is output for a total of four fields for a time in which ten fields can be input.
[0095]
Therefore, under the condition that the video data of four fields should be compressed during the time corresponding to ten fields, the channel switching order may be changed in consideration of another factor. For example, in the third embodiment, as in the first embodiment, the update order of the display video on the display terminal 40 side is assumed to be constant in the order of channels A → B → C → D. Further, in order to transmit the compressed video data in such a manner, the CPU 101 transmits the compressed video data to the arithmetic RAM 103 in the order of channel A → B → C → D regardless of the order in which the compressed video data is supplied. Is transmitted to the display terminal 40 side.
[0096]
In this case, it is also possible to adopt a policy of switching the channels in an order as close as possible to the actual display order to reduce the memory usage rate and to make effective use of resources. FIG. 14 shows an example in which such a policy is provided and the channel switching order is considered.
[0097]
Here, by switching channels in the order of channels A → B → D → C, channel switching is realized in an order closer to the video update order on the display terminal 40 side than in the case shown in FIG. ing. In the case of the example shown in FIG. 14, the video processing / output device 10 performs the compression processing in the order of fields A1 → B4 → D7 → C9 → A11 → B14 → D17 → C19 →. There are no skipped fields that existed in the example shown in. Channel switching can be realized in an order closer to the image update order on the display terminal 40 side by making good use of one field that has been wasted.
[0098]
(Fourth embodiment)
Next, a fourth embodiment will be described.
In the above-described first embodiment, the compressed video data is transmitted to the display terminal 40 and is used by being displayed there. On the other hand, it is conceivable that the use of the video is displayed on the display terminal 40 and stored for later use. An example of such a case will be briefly described with reference to FIG.
[0099]
Since the switching of the video input channel is basically the same as that of the first embodiment, the description is omitted here. The difference is that the CPU 101 transmits the compressed video data to the LAN line network 32 via the LAN I / F 106 and, at the same time, stores the compressed video data in the FlashROM card 14 inserted in the PCMCIA slot 107. That is. The CPU 101 adds a time stamp and a tag of a video input number to the compressed video data, and stores the compressed video data in the FlashROM card 14. Although the Flash ROM card 14 inserted in the PCMCIA slot 107 is designated as the video storage medium, it can be stored in the built-in Flash ROM 104, for example. In addition, a small hard disk or the like can be used instead of the FlashROM card, and the present embodiment does not limit the type of the video storage medium.
[0100]
By changing the order of switching the video input channels as in the first embodiment, the number of images that can be stored per unit time can be further increased in the video storage according to the fourth embodiment. .
[0101]
In the above-described first to fourth embodiments, the case where the number of video input channels to which video signals are input from the video photographing apparatus is four is shown as an example, but the present invention is not limited to this. The number of video input channels is arbitrary.
In addition, the time relationship between the channel switching and the video signal of each channel and the phase relationship of the vertical synchronization signal of each channel shown in the first to fourth embodiments are merely examples, and the present invention is not limited to this. It is not done.
[0102]
(Another embodiment of the present invention)
In order to operate various devices to realize the functions of the above-described embodiments, a program code of software for realizing the functions of the above-described embodiments is transmitted to an apparatus or a computer in a system connected to the various devices. The present invention also includes those which are supplied and executed by operating the above-described various devices according to a program stored in a computer (CPU or MPU) of the system or the apparatus.
[0103]
In this case, the software program code itself implements the functions of the above-described embodiment, and the program code itself constitutes the present invention. Further, means for supplying the program code to the computer, for example, a recording medium storing the program code constitutes the present invention. As a recording medium for storing such a program code, for example, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a magnetic tape, a nonvolatile memory card, a ROM, and the like can be used.
[0104]
When the computer executes the supplied program code, not only the functions of the above-described embodiments are realized, but also the OS (operating system) or other application software running on the computer. It goes without saying that such a program code is also included in the embodiment of the present invention when the functions of the above-described embodiment are realized in cooperation with the above.
[0105]
Further, after the supplied program code is stored in a memory provided in a function expansion board of a computer or a function expansion unit connected to the computer, a CPU provided in the function expansion board or the function expansion unit based on the instruction of the program code. It is needless to say that the present invention includes a case where the functions of the above-described embodiments are implemented by performing some or all of the actual processing.
[0106]
It should be noted that each of the above-described embodiments is merely an example of a concrete embodiment for carrying out the present invention, and the technical scope of the present invention should not be interpreted in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features.
Examples of embodiments of the present invention are shown below.
[0107]
(Embodiment 1) A video distribution system for displaying videos captured by a plurality of video capturing devices via a network on a display device provided at a position different from the video capturing device,
Selecting means for selecting one video signal from video signals input from the plurality of video photographing devices;
Compression means for performing compression processing on the video signal selected by the selection means,
Transmission means for transmitting the video signal compressed by the compression means to the display device,
Measuring means for measuring a time relationship between input timings of the respective video signals from the plurality of video photographing devices,
A video distribution system characterized by sequentially switching video signals selected by the selection means based on the time relationship measured by the measurement means.
(Embodiment 2) The measuring means further measures the time required for the compression processing of each of the video signals,
3. The video distribution system according to claim 1, wherein the video signal selected by the selection unit is sequentially switched based on the time relationship measured by the measurement unit and the time required for the compression process.
(Embodiment 3) The video distribution system according to Embodiment 1 or 2, wherein the measuring means measures a time relationship between input timings of the video signals based on a vertical synchronization signal of each video signal.
(Embodiment 4) A video distribution system for providing a video signal to a display terminal via a network and displaying a video related to the video signal on the display terminal,
A plurality of video shooting devices,
Selecting means for selecting one of the video signals input from the plurality of video photographing devices, compression means for compressing the selected video signal, and outputting the compressed video signal to a network Video processing output device having network interface means,
A video distribution system comprising: measuring a time relationship between video signals input from the plurality of video image capturing devices; and sequentially switching a video signal selected by the video processing output device based on the measured time relationships.
(Embodiment 5) The time relationship between the video signals is measured based on a vertical synchronization signal of each of the video signals or a signal obtained by converting the vertical synchronization signal. Video distribution system.
(Embodiment 6) In addition to the time relationship between the video signals input from the plurality of video image capturing devices, the time required for compressing the video signals is further measured, and the measured time relationship and the time required for the compression process are measured. The video distribution system according to embodiment 4, wherein the video signal selected by the video processing output device is sequentially switched based on time.
(Embodiment 7) The time relationship between the video signals and the time required for the compression processing are the vertical synchronization signal of each video signal or a signal obtained by converting the vertical synchronization signal, and the compression end signal output by the compression means. The video distribution system according to the sixth embodiment, wherein the video distribution is measured on the basis of:
(Embodiment 8) When switching a video signal to be selected based on the time relationship, a switching order that minimizes the total time related to the video signal that is discarded without being compressed is calculated. The video distribution system according to any one of embodiments 4 to 7, wherein the video signal selected based on the video signal is switched.
(Embodiment 9) The measurement according to any one of Embodiments 4 to 8, wherein the measurement of the time relation and the calculation of the video signal switching order based on the measurement result are executed based on a predetermined trigger. The video distribution system according to the item.
(Embodiment 10) The predetermined trigger is an increase or decrease in the number of input video signals, a change in an object being shot, a change in a video shooting parameter given to the video shooting device, a change in a compression parameter, and The video distribution system according to the ninth embodiment, wherein at least one of the lapses of a predetermined time or more has occurred.
(Embodiment 11) An embodiment 4 characterized in that the video related to the video signal is updated in a fixed order on the display terminal side, regardless of the switching order of the video signal selected by the video processing output device. 11. The video distribution system according to any one of items 10 to 10.
(Embodiment 12) The video distribution according to any one of Embodiments 4 to 11, wherein the compressed video signal is sequentially stored in a storage medium connected to the inside or outside of the video processing output device. system.
(Embodiment 13) A video processing device provided at a position different from the video imaging device to display video images respectively captured by a plurality of video imaging devices on a display device connected via a network. ,
Selecting means for selecting one video signal from video signals input from the plurality of video photographing devices;
Compression means for performing compression processing on the video signal selected by the selection means,
Transmission means for transmitting the video signal compressed by the compression means to the display device,
Measuring means for measuring a time relationship between input timings of the respective video signals from the plurality of video photographing devices,
An image processing apparatus characterized by sequentially switching video signals selected by said selecting means based on the time relationship measured by said measuring means.
(Embodiment 14) The measuring means further measures the time required for the compression processing of each video signal,
The video processing apparatus according to embodiment 13, wherein the video signal selected by the selection unit is sequentially switched based on the time relationship measured by the measurement unit and the time required for the compression process.
(Embodiment 15) A video distribution method for displaying videos respectively shot by a plurality of video shooting devices via a network on a display device provided at a different position from the video shooting device,
A measuring step of measuring a time relationship between input timings of the respective video signals from the plurality of video photographing devices,
A selecting step of selecting one video signal from video signals input from the plurality of video photographing devices;
A compression step of performing a compression process on the video signal selected by the selection means,
Transmitting a video signal compressed by the compression means to the display device,
A video distribution method characterized by sequentially switching video signals selected in the selecting step based on the time relationship measured in the measuring step.
(Embodiment 16) In the measuring step, the time required for the compression processing of each video signal is further measured,
The video distribution method according to embodiment 15, wherein the video signals selected in the selection step are sequentially switched based on the time relationship measured in the measurement step and the time required for the compression process.
(Embodiment 17) A measuring step of measuring a time relationship between input timings of respective video signals from a plurality of video photographing devices;
A selection step of sequentially switching video signals to be selected based on the time relationship measured in the measurement step from among the video signals input from the plurality of video imaging devices and selecting one video signal;
A compression step of performing a compression process on the video signal selected by the selection means,
Transmitting a video signal compressed by the compression means to a display device connected via a network and provided at a position different from the video photographing device. A computer-readable recording medium having recorded thereon.
(Embodiment 18) A measuring step of measuring a time relationship between input timings of respective video signals from a plurality of video photographing devices,
A selection step of sequentially switching video signals to be selected based on the time relationship measured in the measurement step from among the video signals input from the plurality of video imaging devices and selecting one video signal;
A compression step of performing a compression process on the video signal selected by the selection means,
Transmitting a video signal compressed by the compression means to a display device connected via a network and provided at a position different from the video photographing device. .
[0108]
【The invention's effect】
As described above, according to the present invention, in a system capable of sequentially compressing and transmitting video signals while switching a plurality of video input channels, a video in which the influence of a synchronization shift between the video input channels is minimized. By determining the switching order of the input channels, when performing the compression processing while switching the video signals for the n asynchronous channels, the video signals for the n channels can be simply discarded by discarding the video signals for one screen. Can be sent. As a result, the number of images that can be subjected to compression processing per unit time is increased, and a display image with a smooth movement with a higher image update rate can be viewed on the display side.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration example of a video distribution system according to a first embodiment.
FIG. 2 is a block diagram illustrating a detailed configuration example of a video decoder and peripheral portions thereof.
FIG. 3 is a block diagram illustrating a configuration example of a video monitoring system using the video distribution system according to the first embodiment.
FIG. 4 is a diagram showing a time relationship between channel switching in an initial state and a video signal of each channel in the first embodiment.
FIG. 5 is a diagram illustrating a phase relationship of a vertical synchronization signal of each channel in an initial state according to the first embodiment.
FIG. 6 is a diagram showing a time relationship between channel switching after a channel switching order is changed and a video signal of each channel in the first embodiment.
FIG. 7 is a diagram illustrating a phase relationship of a vertical synchronization signal after a channel switching order is changed in the first embodiment.
FIG. 8 is a flowchart illustrating an operation for determining a channel switching order in the first embodiment.
FIG. 9 is a diagram illustrating a phase relationship between a vertical synchronization signal of each channel and a compression end interrupt signal according to the second embodiment.
FIG. 10 is a diagram illustrating a phase relationship between a vertical synchronization signal and a compression end interrupt signal of each channel after a channel switching order is changed in the second embodiment.
FIG. 11 is a block diagram illustrating a detailed configuration example of a video decoder and peripheral portions thereof according to a third embodiment.
FIG. 12 is a diagram illustrating a time relationship between channel switching in an initial state and a video signal of each channel in the third embodiment.
FIG. 13 is a diagram illustrating a time relationship between channel switching after a channel switching order is changed and a video signal of each channel in the third embodiment.
FIG. 14 is a diagram illustrating another example of the time relationship between the channel switching after the channel switching order is changed and the video signal of each channel in the third embodiment.
FIG. 15 is a diagram showing a time relationship between a vertical synchronization signal of each channel and a video signal subjected to compression processing in the related art.
16 is a diagram illustrating a phase relationship of a vertical synchronization signal of each channel illustrated in FIG.
[Explanation of symbols]
10 Image processing / output device
13 Communication PC Card
14 Flash ROM card
20a to 20d Video camera (camera)
31 Public line network
32 LAN network
101 Microprocessor (CPU)
102 CPU bus-image bus bridge
103 Calculation RAM
104 Flash ROM
105 Camera control interface
106 LAN interface
107 PCMCIA slot
110 Non-volatile RAM (NVRAM)
111 Image compression IC
112 video signal decoder

Claims (1)

A video distribution system for displaying video captured by a plurality of video capturing devices via a network on a display device provided at a position different from the video capturing device,
Selecting means for selecting one video signal from video signals input from the plurality of video photographing devices;
Compression means for performing compression processing on the video signal selected by the selection means,
Transmission means for transmitting the video signal compressed by the compression means to the display device,
Measuring means for measuring a time relationship between input timings of the respective video signals from the plurality of video photographing devices,
A video distribution system characterized by sequentially switching video signals selected by the selection means based on the time relationship measured by the measurement means.

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